November 2015 - U-Boot

[U-Boot] [PATCH 00/13] x86: Provide a common MRC cache library and enable it for FSP
by Bin Meng 06 Nov '15

06 Nov '15

This series moves existing MRC cache codes in the ivybridge cpu diretory to a common place and makes some changes so that every x86 board benefits from it. It also updates FSP support codes to pass MRC cache data to fsp_init() to speed up boot time. Currently tested on Intel Bayley Bay board. Minnow Max board should work as it uses the same FSP that Bayley Bay uses. For Chromebook I cannot test that, but I see Simon added a TODO in the codes below: /* * TODO(sjg(a)chromium.org): Skip this for now as it causes boot * problems */ if (0) { pei_data->mrc_input = mrc_cache->data; pei_data->mrc_input_len = mrc_cache->data_size; } I have no idea what breaks the MRC cache on the Chromebook board. Simon, you may retest this on top of this series to see if things go better. Bin Meng (13): x86: Add ENABLE_MRC_CACHE Kconfig option x86: Move mrccache.[c|h] to a common place x86: Do sanity test on the cache record in mrccache_update() x86: Add various minor tidy-ups in mrccache codes x86: Add more common routines to manipulate mrc cache x86: ivybridge: Use APIs provided in the mrccache lib x86: Use struct mrc_region to describe a mrc region x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init() x86: baytrail: Save mrc cache to spi flash x86: Enable mrc cache for bayleybay and minnowmax x86: baytrail: Issue full system reset in reset_cpu() x86: Remove unused rw-mrc-cache properties in the link and panther dts files x86: ivybridge: Correct two typos for MRC arch/x86/Kconfig | 8 ++ arch/x86/cpu/baytrail/valleyview.c | 25 +++++ arch/x86/cpu/ivybridge/Makefile | 1 - arch/x86/cpu/ivybridge/sdram.c | 120 ++--------------------- arch/x86/dts/bayleybay.dts | 6 ++ arch/x86/dts/chromebook_link.dts | 2 - arch/x86/dts/chromebox_panther.dts | 3 - arch/x86/dts/minnowmax.dts | 6 ++ arch/x86/include/asm/arch-ivybridge/mrccache.h | 51 ---------- arch/x86/include/asm/mrccache.h | 107 +++++++++++++++++++++ arch/x86/lib/Makefile | 1 + arch/x86/lib/fsp/fsp_common.c | 30 +++++- arch/x86/lib/fsp/fsp_dram.c | 6 ++ arch/x86/{cpu/ivybridge => lib}/mrccache.c | 128 +++++++++++++++++++++---- configs/bayleybay_defconfig | 1 + configs/chromebook_link_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/minnowmax_defconfig | 1 + doc/README.x86 | 1 + 19 files changed, 313 insertions(+), 186 deletions(-) delete mode 100644 arch/x86/include/asm/arch-ivybridge/mrccache.h create mode 100644 arch/x86/include/asm/mrccache.h rename arch/x86/{cpu/ivybridge => lib}/mrccache.c (51%) -- 1.8.2.1

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[U-Boot] [PATCH 0/7] Add board detection for Odroid XU3 / XU3Lite / XU4
by Przemyslaw Marczak 06 Nov '15

06 Nov '15

This patchset adds: - define the CPU name for Chromebook Peach Pi as Exynos5800 - set the cpu id of Exynos5422 to 0x5422 - S2MPS11 PMIC I/O driver - Exynos5420-compatible (9-channel, 12-bit) ADC driver - board detection for Odroid XU3 / XU3lite / XU4 This was tested on Odroid XU3 and XU3 Lite, without the XU4, but I'm waiting for reply from the Odroid forum users. Tested with buildman for samsung. Available on github: https://github.com/bobenstein/u-boot/tree/xu3-patchset-test Przemyslaw Marczak (7): s5p: cpu_info: use defined CPU name if available peach-pi: define CPU name for SoC Exynos5800 Exynos5422/5800: set cpu id to 0x5422 dm: pmic: add s2mps11 PMIC I/O driver odroid-xu3: enable s2mps11 PMIC support Exynos: add internal ADC driver exynos5-dt: add board detection for Odroid XU3/XU3L/XU4. arch/arm/cpu/armv7/s5p-common/cpu_info.c | 5 ++ arch/arm/dts/exynos5422-odroidxu3.dts | 7 ++ arch/arm/mach-exynos/Makefile | 1 + arch/arm/mach-exynos/adc.c | 83 ++++++++++++++++++++++ arch/arm/mach-exynos/clock.c | 16 ++--- arch/arm/mach-exynos/clock_init_exynos5.c | 2 +- arch/arm/mach-exynos/common_setup.h | 4 +- arch/arm/mach-exynos/include/mach/adc.h | 45 ++++++++++++ arch/arm/mach-exynos/include/mach/cpu.h | 10 +-- arch/arm/mach-exynos/include/mach/gpio.h | 4 +- arch/arm/mach-exynos/pinmux.c | 2 +- arch/arm/mach-exynos/power.c | 2 +- board/samsung/common/exynos5-dt.c | 114 ++++++++++++++++++++++++++++++ configs/odroid-xu3_defconfig | 3 + doc/device-tree-bindings/pmic/s2mps11.txt | 17 +++++ drivers/power/pmic/Kconfig | 14 ++++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/s2mps11.c | 60 ++++++++++++++++ include/configs/odroid_xu3.h | 12 ++++ include/configs/peach-pi.h | 2 + include/power/s2mps11.h | 109 ++++++++++++++++++++++++++++ 21 files changed, 493 insertions(+), 20 deletions(-) create mode 100644 arch/arm/mach-exynos/adc.c create mode 100644 doc/device-tree-bindings/pmic/s2mps11.txt create mode 100644 drivers/power/pmic/s2mps11.c create mode 100644 include/power/s2mps11.h -- 1.9.1

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[U-Boot] [Patch V3 0/8] add LS1043AQDS board support
by Gong Qianyu 06 Nov '15

06 Nov '15

Hi all, Here are the main changes for the version 3 patchset. Mainly deal with the upstream comments for V2 and add some new patches. Please help to review them. Thanks in advance. - Fix LS1043ARDB MAINTAINERS. - Update the dts files according to the upstreaming LS1043A linux kernel dts. - Add DSPI&USB support for LS1043ARDB board. [Patch V3 1/8] pci/layerscape: add support for LS1043A PCIe LUT [Patch V3 2/8] armv8/fsl-layerscape: Remove reference to gdata [Patch V3 3/8] armv8/ls1043ardb: update MAINTAINERS [Patch V3 4/8] armv8/ls1043ardb: dts: add dtb support [Patch V3 5/8] armv8/ls1043aqds: add LS1043AQDS board support [Patch V3 6/8] armv8/ls1043aqds: dts: add dtb support [Patch V3 7/8] armv8/ls1043ardb: add DSPI support [Patch V3 8/8] armv8/ls1043ardb: add USB support

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[U-Boot] [Patch V2 0/4] add LS1043AQDS support
by Gong Qianyu 06 Nov '15

06 Nov '15

Hi all, Here are the changes for V2 patchset. Please help to review them. - Fix pcie compile errors for LS1021A. - Add LS1043ARDB and LS1043AQDS dtb support in U-Boot. [Patch V2 1/4] pci/layerscape: add support for LS1043A PCIe LUT [Patch V2 2/4] armv8/ls1043ardb: dts: add dtb support [Patch V2 3/4] armv8/ls1043aqds: add LS1043AQDS board support [Patch V2 4/4] armv8/ls1043aqds: dts: add dtb support Thanks, Qianyu

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[U-Boot] [PATCH v2 00/17]
by Lin Huang 06 Nov '15

06 Nov '15

This series patch bring up rk3036 uboot, since rk3036 only 4K size SRAM for SPL, so in SPL image only support timer, uart, sdram driver, adn back to bootrom when finish ddr initial. Lin Huang (17): rockchip: add timer driver rockchip: move SYS_MALLOC_F_LEN to rk3288 own Kconfig rockchip: rename board-spl.c to rk3288-board-spl.c rockchip: add config decide whether to build common.c dm: core: Add SPL Kconfig for REGMAP and SYSCON rockchip: serial driver support rk3036 rockchip: Bring in RK3036 device tree file includes and bindings rockchip: rk3036: Add clock driver rockchip: rk3036: Add header files for GRF rockchip: rk3036: Add Soc reset driver rockchip: rk3036: Add a simple syscon driver rockchip: rk3036: Add pinctrl driver rockchip: Add an rk3036 MMC driver rockchip: add early uart driver rockchip: add rk3036 sdram driver rockchip: rk3036: Add core Soc start-up code rockchip: Add basic support for evb-rk3036 board arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3036-sdk.dts | 46 ++ arch/arm/dts/rk3036.dtsi | 427 +++++++++++++ arch/arm/include/asm/arch-rockchip/cru_rk3036.h | 168 +++++ arch/arm/include/asm/arch-rockchip/grf_rk3036.h | 493 +++++++++++++++ arch/arm/include/asm/arch-rockchip/sdram_rk3036.h | 337 ++++++++++ arch/arm/include/asm/arch-rockchip/timer.h | 16 + arch/arm/include/asm/arch-rockchip/uart.h | 39 ++ arch/arm/mach-rockchip/Kconfig | 13 +- arch/arm/mach-rockchip/Makefile | 10 +- arch/arm/mach-rockchip/board-spl.c | 287 --------- arch/arm/mach-rockchip/board.c | 1 + arch/arm/mach-rockchip/rk3036-board-spl.c | 44 ++ arch/arm/mach-rockchip/rk3036/Kconfig | 17 + arch/arm/mach-rockchip/rk3036/Makefile | 13 + arch/arm/mach-rockchip/rk3036/reset_rk3036.c | 45 ++ arch/arm/mach-rockchip/rk3036/save_boot_param.S | 34 + arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 732 ++++++++++++++++++++++ arch/arm/mach-rockchip/rk3036/syscon_rk3036.c | 21 + arch/arm/mach-rockchip/rk3288-board-spl.c | 270 ++++++++ arch/arm/mach-rockchip/rk3288/Kconfig | 3 + arch/arm/mach-rockchip/rk_early_print.c | 55 ++ arch/arm/mach-rockchip/rk_timer.c | 48 ++ board/evb_rk3036/evb_rk3036/Kconfig | 15 + board/evb_rk3036/evb_rk3036/MAINTAINERS | 0 board/evb_rk3036/evb_rk3036/Makefile | 7 + board/evb_rk3036/evb_rk3036/evb_rk3036.c | 48 ++ configs/chromebook_jerry_defconfig | 2 + configs/evb-rk3036_defconfig | 29 + configs/firefly-rk3288_defconfig | 2 + configs/sandbox_defconfig | 2 + drivers/clk/Makefile | 1 + drivers/clk/clk_rk3036.c | 414 ++++++++++++ drivers/core/Kconfig | 19 + drivers/core/Makefile | 4 +- drivers/mmc/Kconfig | 9 + drivers/mmc/Makefile | 1 + drivers/mmc/rockchip_3036_dw_mmc.c | 487 ++++++++++++++ drivers/pinctrl/Kconfig | 18 + drivers/pinctrl/rockchip/Makefile | 1 + drivers/pinctrl/rockchip/pinctrl_rk3036.c | 276 ++++++++ drivers/serial/serial_rockchip.c | 1 + include/configs/evb_rk3036.h | 12 + include/configs/rk3036_common.h | 120 ++++ include/configs/rk3288_common.h | 6 +- include/dt-bindings/clock/rk3036-cru.h | 186 ++++++ 46 files changed, 4484 insertions(+), 298 deletions(-) create mode 100644 arch/arm/dts/rk3036-sdk.dts create mode 100644 arch/arm/dts/rk3036.dtsi create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3036.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3036.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3036.h create mode 100644 arch/arm/include/asm/arch-rockchip/timer.h create mode 100644 arch/arm/include/asm/arch-rockchip/uart.h delete mode 100644 arch/arm/mach-rockchip/board-spl.c create mode 100644 arch/arm/mach-rockchip/rk3036-board-spl.c create mode 100644 arch/arm/mach-rockchip/rk3036/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3036/Makefile create mode 100644 arch/arm/mach-rockchip/rk3036/reset_rk3036.c create mode 100644 arch/arm/mach-rockchip/rk3036/save_boot_param.S create mode 100644 arch/arm/mach-rockchip/rk3036/sdram_rk3036.c create mode 100644 arch/arm/mach-rockchip/rk3036/syscon_rk3036.c create mode 100644 arch/arm/mach-rockchip/rk3288-board-spl.c create mode 100644 arch/arm/mach-rockchip/rk_early_print.c create mode 100644 arch/arm/mach-rockchip/rk_timer.c create mode 100644 board/evb_rk3036/evb_rk3036/Kconfig create mode 100644 board/evb_rk3036/evb_rk3036/MAINTAINERS create mode 100644 board/evb_rk3036/evb_rk3036/Makefile create mode 100644 board/evb_rk3036/evb_rk3036/evb_rk3036.c create mode 100644 configs/evb-rk3036_defconfig create mode 100644 drivers/clk/clk_rk3036.c create mode 100644 drivers/mmc/rockchip_3036_dw_mmc.c create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3036.c create mode 100644 include/configs/evb_rk3036.h create mode 100644 include/configs/rk3036_common.h create mode 100644 include/dt-bindings/clock/rk3036-cru.h -- 1.9.1

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[U-Boot] [PATCH v2 1/3] dm: spi: Add support for all targets which requires MANUAL_RELOC
by Michal Simek 06 Nov '15

06 Nov '15

It is follow up patch based on "dm: Add support for all targets which requires MANUAL_RELOC" (sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3) to update function pointers for DM. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> Acked-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: None drivers/spi/spi-uclass.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index d666272e39ce..27409fb088ea 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -118,6 +118,26 @@ static int spi_post_probe(struct udevice *bus) spi->max_hz = fdtdec_get_int(gd->fdt_blob, bus->of_offset, "spi-max-frequency", 0); +#if defined(CONFIG_NEEDS_MANUAL_RELOC) + struct dm_spi_ops *ops = spi_get_ops(bus); + + + if (ops->claim_bus) + ops->claim_bus += gd->reloc_off; + if (ops->release_bus) + ops->release_bus += gd->reloc_off; + if (ops->set_wordlen) + ops->set_wordlen += gd->reloc_off; + if (ops->xfer) + ops->xfer += gd->reloc_off; + if (ops->set_speed) + ops->set_speed += gd->reloc_off; + if (ops->set_mode) + ops->set_mode += gd->reloc_off; + if (ops->cs_info) + ops->cs_info += gd->reloc_off; +#endif + return 0; } -- 2.5.0

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[U-Boot] Patches for boot using FAT file system for beaglebone black
by Da Shi Cao 06 Nov '15

06 Nov '15

Hi all,I have been using u-boot 2014.10 for a while on my beaglebone black with two features I added.1. boot from a FAT file system on mmc partition.2. output the MMC interface (0 or 1) just booted from. Today I downloaded the version 2015.10 and modified it with the same features, and it works.Please refer to the attached patch file from git format-patch Regards,Dashi Cao

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[U-Boot] [PATCH] nios2: nios2-generic: do not allocate rx buf in net.c
by Thomas Chou 06 Nov '15

06 Nov '15

Do not allocate rx buf in net.c, because altera_tse allocates its own rx buf in driver. This can save 6KB memory. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- include/configs/nios2-generic.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index 4569de8..856c836 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -33,8 +33,9 @@ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* - * MII/PHY + * NET options */ +#define CONFIG_SYS_RX_ETH_BUFFER 0 #define CONFIG_CMD_MII #define CONFIG_PHY_GIGE #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -- 2.5.0

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[U-Boot] [PATCH 1/2] altera_jtag_uart: Adjust the declaration of debug_uart_init()
by Thomas Chou 06 Nov '15

06 Nov '15

Follow commit 97b059730218 ("debug_uart: Adjust the declaration of debug_uart_init()") Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- drivers/serial/altera_jtag_uart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c index 767603c..5f0d7ac 100644 --- a/drivers/serial/altera_jtag_uart.c +++ b/drivers/serial/altera_jtag_uart.c @@ -130,7 +130,7 @@ U_BOOT_DRIVER(altera_jtaguart) = { #include <debug_uart.h> -void debug_uart_init(void) +void _debug_uart_init(void) { } -- 2.5.0

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[U-Boot] [PATCH V2 00/13] SPL mmc refactor and alternate boot device feature
by Nikita Kiryanov 06 Nov '15

06 Nov '15

This series has two parts: patches 1-7 perform refactors aimed at reducing the ifdef complexity of SPL mmc code (and some nand as well). This refactor also addresses a few design issues I noticed while working on the refactor. Image size comparison for arm modules can be seen here: http://patchwork.ozlabs.org/patch/534387/ Since the changes in V2 are minimal, the V1 results should still be valid for the V2 as well. The rest of the series introduces a new SPL feature that allows board code to define a list of boot devices that SPL will try before failing (instead of the only one device it attempts now). This feature is useful for implementing fallbacks, as well as reacting to bootROM sequences. For example: On CM-FX6, if boot from the alternate boot device (MMC) fails, the bootROM proceeds to try boot from SPI flash. If the SPI flash boot is succesful, SPL will still try to load U-Boot from MMC, instead of from the actual boot device SPI flash), and probably fail and hang. The alternate boot feature makes it possible for SPL to follow the MMC boot attempt with boot from the SPI flash. The CM-FX6 based miniature PC Utilite depends on this capability for its SPI flash boot to work, since SPI flash boot is only attempted if MMC boot fails. Finally, patch 13 makes SPL look at the specific BOOT_DEVICE_MMCx, and search for the correct mmc device, instead of always going for mmc0. This series was compile tested for arm and powerpc (patches 1-12). Patch 13 compile tested for sunxi. Tested on CM-FX6. Cc: Igor Grinberg <grinberg(a)compulab.co.il> Cc: Tom Rini <trini(a)konsulko.com> Cc: Hans de Goede <hdegoede(a)redhat.com> Cc: Pantelis Antoniou <panto(a)antoniou-consulting.com> Cc: Otavio Salvador <otavio.salvador(a)ossystems.com.br> Changes in V2: - Per request I went over the changes to see if they should cause documentation updates or board updates, but found none to be necessary. - Slight modification in patch 2 (and consequentially patch 8): removal of hang() in default switch case, and enclosing of default case in #ifdef LIBCONFIG to avoid compiler complaints if LIBCONFIG support not compiled in. - Patch 13 is a new patch which makes SPL look at the value of BOOT_DEVICE_MMCx instead of always working with mmc0. A hack in sunxi boards that attempted to circumvent this issue is thus removed. - Rebased over current mainline. Nikita Kiryanov (13): spl: nand: remove code duplication spl: mmc: add break statements in spl_mmc_load_image() spl: mmc: refactor device location code to its own function spl: mmc: remove #ifdef CONFIG_SPL_OS_BOOT check spl: mmc: get rid of #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION check spl: mmc: move fs boot into its own function spl: mmc: get rid of emmc boot code duplication spl: change return values of spl_*_load_image() common: spl: move image load to its own function spl: add support for alternative boot device spl: announce boot devices arm: mx6: cm-fx6: define fallback boot devices for spl spl: mmc: add support for BOOT_DEVICE_MMC2 arch/arm/cpu/armv7/sunxi/board.c | 14 +- arch/arm/include/asm/spl.h | 2 +- board/compulab/cm_fx6/spl.c | 19 +-- common/spl/spl.c | 191 ++++++++++++++++++++------ common/spl/spl_ext.c | 6 + common/spl/spl_fat.c | 6 + common/spl/spl_mmc.c | 290 ++++++++++++++++++++++++--------------- common/spl/spl_nand.c | 47 ++++--- common/spl/spl_net.c | 9 +- common/spl/spl_nor.c | 6 +- common/spl/spl_onenand.c | 4 +- common/spl/spl_sata.c | 11 +- common/spl/spl_usb.c | 17 ++- common/spl/spl_ymodem.c | 5 +- drivers/mtd/spi/spi_spl_load.c | 17 ++- include/configs/cm_fx6.h | 1 - include/spl.h | 18 +-- 17 files changed, 441 insertions(+), 222 deletions(-) -- 1.9.1

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