November 2015 - U-Boot

[U-Boot] [PATCH 00/17] km/powerpc: various bugfixes and support for 3 new boards
by Valentin Longchamp 16 Nov '15

16 Nov '15

A few bugfixes have been done for the km_kirkwood bards in the last months and this series collects them all to be sumbitted to mainline. Furthermore, support for 3 new Keymile ppc boards are added: - kmvect1_p1a: based on 8309, first hw revision of kmvect1 - kmtepr2: based on a 8321, this is another variation of tuxx1 - kmtegr1: based on 8309, similarly to kmvect1 but with a lot of different peripherals Bagavathiannan Palanisamy (1): board/keymile/km82xx: setting dip_switch 3 and 4 will run bootloader Christoph Dietrich (1): powerpc/83xx: add support for kmtepr2 board Holger Brunck (7): powerpc/83xx/km: add support for kmvect1 p1a hw version powerpc/82xx: make set/get_pin for km82xx more flexible powerpc/82xx/km: add testpin detection for mgcoge3ne km/powerpc: increase space for kernel imange and FDT blob km/powerpc: move open firmware defines to km-powerpc.h km/powerpc: remove unneeded defines km/powerpc82xx: remove unused function Valentin Longchamp (8): powerpc/km8321: define CONFIG_SYS_DDRCDR powerpc/km8321: set the DDRCDR impedance settings back to half strength powerpc/km8309: define CONFIG_SYS_DDRCDR powerpc/km8360: fix the ODT parameters for CS0 km83xx: use CONFIG_ENV_ADDR for the newenv env command km8309: change the default QE_FW address powerpc/83xx: add support for kmtegr1 board km/powerpc: fix ft_board_setup prototype for km82xx & km83xx board/keymile/common/common.c | 5 ++- board/keymile/common/common.h | 2 ++ board/keymile/km82xx/km82xx.c | 57 ++++++++++++++------------------- board/keymile/km83xx/MAINTAINERS | 3 ++ board/keymile/km83xx/km83xx.c | 10 ++++-- configs/kmtegr1_defconfig | 4 +++ configs/kmtepr2_defconfig | 4 +++ configs/kmvect1_p1a_defconfig | 4 +++ include/configs/km/km-powerpc.h | 10 ++++-- include/configs/km/km8309-common.h | 12 +++++-- include/configs/km/km8321-common.h | 6 ++++ include/configs/km/km83xx-common.h | 11 ++++--- include/configs/km82xx.h | 3 -- include/configs/km8360.h | 4 +-- include/configs/suvd3.h | 65 +++++++++++++++++++++++++++++++++++--- include/configs/tuxx1.h | 43 +++++++++++++++++++++---- 16 files changed, 180 insertions(+), 63 deletions(-) create mode 100644 configs/kmtegr1_defconfig create mode 100644 configs/kmtepr2_defconfig create mode 100644 configs/kmvect1_p1a_defconfig -- 1.8.3.1

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[U-Boot] [PATCH v4] Fix board init code to use a valid C runtime environment
by Albert ARIBAUD 16 Nov '15

16 Nov '15

board_init_f_mem() alters the C runtime environment's stack it ls actually already using. This is not a valid C runtime environment. Split board_init_f_mem into C functions which do not alter their own stack and therefore run in a valid C runtime environment. Signed-off-by: Albert ARIBAUD <albert.u.boot(a)aribaud.net> --- Cc:ing custodians for all architectures which this patch affects. This patch has been build-tested for all there architectures, and run-tested on ARM OpenRD Client. For NIOS2, this patch contains all manual v1 and v2 fixes by Thomas. For x86, this patch contains all manual v2 fixes by Bin. Changes in v4: - Add comments on reserving GD at the lowest location - Add comments on post-incrementing base for each "chunk" Changes in v3: - Rebase after commit 9ac4fc82 - Simplify malloc conditional as per commit 9ac4fc82 - Fix NIOS2 return value register (r2, not r4) - Fix x86 subl argument inversion - Group allocations in a single function - Group initializations in a single function Changes in v2: - Fix all checkpatch issues - Fix board_init_f_malloc prototype mismatch - Fix board_init_[f_]xxx typo in NIOS2 - Fix aarch64 asm 'sub' syntax error arch/arc/lib/start.S | 12 +++-- arch/arm/lib/crt0.S | 6 ++- arch/arm/lib/crt0_64.S | 6 ++- arch/microblaze/cpu/start.S | 4 +- arch/nios2/cpu/start.S | 13 +++-- arch/powerpc/cpu/ppc4xx/start.S | 10 ++-- arch/x86/cpu/start.S | 5 +- arch/x86/lib/fsp/fsp_common.c | 4 +- common/init/board_init.c | 108 +++++++++++++++++++++++++++++++++++----- include/common.h | 33 +++++------- 10 files changed, 144 insertions(+), 57 deletions(-) diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S index 26a5934..2a99193 100644 --- a/arch/arc/lib/start.S +++ b/arch/arc/lib/start.S @@ -54,14 +54,16 @@ ENTRY(_start) mov %sp, CONFIG_SYS_INIT_SP_ADDR mov %fp, %sp - /* Allocate and zero GD, update SP */ - mov %r0, %sp - bl board_init_f_mem - + /* Get reserved area size, update SP and FP */ + bl board_init_f_get_reserve_size /* Update stack- and frame-pointers */ - mov %sp, %r0 + sub %sp, %sp, %r0 mov %fp, %sp + /* Initialize reserved area */ + mov %r0, %sp + bl board_init_f_init_reserve + /* Zero the one and only argument of "board_init_f" */ mov_s %r0, 0 j board_init_f diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 80548eb..4ec89a4 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -82,9 +82,11 @@ ENTRY(_main) #else bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ #endif + bl board_init_f_get_reserve_size + sub sp, sp, r0 + mov r9, sp mov r0, sp - bl board_init_f_mem - mov sp, r0 + bl board_init_f_init_reserve mov r0, #0 bl board_init_f diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index cef1c71..2891071 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -75,8 +75,10 @@ ENTRY(_main) ldr x0, =(CONFIG_SYS_INIT_SP_ADDR) #endif bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ - bl board_init_f_mem - mov sp, x0 + bl board_init_f_get_reserve_size + sub sp, sp, x0 + mov x0, sp + bl board_init_f_init_reserve mov x0, #0 bl board_init_f diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 14f46a8..206be3e 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -25,7 +25,7 @@ _start: addi r8, r0, __end mts rslr, r8 - /* TODO: Redo this code to call board_init_f_mem() */ + /* TODO: Redo this code to call board_init_f_*() */ #if defined(CONFIG_SPL_BUILD) addi r1, r0, CONFIG_SPL_STACK_ADDR mts rshr, r1 @@ -142,7 +142,7 @@ _start: ori r12, r12, 0x1a0 mts rmsr, r12 - /* TODO: Redo this code to call board_init_f_mem() */ + /* TODO: Redo this code to call board_init_f_*() */ clear_bss: /* clear BSS segments */ addi r5, r0, __bss_start diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S index 54787c5..45bf0fd 100644 --- a/arch/nios2/cpu/start.S +++ b/arch/nios2/cpu/start.S @@ -106,14 +106,17 @@ _reloc: stw r0, 4(sp) mov fp, sp - /* Allocate and zero GD, update SP */ + /* Allocate and initialize reserved area, update SP */ + movhi r2, %hi(board_init_f_get_reserve_size@h) + ori r2, r2, %lo(board_init_f_get_reserve_size@h) + callr r2 + sub sp, sp, r2 mov r4, sp - movhi r2, %hi(board_init_f_mem@h) - ori r2, r2, %lo(board_init_f_mem@h) + movhi r2, %hi(board_init_f_init_reserve@h) + ori r2, r2, %lo(board_init_f_init_reserve@h) callr r2 - /* Update stack- and frame-pointers */ - mov sp, r2 + /* Update frame-pointer */ mov fp, sp /* Call board_init_f -- never returns */ diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 77d4040..44222d2 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -761,9 +761,10 @@ _start: bl cpu_init_f /* run low-level CPU init code (from Flash) */ #ifdef CONFIG_SYS_GENERIC_BOARD + bl board_init_f_get_reserve_size + sub r1, r1, r3 mr r3, r1 - bl board_init_f_mem - mr r1, r3 + bl board_init_f_init_reserve li r0,0 stwu r0, -4(r1) stwu r0, -4(r1) @@ -1037,9 +1038,10 @@ _start: bl cpu_init_f /* run low-level CPU init code (from Flash) */ #ifdef CONFIG_SYS_GENERIC_BOARD + bl board_init_f_get_reserve_size + sub r1, r1, r3 mr r3, r1 - bl board_init_f_mem - mr r1, r3 + bl board_init_f_init_reserve stwu r0, -4(r1) stwu r0, -4(r1) #endif diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 5b4ee79..932672c 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -122,9 +122,10 @@ car_init_ret: */ #endif /* Set up global data */ + call board_init_f_get_reserve_size + subl %eax, %esp mov %esp, %eax - call board_init_f_mem - mov %eax, %esp + call board_init_f_init_reserve #ifdef CONFIG_DEBUG_UART call debug_uart_init diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index c78df94..72c458f 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -95,8 +95,8 @@ int x86_fsp_init(void) /* * The second time we enter here, adjust the size of malloc() * pool before relocation. Given gd->malloc_base was adjusted - * after the call to board_init_f_mem() in arch/x86/cpu/start.S, - * we should fix up gd->malloc_limit here. + * after the call to board_init_f_init_reserve() in arch/x86/ + * cpu/start.S, we should fix up gd->malloc_limit here. */ gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN; } diff --git a/common/init/board_init.c b/common/init/board_init.c index 1c6126d..db4d9a0 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -21,39 +21,121 @@ DECLARE_GLOBAL_DATA_PTR; #define _USE_MEMCPY #endif -/* Unfortunately x86 can't compile this code as gd cannot be assigned */ -#ifndef CONFIG_X86 +/* Unfortunately x86 or ARM can't compile this code as gd cannot be assigned */ +#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) __weak void arch_setup_gd(struct global_data *gd_ptr) { gd = gd_ptr; } -#endif /* !CONFIG_X86 */ +#endif /* !CONFIG_X86 && !CONFIG_SYS_THUMB_BUILD */ -ulong board_init_f_mem(ulong top) +/* + * Compute size of space to reserve on stack for use as 'globals' + * and return size request for reserved area. + * + * Notes: + * + * Actual reservation cannot be done from within this function as + * it requires altering the C stack pointer, so this will be done by + * the caller upon return from this function. + * + * IMPORTANT: + * + * The return value of this function has two uses: + * - it determines the amount of stack reserved for global data and + * the malloc arena; + * - it determines where the global data will be located, as on some + * architectures the caller will set gd to the base of the reserved + * location. + * + */ + +ulong board_init_f_get_reserve_size(void) +{ + ulong size; + + /* Reserve GD (rounded up to a multiple of 16 bytes) */ + size = roundup(sizeof(struct global_data), 16); + + /* Reserve malloc arena */ +#if defined(CONFIG_SYS_MALLOC_F) + size += CONFIG_SYS_MALLOC_F_LEN; +#endif + + return size; +} + +/* + * Initialize reserved space (which has been safely allocated on the C + * stack from the C runtime environment handling code). + * + * Notes: + * + * Actual reservation was done by the caller; the locations from base + * to base+size-1 (where 'size' is the value returned by the allocation + * function above) can be accessed freely without risk of corrupting the + * C runtime environment. + * + * IMPORTANT: + * + * Upon return from the allocation function above, on some architectures + * the caller will set gd to the lowest reserved location. Therefore, in + * this initialization function, the global data MUST be placed at base. + * + * ALSO IMPORTANT: + * + * On some architectures, gd will only be set once arch_setup_gd() is + * called. Therefore: + * + * Do not use 'gd->' until arch_setup_gd() has been called! + * + * IMPORTANT TOO: + * + * Initialization for each "chunk" (GD, malloc arena...) ends with an + * incrementation line of the form 'base += <some size>'. The last of + * these incrementations seems useless, as base will not be used any + * more after this incrementation; but if/when a new "chunk" is appended, + * this increment will be essential as it will give base right value for + * this new chunk (which will have to end with its own incrementation + * statement). Besides, the compiler's optimizer will silently detect + * and remove the last base incrementation, therefore leaving that last + * (seemingly useless) incrementation causes no code increase. + */ + +void board_init_f_init_reserve(ulong base) { struct global_data *gd_ptr; #ifndef _USE_MEMCPY int *ptr; #endif - /* Leave space for the stack we are running with now */ - top -= 0x40; + /* + * clear GD entirely and set it up + */ - top -= sizeof(struct global_data); - top = ALIGN(top, 16); - gd_ptr = (struct global_data *)top; + gd_ptr = (struct global_data *)base; + /* zero the area */ #ifdef _USE_MEMCPY memset(gd_ptr, '\0', sizeof(*gd)); #else for (ptr = (int *)gd_ptr; ptr < (int *)(gd_ptr + 1); ) *ptr++ = 0; #endif + /* set GD unless architecture did it already */ +#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) arch_setup_gd(gd_ptr); +#endif + /* next alloc will be higher by one GD plus 16-byte alignment */ + base += roundup(sizeof(struct global_data), 16); + + /* + * record malloc arena start + */ #if defined(CONFIG_SYS_MALLOC_F) - top -= CONFIG_SYS_MALLOC_F_LEN; - gd->malloc_base = top; + /* go down one malloc arena */ + gd->malloc_base = base; + /* next alloc will be higher by one malloc arena size */ + base += CONFIG_SYS_MALLOC_F_LEN; #endif - - return top; } diff --git a/include/common.h b/include/common.h index 09a131d..988d67a 100644 --- a/include/common.h +++ b/include/common.h @@ -225,32 +225,25 @@ void board_init_f(ulong); void board_init_r(gd_t *, ulong) __attribute__ ((noreturn)); /** - * board_init_f_mem() - Allocate global data and set stack position + * ulong board_init_f_get_reserve_size - return size of reserved area * * This function is called by each architecture very early in the start-up - * code to set up the environment for board_init_f(). It allocates space for - * global_data (see include/asm-generic/global_data.h) and places the stack - * below this. + * code to allow the C runtime to reserve space on the stack for writable + * 'globals' such as GD and the malloc arena. * - * This function requires a stack[1] Normally this is at @top. The function - * starts allocating space from 64 bytes below @top. First it creates space - * for global_data. Then it calls arch_setup_gd() which sets gd to point to - * the global_data space and can reserve additional bytes of space if - * required). Finally it allocates early malloc() memory - * (CONFIG_SYS_MALLOC_F_LEN). The new top of the stack is just below this, - * and it returned by this function. + * @return: size of reserved area + */ +ulong board_init_f_get_reserve_size(void); + +/** + * board_init_f_init_reserve - initialize the reserved area(s) * - * [1] Strictly speaking it would be possible to implement this function - * in C on many archs such that it does not require a stack. However this - * does not seem hugely important as only 64 byte are wasted. The 64 bytes - * are used to handle the calling standard which generally requires pushing - * addresses or registers onto the stack. We should be able to get away with - * less if this becomes important. + * This function is called once the C runtime has allocated the reserved + * area on the stack. It must initialize the GD at the base of that area. * - * @top: Top of available memory, also normally the top of the stack - * @return: New stack location + * @base: top from which reservation was done */ -ulong board_init_f_mem(ulong top); +void board_init_f_init_reserve(ulong base); /** * arch_setup_gd() - Set up the global_data pointer -- 2.5.0

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[U-Boot] [PATCH] usb: add support for generic EHCI devices
by Alexey Brodkin 16 Nov '15

16 Nov '15

Similarly to Linux kernel it's nice to have generic driver for EHCI-compatible host controllers. This implementation is very minimalistic and doesn't have any platform-specific glue code nor phy-related operations. For example this allows usage of USB-storage devices with Synopsys DesignWare AXS10x boards. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Marek Vasut <marex(a)denx.de> --- drivers/usb/host/Kconfig | 7 +++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-generic.c | 57 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 65 insertions(+) create mode 100644 drivers/usb/host/ehci-generic.c diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 2a2bffe..a500578 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -73,4 +73,11 @@ config USB_EHCI_UNIPHIER ---help--- Enables support for the on-chip EHCI controller on UniPhier SoCs. +config USB_EHCI_GENERIC + bool "Support for generic EHCI USB controller" + depends on OF_CONTROL + default y + ---help--- + Enables support for generic EHCI controller. + endif diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index f70f38c..b9b4471 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -32,6 +32,7 @@ else obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o endif obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o +obj-$(CONFIG_USB_EHCI_GENERIC) += ehci-generic.o obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o obj-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c new file mode 100644 index 0000000..c57ddef --- /dev/null +++ b/drivers/usb/host/ehci-generic.c @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2015 Alexey Brodkin <abrodkin(a)synopsys.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include "ehci.h" + +/* + * Even though here we don't explicitly use "struct ehci_ctrl" + * ehci_register() expects it to be the first thing that resides in + * device private data. + */ +struct generic_ehci { + struct ehci_ctrl ctrl; +}; + +static int ehci_usb_probe(struct udevice *dev) +{ + struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev); + struct ehci_hcor *hcor; + + hcor = (struct ehci_hcor *)((uint32_t)hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + + return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST); +} + +static int ehci_usb_remove(struct udevice *dev) +{ + int ret; + + ret = ehci_deregister(dev); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id ehci_usb_ids[] = { + { .compatible = "generic-ehci" }, + { } +}; + +U_BOOT_DRIVER(usb_ehci) = { + .name = "ehci_generic", + .id = UCLASS_USB, + .of_match = ehci_usb_ids, + .probe = ehci_usb_probe, + .remove = ehci_usb_remove, + .ops = &ehci_usb_ops, + .priv_auto_alloc_size = sizeof(struct generic_ehci), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; + -- 2.4.3

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[U-Boot] U-Boot as a next bootloader in a chain - reading the kernel boot args provided by the previous stage bootlader?
by Wojciech Zabolotny 16 Nov '15

16 Nov '15

Hi, I need to use U-Boot (or barebox) as a bootloader in a Raspberry Pi based system to extend booting flexibility. The problem however is that certain kernel boot arguments are prepared by the previous stage bootloader (start.elf) basing on the properties of the individual board. For example in one of the boards I use, the kernel command line when a standard kernel is booted, looks as follows (MAC address and serial number are partially masked for privacy): dma.dmachans=0x7f35 bcm2708_fb.fbwidth=720 bcm2708_fb.fbheight=480 bcm2708.boardrev=0xd bcm2708.serial=0x6f15XXXX smsc95xx.macaddr=B8:27:EB:XX:XX:XX bcm2708_fb.fbswap=1 sdhci-bcm2708.emmc_clock_freq=250000000 vc_mem.mem_base=0x1ec00000 vc_mem.mem_size=0x20000000 console=ttyAMA0 root=/dev/mmcblk0p2 rootwait Only the "console=ttyAMA0 root=/dev/mmcblk0p2 rootwait" is provided by the user (in the cmdline.txt file). The rest is generated by the start.elf. Of course when I boot the u-boot.bin instead of zImage, the same parameters are passed to it, but the U-Boot is not able to read them and to pass them to the finally booted kernel. As U-Boot shares a lot of code with the Linux kernel it should be possible to add necessary functions. It could be useful in all applications where U-Boot is used as an additional stage in the boot chain e.g., to add new booting functionalities (booting from the network, booting from the flash disk etc.). I have found a nice description, how the paremeters are passed in ARM architecture: http://www.simtec.co.uk/products/SWLINUX/files/booting%5Farticle.html but of course the solution should be probably portable (or implemented for each platform independently with unified API). -- Regards, Wojtek Wojciech M. Zabołotny My GPG/PGP keys: standard: 8192R/FE58A848 (0720 9430 85DB 7CCD F4C5 5F1E 5107 91FB FE58 A848) confidential: 16384R/C76D2FB0 (C4E7 9597 CF22 7B5D 28BF 4656 FED7 A63F C76D 2FB0)

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[U-Boot] QSPI XIP boot on am437x
by Vignesh R 16 Nov '15

16 Nov '15

Hi, With commit 7ae8350f67eea("ti: armv7: Move SPL SDRAM init to the right place, drop unused CONFIG_SPL_STACK") QSPI XIP boot appears to be broken on AM437x SK EVM. Following UART initialization code (as indicated by TODO) causes the XIP boot failure. In arch/arm/cpu/armv7/am33xx/board.c: @@ -275,9 +275,9 @@ void s_init(void) #if defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT) /* TODO: This does not work, gd is not available yet */ gd->baudrate = CONFIG_BAUDRATE; serial_init(); gd->have_console = 1; #endif I was able to boot successfully from QSPI by commenting out the above code. But, could you suggest me what needs to be done as part of TODO in order to get QSPI XIP boot working? Thanks! -- Regards Vignesh

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[U-Boot] [PATCH V2 0/5] Add support for additional splash screen locations
by Nikita Kiryanov 16 Nov '15

16 Nov '15

This series adds the following functionality to the splash_source library: - load splash image from filesystem formatted usb storage - load splash image from filesystem formatted mmc storage - load splash image from filesystem formatted sata storage Finally, use the new features on cm-fx6. Changes in V2: - Rebased over current mainline. - Added "splashfile" env variable to select splash file name dynamically. Also available: default value "splash.bmp" - Added documentation for the feature. - Refactored device initialization code so that #ifdefs are outside of the functions. This affects patches 3 and 4. Cc: Igor Grinberg <grinberg(a)compulab.co.il> Cc: Tom Rini <trini(a)konsulko.com> Nikita Kiryanov (5): splash_source: rename *_read() to *_read_raw() splash_source: add support for filesystem formatted mmc splash_source: add support for filesystem formatted usb splash_source: add support for filesystem formatted sata arm: mx6: cm-fx6: add splash locations to cm-fx6 board/compulab/cm_fx6/cm_fx6.c | 19 +++++++ board/compulab/cm_t35/cm_t35.c | 1 + common/splash_source.c | 125 +++++++++++++++++++++++++++++++++++++---- doc/README.splashprepare | 5 ++ include/splash.h | 10 ++++ 5 files changed, 150 insertions(+), 10 deletions(-) -- 1.9.1

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[U-Boot] [RFC PATCH] lib/tiny-printf.c: Add tiny printf function for space limited environments
by Stefan Roese 16 Nov '15

16 Nov '15

This patch adds a small printf() version that supports all basic formats. Its intented to be used in U-Boot SPL versions on platforms with very limited internal RAM sizes. To enable it, just define CONFIG_USE_TINY_PRINTF in your defconfig. This will result in the SPL using this tiny function and the main U-Boot still using the full-blown printf() function. This code was copied from: http://www.sparetimelabs.com/printfrevisited With mostly only coding style related changes so that its checkpatch clean. The size reduction is about 2.5KiB. Here a comparison for the db-88f6820-gp (Marvell A38x) SPL: Without this patch: 108075 13298 2824 124197 1e525 ./spl/u-boot-spl With this patch: 105398 13298 2852 121548 1dacc ./spl/u-boot-spl Note: To make it possible to compile tiny-printf.c instead of vsprintf.c when CONFIG_USE_TINY_PRINTF is defined, the functions printf() and vprintf() are moved from common/console.c into vsprintf.c in this patch. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> Cc: Hans de Goede <hdegoede(a)redhat.com> Cc: Tom Rini <trini(a)konsulko.com> --- common/console.c | 39 ---------------- lib/Kconfig | 8 ++++ lib/Makefile | 7 ++- lib/tiny-printf.c | 130 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ lib/vsprintf.c | 39 ++++++++++++++++ 5 files changed, 183 insertions(+), 40 deletions(-) create mode 100644 lib/tiny-printf.c diff --git a/common/console.c b/common/console.c index ace206c..2bfd59f 100644 --- a/common/console.c +++ b/common/console.c @@ -535,45 +535,6 @@ void puts(const char *s) } } -int printf(const char *fmt, ...) -{ - va_list args; - uint i; - char printbuffer[CONFIG_SYS_PBSIZE]; - - va_start(args, fmt); - - /* For this to work, printbuffer must be larger than - * anything we ever want to print. - */ - i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); - va_end(args); - - /* Print the string */ - puts(printbuffer); - return i; -} - -int vprintf(const char *fmt, va_list args) -{ - uint i; - char printbuffer[CONFIG_SYS_PBSIZE]; - -#if defined(CONFIG_PRE_CONSOLE_BUFFER) && !defined(CONFIG_SANDBOX) - if (!gd->have_console) - return 0; -#endif - - /* For this to work, printbuffer must be larger than - * anything we ever want to print. - */ - i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); - - /* Print the string */ - puts(printbuffer); - return i; -} - /* test if ctrl-c was pressed */ static int ctrlc_disabled = 0; /* see disable_ctrl() */ static int ctrlc_was_pressed = 0; diff --git a/lib/Kconfig b/lib/Kconfig index 30e84ed..faf3de3 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -36,6 +36,14 @@ config SYS_VSNPRINTF Thumb-2, about 420 bytes). Enable this option for safety when using sprintf() with data you do not control. +config USE_TINY_PRINTF + bool "Enable tiny printf() version" + help + This option enables a tiny, stripped down printf version. + This should only be used in space limited environments, + like SPL versions with hard memory limits. This version + reduces the code size by about 2.5KiB on armv7. + config REGEX bool "Enable regular expression support" default y if NET diff --git a/lib/Makefile b/lib/Makefile index 3eecefa..54b6555 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -79,7 +79,12 @@ obj-y += string.o obj-y += time.o obj-$(CONFIG_TRACE) += trace.o obj-$(CONFIG_LIB_UUID) += uuid.o -obj-y += vsprintf.o obj-$(CONFIG_LIB_RAND) += rand.o +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_USE_TINY_PRINTF),yy) +obj-y += tiny-printf.o +else +obj-y += vsprintf.o +endif + subdir-ccflags-$(CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED) += -O2 diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c new file mode 100644 index 0000000..d743a36 --- /dev/null +++ b/lib/tiny-printf.c @@ -0,0 +1,130 @@ +/* + * Tiny printf version for SPL + * + * Copied from: + * http://www.sparetimelabs.com/printfrevisited/printfrevisited.php + * + * Copyright (C) 2004,2008 Kustaa Nyholm + * + * SPDX-License-Identifier: LGPL-2.1+ + */ + +#include <common.h> +#include <stdarg.h> +#include <serial.h> + +static char *bf; +static char buf[12]; +static unsigned int num; +static char uc; +static char zs; + +static void out(char c) +{ + *bf++ = c; +} + +static void out_dgt(char dgt) +{ + out(dgt + (dgt < 10 ? '0' : (uc ? 'A' : 'a') - 10)); + zs = 1; +} + +static void div_out(unsigned int div) +{ + unsigned char dgt = 0; + + num &= 0xffff; /* just for testing the code with 32 bit ints */ + while (num >= div) { + num -= div; + dgt++; + } + + if (zs || dgt > 0) + out_dgt(dgt); +} + +int printf(const char *fmt, ...) +{ + va_list va; + char ch; + char *p; + + va_start(va, fmt); + + while ((ch = *(fmt++))) { + if (ch != '%') { + putc(ch); + } else { + char lz = 0; + char w = 0; + + ch = *(fmt++); + if (ch == '0') { + ch = *(fmt++); + lz = 1; + } + + if (ch >= '0' && ch <= '9') { + w = 0; + while (ch >= '0' && ch <= '9') { + w = (((w << 2) + w) << 1) + ch - '0'; + ch = *fmt++; + } + } + bf = buf; + p = bf; + zs = 0; + + switch (ch) { + case 0: + goto abort; + case 'u': + case 'd': + num = va_arg(va, unsigned int); + if (ch == 'd' && (int)num < 0) { + num = -(int)num; + out('-'); + } + div_out(10000); + div_out(1000); + div_out(100); + div_out(10); + out_dgt(num); + break; + case 'x': + case 'X': + uc = ch == 'X'; + num = va_arg(va, unsigned int); + div_out(0x1000); + div_out(0x100); + div_out(0x10); + out_dgt(num); + break; + case 'c': + out((char)(va_arg(va, int))); + break; + case 's': + p = va_arg(va, char*); + break; + case '%': + out('%'); + default: + break; + } + + *bf = 0; + bf = p; + while (*bf++ && w > 0) + w--; + while (w-- > 0) + putc(lz ? '0' : ' '); + while ((ch = *p++)) + putc(ch); + } + } + +abort: + va_end(va); + return 0; +} diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 4c82837..8cc5b38 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -861,6 +861,45 @@ int sprintf(char *buf, const char *fmt, ...) return i; } +int printf(const char *fmt, ...) +{ + va_list args; + uint i; + char printbuffer[CONFIG_SYS_PBSIZE]; + + va_start(args, fmt); + + /* For this to work, printbuffer must be larger than + * anything we ever want to print. + */ + i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); + va_end(args); + + /* Print the string */ + puts(printbuffer); + return i; +} + +int vprintf(const char *fmt, va_list args) +{ + uint i; + char printbuffer[CONFIG_SYS_PBSIZE]; + +#if defined(CONFIG_PRE_CONSOLE_BUFFER) && !defined(CONFIG_SANDBOX) + if (!gd->have_console) + return 0; +#endif + + /* For this to work, printbuffer must be larger than + * anything we ever want to print. + */ + i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); + + /* Print the string */ + puts(printbuffer); + return i; +} + static void panic_finish(void) __attribute__ ((noreturn)); static void panic_finish(void) -- 2.6.3

3 5

[U-Boot] [PATCH v5 1/2] usb: zynqmp: Add XHCI driver support
by Siva Durga Prasad Paladugu 16 Nov '15

16 Nov '15

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Added USB XHCI driver support for zynqmp. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- Changes for v5: - Removed __board_usb_init() as per review comment Changes for v4: - Added sanity check for index as per review comment Changes for v3: - Decreased the phy reset delay to 10 micro secs - Defined base addresses in board config file as per review comment. Changes for v2: - Moved all from xhci-zynqmp.h to .c file as per review comment - Removed ad-hoc function zynqmp_xhci_core_exit() as per review comment --- drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-zynqmp.c | 143 ++++++++++++++++++++++++++++++++++++ include/configs/xilinx_zynqmp_ep.h | 2 + 3 files changed, 146 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/host/xhci-zynqmp.c diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index f70f38c..645b990 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o # xhci obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o +obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c new file mode 100644 index 0000000..2664815 --- /dev/null +++ b/drivers/usb/host/xhci-zynqmp.c @@ -0,0 +1,143 @@ +/* + * Copyright 2015 Xilinx, Inc. + * + * Zynq USB HOST xHCI Controller + * + * Author: Siva Durga Prasad Paladugu<sivadur(a)xilinx.com> + * + * This file was reused from Freescale USB xHCI + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <usb.h> +#include <asm-generic/errno.h> +#include <asm/arch-zynqmp/hardware.h> +#include <linux/compat.h> +#include <linux/usb/dwc3.h> +#include "xhci.h" + +/* Declare global data pointer */ +DECLARE_GLOBAL_DATA_PTR; + +/* Default to the ZYNQMP XHCI defines */ +#define USB3_PWRCTL_CLK_CMD_MASK 0x3FE000 +#define USB3_PWRCTL_CLK_FREQ_MASK 0xFFC +#define USB3_PHY_PARTIAL_RX_POWERON BIT(6) +#define USB3_PHY_RX_POWERON BIT(14) +#define USB3_PHY_TX_POWERON BIT(15) +#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON) +#define USB3_PWRCTL_CLK_CMD_SHIFT 14 +#define USB3_PWRCTL_CLK_FREQ_SHIFT 22 + +/* USBOTGSS_WRAPPER definitions */ +#define USBOTGSS_WRAPRESET BIT(17) +#define USBOTGSS_DMADISABLE BIT(16) +#define USBOTGSS_STANDBYMODE_NO_STANDBY BIT(4) +#define USBOTGSS_STANDBYMODE_SMRT BIT(5) +#define USBOTGSS_STANDBYMODE_SMRT_WKUP (0x3 << 4) +#define USBOTGSS_IDLEMODE_NOIDLE BIT(2) +#define USBOTGSS_IDLEMODE_SMRT BIT(3) +#define USBOTGSS_IDLEMODE_SMRT_WKUP (0x3 << 2) + +/* USBOTGSS_IRQENABLE_SET_0 bit */ +#define USBOTGSS_COREIRQ_EN BIT(1) + +/* USBOTGSS_IRQENABLE_SET_1 bits */ +#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN BIT(1) +#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN BIT(3) +#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN BIT(4) +#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN BIT(5) +#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN BIT(8) +#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN BIT(11) +#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN BIT(12) +#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN BIT(13) +#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16) +#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) + +struct zynqmp_xhci { + struct xhci_hccr *hcd; + struct dwc3 *dwc3_reg; +}; + +static struct zynqmp_xhci zynqmp_xhci; + +unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST; + +void usb_phy_reset(struct dwc3 *dwc3_reg) +{ + /* Assert USB3 PHY reset */ + setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Assert USB2 PHY reset */ + setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); + + udelay(10); + + /* Clear USB3 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Clear USB2 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); +} + +static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci) +{ + int ret = 0; + + ret = dwc3_core_init(zynqmp_xhci->dwc3_reg); + if (ret) { + debug("%s:failed to initialize core\n", __func__); + return ret; + } + + /* We are hard-coding DWC3 core to Host Mode */ + dwc3_set_mode(zynqmp_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); + + return ret; +} + +int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) +{ + struct zynqmp_xhci *ctx = &zynqmp_xhci; + int ret = 0; + + if (index < 0 || index >= ARRAY_SIZE(ctr_addr)) + return -EINVAL; + + ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; + ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); + + ret = board_usb_init(index, USB_INIT_HOST); + if (ret != 0) { + puts("Failed to initialize board for USB\n"); + return ret; + } + + ret = zynqmp_xhci_core_init(ctx); + if (ret < 0) { + puts("Failed to initialize xhci\n"); + return ret; + } + + *hccr = (struct xhci_hccr *)ctx->hcd; + *hcor = (struct xhci_hcor *)((uint32_t) *hccr + + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + + debug("zynqmp-xhci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + + return ret; +} + +void xhci_hcd_stop(int index) +{ + /* + * Currently zynqmp socs do not support PHY shutdown from + * sw. But this support may be added in future socs. + */ + + return 0; +} diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index ed6023a..1845622 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -23,6 +23,8 @@ #define CONFIG_SYS_I2C_ZYNQ #define CONFIG_ZYNQ_EEPROM #define CONFIG_AHCI +#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ + ZYNQMP_USB1_XHCI_BASEADDR} #include <configs/xilinx_zynqmp.h> -- 1.7.1

2 4

[U-Boot] [PATCH 00/14] dm: pci: Support native driver model calls
by Simon Glass 16 Nov '15

16 Nov '15

At present driver model supports PCI, but most of the code in U-Boot still uses the old API. This series changes the 'pci' command so that the new API is used. The old API is placed behind a 'compatibility' option. The overall goal is to deprecate the old API and remove all use of it. The auto-config and device finding will be the subject of future patches. Simon Glass (14): pci: Move 'pci scan' code in with other commands pci: Use a common return in command processing pci: Use a separate variable for the bus number pci: Refactor the pciinfo() function dm: pci: Add a comment about how to find struct pci_controller dm: pci: Rename pci_auto.c to pci_auto_old.c dm: pci: Move common auto-config functions to a common file dm: pci: Reorder functions in cmd_pci.c pci: Use common functions to read/write config pci: Fix pci_field_width() for 32-bit values pci: Use a separate 'dev' variable for the PCI device pci: Move PCI header output code into its own function dm: pci: Convert 'pci' command to driver model dm: pci: Disable PCI compatibility functions by default arch/arm/mach-tegra/Kconfig | 2 + arch/x86/Kconfig | 3 + common/cmd_pci.c | 579 +++++++++++++++++++---------- configs/sandbox_defconfig | 10 +- drivers/pci/Kconfig | 9 + drivers/pci/Makefile | 5 +- drivers/pci/pci_auto_common.c | 128 +++++++ drivers/pci/{pci_auto.c => pci_auto_old.c} | 122 ------ include/common.h | 1 - include/pci.h | 23 +- 10 files changed, 542 insertions(+), 340 deletions(-) create mode 100644 drivers/pci/pci_auto_common.c rename drivers/pci/{pci_auto.c => pci_auto_old.c} (79%) -- 2.6.0.rc2.230.g3dd15c0

2 29

[U-Boot] [PATCH v2 1/5] arm: ls1021a: merge SoC specific code in a separate file
by Yuan Yao 15 Nov '15

15 Nov '15

Create a soc.c file to put the code for soc special settings. Signed-off-by: Yuan Yao <yao.yuan(a)freescale.com> --- Changes in v2: update to the lastest base. --- arch/arm/cpu/armv7/ls102xa/Makefile | 1 + arch/arm/cpu/armv7/ls102xa/soc.c | 66 +++++++++++++++++++++++++ arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 12 +++++ board/freescale/ls1021aqds/ls1021aqds.c | 49 +----------------- board/freescale/ls1021atwr/ls1021atwr.c | 42 +--------------- 5 files changed, 83 insertions(+), 87 deletions(-) create mode 100644 arch/arm/cpu/armv7/ls102xa/soc.c create mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h diff --git a/arch/arm/cpu/armv7/ls102xa/Makefile b/arch/arm/cpu/armv7/ls102xa/Makefile index 2311468..0228300 100644 --- a/arch/arm/cpu/armv7/ls102xa/Makefile +++ b/arch/arm/cpu/armv7/ls102xa/Makefile @@ -8,6 +8,7 @@ obj-y += cpu.o obj-y += clock.o obj-y += timer.o obj-y += fsl_epu.o +obj-y += soc.o obj-$(CONFIG_SCSI_AHCI_PLAT) += ls102xa_sata.o obj-$(CONFIG_OF_LIBFDT) += fdt.o diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c new file mode 100644 index 0000000..0fdd6d4 --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -0,0 +1,66 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/io.h> +#include <asm/arch/immap_ls102xa.h> +#include <asm/arch/ls102xa_soc.h> + +unsigned int get_soc_major_rev(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + unsigned int svr, major; + + svr = in_be32(&gur->svr); + major = SVR_MAJ(svr); + + return major; +} + +int arch_soc_init(void) +{ + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + unsigned int major; + +#ifdef CONFIG_FSL_QSPI + out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); +#endif + +#ifdef CONFIG_FSL_DCU_FB + out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); +#endif + + /* Configure Little endian for SAI, ASRC and SPDIF */ + out_be32(&scfg->endiancr, SCFG_ENDIANCR_LE); + + /* + * Enable snoop requests and DVM message requests for + * Slave insterface S4 (A7 core cluster) + */ + out_le32(&cci->slave[4].snoop_ctrl, + CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); + + major = get_soc_major_rev(); + if (major == SOC_MAJOR_VER_1_0) { + /* + * Set CCI-400 Slave interface S1, S2 Shareable Override + * Register All transactions are treated as non-shareable + */ + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + + /* Workaround for the issue that DDR could not respond to + * barrier transaction which is generated by executing DSB/ISB + * instruction. Set CCI-400 control override register to + * terminate the barrier transaction. After DDR is initialized, + * allow barrier transaction to DDR again */ + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); + } + + return 0; +} diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h new file mode 100644 index 0000000..f10cb91 --- /dev/null +++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h @@ -0,0 +1,12 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_LS102XA_SOC_H +#define __FSL_LS102XA_SOC_H + +unsigned int get_soc_major_rev(void); +int arch_soc_init(void); +#endif /* __FSL_LS102XA_SOC_H */ diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index d889ad5..be3358a 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -11,6 +11,7 @@ #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/ls102xa_stream_id.h> +#include <asm/arch/ls102xa_soc.h> #include <asm/arch/ls102xa_devdis.h> #include <asm/arch/ls102xa_sata.h> #include <hwconfig.h> @@ -140,17 +141,6 @@ unsigned long get_board_ddr_clk(void) return 66666666; } -unsigned int get_soc_major_rev(void) -{ - struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - unsigned int svr, major; - - svr = in_be32(&gur->svr); - major = SVR_MAJ(svr); - - return major; -} - int select_i2c_ch_pca9547(u8 ch) { int ret; @@ -193,8 +183,6 @@ int board_mmc_init(bd_t *bis) int board_early_init_f(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; - struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; - unsigned int major; #ifdef CONFIG_TSEC_ENET /* clear BD & FR bits for BE BD's and frame data */ @@ -205,40 +193,7 @@ int board_early_init_f(void) init_early_memctl_regs(); #endif -#ifdef CONFIG_FSL_QSPI - out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); -#endif - -#ifdef CONFIG_FSL_DCU_FB - out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); -#endif - - /* Configure Little endian for SAI, ASRC and SPDIF */ - out_be32(&scfg->endiancr, SCFG_ENDIANCR_LE); - - /* - * Enable snoop requests and DVM message requests for - * Slave insterface S4 (A7 core cluster) - */ - out_le32(&cci->slave[4].snoop_ctrl, - CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); - - major = get_soc_major_rev(); - if (major == SOC_MAJOR_VER_1_0) { - /* - * Set CCI-400 Slave interface S1, S2 Shareable Override - * Register All transactions are treated as non-shareable - */ - out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - - /* Workaround for the issue that DDR could not respond to - * barrier transaction which is generated by executing DSB/ISB - * instruction. Set CCI-400 control override register to - * terminate the barrier transaction. After DDR is initialized, - * allow barrier transaction to DDR again */ - out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); - } + arch_soc_init(); #if defined(CONFIG_DEEP_SLEEP) if (is_warm_boot()) diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 4918c11..8eaff5f 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -12,6 +12,7 @@ #include <asm/arch/fsl_serdes.h> #include <asm/arch/ls102xa_stream_id.h> #include <asm/arch/ls102xa_devdis.h> +#include <asm/arch/ls102xa_soc.h> #include <asm/arch/ls102xa_sata.h> #include <hwconfig.h> #include <mmc.h> @@ -138,17 +139,6 @@ int checkboard(void) return 0; } -unsigned int get_soc_major_rev(void) -{ - struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - unsigned int svr, major; - - svr = in_be32(&gur->svr); - major = SVR_MAJ(svr); - - return major; -} - void ddrmc_init(void) { struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; @@ -394,8 +384,6 @@ conflict: int board_early_init_f(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; - struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; - unsigned int major; #ifdef CONFIG_TSEC_ENET /* clear BD & FR bits for BE BD's and frame data */ @@ -407,33 +395,7 @@ int board_early_init_f(void) init_early_memctl_regs(); #endif -#ifdef CONFIG_FSL_DCU_FB - out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); -#endif - -#ifdef CONFIG_FSL_QSPI - out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); -#endif - - /* Configure Little endian for SAI, ASRC and SPDIF */ - out_be32(&scfg->endiancr, SCFG_ENDIANCR_LE); - - /* - * Enable snoop requests and DVM message requests for - * Slave insterface S4 (A7 core cluster) - */ - out_le32(&cci->slave[4].snoop_ctrl, - CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); - - major = get_soc_major_rev(); - if (major == SOC_MAJOR_VER_1_0) { - /* - * Set CCI-400 Slave interface S1, S2 Shareable Override - * Register All transactions are treated as non-shareable - */ - out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - } + arch_soc_init(); #if defined(CONFIG_DEEP_SLEEP) if (is_warm_boot()) { -- 2.1.0.27.g96db324

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