November 2015 - U-Boot

[U-Boot] [PATCH] freescale: fman: make sure phy-handle property is big endian
by shh.xie＠gmail.com 15 Dec '15

15 Dec '15

From: Shaohui Xie <Shaohui.Xie(a)freescale.com> When creating phy-handle property, an unsigned int value is created by fdt_create_phandle, and memcpy is used to get the value, since DTS is big endian, the value cannot be used directly on little endian SoCs, it should be converted by cpu_to_fdt32. Signed-off-by: Shaohui Xie <Shaohui.Xie(a)freescale.com> --- board/freescale/common/fman.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/common/fman.c b/board/freescale/common/fman.c index 26cf517..b5025ab 100644 --- a/board/freescale/common/fman.c +++ b/board/freescale/common/fman.c @@ -52,6 +52,8 @@ int fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr, if (!ph) return -FDT_ERR_BADPHANDLE; + ph = cpu_to_fdt32(ph); + offset = fdt_node_offset_by_compat_reg(fdt, compat, addr); if (offset < 0) return offset; -- 2.1.0.27.g96db324

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[U-Boot] [PATCH v1 0/7] Enable high speed and heavy load for DDR4 for LSCH3
by York Sun 15 Dec '15

15 Dec '15

This patch set revises the DDR driver to support higher speed for DDR4 under heavy load (two dual-rank DIMMs) for four-chipselect interleaving. Single quad-rank DIMM is not supported yet. York Sun (7): driver/ddr/fsl: Update DDR4 RTT values driver/ddr/fsl: Update DDR4 MR6 for Vref range driver/ddr/fsl: Update MR5 RTT park driver/ddr/fsl: Update workaround for A008511 for vref range driver/ddr/fsl: Update timing config for heavy load armv8/ls2085aqds: Update DDR settings for four chip-select case armv8/ls2085ardb: Update DDR settings for four chip-select case board/freescale/ls2085aqds/ddr.c | 16 ++- board/freescale/ls2085ardb/ddr.c | 16 ++- drivers/ddr/fsl/ctrl_regs.c | 48 +++++++- drivers/ddr/fsl/fsl_ddr_gen4.c | 22 ++-- drivers/ddr/fsl/options.c | 237 +++++++++++++++++++++++++++++++++++++- include/fsl_ddr_sdram.h | 9 ++ 6 files changed, 325 insertions(+), 23 deletions(-) -- 1.7.9.5

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[U-Boot] [PATCH 1/2] microblaze: spl: Do not call mem_malloc_init and use early alloc
by Michal Simek 14 Dec '15

14 Dec '15

This patch has some parts connected together: - Use _gd in bss section which is automatically cleared Location at SPL_MALLOC_END wasn't cleared at all - Use MALLOC_F_LEN(early alloc) instead of FULL MALLOC (mem_malloc_init is not called at all) - Simplify malloc and stack init. At the end of SPL addr is malloc area and below is stack Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/microblaze/cpu/start.S | 6 +++++- include/configs/microblaze-generic.h | 32 +++++++++++--------------------- 2 files changed, 16 insertions(+), 22 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index cf9ee7e3e6ad..953d3a15eef2 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -162,7 +162,11 @@ clear_bss: #endif brai board_init_f #else - addi r31, r0, CONFIG_SYS_SPL_MALLOC_END + addi r31, r0, _gd +#if defined(CONFIG_SYS_MALLOC_F_LEN) + addi r6, r0, CONFIG_SPL_STACK_ADDR + swi r6, r31, GD_MALLOC_BASE +#endif brai board_init_r #endif 1: bri 1b diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 770acbea691b..166ab4f05654 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -113,7 +113,12 @@ #endif #define CONFIG_SYS_MALLOC_LEN 0xC0000 -#define CONFIG_SYS_MALLOC_F_LEN 1024 +#ifndef CONFIG_SPL_BUILD +# define CONFIG_SYS_MALLOC_F_LEN 1024 +#else +# define CONFIG_SYS_MALLOC_SIMPLE +# define CONFIG_SYS_MALLOC_F_LEN 0x150 +#endif /* Stack location before relocation */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE @@ -426,25 +431,11 @@ /* BRAM start */ #define CONFIG_SYS_INIT_RAM_ADDR 0x0 /* BRAM size - will be generated */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 -/* Stack pointer prior relocation, must situated at on-chip RAM */ -#define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100 - -/* - * The main reason to do it in this way is that MALLOC_START - * can't be defined - common/spl/spl.c - */ -#if (CONFIG_SYS_SPL_MALLOC_SIZE != 0) -# define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \ - CONFIG_SYS_SPL_MALLOC_SIZE) -# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START -#else -# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END -#endif +# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + CONFIG_SYS_MALLOC_F_LEN) /* Just for sure that there is a space for stack */ #define CONFIG_SPL_STACK_SIZE 0x100 @@ -453,8 +444,7 @@ #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_INIT_RAM_ADDR - \ - GENERATED_GBL_DATA_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE - \ + CONFIG_SYS_MALLOC_F_LEN - \ CONFIG_SPL_STACK_SIZE) #endif /* __CONFIG_H */ -- 1.8.2.3

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[U-Boot] [PATCHv1 0/3] Retrieve MAC address from EEPROM
by Olliver Schinagl 14 Dec '15

14 Dec '15

From: Olliver Schinagl <o.schinagl(a)ultimaker.com> This patch-series introduces methods to retrieve the MAC address from an onboard EEPROM. I know there is probably a thing or two that might needed to be changed to make the concept apply in a more generic way. The reason we might want to read the MAC address from an EEPROM instead of storing the entire environment is mostly a size thing. Our default environment already is bigger then the EEPROM so it is understandable that someone might not give up the entire eeprom just for the u-boot environment. Especially if only board specific things might be stored in the eeprom (MAC, serial, product number etc). The current idea of the eeprom layout, is to skip the first 8 bytes, so that other information can be stored there if needed, for example a header with some magic to identify the EEPROM. Or equivalent purposes. After those 8 bytes the MAC address follows and identifier byte to indicate the interface the MAC is applicable too, 0x00 - 0xFE to indicate ethernet interface 0 to 254. 0xFF has special meaning that it does not matter. This bit (no pun intended) is where I am not sure it should be in here at all, but it seemed more logical than simple order based. For example, if there are 2 ethernet devices on a board, eth0 being an internal device, and eth1 being an external facing device and only 1 MAC address per device is allotted, it can seem logical that eth1 gets the MAC address and eth0 gets a randomly chosen MAC address (or whatever the fall back behavior is). These 7 bytes are then appended with a CRC8 byte and can be optionally checked, although the whole optional-ness could be very well dropped. Hans de Goede and I talked about retrieving the MAC from the EEPROM for sunxi based boards a while ago, but hopefully this patch makes possible to have something slightly more generic, even if only the configuration option and the EEPROM layout. Since the Olimex OLinuXino sunxi boards all seem to have an eeprom, I started my work on one of these and tested the implementation with one of our own real MAC addresses. Features planned for v2, simple tool to write the MAC address to the eeprom from Linux. Olliver Schinagl (3): net: Add ability to set MAC address via EEPROM to Kconfig sunxi: net: Allow the sunxi to set the MAC from an EEPROM sunxi: net: Enable eeprom on OLinuXino Lime2 boards board/sunxi/Kconfig | 4 +++ board/sunxi/board.c | 36 +++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 3 ++ doc/README.enetaddr | 36 +++++++++++++++++++++ net/Kconfig | 59 +++++++++++++++++++++++++++++++++++ 5 files changed, 138 insertions(+) -- 2.6.2

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[U-Boot] [PATCH v2 0/7] mtd/st_smi: Add fixes for smi driver
by Vipin Kumar 14 Dec '15

14 Dec '15

Modifications in v2 (Review comments incorporation) - Use setbits_le32 and clrbits_le32 whereever applicable in patch-set - Define smi_mtd_init() routine irrespective of CONFIG_MTD_DEVICE Modifications in v1 - Add MTD support for smi driver - Write to flash in a tight loop - Alphabetically sort the list of devices - Avoid issuing multiple write enable commands Armando Visconti (1): mtd/st_smi: Add support for Micron N25Q128 Flash Vipin Kumar (6): mtd/st_smi: Clear error flags while initiating a fresh write mtd/st_smi: Rearrange the supported devices in alphabetical order mtd/st_smi: Avoid issuing multiple WE commands mtd/st_smi: Write to flash in a tight loop mtd/st_smi: Use page sizes respective to flash mtd/st_smi: Add mtd support for smi drivers/mtd/st_smi.c | 260 ++++++++++++++++++++++++++++++++++++++------- include/linux/mtd/st_smi.h | 1 - 2 files changed, 223 insertions(+), 38 deletions(-) -- 1.8.0

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[U-Boot] [PATCH] FSL SPI read fix.
by Dale Smith 14 Dec '15

14 Dec '15

The fsl spi engine is non functional when reading from a device. This patch fixes it. Note that none of the other spi interfaces parse through the datastream looking for 0x0b bytes. -Dale diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index a1ebd33..737719b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -291,17 +291,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, debug("***spi_xfer:...%08x readed\n", tmpdin); } } - if (data_in) { - memcpy(data_in, buffer + 2 * cmd_len, tran_len); - if (*buffer == 0x0b) { - data_in += tran_len; - data_len -= tran_len; - *(int *)buffer += tran_len; - } - } spi_cs_deactivate(slave); } - + if (data_in) + memcpy(data_in, buffer + rx_offset, len); free(buffer); return 0; }

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[U-Boot] [PATCH] arm: mvebu: Move some defines to common include file
by Stefan Roese 14 Dec '15

14 Dec '15

This patch moves some config options to the mvebu common include file. Making it easier to not forget these defines for new boards. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Luka Perkov <luka.perkov(a)sartura.hr> Cc: Dirk Eibach <dirk.eibach(a)gdsys.cc> --- arch/arm/mach-mvebu/include/mach/config.h | 6 ++++++ include/configs/db-88f6820-gp.h | 5 ----- include/configs/db-mv784mp-gp.h | 3 --- include/configs/maxbcm.h | 3 --- 4 files changed, 6 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 74a1ff6..c282fcb 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -23,6 +23,12 @@ #define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_L2_PL310 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#endif + /* * By default kwbimage.cfg from board specific folder is used * If for some board, different configuration file need to be used, diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 228c28b..964ef64 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -14,11 +14,6 @@ #define CONFIG_ARMADA_38X #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ -#define CONFIG_SYS_L2_PL310 - -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 9058ceb..1fd005c 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -13,9 +13,6 @@ #define CONFIG_ARMADA_XP /* SOC Family Name */ #define CONFIG_DB_784MP_GP /* Board target name for DDR training */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 4e28d30..70d6db3 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -11,9 +11,6 @@ * High Level Configuration Options (easy to change) */ #define CONFIG_ARMADA_XP /* SOC Family Name */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* -- 2.6.3

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[U-Boot] [PATCH v2 0/3] Fix rockchip spl loader mkimage flow
by Jeffy Chen 14 Dec '15

14 Dec '15

This series patch fix rockchip spl loader mkimage flow, use imagename to select spl loader size & tag for different chip. Changes in v2: - Fix some coding style Jeffy Chen (3): Revert "rockchip: Add max spl size & spl header configs" rockchip: mkimage: use imagename to select spl hdr & spl size rockchip: doc: add imagename arch/arm/mach-rockchip/Kconfig | 15 -------- arch/arm/mach-rockchip/rk3036/Kconfig | 6 --- arch/arm/mach-rockchip/rk3288/Kconfig | 6 --- doc/README.rockchip | 8 ++-- tools/Makefile | 8 +--- tools/rkcommon.c | 72 ++++++++++++++++++++++++++++++++++- tools/rkcommon.h | 32 +++++++++++++++- tools/rkimage.c | 4 +- tools/rksd.c | 26 ++++--------- tools/rkspi.c | 23 ++++------- 10 files changed, 125 insertions(+), 75 deletions(-) -- 2.1.4

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Re: [U-Boot] [linux-sunxi] Mainline U-Boot, EHCI, usbkbd not working (workaround)
by B.R. Oake 13 Dec '15

13 Dec '15

(This started on the linux-sunxi mailing list but will hopefully be of interest on the U-Boot list) On 04/01/15 13:45, Lars Doelle wrote: > while testing with mainline u-boot, I came over the > problem, that the USB keyboard is not recognized. > > The device is an A20-OLinuXIno-LIME2. I used the > current A20-OLinuXino-Lime2_defconfig for building. > > In my understanding, the issue should be reproducible > with all devices having an EHCI root hub. > > --- > sun7i# usb reset > (Re)start USB... > USB0: USB EHCI 1.00 > scanning bus 0 for devices... cannot reset port 1!? > 1 USB Device(s) found > USB1: USB EHCI 1.00 > scanning bus 1 for devices... 1 USB Device(s) found > scanning usb for storage devices... 0 Storage Device(s) found > sun7i# usb tree > USB device tree: > 1 Hub (480 Mb/s, 0mA) > u-boot EHCI Host Controller > > 2 Hub (480 Mb/s, 0mA) > u-boot EHCI Host Controller > --- > > As a workaround, i plugged an USB hub in between: > [...] I also have this problem. I've tried three different USB keyboards on an A20-Olinuxino-Micro and a Banana Pi, and I always get that error "cannot reset port N!?" where N is whichever USB socket I've plugged it into, and U-Boot cannot see the keyboard. Once Linux has loaded, the keyboard works without any trouble. Can anyone suggest what is causing this? Thank you, B.R. Oake.

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[U-Boot] [PATCH] dm: core: Add platform specific bus translation function
by Stefan Roese 11 Dec '15

11 Dec '15

This patch adds the additional platform_translate_address() call to dev_get_addr(). A weak default with a 1-to-1 translation is also provided. Platforms that need a special address translation can overwrite this function. Here the explanation, why this is needed for MVEBU: When using DM with DT address translation, this does not work with the standard fdt_translate_address() function on MVEBU in SPL. Since the DT translates to the 0xf100.0000 base address for the internal registers. But SPL still has the registers mapped to the 0xd000.0000 (SOC_REGS_PHY_BASE) address that is used by the BootROM. This is because SPL may return to the BootROM for boot continuation (e.g. UART xmodem boot mode). Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> Cc: Luka Perkov <luka.perkov(a)sartura.hr> Cc: Dirk Eibach <dirk.eibach(a)gdsys.cc> --- drivers/core/device.c | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/core/device.c b/drivers/core/device.c index 758f390..27c4288 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -581,6 +581,12 @@ const char *dev_get_uclass_name(struct udevice *dev) return dev->uclass->uc_drv->name; } +__weak fdt_addr_t platform_translate_address(void *blob, int node_offset, + fdt_addr_t addr) +{ + return addr; +} + fdt_addr_t dev_get_addr(struct udevice *dev) { #if CONFIG_IS_ENABLED(OF_CONTROL) @@ -597,22 +603,30 @@ fdt_addr_t dev_get_addr(struct udevice *dev) * Use the full-fledged translate function for complex * bus setups. */ - return fdt_translate_address((void *)gd->fdt_blob, + addr = fdt_translate_address((void *)gd->fdt_blob, dev->of_offset, reg); + } else { + /* + * Use the "simple" translate function for less complex + * bus setups. + */ + addr = fdtdec_get_addr_size_auto_parent(gd->fdt_blob, + dev->parent->of_offset, + dev->of_offset, "reg", + 0, NULL); + if (CONFIG_IS_ENABLED(SIMPLE_BUS) && addr != FDT_ADDR_T_NONE) { + if (device_get_uclass_id(dev->parent) == UCLASS_SIMPLE_BUS) + addr = simple_bus_translate(dev->parent, addr); + } } /* - * Use the "simple" translate function for less complex - * bus setups. + * Some platforms need a special address translation. Those + * platforms (e.g. mvebu in SPL) can provide a platform specific + * translation function which is called now. */ - addr = fdtdec_get_addr_size_auto_parent(gd->fdt_blob, - dev->parent->of_offset, - dev->of_offset, "reg", - 0, NULL); - if (CONFIG_IS_ENABLED(SIMPLE_BUS) && addr != FDT_ADDR_T_NONE) { - if (device_get_uclass_id(dev->parent) == UCLASS_SIMPLE_BUS) - addr = simple_bus_translate(dev->parent, addr); - } + addr = platform_translate_address((void *)gd->fdt_blob, + dev->of_offset, addr); return addr; #else -- 2.6.3

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