November 2015 - U-Boot

[U-Boot] Pull request: u-boot-arm/master
by Albert ARIBAUD 10 Nov '15

10 Nov '15

Hello Tom, The following changes since commit e490ad25eb3dc4f075ed33b4b00b1f97071fcf3d: ARM64: zynqmp: Sync zynq_sdhci_init() declaration (2015-11-07 08:17:54 -0500) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to 5e68ff3949a3eebf62ba639171814f39c8e46a84: ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhere (2015-11-10 18:04:30 +0100) Note that OpenRD builds but will fail to run with gcc 5.2.1 due to this version of GCC interacting badly with arch_setup_gd(). This is a known issue which we have at least two solutions for, either reverting commit 5ba534d2 or polishing http://patchwork.ozlabs.org/patch/542076/ and applying it; in any case, that will be sorted out before v2016.01. ---------------------------------------------------------------- Albert ARIBAUD (5): stm32f429-discovery: add CONFIG_SYS_THUMB_BUILD arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD tricorder: switch to CONFIG_SYS_THUMB_BUILD kirkwood: support CONFIG_SYS_THUMB_BUILD Revive OpenRD targets Fabio Estevam (1): ls1043ardb: Add missing config entries to MAINTAINERS Stephen Warren (4): armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY armv8: allow custom MMU setup routines on ARMv8 ARM: tegra: add custom MMU setup on ARMv8 ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhere Tom Rini (1): board/ti: Update MAINTAINERS entries with more boards Vadzim Dambrouski (4): arm: add support for semihosting for ARMv7M targets arm: fix compile warnings when semihosting is enabled on ARMv7M target. arm: stm32f4: fix a bug when only first sector gets erased arm: stm32f4: fix a bug when a random sector gets erased Makefile | 2 ++ arch/arm/Kconfig | 5 ++++ arch/arm/cpu/arm926ejs/Makefile | 11 +++++++++ arch/arm/cpu/arm926ejs/cache.c | 5 ++++ arch/arm/cpu/armv7m/stm32f4/flash.c | 5 +++- arch/arm/cpu/armv8/cache_v8.c | 2 +- arch/arm/include/asm/arch-stm32f4/stm32.h | 1 + arch/arm/include/asm/cache.h | 4 +++ arch/arm/include/asm/system.h | 11 +++++---- arch/arm/lib/Makefile | 24 ++++++++++++++++++ arch/arm/lib/cache.c | 11 +++++++++ arch/arm/lib/memcpy.S | 4 +-- arch/arm/lib/memset.S | 2 +- arch/arm/lib/semihosting.c | 6 +++-- arch/arm/mach-kirkwood/Kconfig | 4 +++ arch/arm/mach-kirkwood/Makefile | 6 +++++ arch/arm/mach-orion5x/Makefile | 10 ++++++++ arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/arm64-mmu.c | 131 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/thumb1/include/asm/proc-armv/system.h | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++ board/Marvell/openrd/Kconfig | 12 +++++++++ board/Marvell/openrd/MAINTAINERS | 12 +++++++++ board/Marvell/openrd/Makefile | 14 +++++++++++ board/Marvell/openrd/kwbimage.cfg | 152 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/Marvell/openrd/openrd.c | 160 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/Marvell/openrd/openrd.h | 30 ++++++++++++++++++++++ board/freescale/ls1043ardb/MAINTAINERS | 2 ++ board/ti/am335x/MAINTAINERS | 1 + board/ti/am43xx/MAINTAINERS | 2 ++ board/ti/dra7xx/MAINTAINERS | 2 ++ configs/openrd_base_defconfig | 7 ++++++ configs/openrd_client_defconfig | 7 ++++++ configs/openrd_ultimate_defconfig | 7 ++++++ doc/README.scrapyard | 3 --- examples/standalone/Makefile | 10 ++++++++ include/configs/openrd.h | 138 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/stm32f429-discovery.h | 1 + include/configs/tegra-common-post.h | 2 -- include/configs/tricorder.h | 1 + 39 files changed, 860 insertions(+), 17 deletions(-) create mode 100644 arch/arm/mach-tegra/arm64-mmu.c create mode 100644 arch/arm/thumb1/include/asm/proc-armv/system.h create mode 100644 board/Marvell/openrd/Kconfig create mode 100644 board/Marvell/openrd/MAINTAINERS create mode 100644 board/Marvell/openrd/Makefile create mode 100644 board/Marvell/openrd/kwbimage.cfg create mode 100644 board/Marvell/openrd/openrd.c create mode 100644 board/Marvell/openrd/openrd.h create mode 100644 configs/openrd_base_defconfig create mode 100644 configs/openrd_client_defconfig create mode 100644 configs/openrd_ultimate_defconfig create mode 100644 include/configs/openrd.h Amicalement, -- Albert.

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[U-Boot] [PATCH] powerpc: Finish updating u-boot*lds scripts for newer binutils
by Tom Rini 10 Nov '15

10 Nov '15

In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in the mpc85xx linker scripts as this is not required and breaks newer binutils. This commit cleans up the rest of the powerpc linker scripts. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/powerpc/cpu/mpc512x/u-boot.lds | 1 - arch/powerpc/cpu/mpc5xx/u-boot.lds | 1 - arch/powerpc/cpu/mpc5xxx/u-boot.lds | 1 - arch/powerpc/cpu/mpc8260/u-boot.lds | 1 - arch/powerpc/cpu/mpc83xx/u-boot-spl.lds | 1 - arch/powerpc/cpu/mpc83xx/u-boot.lds | 1 - arch/powerpc/cpu/mpc86xx/u-boot.lds | 1 - arch/powerpc/cpu/ppc4xx/u-boot.lds | 1 - board/tqc/tqm8xx/u-boot.lds | 1 - 9 files changed, 9 deletions(-) diff --git a/arch/powerpc/cpu/mpc512x/u-boot.lds b/arch/powerpc/cpu/mpc512x/u-boot.lds index 9658b21..b32f74e 100644 --- a/arch/powerpc/cpu/mpc512x/u-boot.lds +++ b/arch/powerpc/cpu/mpc512x/u-boot.lds @@ -24,7 +24,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) *(.fixup) diff --git a/arch/powerpc/cpu/mpc5xx/u-boot.lds b/arch/powerpc/cpu/mpc5xx/u-boot.lds index 7198465..6a53571 100644 --- a/arch/powerpc/cpu/mpc5xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc5xx/u-boot.lds @@ -33,7 +33,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } diff --git a/arch/powerpc/cpu/mpc5xxx/u-boot.lds b/arch/powerpc/cpu/mpc5xxx/u-boot.lds index cd9e23f..aa80d3d 100644 --- a/arch/powerpc/cpu/mpc5xxx/u-boot.lds +++ b/arch/powerpc/cpu/mpc5xxx/u-boot.lds @@ -28,7 +28,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } diff --git a/arch/powerpc/cpu/mpc8260/u-boot.lds b/arch/powerpc/cpu/mpc8260/u-boot.lds index 50cbf85..469fc29 100644 --- a/arch/powerpc/cpu/mpc8260/u-boot.lds +++ b/arch/powerpc/cpu/mpc8260/u-boot.lds @@ -27,7 +27,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } diff --git a/arch/powerpc/cpu/mpc83xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc83xx/u-boot-spl.lds index 774772b..4101eaf 100644 --- a/arch/powerpc/cpu/mpc83xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc83xx/u-boot-spl.lds @@ -24,7 +24,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); } __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; diff --git a/arch/powerpc/cpu/mpc83xx/u-boot.lds b/arch/powerpc/cpu/mpc83xx/u-boot.lds index 3c177fa..dbd8bbe 100644 --- a/arch/powerpc/cpu/mpc83xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc83xx/u-boot.lds @@ -26,7 +26,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } diff --git a/arch/powerpc/cpu/mpc86xx/u-boot.lds b/arch/powerpc/cpu/mpc86xx/u-boot.lds index 58467c2..6c48f40 100644 --- a/arch/powerpc/cpu/mpc86xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc86xx/u-boot.lds @@ -32,7 +32,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index 1980508..55dd4e1 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -46,7 +46,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } diff --git a/board/tqc/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds index b77ae56..44dfafa 100644 --- a/board/tqc/tqm8xx/u-boot.lds +++ b/board/tqc/tqm8xx/u-boot.lds @@ -47,7 +47,6 @@ SECTIONS _GOT2_TABLE_ = .; KEEP(*(.got2)) KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); _FIXUP_TABLE_ = .; KEEP(*(.fixup)) } -- 1.7.9.5

1 1

[U-Boot] [PATCH] board/ti: Update MAINTAINERS entries with more boards
by Tom Rini 10 Nov '15

10 Nov '15

A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot(a)aribaud.net> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- board/ti/am335x/MAINTAINERS | 1 + board/ti/am43xx/MAINTAINERS | 2 ++ board/ti/dra7xx/MAINTAINERS | 2 ++ 3 files changed, 5 insertions(+) diff --git a/board/ti/am335x/MAINTAINERS b/board/ti/am335x/MAINTAINERS index c99e06d..7dc2b83 100644 --- a/board/ti/am335x/MAINTAINERS +++ b/board/ti/am335x/MAINTAINERS @@ -6,6 +6,7 @@ F: include/configs/am335x_evm.h F: configs/am335x_boneblack_defconfig F: configs/am335x_boneblack_vboot_defconfig F: configs/am335x_evm_defconfig +F: configs/am335x_gp_evm_defconfig F: configs/am335x_evm_nor_defconfig F: configs/am335x_evm_norboot_defconfig F: configs/am335x_evm_spiboot_defconfig diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS index 3d40b17..96ef85b 100644 --- a/board/ti/am43xx/MAINTAINERS +++ b/board/ti/am43xx/MAINTAINERS @@ -7,3 +7,5 @@ F: configs/am43xx_evm_defconfig F: configs/am43xx_evm_qspiboot_defconfig F: configs/am43xx_evm_ethboot_defconfig F: configs/am43xx_evm_usbhost_boot_defconfig +F: configs/am437x_gp_evm_defconfig +F: configs/am437x_sk_evm_defconfig diff --git a/board/ti/dra7xx/MAINTAINERS b/board/ti/dra7xx/MAINTAINERS index 5ec6769..3f638d0 100644 --- a/board/ti/dra7xx/MAINTAINERS +++ b/board/ti/dra7xx/MAINTAINERS @@ -3,6 +3,8 @@ M: Lokesh Vutla <lokeshvutla(a)ti.com> S: Maintained F: board/ti/dra7xx/ F: include/configs/dra7xx_evm.h +F: configs/dra72_evm_defconfig +F: configs/dra74_evm_defconfig F: configs/dra7xx_evm_defconfig F: configs/dra7xx_evm_qspiboot_defconfig F: configs/dra7xx_evm_uart3_defconfig -- 1.7.9.5

1 1

[U-Boot] [PATCH] Replace "extern inline" with "static inline"
by Mans Rullgard 10 Nov '15

10 Nov '15

A number of headers define functions as "extern inline" which is causing problems with gcc5. The reason is that starting with version 5.1, gcc defaults to the standard C99 semantics for the inline keyword. Under the traditional GNU inline semantics, an "extern inline" function would never create an external definition, the same as inline *without* extern in C99. In C99, and "extern inline" definition is simply an external definition with an inline hint. In short, the meanings of inline with and without extern are swapped between GNU and C99. The upshot is that all these definitions in header files create an external definition wherever those headers are included, resulting in multiple definition errors at link time. Changing all these functions to "static inline" fixes the problem since this works as desired in all gcc versions. Although the semantics are slightly different (a static inline definition may result in an actual function being emitted), it works as intended in practice. This patch also removes extern prototype declarations for the changed functions where they existed. Signed-off-by: Mans Rullgard <mans(a)mansr.com> --- This is just a quick, automatic replace. I have not tested it. I'm not sure I got all the extern prototypes. Microblaze not included since someone already sent a patch for that. --- arch/blackfin/include/asm/delay.h | 4 +-- arch/m68k/include/asm/bitops.h | 5 ++-- arch/m68k/include/asm/byteorder.h | 8 +++--- arch/m68k/include/asm/io.h | 40 ++++++++++++++--------------- arch/powerpc/include/asm/atomic.h | 8 +++--- arch/powerpc/include/asm/bitops.h | 35 ++++++++++--------------- arch/powerpc/include/asm/byteorder.h | 8 +++--- arch/powerpc/include/asm/io.h | 20 +++++++-------- arch/powerpc/include/asm/iopin_8260.h | 40 ++++++++++++++--------------- arch/powerpc/include/asm/iopin_8xx.h | 48 +++++++++++++++++------------------ arch/sparc/include/asm/irq.h | 4 +-- arch/sparc/include/asm/psr.h | 6 ++--- arch/sparc/include/asm/srmmu.h | 30 +++++++++++----------- include/mpc8260.h | 2 +- 14 files changed, 125 insertions(+), 133 deletions(-) diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h index 97401a7..f146efd 100644 --- a/arch/blackfin/include/asm/delay.h +++ b/arch/blackfin/include/asm/delay.h @@ -16,7 +16,7 @@ * Delay routines, using a pre-computed "loops_per_second" value. */ -extern __inline__ void __delay(unsigned long loops) +static __inline__ void __delay(unsigned long loops) { __asm__ __volatile__("1:\t%0 += -1;\n\t" "cc = %0 == 0;\n\t" @@ -31,7 +31,7 @@ extern __inline__ void __delay(unsigned long loops) * first constant multiplications gets optimized away if the delay is * a constant) */ -extern __inline__ void __udelay(unsigned long usecs) +static __inline__ void __udelay(unsigned long usecs) { __delay(usecs); } diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h index f9c434b..6b79a0d 100644 --- a/arch/m68k/include/asm/bitops.h +++ b/arch/m68k/include/asm/bitops.h @@ -10,21 +10,20 @@ extern void set_bit(int nr, volatile void *addr); extern void clear_bit(int nr, volatile void *addr); extern void change_bit(int nr, volatile void *addr); -extern int test_and_set_bit(int nr, volatile void *addr); extern int test_and_clear_bit(int nr, volatile void *addr); extern int test_and_change_bit(int nr, volatile void *addr); #ifdef __KERNEL__ -extern inline int test_bit(int nr, __const__ volatile void *addr) +static inline int test_bit(int nr, __const__ volatile void *addr) { __const__ unsigned int *p = (__const__ unsigned int *) addr; return (p[nr >> 5] & (1UL << (nr & 31))) != 0; } -extern inline int test_and_set_bit(int nr, volatile void *vaddr) +static inline int test_and_set_bit(int nr, volatile void *vaddr) { char retval; diff --git a/arch/m68k/include/asm/byteorder.h b/arch/m68k/include/asm/byteorder.h index 908a99b..7244b75 100644 --- a/arch/m68k/include/asm/byteorder.h +++ b/arch/m68k/include/asm/byteorder.h @@ -22,25 +22,25 @@ (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ (((__u32)(x)) >> 24) )) -extern __inline__ unsigned ld_le16(const volatile unsigned short *addr) +static __inline__ unsigned ld_le16(const volatile unsigned short *addr) { unsigned result = *addr; return __sw16(result); } -extern __inline__ void st_le16(volatile unsigned short *addr, +static __inline__ void st_le16(volatile unsigned short *addr, const unsigned val) { *addr = __sw16(val); } -extern __inline__ unsigned ld_le32(const volatile unsigned *addr) +static __inline__ unsigned ld_le32(const volatile unsigned *addr) { unsigned result = *addr; return __sw32(result); } -extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val) +static __inline__ void st_le32(volatile unsigned *addr, const unsigned val) { *addr = __sw32(val); } diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h index 2d2a519..384308b 100644 --- a/arch/m68k/include/asm/io.h +++ b/arch/m68k/include/asm/io.h @@ -67,28 +67,28 @@ #define mb() __asm__ __volatile__ ("" : : : "memory") -extern inline void _insb(volatile u8 * port, void *buf, int ns) +static inline void _insb(volatile u8 * port, void *buf, int ns) { u8 *data = (u8 *) buf; while (ns--) *data++ = *port; } -extern inline void _outsb(volatile u8 * port, const void *buf, int ns) +static inline void _outsb(volatile u8 * port, const void *buf, int ns) { u8 *data = (u8 *) buf; while (ns--) *port = *data++; } -extern inline void _insw(volatile u16 * port, void *buf, int ns) +static inline void _insw(volatile u16 * port, void *buf, int ns) { u16 *data = (u16 *) buf; while (ns--) *data++ = __sw16(*port); } -extern inline void _outsw(volatile u16 * port, const void *buf, int ns) +static inline void _outsw(volatile u16 * port, const void *buf, int ns) { u16 *data = (u16 *) buf; while (ns--) { @@ -97,14 +97,14 @@ extern inline void _outsw(volatile u16 * port, const void *buf, int ns) } } -extern inline void _insl(volatile u32 * port, void *buf, int nl) +static inline void _insl(volatile u32 * port, void *buf, int nl) { u32 *data = (u32 *) buf; while (nl--) *data++ = __sw32(*port); } -extern inline void _outsl(volatile u32 * port, const void *buf, int nl) +static inline void _outsl(volatile u32 * port, const void *buf, int nl) { u32 *data = (u32 *) buf; while (nl--) { @@ -113,14 +113,14 @@ extern inline void _outsl(volatile u32 * port, const void *buf, int nl) } } -extern inline void _insw_ns(volatile u16 * port, void *buf, int ns) +static inline void _insw_ns(volatile u16 * port, void *buf, int ns) { u16 *data = (u16 *) buf; while (ns--) *data++ = *port; } -extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns) +static inline void _outsw_ns(volatile u16 * port, const void *buf, int ns) { u16 *data = (u16 *) buf; while (ns--) { @@ -128,14 +128,14 @@ extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns) } } -extern inline void _insl_ns(volatile u32 * port, void *buf, int nl) +static inline void _insl_ns(volatile u32 * port, void *buf, int nl) { u32 *data = (u32 *) buf; while (nl--) *data++ = *port; } -extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl) +static inline void _outsl_ns(volatile u32 * port, const void *buf, int nl) { u32 *data = (u32 *) buf; while (nl--) { @@ -159,52 +159,52 @@ extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl) /* * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. */ -extern inline int in_8(volatile u8 * addr) +static inline int in_8(volatile u8 * addr) { return (int)*addr; } -extern inline void out_8(volatile u8 * addr, int val) +static inline void out_8(volatile u8 * addr, int val) { *addr = (u8) val; } -extern inline int in_le16(volatile u16 * addr) +static inline int in_le16(volatile u16 * addr) { return __sw16(*addr); } -extern inline int in_be16(volatile u16 * addr) +static inline int in_be16(volatile u16 * addr) { return (*addr & 0xFFFF); } -extern inline void out_le16(volatile u16 * addr, int val) +static inline void out_le16(volatile u16 * addr, int val) { *addr = __sw16(val); } -extern inline void out_be16(volatile u16 * addr, int val) +static inline void out_be16(volatile u16 * addr, int val) { *addr = (u16) val; } -extern inline unsigned in_le32(volatile u32 * addr) +static inline unsigned in_le32(volatile u32 * addr) { return __sw32(*addr); } -extern inline unsigned in_be32(volatile u32 * addr) +static inline unsigned in_be32(volatile u32 * addr) { return (*addr); } -extern inline void out_le32(volatile unsigned *addr, int val) +static inline void out_le32(volatile unsigned *addr, int val) { *addr = __sw32(val); } -extern inline void out_be32(volatile unsigned *addr, int val) +static inline void out_be32(volatile unsigned *addr, int val) { *addr = val; } diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h index 43a2bb2..87efcca 100644 --- a/arch/powerpc/include/asm/atomic.h +++ b/arch/powerpc/include/asm/atomic.h @@ -19,7 +19,7 @@ typedef struct { int counter; } atomic_t; extern void atomic_clear_mask(unsigned long mask, unsigned long *addr); extern void atomic_set_mask(unsigned long mask, unsigned long *addr); -extern __inline__ int atomic_add_return(int a, atomic_t *v) +static __inline__ int atomic_add_return(int a, atomic_t *v) { int t; @@ -35,7 +35,7 @@ extern __inline__ int atomic_add_return(int a, atomic_t *v) return t; } -extern __inline__ int atomic_sub_return(int a, atomic_t *v) +static __inline__ int atomic_sub_return(int a, atomic_t *v) { int t; @@ -51,7 +51,7 @@ extern __inline__ int atomic_sub_return(int a, atomic_t *v) return t; } -extern __inline__ int atomic_inc_return(atomic_t *v) +static __inline__ int atomic_inc_return(atomic_t *v) { int t; @@ -67,7 +67,7 @@ extern __inline__ int atomic_inc_return(atomic_t *v) return t; } -extern __inline__ int atomic_dec_return(atomic_t *v) +static __inline__ int atomic_dec_return(atomic_t *v) { int t; diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index a6bcf3c..986ca96 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h @@ -7,13 +7,6 @@ #include <asm/byteorder.h> -extern void set_bit(int nr, volatile void *addr); -extern void clear_bit(int nr, volatile void *addr); -extern void change_bit(int nr, volatile void *addr); -extern int test_and_set_bit(int nr, volatile void *addr); -extern int test_and_clear_bit(int nr, volatile void *addr); -extern int test_and_change_bit(int nr, volatile void *addr); - /* * Arguably these bit operations don't imply any memory barrier or * SMP ordering, but in fact a lot of drivers expect them to imply @@ -34,7 +27,7 @@ extern int test_and_change_bit(int nr, volatile void *addr); * These used to be if'd out here because using : "cc" as a constraint * resulted in errors from egcs. Things may be OK with gcc-2.95. */ -extern __inline__ void set_bit(int nr, volatile void * addr) +static __inline__ void set_bit(int nr, volatile void * addr) { unsigned long old; unsigned long mask = 1 << (nr & 0x1f); @@ -51,7 +44,7 @@ extern __inline__ void set_bit(int nr, volatile void * addr) : "cc" ); } -extern __inline__ void clear_bit(int nr, volatile void *addr) +static __inline__ void clear_bit(int nr, volatile void *addr) { unsigned long old; unsigned long mask = 1 << (nr & 0x1f); @@ -68,7 +61,7 @@ extern __inline__ void clear_bit(int nr, volatile void *addr) : "cc"); } -extern __inline__ void change_bit(int nr, volatile void *addr) +static __inline__ void change_bit(int nr, volatile void *addr) { unsigned long old; unsigned long mask = 1 << (nr & 0x1f); @@ -85,7 +78,7 @@ extern __inline__ void change_bit(int nr, volatile void *addr) : "cc"); } -extern __inline__ int test_and_set_bit(int nr, volatile void *addr) +static __inline__ int test_and_set_bit(int nr, volatile void *addr) { unsigned int old, t; unsigned int mask = 1 << (nr & 0x1f); @@ -104,7 +97,7 @@ extern __inline__ int test_and_set_bit(int nr, volatile void *addr) return (old & mask) != 0; } -extern __inline__ int test_and_clear_bit(int nr, volatile void *addr) +static __inline__ int test_and_clear_bit(int nr, volatile void *addr) { unsigned int old, t; unsigned int mask = 1 << (nr & 0x1f); @@ -123,7 +116,7 @@ extern __inline__ int test_and_clear_bit(int nr, volatile void *addr) return (old & mask) != 0; } -extern __inline__ int test_and_change_bit(int nr, volatile void *addr) +static __inline__ int test_and_change_bit(int nr, volatile void *addr) { unsigned int old, t; unsigned int mask = 1 << (nr & 0x1f); @@ -143,7 +136,7 @@ extern __inline__ int test_and_change_bit(int nr, volatile void *addr) } #endif /* __INLINE_BITOPS */ -extern __inline__ int test_bit(int nr, __const__ volatile void *addr) +static __inline__ int test_bit(int nr, __const__ volatile void *addr) { __const__ unsigned int *p = (__const__ unsigned int *) addr; @@ -152,7 +145,7 @@ extern __inline__ int test_bit(int nr, __const__ volatile void *addr) /* Return the bit position of the most significant 1 bit in a word */ /* - the result is undefined when x == 0 */ -extern __inline__ int __ilog2(unsigned int x) +static __inline__ int __ilog2(unsigned int x) { int lz; @@ -160,7 +153,7 @@ extern __inline__ int __ilog2(unsigned int x) return 31 - lz; } -extern __inline__ int ffz(unsigned int x) +static __inline__ int ffz(unsigned int x) { if ((x = ~x) == 0) return 32; @@ -226,7 +219,7 @@ static inline int ffs64(u64 x) * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above ffz (man ffs). */ -extern __inline__ int ffs(int x) +static __inline__ int ffs(int x) { return __ilog2(x & -x) + 1; } @@ -250,7 +243,7 @@ extern __inline__ int ffs(int x) #define find_first_zero_bit(addr, size) \ find_next_zero_bit((addr), (size), 0) -extern __inline__ unsigned long find_next_zero_bit(void * addr, +static __inline__ unsigned long find_next_zero_bit(void * addr, unsigned long size, unsigned long offset) { unsigned int * p = ((unsigned int *) addr) + (offset >> 5); @@ -298,7 +291,7 @@ found_middle: #define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x18, addr) #else -extern __inline__ int ext2_set_bit(int nr, void * addr) +static __inline__ int ext2_set_bit(int nr, void * addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; @@ -311,7 +304,7 @@ extern __inline__ int ext2_set_bit(int nr, void * addr) return oldbit; } -extern __inline__ int ext2_clear_bit(int nr, void * addr) +static __inline__ int ext2_clear_bit(int nr, void * addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; @@ -325,7 +318,7 @@ extern __inline__ int ext2_clear_bit(int nr, void * addr) } #endif /* __KERNEL__ */ -extern __inline__ int ext2_test_bit(int nr, __const__ void * addr) +static __inline__ int ext2_test_bit(int nr, __const__ void * addr) { __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; diff --git a/arch/powerpc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h index 3f5bcf6..f731d18 100644 --- a/arch/powerpc/include/asm/byteorder.h +++ b/arch/powerpc/include/asm/byteorder.h @@ -5,7 +5,7 @@ #ifdef __GNUC__ -extern __inline__ unsigned ld_le16(const volatile unsigned short *addr) +static __inline__ unsigned ld_le16(const volatile unsigned short *addr) { unsigned val; @@ -13,12 +13,12 @@ extern __inline__ unsigned ld_le16(const volatile unsigned short *addr) return val; } -extern __inline__ void st_le16(volatile unsigned short *addr, const unsigned val) +static __inline__ void st_le16(volatile unsigned short *addr, const unsigned val) { __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); } -extern __inline__ unsigned ld_le32(const volatile unsigned *addr) +static __inline__ unsigned ld_le32(const volatile unsigned *addr) { unsigned val; @@ -26,7 +26,7 @@ extern __inline__ unsigned ld_le32(const volatile unsigned *addr) return val; } -extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val) +static __inline__ void st_le32(volatile unsigned *addr, const unsigned val) { __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); } diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index a5257e9..a54fc46 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -163,7 +163,7 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) * is actually performed (i.e. the data has come back) before we start * executing any following instructions. */ -extern inline u8 in_8(const volatile unsigned char __iomem *addr) +static inline u8 in_8(const volatile unsigned char __iomem *addr) { u8 ret; @@ -174,7 +174,7 @@ extern inline u8 in_8(const volatile unsigned char __iomem *addr) return ret; } -extern inline void out_8(volatile unsigned char __iomem *addr, u8 val) +static inline void out_8(volatile unsigned char __iomem *addr, u8 val) { __asm__ __volatile__("sync;\n" "stb%U0%X0 %1,%0;\n" @@ -182,7 +182,7 @@ extern inline void out_8(volatile unsigned char __iomem *addr, u8 val) : "r" (val)); } -extern inline u16 in_le16(const volatile unsigned short __iomem *addr) +static inline u16 in_le16(const volatile unsigned short __iomem *addr) { u16 ret; @@ -193,7 +193,7 @@ extern inline u16 in_le16(const volatile unsigned short __iomem *addr) return ret; } -extern inline u16 in_be16(const volatile unsigned short __iomem *addr) +static inline u16 in_be16(const volatile unsigned short __iomem *addr) { u16 ret; @@ -203,18 +203,18 @@ extern inline u16 in_be16(const volatile unsigned short __iomem *addr) return ret; } -extern inline void out_le16(volatile unsigned short __iomem *addr, u16 val) +static inline void out_le16(volatile unsigned short __iomem *addr, u16 val) { __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); } -extern inline void out_be16(volatile unsigned short __iomem *addr, u16 val) +static inline void out_be16(volatile unsigned short __iomem *addr, u16 val) { __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } -extern inline u32 in_le32(const volatile unsigned __iomem *addr) +static inline u32 in_le32(const volatile unsigned __iomem *addr) { u32 ret; @@ -225,7 +225,7 @@ extern inline u32 in_le32(const volatile unsigned __iomem *addr) return ret; } -extern inline u32 in_be32(const volatile unsigned __iomem *addr) +static inline u32 in_be32(const volatile unsigned __iomem *addr) { u32 ret; @@ -235,13 +235,13 @@ extern inline u32 in_be32(const volatile unsigned __iomem *addr) return ret; } -extern inline void out_le32(volatile unsigned __iomem *addr, u32 val) +static inline void out_le32(volatile unsigned __iomem *addr, u32 val) { __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); } -extern inline void out_be32(volatile unsigned __iomem *addr, u32 val) +static inline void out_be32(volatile unsigned __iomem *addr, u32 val) { __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } diff --git a/arch/powerpc/include/asm/iopin_8260.h b/arch/powerpc/include/asm/iopin_8260.h index 619f3a8..617584d 100644 --- a/arch/powerpc/include/asm/iopin_8260.h +++ b/arch/powerpc/include/asm/iopin_8260.h @@ -23,140 +23,140 @@ iopin_t; #define IOPIN_PORTC 2 #define IOPIN_PORTD 3 -extern __inline__ void +static __inline__ void iopin_set_high(iopin_t *iopin) { volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata; datp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } -extern __inline__ void +static __inline__ void iopin_set_low(iopin_t *iopin) { volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata; datp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } -extern __inline__ uint +static __inline__ uint iopin_is_high(iopin_t *iopin) { volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata; return (datp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } -extern __inline__ uint +static __inline__ uint iopin_is_low(iopin_t *iopin) { volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata; return ((datp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } -extern __inline__ void +static __inline__ void iopin_set_out(iopin_t *iopin) { volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira; dirp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } -extern __inline__ void +static __inline__ void iopin_set_in(iopin_t *iopin) { volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira; dirp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } -extern __inline__ uint +static __inline__ uint iopin_is_out(iopin_t *iopin) { volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira; return (dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } -extern __inline__ uint +static __inline__ uint iopin_is_in(iopin_t *iopin) { volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira; return ((dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } -extern __inline__ void +static __inline__ void iopin_set_odr(iopin_t *iopin) { volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra; odrp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } -extern __inline__ void +static __inline__ void iopin_set_act(iopin_t *iopin) { volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra; odrp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } -extern __inline__ uint +static __inline__ uint iopin_is_odr(iopin_t *iopin) { volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra; return (odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } -extern __inline__ uint +static __inline__ uint iopin_is_act(iopin_t *iopin) { volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra; return ((odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } -extern __inline__ void +static __inline__ void iopin_set_ded(iopin_t *iopin) { volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara; parp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } -extern __inline__ void +static __inline__ void iopin_set_gen(iopin_t *iopin) { volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara; parp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } -extern __inline__ uint +static __inline__ uint iopin_is_ded(iopin_t *iopin) { volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara; return (parp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } -extern __inline__ uint +static __inline__ uint iopin_is_gen(iopin_t *iopin) { volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara; return ((parp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } -extern __inline__ void +static __inline__ void iopin_set_opt2(iopin_t *iopin) { volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora; sorp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } -extern __inline__ void +static __inline__ void iopin_set_opt1(iopin_t *iopin) { volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora; sorp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } -extern __inline__ uint +static __inline__ uint iopin_is_opt2(iopin_t *iopin) { volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora; return (sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } -extern __inline__ uint +static __inline__ uint iopin_is_opt1(iopin_t *iopin) { volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora; diff --git a/arch/powerpc/include/asm/iopin_8xx.h b/arch/powerpc/include/asm/iopin_8xx.h index 0123baf..8db0fa2 100644 --- a/arch/powerpc/include/asm/iopin_8xx.h +++ b/arch/powerpc/include/asm/iopin_8xx.h @@ -26,7 +26,7 @@ typedef struct { #define IOPIN_PORTC 2 #define IOPIN_PORTD 3 -extern __inline__ void +static __inline__ void iopin_set_high(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -44,7 +44,7 @@ iopin_set_high(iopin_t *iopin) } } -extern __inline__ void +static __inline__ void iopin_set_low(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -62,7 +62,7 @@ iopin_set_low(iopin_t *iopin) } } -extern __inline__ uint +static __inline__ uint iopin_is_high(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -81,7 +81,7 @@ iopin_is_high(iopin_t *iopin) return 0; } -extern __inline__ uint +static __inline__ uint iopin_is_low(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -100,7 +100,7 @@ iopin_is_low(iopin_t *iopin) return 0; } -extern __inline__ void +static __inline__ void iopin_set_out(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -118,7 +118,7 @@ iopin_set_out(iopin_t *iopin) } } -extern __inline__ void +static __inline__ void iopin_set_in(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -136,7 +136,7 @@ iopin_set_in(iopin_t *iopin) } } -extern __inline__ uint +static __inline__ uint iopin_is_out(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -155,7 +155,7 @@ iopin_is_out(iopin_t *iopin) return 0; } -extern __inline__ uint +static __inline__ uint iopin_is_in(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -174,7 +174,7 @@ iopin_is_in(iopin_t *iopin) return 0; } -extern __inline__ void +static __inline__ void iopin_set_odr(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -186,7 +186,7 @@ iopin_set_odr(iopin_t *iopin) } } -extern __inline__ void +static __inline__ void iopin_set_act(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -198,7 +198,7 @@ iopin_set_act(iopin_t *iopin) } } -extern __inline__ uint +static __inline__ uint iopin_is_odr(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -211,7 +211,7 @@ iopin_is_odr(iopin_t *iopin) return 0; } -extern __inline__ uint +static __inline__ uint iopin_is_act(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -224,7 +224,7 @@ iopin_is_act(iopin_t *iopin) return 0; } -extern __inline__ void +static __inline__ void iopin_set_ded(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -242,7 +242,7 @@ iopin_set_ded(iopin_t *iopin) } } -extern __inline__ void +static __inline__ void iopin_set_gen(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -260,7 +260,7 @@ iopin_set_gen(iopin_t *iopin) } } -extern __inline__ uint +static __inline__ uint iopin_is_ded(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -279,7 +279,7 @@ iopin_is_ded(iopin_t *iopin) return 0; } -extern __inline__ uint +static __inline__ uint iopin_is_gen(iopin_t *iopin) { if (iopin->port == IOPIN_PORTA) { @@ -298,7 +298,7 @@ iopin_is_gen(iopin_t *iopin) return 0; } -extern __inline__ void +static __inline__ void iopin_set_opt2(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -307,7 +307,7 @@ iopin_set_opt2(iopin_t *iopin) } } -extern __inline__ void +static __inline__ void iopin_set_opt1(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -316,7 +316,7 @@ iopin_set_opt1(iopin_t *iopin) } } -extern __inline__ uint +static __inline__ uint iopin_is_opt2(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -326,7 +326,7 @@ iopin_is_opt2(iopin_t *iopin) return 0; } -extern __inline__ uint +static __inline__ uint iopin_is_opt1(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -336,7 +336,7 @@ iopin_is_opt1(iopin_t *iopin) return 0; } -extern __inline__ void +static __inline__ void iopin_set_falledge(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -345,7 +345,7 @@ iopin_set_falledge(iopin_t *iopin) } } -extern __inline__ void +static __inline__ void iopin_set_anyedge(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -354,7 +354,7 @@ iopin_set_anyedge(iopin_t *iopin) } } -extern __inline__ uint +static __inline__ uint iopin_is_falledge(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { @@ -364,7 +364,7 @@ iopin_is_falledge(iopin_t *iopin) return 0; } -extern __inline__ uint +static __inline__ uint iopin_is_anyedge(iopin_t *iopin) { if (iopin->port == IOPIN_PORTC) { diff --git a/arch/sparc/include/asm/irq.h b/arch/sparc/include/asm/irq.h index bbe0204..2faf7a0 100644 --- a/arch/sparc/include/asm/irq.h +++ b/arch/sparc/include/asm/irq.h @@ -12,7 +12,7 @@ #include <asm/psr.h> /* Set SPARC Processor Interrupt Level */ -extern inline void set_pil(unsigned int level) +static inline void set_pil(unsigned int level) { unsigned int psr = get_psr(); @@ -20,7 +20,7 @@ extern inline void set_pil(unsigned int level) } /* Get SPARC Processor Interrupt Level */ -extern inline unsigned int get_pil(void) +static inline unsigned int get_pil(void) { unsigned int psr = get_psr(); return (psr & PSR_PIL) >> PSR_PIL_OFS; diff --git a/arch/sparc/include/asm/psr.h b/arch/sparc/include/asm/psr.h index 70af8e0..a91bdc9 100644 --- a/arch/sparc/include/asm/psr.h +++ b/arch/sparc/include/asm/psr.h @@ -42,7 +42,7 @@ #ifndef __ASSEMBLY__ /* Get the %psr register. */ -extern __inline__ unsigned int get_psr(void) +static __inline__ unsigned int get_psr(void) { unsigned int psr; __asm__ __volatile__("rd %%psr, %0\n\t" @@ -53,7 +53,7 @@ extern __inline__ unsigned int get_psr(void) return psr; } -extern __inline__ void put_psr(unsigned int new_psr) +static __inline__ void put_psr(unsigned int new_psr) { __asm__ __volatile__("wr %0, 0x0, %%psr\n\t" "nop\n\t" "nop\n\t" "nop\n\t": /* no outputs */ :"r"(new_psr) @@ -67,7 +67,7 @@ extern __inline__ void put_psr(unsigned int new_psr) extern unsigned int fsr_storage; -extern __inline__ unsigned int get_fsr(void) +static __inline__ unsigned int get_fsr(void) { unsigned int fsr = 0; diff --git a/arch/sparc/include/asm/srmmu.h b/arch/sparc/include/asm/srmmu.h index 74b1554..8da2f67 100644 --- a/arch/sparc/include/asm/srmmu.h +++ b/arch/sparc/include/asm/srmmu.h @@ -148,7 +148,7 @@ extern void *srmmu_nocache_pool; #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) /* Accessing the MMU control register. */ -extern __inline__ unsigned int srmmu_get_mmureg(void) +static __inline__ unsigned int srmmu_get_mmureg(void) { unsigned int retval; __asm__ __volatile__("lda [%%g0] %1, %0\n\t": @@ -156,14 +156,14 @@ extern __inline__ unsigned int srmmu_get_mmureg(void) return retval; } -extern __inline__ void srmmu_set_mmureg(unsigned long regval) +static __inline__ void srmmu_set_mmureg(unsigned long regval) { __asm__ __volatile__("sta %0, [%%g0] %1\n\t"::"r"(regval), "i"(ASI_M_MMUREGS):"memory"); } -extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) +static __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) { paddr = ((paddr >> 4) & SRMMU_CTX_PMASK); __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(paddr), @@ -171,7 +171,7 @@ extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) "i"(ASI_M_MMUREGS):"memory"); } -extern __inline__ unsigned long srmmu_get_ctable_ptr(void) +static __inline__ unsigned long srmmu_get_ctable_ptr(void) { unsigned int retval; @@ -181,13 +181,13 @@ extern __inline__ unsigned long srmmu_get_ctable_ptr(void) return (retval & SRMMU_CTX_PMASK) << 4; } -extern __inline__ void srmmu_set_context(int context) +static __inline__ void srmmu_set_context(int context) { __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(context), "r"(SRMMU_CTX_REG), "i"(ASI_M_MMUREGS):"memory"); } -extern __inline__ int srmmu_get_context(void) +static __inline__ int srmmu_get_context(void) { register int retval; __asm__ __volatile__("lda [%1] %2, %0\n\t": @@ -196,7 +196,7 @@ extern __inline__ int srmmu_get_context(void) return retval; } -extern __inline__ unsigned int srmmu_get_fstatus(void) +static __inline__ unsigned int srmmu_get_fstatus(void) { unsigned int retval; @@ -206,7 +206,7 @@ extern __inline__ unsigned int srmmu_get_fstatus(void) return retval; } -extern __inline__ unsigned int srmmu_get_faddr(void) +static __inline__ unsigned int srmmu_get_faddr(void) { unsigned int retval; @@ -217,7 +217,7 @@ extern __inline__ unsigned int srmmu_get_faddr(void) } /* This is guaranteed on all SRMMU's. */ -extern __inline__ void srmmu_flush_whole_tlb(void) +static __inline__ void srmmu_flush_whole_tlb(void) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(0x400), /* Flush entire TLB!! */ "i"(ASI_M_FLUSH_PROBE):"memory"); @@ -225,14 +225,14 @@ extern __inline__ void srmmu_flush_whole_tlb(void) } /* These flush types are not available on all chips... */ -extern __inline__ void srmmu_flush_tlb_ctx(void) +static __inline__ void srmmu_flush_tlb_ctx(void) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(0x300), /* Flush TLB ctx.. */ "i"(ASI_M_FLUSH_PROBE):"memory"); } -extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) +static __inline__ void srmmu_flush_tlb_region(unsigned long addr) { addr &= SRMMU_PGDIR_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(addr | 0x200), /* Flush TLB region.. */ @@ -240,7 +240,7 @@ extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) } -extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) +static __inline__ void srmmu_flush_tlb_segment(unsigned long addr) { addr &= SRMMU_REAL_PMD_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(addr | 0x100), /* Flush TLB segment.. */ @@ -248,7 +248,7 @@ extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) } -extern __inline__ void srmmu_flush_tlb_page(unsigned long page) +static __inline__ void srmmu_flush_tlb_page(unsigned long page) { page &= PAGE_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(page), /* Flush TLB page.. */ @@ -256,7 +256,7 @@ extern __inline__ void srmmu_flush_tlb_page(unsigned long page) } -extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) +static __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) { unsigned long retval; @@ -268,7 +268,7 @@ extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) return retval; } -extern __inline__ int srmmu_get_pte(unsigned long addr) +static __inline__ int srmmu_get_pte(unsigned long addr) { register unsigned long entry; diff --git a/include/mpc8260.h b/include/mpc8260.h index 9980c74..75f1b0c 100644 --- a/include/mpc8260.h +++ b/include/mpc8260.h @@ -892,7 +892,7 @@ #define UPMC 3 #if !defined(__ASSEMBLY__) && defined(CONFIG_WATCHDOG) -extern __inline__ void +static __inline__ void reset_8260_watchdog(volatile immap_t *immr) { immr->im_siu_conf.sc_swsr = 0x556c; -- 2.6.2

2 1

[U-Boot] [PATCH v3] net: phy: Add support for Texas Instruments DP83867
by Michal Simek 10 Nov '15

10 Nov '15

From: "Edgar E. Iglesias" <edgar.iglesias(a)xilinx.com> Code is taken from Linux kernel driver (v4.2). Signed-off-by: Edgar E. Iglesias <edgar.iglesias(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v3: - Add kernel version tag to the commit message - reported by Tom Changes in v2: - Add missing function declaration to phy.h - Remove BIT macro and fix macro indentation - Remove comment about moving code to generic location - Fix typo register -> registers drivers/net/phy/Makefile | 1 + drivers/net/phy/phy.c | 3 + drivers/net/phy/ti.c | 200 +++++++++++++++++++++++++++++++++++++++++++++++ include/phy.h | 1 + 4 files changed, 205 insertions(+) create mode 100644 drivers/net/phy/ti.c diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index d096db87a276..9e4d4927e676 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -24,4 +24,5 @@ obj-$(CONFIG_PHY_NATSEMI) += natsemi.o obj-$(CONFIG_PHY_REALTEK) += realtek.o obj-$(CONFIG_PHY_SMSC) += smsc.o obj-$(CONFIG_PHY_TERANETICS) += teranetics.o +obj-$(CONFIG_PHY_TI) += ti.o obj-$(CONFIG_PHY_VITESSE) += vitesse.o diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index d7364ffc34f2..5633ec2402b0 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -484,6 +484,9 @@ int phy_init(void) #ifdef CONFIG_PHY_TERANETICS phy_teranetics_init(); #endif +#ifdef CONFIG_PHY_TI + phy_ti_init(); +#endif #ifdef CONFIG_PHY_VITESSE phy_vitesse_init(); #endif diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c new file mode 100644 index 000000000000..541a57f98028 --- /dev/null +++ b/drivers/net/phy/ti.c @@ -0,0 +1,200 @@ +/* + * TI PHY drivers + * + * SPDX-License-Identifier: GPL-2.0 + * + */ +#include <common.h> +#include <phy.h> + +/* TI DP83867 */ +#define DP83867_DEVADDR 0x1f + +#define MII_DP83867_PHYCTRL 0x10 +#define MII_DP83867_MICR 0x12 +#define DP83867_CTRL 0x1f + +/* Extended Registers */ +#define DP83867_RGMIICTL 0x0032 +#define DP83867_RGMIIDCTL 0x0086 + +#define DP83867_SW_RESET BIT(15) +#define DP83867_SW_RESTART BIT(14) + +/* MICR Interrupt bits */ +#define MII_DP83867_MICR_AN_ERR_INT_EN BIT(15) +#define MII_DP83867_MICR_SPEED_CHNG_INT_EN BIT(14) +#define MII_DP83867_MICR_DUP_MODE_CHNG_INT_EN BIT(13) +#define MII_DP83867_MICR_PAGE_RXD_INT_EN BIT(12) +#define MII_DP83867_MICR_AUTONEG_COMP_INT_EN BIT(11) +#define MII_DP83867_MICR_LINK_STS_CHNG_INT_EN BIT(10) +#define MII_DP83867_MICR_FALSE_CARRIER_INT_EN BIT(8) +#define MII_DP83867_MICR_SLEEP_MODE_CHNG_INT_EN BIT(4) +#define MII_DP83867_MICR_WOL_INT_EN BIT(3) +#define MII_DP83867_MICR_XGMII_ERR_INT_EN BIT(2) +#define MII_DP83867_MICR_POL_CHNG_INT_EN BIT(1) +#define MII_DP83867_MICR_JABBER_INT_EN BIT(0) + +/* RGMIICTL bits */ +#define DP83867_RGMII_TX_CLK_DELAY_EN BIT(1) +#define DP83867_RGMII_RX_CLK_DELAY_EN BIT(0) + +/* PHY CTRL bits */ +#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 + +/* RGMIIDCTL bits */ +#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 + +#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */ +#define MII_MMD_DATA 0x0e /* MMD Access Data Register */ + +/* MMD Access Control register fields */ +#define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/ +#define MII_MMD_CTRL_ADDR 0x0000 /* Address */ +#define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */ +#define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */ +#define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */ + +/** + * phy_read_mmd_indirect - reads data from the MMD registers + * @phydev: The PHY device bus + * @prtad: MMD Address + * @devad: MMD DEVAD + * @addr: PHY address on the MII bus + * + * Description: it reads data from the MMD registers (clause 22 to access to + * clause 45) of the specified phy address. + * To read these registers we have: + * 1) Write reg 13 // DEVAD + * 2) Write reg 14 // MMD Address + * 3) Write reg 13 // MMD Data Command for MMD DEVAD + * 3) Read reg 14 // Read MMD data + */ +int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, + int devad, int addr) +{ + int value = -1; + + /* Write the desired MMD Devad */ + phy_write(phydev, addr, MII_MMD_CTRL, devad); + + /* Write the desired MMD register address */ + phy_write(phydev, addr, MII_MMD_DATA, prtad); + + /* Select the Function : DATA with no post increment */ + phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); + + /* Read the content of the MMD's selected register */ + value = phy_read(phydev, addr, MII_MMD_DATA); + return value; +} + +/** + * phy_write_mmd_indirect - writes data to the MMD registers + * @phydev: The PHY device + * @prtad: MMD Address + * @devad: MMD DEVAD + * @addr: PHY address on the MII bus + * @data: data to write in the MMD register + * + * Description: Write data from the MMD registers of the specified + * phy address. + * To write these registers we have: + * 1) Write reg 13 // DEVAD + * 2) Write reg 14 // MMD Address + * 3) Write reg 13 // MMD Data Command for MMD DEVAD + * 3) Write reg 14 // Write MMD data + */ +void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, + int devad, int addr, u32 data) +{ + /* Write the desired MMD Devad */ + phy_write(phydev, addr, MII_MMD_CTRL, devad); + + /* Write the desired MMD register address */ + phy_write(phydev, addr, MII_MMD_DATA, prtad); + + /* Select the Function : DATA with no post increment */ + phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); + + /* Write the data into MMD's selected register */ + phy_write(phydev, addr, MII_MMD_DATA, data); +} + +/** + * phy_interface_is_rgmii - Convenience function for testing if a PHY interface + * is RGMII (all variants) + * @phydev: the phy_device struct + */ +static inline bool phy_interface_is_rgmii(struct phy_device *phydev) +{ + return phydev->interface >= PHY_INTERFACE_MODE_RGMII && + phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID; +} + +/* User setting - can be taken from DTS */ +#define RX_ID_DELAY 8 +#define TX_ID_DELAY 0xa +#define FIFO_DEPTH 1 + +static int dp83867_config(struct phy_device *phydev) +{ + unsigned int val, delay; + int ret; + + /* Restart the PHY. */ + val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL); + phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL, + val | DP83867_SW_RESTART); + + if (phy_interface_is_rgmii(phydev)) { + ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, + (FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); + if (ret) + return ret; + } + + if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) && + (phydev->interface <= PHY_INTERFACE_MODE_RGMII_RXID)) { + val = phy_read_mmd_indirect(phydev, DP83867_RGMIICTL, + DP83867_DEVADDR, phydev->addr); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + val |= (DP83867_RGMII_TX_CLK_DELAY_EN | + DP83867_RGMII_RX_CLK_DELAY_EN); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + val |= DP83867_RGMII_TX_CLK_DELAY_EN; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) + val |= DP83867_RGMII_RX_CLK_DELAY_EN; + + phy_write_mmd_indirect(phydev, DP83867_RGMIICTL, + DP83867_DEVADDR, phydev->addr, val); + + delay = (RX_ID_DELAY | + (TX_ID_DELAY << DP83867_RGMII_TX_CLK_DELAY_SHIFT)); + + phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL, + DP83867_DEVADDR, phydev->addr, delay); + } + + genphy_config_aneg(phydev); + return 0; +} + +static struct phy_driver DP83867_driver = { + .name = "TI DP83867", + .uid = 0x2000a231, + .mask = 0xfffffff0, + .features = PHY_GBIT_FEATURES, + .config = &dp83867_config, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +int phy_ti_init(void) +{ + phy_register(&DP83867_driver); + return 0; +} diff --git a/include/phy.h b/include/phy.h index 3f826b66f71f..66cf61bdfb93 100644 --- a/include/phy.h +++ b/include/phy.h @@ -251,6 +251,7 @@ int phy_natsemi_init(void); int phy_realtek_init(void); int phy_smsc_init(void); int phy_teranetics_init(void); +int phy_ti_init(void); int phy_vitesse_init(void); int board_phy_config(struct phy_device *phydev); -- 2.5.0

3 2

[U-Boot] [PATCH v4 00/33] dm: Introduce Rockchip RK3288 support
by Simon Glass 10 Nov '15

10 Nov '15

The Rockchip RK3288 is based on a quad-core Cortex-A17 CPU and has a good set of peripherals. Various full-featured U-Boot ports are available and this is an attempt to bring those features into mainline. With this series the Firefly RK3288 can boot to a prompt from an SD card. Since much of the code is generic, this also supports the Radxa Rock 2. Since there is no device tree available for that yet, it uses the same config and device tree as the Firefly. This works because not all peripherals are supported, so the differences don't matter. Support for booting from USB OTG is also provided, using the on-chip boot ROM and the rkflashtool utility. This can boot as far as SPL, but there is no support for reading U-Boot proper from USB as yet. This requires implementing a suitable protocol (perhaps DFU or Rockchip's proprietary one) in SPL. Support is also provided for the Hisense Chromebook, which is based on the same SoC. In this case it boots from SPI rather than an SD card. This seriea makes use of driver model including a number of recently added uclasses: - Clocks - setting and getting PLL and peripheral clocks - Pinctrl - adjusting pin multiplexing settings - Reset - reseting the board or SoC - RAM - setting up RAM controllers and detecting the available RAM - MMC - MMC controllers (using the existing block device framework) - LEDs - turning LEDs on and off, with only a GPIO driver so far This series avoids hard-coding RK3288-specific code into the build. There is a CONFIG_ROCKCHIP_RK3288 but it only *adds* support for RK3288. In principle another CONFIG could add support for a different Rockchip SoC with only the device tree selecting which one U-Boot works on. Support is provided in mkimage to build these image types: - rkimage - suitable for packaging up SPL to be sent to the boot ROM over USB OTG - rksd - suitable for writing to an SD card Much of the source and ideas for this series came from downstream Rockchip U-Boot trees. SDRAM init came from Coreboot. In most cases it has been pretty heavily cleaned up / rewritten to meet U-Boot style and remove hard-coding of things. Drivers are provided for: - Clocks - Pinctrl - SoC reset - DDR3 SDRAM - I2C - SPI - GPIOs - LEDs using GPIOS - MMC - Firefly main PMIC (ACT8846) and included regulators These are lightly tested and doubtless some problems exist with some, particularly I2C. One problem with device tree is that U-Boot has no way of dropping features it does not need or use. For SPL this problem needs to be solved and this series uses a new 'fdtgrep' tool for this. The 45KB Firefly device tree reduces to a 6KB bytes when unused material is removed. SDRAM timings are also in the device tree. There is a large amount of additional work to bring other Rockchip drivers and features into mainline U-Boot, so this is only a start. Note: This series sits on top of Masahiro's RFC pinctrl series. I wanted to get a new version out while we wait for this to make it to mainline. You can find this series at u-boot-dm/rockchip-working. Changes in v4: - Add a set_state_simple() method - Adjust the defconfig file to suit mainline - Rename pinctrl.h to dm/pinctrl.h - Tweak the cover letter a little, drop mention of patches already applied - Use CONFIG_SPL_LED instead of CONFIG_SPL_LED_SUPPORT Changes in v3: - Add device tree bindings for CRU and DMC - Add various new patches to get RK3288 booting to a prompt - Make use of additional features since version 2 - Update README to mention available drivers - Update clock rate to always be 24MHz Changes in v2: - Drop use of CONFIG_USE_PRIVATE_LIBGCC=y - Tidy up license headers and remove SPL #ifdefs Masahiro Yamada (1): dm: do not return pointer if NULL is given to devp of device_bind() Simon Glass (32): pinctrl: Correct build errors in the pinctrl_simple pinctrl: Add help text to Kconfig pinctrl: Add the concept of peripheral IDs mmc: Support bypass mode with the get_mmc_clk() method dm: Improve handling of a missing uclass dm: Provide better debugging when a device fails to bind arm: reset: Avoid a build error when the reset uclass is enabled rockchip: Add serial support rockchip: Bring in RK3288 device tree file includes and bindings rockchip: rk3288: dts: Make core devices available early mkimage: Allow padding to any length mkimage: Allow the original file size to be recorded rockchip: Add the rkimage format to mkimage rockchip: Add support for the SD image rockchip: Add support for the SPI image rockchip: gpio: Add rockchip GPIO driver rockchip: Add basic peripheral and clock definitions power: Add support for ACT8846 PMIC power: regulator: Add a driver for ACT8846 regulators rockchip: rk3288: Add clock driver rockchip: rk3288: Add header files for PMU and GRF rockchip: rk3288: Add SoC reset driver rockchip: rk3288: Add a simple syscon driver rockchip: rk3288: Add pinctrl driver rockchip: rk3288: Add SDRAM init rockchip: Add an MMC driver rockchip: Add core SoC start-up code rockchip: Add I2C driver rockchip: Add SPI driver rockchip: Add basic support for firefly-rk3288 rockchip: Add basic support for jerry rockchip: Add a simple README arch/arm/Kconfig | 10 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/cros-ec-sbs.dtsi | 16 + arch/arm/dts/rk3288-firefly.dts | 75 + arch/arm/dts/rk3288-firefly.dtsi | 457 ++++++ arch/arm/dts/rk3288-jerry.dts | 203 +++ arch/arm/dts/rk3288-thermal.dtsi | 88 ++ arch/arm/dts/rk3288-veyron-chromebook.dtsi | 200 +++ arch/arm/dts/rk3288-veyron.dtsi | 844 +++++++++++ arch/arm/dts/rk3288.dtsi | 1473 ++++++++++++++++++++ arch/arm/include/asm/arch-rockchip/clock.h | 45 + arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 185 +++ arch/arm/include/asm/arch-rockchip/ddr_rk3288.h | 484 +++++++ arch/arm/include/asm/arch-rockchip/gpio.h | 28 + arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 768 ++++++++++ arch/arm/include/asm/arch-rockchip/hardware.h | 20 + arch/arm/include/asm/arch-rockchip/i2c.h | 70 + arch/arm/include/asm/arch-rockchip/periph.h | 54 + arch/arm/include/asm/arch-rockchip/pmu_rk3288.h | 89 ++ arch/arm/include/asm/arch-rockchip/sdram.h | 92 ++ arch/arm/lib/Makefile | 2 + arch/arm/mach-rockchip/Kconfig | 41 + arch/arm/mach-rockchip/Makefile | 13 + arch/arm/mach-rockchip/board-spl.c | 290 ++++ arch/arm/mach-rockchip/board.c | 46 + arch/arm/mach-rockchip/common.c | 28 + arch/arm/mach-rockchip/rk3288/Kconfig | 26 + arch/arm/mach-rockchip/rk3288/Makefile | 9 + arch/arm/mach-rockchip/rk3288/reset_rk3288.c | 47 + arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 878 ++++++++++++ arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 25 + board/firefly/firefly-rk3288/Kconfig | 15 + board/firefly/firefly-rk3288/MAINTAINERS | 6 + board/firefly/firefly-rk3288/Makefile | 7 + board/firefly/firefly-rk3288/firefly-rk3288.c | 7 + board/google/chromebook_jerry/Kconfig | 15 + board/google/chromebook_jerry/MAINTAINERS | 6 + board/google/chromebook_jerry/Makefile | 7 + board/google/chromebook_jerry/jerry.c | 7 + board/google/common/Makefile | 2 +- common/image.c | 3 + configs/chromebook_jerry_defconfig | 43 + configs/firefly-rk3288_defconfig | 43 + doc/README.rockchip | 246 ++++ .../clock/rockchip,rk3188-cru.txt | 61 + .../clock/rockchip,rk3288-cru.txt | 61 + .../clock/rockchip,rk3288-dmc.txt | 155 ++ doc/device-tree-bindings/clock/rockchip.txt | 77 + .../pinctrl/rockchip,pinctrl.txt | 157 +++ .../thermal/rockchip-thermal.txt | 68 + drivers/clk/Makefile | 1 + drivers/clk/clk_rk3288.c | 618 ++++++++ drivers/core/device.c | 10 +- drivers/core/root.c | 5 +- drivers/core/uclass.c | 7 +- drivers/gpio/Kconfig | 9 + drivers/gpio/Makefile | 1 + drivers/gpio/rk_gpio.c | 123 ++ drivers/i2c/Kconfig | 9 + drivers/i2c/Makefile | 1 + drivers/i2c/rk_i2c.c | 391 ++++++ drivers/mmc/Kconfig | 9 + drivers/mmc/Makefile | 1 + drivers/mmc/dw_mmc.c | 2 +- drivers/mmc/exynos_dw_mmc.c | 2 +- drivers/mmc/rockchip_mmc.c | 98 ++ drivers/pinctrl/Kconfig | 22 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-uclass.c | 41 +- drivers/pinctrl/rockchip/Makefile | 8 + drivers/pinctrl/rockchip/pinctrl_rk3288.c | 441 ++++++ drivers/power/pmic/Kconfig | 9 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/act8846.c | 90 ++ drivers/power/regulator/Kconfig | 9 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/act8846.c | 155 ++ drivers/serial/Kconfig | 9 + drivers/serial/Makefile | 1 + drivers/serial/serial_rockchip.c | 43 + drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/rk_spi.c | 375 +++++ drivers/spi/rk_spi.h | 121 ++ include/configs/chromebook_jerry.h | 16 + include/configs/firefly-rk3288.h | 15 + include/configs/rk3288_common.h | 98 ++ include/dm/pinctrl.h | 61 + include/dt-bindings/clock/rk3288-cru.h | 370 +++++ include/dt-bindings/clock/rockchip,rk808.h | 11 + include/dt-bindings/pinctrl/rockchip.h | 26 + include/dt-bindings/power-domain/rk3288.h | 11 + include/dwmmc.h | 16 +- include/image.h | 5 +- include/power/act8846_pmic.h | 37 + tools/Makefile | 3 + tools/imagetool.h | 1 + tools/mkimage.c | 23 +- tools/rkcommon.c | 72 + tools/rkcommon.h | 28 + tools/rkimage.c | 65 + tools/rksd.c | 102 ++ tools/rkspi.c | 119 ++ 104 files changed, 11274 insertions(+), 25 deletions(-) create mode 100644 arch/arm/dts/cros-ec-sbs.dtsi create mode 100644 arch/arm/dts/rk3288-firefly.dts create mode 100644 arch/arm/dts/rk3288-firefly.dtsi create mode 100644 arch/arm/dts/rk3288-jerry.dts create mode 100644 arch/arm/dts/rk3288-thermal.dtsi create mode 100644 arch/arm/dts/rk3288-veyron-chromebook.dtsi create mode 100644 arch/arm/dts/rk3288-veyron.dtsi create mode 100644 arch/arm/dts/rk3288.dtsi create mode 100644 arch/arm/include/asm/arch-rockchip/clock.h create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/ddr_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/gpio.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/hardware.h create mode 100644 arch/arm/include/asm/arch-rockchip/i2c.h create mode 100644 arch/arm/include/asm/arch-rockchip/periph.h create mode 100644 arch/arm/include/asm/arch-rockchip/pmu_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram.h create mode 100644 arch/arm/mach-rockchip/Kconfig create mode 100644 arch/arm/mach-rockchip/Makefile create mode 100644 arch/arm/mach-rockchip/board-spl.c create mode 100644 arch/arm/mach-rockchip/board.c create mode 100644 arch/arm/mach-rockchip/common.c create mode 100644 arch/arm/mach-rockchip/rk3288/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3288/Makefile create mode 100644 arch/arm/mach-rockchip/rk3288/reset_rk3288.c create mode 100644 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c create mode 100644 arch/arm/mach-rockchip/rk3288/syscon_rk3288.c create mode 100644 board/firefly/firefly-rk3288/Kconfig create mode 100644 board/firefly/firefly-rk3288/MAINTAINERS create mode 100644 board/firefly/firefly-rk3288/Makefile create mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c create mode 100644 board/google/chromebook_jerry/Kconfig create mode 100644 board/google/chromebook_jerry/MAINTAINERS create mode 100644 board/google/chromebook_jerry/Makefile create mode 100644 board/google/chromebook_jerry/jerry.c create mode 100644 configs/chromebook_jerry_defconfig create mode 100644 configs/firefly-rk3288_defconfig create mode 100644 doc/README.rockchip create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3188-cru.txt create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt create mode 100644 doc/device-tree-bindings/clock/rockchip.txt create mode 100644 doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt create mode 100644 doc/device-tree-bindings/thermal/rockchip-thermal.txt create mode 100644 drivers/clk/clk_rk3288.c create mode 100644 drivers/gpio/rk_gpio.c create mode 100644 drivers/i2c/rk_i2c.c create mode 100644 drivers/mmc/rockchip_mmc.c create mode 100644 drivers/pinctrl/rockchip/Makefile create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3288.c create mode 100644 drivers/power/pmic/act8846.c create mode 100644 drivers/power/regulator/act8846.c create mode 100644 drivers/serial/serial_rockchip.c create mode 100644 drivers/spi/rk_spi.c create mode 100644 drivers/spi/rk_spi.h create mode 100644 include/configs/chromebook_jerry.h create mode 100644 include/configs/firefly-rk3288.h create mode 100644 include/configs/rk3288_common.h create mode 100644 include/dt-bindings/clock/rk3288-cru.h create mode 100644 include/dt-bindings/clock/rockchip,rk808.h create mode 100644 include/dt-bindings/pinctrl/rockchip.h create mode 100644 include/dt-bindings/power-domain/rk3288.h create mode 100644 include/power/act8846_pmic.h create mode 100644 tools/rkcommon.c create mode 100644 tools/rkcommon.h create mode 100644 tools/rkimage.c create mode 100644 tools/rksd.c create mode 100644 tools/rkspi.c -- 2.5.0.457.gab17608

8 57

[U-Boot] [RFC][PATCH 00/25] eeprom: Cleanup and support for multiple i2c busses
by Marek Vasut 10 Nov '15

10 Nov '15

This patch series first zaps a couple of ancient boards and ugly code which was in the way of proper cleanup for the eeprom command. Once that is done, the eeprom command undergoes proper cleaning. Finally, there is one patch which adds support for selecting on which bus the I2C EEPROM is. This functionality seems to be in high demand, which is exactly the reason why some boards decided to implement this themselves :-( This series makes U-Boot also less IoT, since it removes all the nice PHP, CSS and SQL stuff from it ;-) Marek Vasut (25): ppc: Zap ICU862 board ppc: Zap MHPC board ppc: Zap Hymod board ppc: Zap HWW1U1A board ppc: Zap IDS8247 board ppc: Zap TQM8260 board ppc: Zap TQM8272 board arm: Zap tricorder-eeprom eeprom: Shuffle code around eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMS eeprom: Zap CONFIG_SYS_EEPROM_X40430 eeprom: Zap eeprom_probe() eeprom: Zap CONFIG_SPI_X eeprom: Pull out the I/O code eeprom: Pull out address computation eeprom: Make eeprom_write_enable() weak eeprom: Pull out CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS eeprom: Suck the ifdef into eeprom_init() eeprom: Pull out CONFIG_SYS_EEPROM_PAGE_WRITE_BITS eeprom: Pull out transfer length computation eeprom: Pull out the RW loop eeprom: Cultivate the ifdef mess eeprom: Add bus argument to eeprom_init() eeprom: Add support for selecting i2c bus eeprom: Clean up checkpatch issues README | 5 - arch/powerpc/cpu/mpc8260/Kconfig | 16 - arch/powerpc/cpu/mpc8260/ether_fcc.c | 27 +- arch/powerpc/cpu/mpc8260/interrupts.c | 10 +- arch/powerpc/cpu/mpc8260/pci.c | 2 - arch/powerpc/cpu/mpc8260/start.S | 14 - arch/powerpc/cpu/mpc83xx/start.S | 11 - arch/powerpc/cpu/mpc85xx/Kconfig | 4 - arch/powerpc/cpu/mpc8xx/Kconfig | 8 - arch/powerpc/cpu/mpc8xx/cpu_init.c | 2 - arch/powerpc/cpu/mpc8xx/fec.c | 40 +- arch/powerpc/include/asm/u-boot.h | 3 - board/corscience/tricorder/Makefile | 2 +- board/corscience/tricorder/tricorder-eeprom.c | 251 ------- board/corscience/tricorder/tricorder-eeprom.h | 41 -- board/eltec/mhpc/Kconfig | 12 - board/eltec/mhpc/MAINTAINERS | 6 - board/eltec/mhpc/Makefile | 8 - board/eltec/mhpc/flash.c | 414 ----------- board/eltec/mhpc/mhpc.c | 465 ------------- board/eltec/mhpc/u-boot.lds.debug | 121 ---- board/exmeritus/hww1u1a/Kconfig | 12 - board/exmeritus/hww1u1a/MAINTAINERS | 6 - board/exmeritus/hww1u1a/Makefile | 12 - board/exmeritus/hww1u1a/ddr.c | 34 - board/exmeritus/hww1u1a/gpios.h | 56 -- board/exmeritus/hww1u1a/hww1u1a.c | 268 -------- board/exmeritus/hww1u1a/law.c | 18 - board/exmeritus/hww1u1a/tlb.c | 90 --- board/hymod/Kconfig | 9 - board/hymod/MAINTAINERS | 6 - board/hymod/Makefile | 8 - board/hymod/bsp.c | 387 ----------- board/hymod/config.mk | 14 - board/hymod/eeprom.c | 678 ------------------ board/hymod/env.c | 221 ------ board/hymod/fetch.c | 91 --- board/hymod/flash.c | 490 ------------- board/hymod/flash.h | 140 ---- board/hymod/global_env | 145 ---- board/hymod/hymod.c | 521 -------------- board/hymod/hymod.h | 305 --------- board/hymod/input.c | 91 --- board/hymod/u-boot.lds | 132 ---- board/hymod/u-boot.lds.debug | 121 ---- board/icu862/Kconfig | 9 - board/icu862/MAINTAINERS | 7 - board/icu862/Makefile | 8 - board/icu862/flash.c | 575 ---------------- board/icu862/icu862.c | 199 ------ board/icu862/pcmcia.c | 262 ------- board/icu862/u-boot.lds | 82 --- board/icu862/u-boot.lds.debug | 122 ---- board/ids/ids8247/Kconfig | 12 - board/ids/ids8247/MAINTAINERS | 6 - board/ids/ids8247/Makefile | 11 - board/ids/ids8247/ids8247.c | 390 ----------- board/tqc/tqm8260/Kconfig | 12 - board/tqc/tqm8260/MAINTAINERS | 16 - board/tqc/tqm8260/Makefile | 8 - board/tqc/tqm8260/README | 415 ----------- board/tqc/tqm8260/tqm8260.c | 352 ---------- board/tqc/tqm8272/Kconfig | 12 - board/tqc/tqm8272/MAINTAINERS | 6 - board/tqc/tqm8272/Makefile | 8 - board/tqc/tqm8272/nand.c | 264 ------- board/tqc/tqm8272/tqm8272.c | 944 -------------------------- board/tqc/tqm8272/tqm8272.h | 37 - common/cmd_eeprom.c | 501 +++++--------- common/env_eeprom.c | 4 +- configs/HWW1U1A_defconfig | 3 - configs/ICU862_100MHz_defconfig | 4 - configs/ICU862_defconfig | 3 - configs/IDS8247_defconfig | 3 - configs/MHPC_defconfig | 3 - configs/TQM8255_AA_defconfig | 4 - configs/TQM8260_AA_defconfig | 4 - configs/TQM8260_AB_defconfig | 4 - configs/TQM8260_AC_defconfig | 4 - configs/TQM8260_AD_defconfig | 4 - configs/TQM8260_AE_defconfig | 4 - configs/TQM8260_AF_defconfig | 4 - configs/TQM8260_AG_defconfig | 4 - configs/TQM8260_AH_defconfig | 4 - configs/TQM8260_AI_defconfig | 4 - configs/TQM8265_AA_defconfig | 4 - configs/TQM8272_defconfig | 3 - configs/hymod_defconfig | 3 - include/asm-generic/u-boot.h | 3 - include/common.h | 8 +- include/commproc.h | 32 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI750.h | 1 - include/configs/DB64360.h | 1 - include/configs/DB64460.h | 1 - include/configs/DU440.h | 1 - include/configs/HWW1U1A.h | 460 ------------- include/configs/ICU862.h | 443 ------------ include/configs/IDS8247.h | 462 ------------- include/configs/MHPC.h | 369 ---------- include/configs/P1010RDB.h | 1 - include/configs/PMC440.h | 1 - include/configs/TQM8260.h | 620 ----------------- include/configs/TQM8272.h | 735 -------------------- include/configs/TQM834x.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/acadia.h | 1 - include/configs/am335x_evm.h | 1 - include/configs/am43xx_evm.h | 1 - include/configs/axs101.h | 1 - include/configs/bamboo.h | 1 - include/configs/canyonlands.h | 1 - include/configs/cpci5200.h | 1 - include/configs/ebony.h | 1 - include/configs/hymod.h | 728 -------------------- include/configs/icon.h | 1 - include/configs/intip.h | 1 - include/configs/katmai.h | 1 - include/configs/km/km-powerpc.h | 1 - include/configs/km/km_arm.h | 1 - include/configs/korat.h | 1 - include/configs/ks2_evm.h | 1 - include/configs/luan.h | 1 - include/configs/m28evk.h | 1 - include/configs/mecp5200.h | 1 - include/configs/motionpro.h | 1 - include/configs/ocotea.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h | 1 - include/configs/pcm051.h | 1 - include/configs/pengwyn.h | 1 - include/configs/pf5200.h | 1 - include/configs/sequoia.h | 1 - include/configs/t3corp.h | 1 - include/configs/taishan.h | 1 - include/configs/tricorder.h | 1 - include/configs/walnut.h | 1 - include/configs/yosemite.h | 1 - include/pcmcia.h | 2 - include/status_led.h | 19 - tools/bddb/README | 116 ---- tools/bddb/badsubmit.php | 23 - tools/bddb/bddb.css | 207 ------ tools/bddb/brlog.php | 109 --- tools/bddb/browse.php | 147 ---- tools/bddb/config.php | 16 - tools/bddb/create_tables.sql | 90 --- tools/bddb/defs.php | 710 ------------------- tools/bddb/dodelete.php | 65 -- tools/bddb/dodellog.php | 57 -- tools/bddb/doedit.php | 186 ----- tools/bddb/doedlog.php | 76 --- tools/bddb/donew.php | 230 ------- tools/bddb/donewlog.php | 86 --- tools/bddb/edit.php | 131 ---- tools/bddb/edlog.php | 86 --- tools/bddb/execute.php | 33 - tools/bddb/index.php | 38 -- tools/bddb/new.php | 120 ---- tools/bddb/newlog.php | 54 -- 164 files changed, 174 insertions(+), 15976 deletions(-) delete mode 100644 board/corscience/tricorder/tricorder-eeprom.c delete mode 100644 board/corscience/tricorder/tricorder-eeprom.h delete mode 100644 board/eltec/mhpc/Kconfig delete mode 100644 board/eltec/mhpc/MAINTAINERS delete mode 100644 board/eltec/mhpc/Makefile delete mode 100644 board/eltec/mhpc/flash.c delete mode 100644 board/eltec/mhpc/mhpc.c delete mode 100644 board/eltec/mhpc/u-boot.lds.debug delete mode 100644 board/exmeritus/hww1u1a/Kconfig delete mode 100644 board/exmeritus/hww1u1a/MAINTAINERS delete mode 100644 board/exmeritus/hww1u1a/Makefile delete mode 100644 board/exmeritus/hww1u1a/ddr.c delete mode 100644 board/exmeritus/hww1u1a/gpios.h delete mode 100644 board/exmeritus/hww1u1a/hww1u1a.c delete mode 100644 board/exmeritus/hww1u1a/law.c delete mode 100644 board/exmeritus/hww1u1a/tlb.c delete mode 100644 board/hymod/Kconfig delete mode 100644 board/hymod/MAINTAINERS delete mode 100644 board/hymod/Makefile delete mode 100644 board/hymod/bsp.c delete mode 100644 board/hymod/config.mk delete mode 100644 board/hymod/eeprom.c delete mode 100644 board/hymod/env.c delete mode 100644 board/hymod/fetch.c delete mode 100644 board/hymod/flash.c delete mode 100644 board/hymod/flash.h delete mode 100644 board/hymod/global_env delete mode 100644 board/hymod/hymod.c delete mode 100644 board/hymod/hymod.h delete mode 100644 board/hymod/input.c delete mode 100644 board/hymod/u-boot.lds delete mode 100644 board/hymod/u-boot.lds.debug delete mode 100644 board/icu862/Kconfig delete mode 100644 board/icu862/MAINTAINERS delete mode 100644 board/icu862/Makefile delete mode 100644 board/icu862/flash.c delete mode 100644 board/icu862/icu862.c delete mode 100644 board/icu862/pcmcia.c delete mode 100644 board/icu862/u-boot.lds delete mode 100644 board/icu862/u-boot.lds.debug delete mode 100644 board/ids/ids8247/Kconfig delete mode 100644 board/ids/ids8247/MAINTAINERS delete mode 100644 board/ids/ids8247/Makefile delete mode 100644 board/ids/ids8247/ids8247.c delete mode 100644 board/tqc/tqm8260/Kconfig delete mode 100644 board/tqc/tqm8260/MAINTAINERS delete mode 100644 board/tqc/tqm8260/Makefile delete mode 100644 board/tqc/tqm8260/README delete mode 100644 board/tqc/tqm8260/tqm8260.c delete mode 100644 board/tqc/tqm8272/Kconfig delete mode 100644 board/tqc/tqm8272/MAINTAINERS delete mode 100644 board/tqc/tqm8272/Makefile delete mode 100644 board/tqc/tqm8272/nand.c delete mode 100644 board/tqc/tqm8272/tqm8272.c delete mode 100644 board/tqc/tqm8272/tqm8272.h delete mode 100644 configs/HWW1U1A_defconfig delete mode 100644 configs/ICU862_100MHz_defconfig delete mode 100644 configs/ICU862_defconfig delete mode 100644 configs/IDS8247_defconfig delete mode 100644 configs/MHPC_defconfig delete mode 100644 configs/TQM8255_AA_defconfig delete mode 100644 configs/TQM8260_AA_defconfig delete mode 100644 configs/TQM8260_AB_defconfig delete mode 100644 configs/TQM8260_AC_defconfig delete mode 100644 configs/TQM8260_AD_defconfig delete mode 100644 configs/TQM8260_AE_defconfig delete mode 100644 configs/TQM8260_AF_defconfig delete mode 100644 configs/TQM8260_AG_defconfig delete mode 100644 configs/TQM8260_AH_defconfig delete mode 100644 configs/TQM8260_AI_defconfig delete mode 100644 configs/TQM8265_AA_defconfig delete mode 100644 configs/TQM8272_defconfig delete mode 100644 configs/hymod_defconfig delete mode 100644 include/configs/HWW1U1A.h delete mode 100644 include/configs/ICU862.h delete mode 100644 include/configs/IDS8247.h delete mode 100644 include/configs/MHPC.h delete mode 100644 include/configs/TQM8260.h delete mode 100644 include/configs/TQM8272.h delete mode 100644 include/configs/hymod.h delete mode 100644 tools/bddb/README delete mode 100644 tools/bddb/badsubmit.php delete mode 100644 tools/bddb/bddb.css delete mode 100644 tools/bddb/brlog.php delete mode 100644 tools/bddb/browse.php delete mode 100644 tools/bddb/config.php delete mode 100644 tools/bddb/create_tables.sql delete mode 100644 tools/bddb/defs.php delete mode 100644 tools/bddb/dodelete.php delete mode 100644 tools/bddb/dodellog.php delete mode 100644 tools/bddb/doedit.php delete mode 100644 tools/bddb/doedlog.php delete mode 100644 tools/bddb/donew.php delete mode 100644 tools/bddb/donewlog.php delete mode 100644 tools/bddb/edit.php delete mode 100644 tools/bddb/edlog.php delete mode 100644 tools/bddb/execute.php delete mode 100644 tools/bddb/index.php delete mode 100644 tools/bddb/new.php delete mode 100644 tools/bddb/newlog.php Cc: Tom Rini <trini(a)ti.com> -- 2.1.1

4 36

[U-Boot] [PATCH 1/4] armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
by Stephen Warren 10 Nov '15

10 Nov '15

From: Stephen Warren <swarren(a)nvidia.com> The implementation of noncached_init() uses define MMU_SECTION_SIZE. Define this on ARM64. Move the prototype of noncached_{init,alloc}() to a location that doesn't depend on !defined(CONFIG_ARM64). Note that noncached_init() calls mmu_set_region_dcache_behaviour() which relies on something having set up translation tables with 2MB block size. The core ARMv8 MMU setup code does not do this by default, but currently relies on SoC specific MMU setup code. Be aware of this before enabling this feature on your platform! Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- arch/arm/include/asm/system.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 868ea54b4fef..c2d3718eb90c 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -17,6 +17,7 @@ #define PGTABLE_SIZE (0x10000) /* 2MB granularity */ #define MMU_SECTION_SHIFT 21 +#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT) #ifndef __ASSEMBLY__ @@ -278,11 +279,6 @@ enum { */ void mmu_page_table_flush(unsigned long start, unsigned long stop); -#ifdef CONFIG_SYS_NONCACHED_MEMORY -void noncached_init(void); -phys_addr_t noncached_alloc(size_t size, size_t align); -#endif /* CONFIG_SYS_NONCACHED_MEMORY */ - #endif /* __ASSEMBLY__ */ #define arch_align_stack(x) (x) @@ -302,6 +298,11 @@ phys_addr_t noncached_alloc(size_t size, size_t align); void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, enum dcache_option option); +#ifdef CONFIG_SYS_NONCACHED_MEMORY +void noncached_init(void); +phys_addr_t noncached_alloc(size_t size, size_t align); +#endif /* CONFIG_SYS_NONCACHED_MEMORY */ + #endif /* __ASSEMBLY__ */ #endif -- 1.9.1

4 12

[U-Boot] [PATCH] ls1043ardb: Add missing config entries to MAINTAINERS
by Fabio Estevam 10 Nov '15

10 Nov '15

ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing in the MAINTAINERS file, so add them for completeness. Reported-by: Albert Aribaud <albert.u.boot(a)aribaud.net> Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- board/freescale/ls1043ardb/MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS index b8f6be2..efca5bf 100644 --- a/board/freescale/ls1043ardb/MAINTAINERS +++ b/board/freescale/ls1043ardb/MAINTAINERS @@ -5,3 +5,5 @@ F: board/freescale/ls1043ardb/ F: board/freescale/ls1043ardb/ls1043ardb.c F: include/configs/ls1043ardb.h F: configs/ls1043ardb_defconfig +F: configs/ls1043ardb_nand_defconfig +F: configs/ls1043ardb_sdcard_defconfig -- 1.9.1

3 3

[U-Boot] Using spi_alloc_slave() from SPL
by Fabio Estevam 10 Nov '15

10 Nov '15

Hi, I am trying to use spi_flash_probe() inside SPL on a custom mx6 board. The idea is to read some parameters from the SPI NOR flash and configure the DDR accordingly. This is similar to what gw_ventana_spl.c does, but it reads from i2c eeprom instead of SPI NOR. Here are the changes just to illustrate the problem: --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -692,6 +692,19 @@ int checkboard(void) #ifdef CONFIG_SPL_BUILD #include <spl.h> #include <libfdt.h> +#include <spi_flash.h> +#include <spi.h> + +static int read_spi_flash(void) +{ + struct spi_flash *spi; + char buf[2]; + + spi = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + return spi_flash_read(spi, 0, 2, buf); +} const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { .dram_sdclk_0 = 0x00020030, @@ -837,6 +850,8 @@ void board_init_f(ulong dummy) /* UART clocks enabled and gd valid - init serial console */ preloader_console_init(); + read_spi_flash(); + /* DDR initialization */ spl_dram_init(); diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 41162ca..f5dfaf7 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -12,6 +12,10 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#define CONFIG_SPL_SPI_LOAD #include "imx6_spl.h" #endif @@ -35,6 +39,12 @@ #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ #endif +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI #define CONFIG_PCI -- 1.9.1 The when I run it: U-Boot SPL 2015.07-08202-g6dcdca1-dirty (Aug 06 2015 - 10:18:33) mxc_spi: SPI Slave not allocated ! spi_flash_probe() ---> spi_setup_slave() ----> spi_alloc_slave() which fails on mxc_spi.c As read_spi_flash() is called prior to the DDR initialization, spi_alloc_slave() fails. Is there a way to avoid calling spi_alloc_slave() in the SPL case? Any ideas on how to fix this? Thanks, Fabio Estevam

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