January 2015 - U-Boot

[U-Boot] [PATCH] devkit8000: convert to use generic board code
by Anthoine Bourgeois 07 Jan '15

07 Jan '15

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois(a)gmail.com> --- include/configs/devkit8000.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 930b08e..77e2f58 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -21,6 +21,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 #define CONFIG_OMAP_GPIO #define CONFIG_OMAP_COMMON +#define CONFIG_SYS_GENERIC_BOARD /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM -- 2.0.4

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[U-Boot] way to determine board dram size in boot script?
by Tim Harvey 07 Jan '15

07 Jan '15

Is there a recommended way to determine a board's dram size in a boot script? I need to pass in some specific kernel parameters for a GPU driver memory allocation on boards below a certain amount of memory. I can always do a: char str[6]; sprintf(str, "%d", (int) (gd->ram_size >> 20)); setenv("mem_mb", str); But I was hoping there was something already out there that I didn't know about. Regards, Tim

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[U-Boot] [PATCH v9 0/3] Adds support for Exynos5422 odroid xu3 board
by Hyungwon Hwang 07 Jan '15

07 Jan '15

This is v9 of the patchset adding support Odroud XU3 board. link to the previous version: v2: https://www.mail-archive.com/u-boot@lists.denx.de/msg152275.html v3: https://www.mail-archive.com/u-boot%40lists.denx.de/msg152677.html v4: https://patchwork.ozlabs.org/patch/407411/ v5: https://patchwork.ozlabs.org/patch/407941/ v6: https://patchwork.ozlabs.org/patch/408647/ v7: https://patchwork.ozlabs.org/patch/410204/ v8: https://patchwork.ozlabs.org/patch/410709/ The patchset by Akshay Saraswat is already merged into u-boot-samsung. Please ignore the instruction about the additional patchset in v8. How to test this patch: 1. git clone http://git.denx.de/u-boot-samsung.git 2. Apply this patchset 3. make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- odroid-xu3_config 4. make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j8 5. Now you can use u-boot-dtb.bin for your downloading WANRNING: The u-boot-dtb.bin must not be bigger than 335872 bytes. Depending on your compiler, it can be. Try another one if you get a problem. I use 'gcc version 4.8.2 (Ubuntu/Linaro 4.8.2-16ubuntu4)' on Ubuntu 64-bit machine. Note: If you use micro SD card for your test you have to apply the below patch additionally. This patch is needed, because micro sd card is recognized as MMC1 instead of MMC0. Additional work is needed to make it work regardless of device id. diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index ba591e7..437eaae 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -109,7 +109,7 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 -#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_SECURE_BL1_ONLY diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index cda4f26..b46ccad 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -110,15 +110,15 @@ "run kernel_args;" \ "bootz ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \ "autoboot=" \ - "if test -e mmc 0 Image.itb; then; " \ + "if test -e mmc 1 Image.itb; then; " \ "run boot_fit;" \ - "elif test -e mmc 0 zImage; then; " \ + "elif test -e mmc 1 zImage; then; " \ "run boot_zimg;" \ - "elif test -e mmc 0 uImage; then; " \ + "elif test -e mmc 1 uImage; then; " \ "run boot_uimg;" \ "fi;\0" \ "console=" CONFIG_DEFAULT_CONSOLE \ - "mmcbootdev=0\0" \ + "mmcbootdev=1\0" \ "mmcbootpart=1\0" \ "mmcrootdev=0\0" \ "mmcrootpart=2\0" \ Changes for v2: - Add a patch to add new common setup header file for Odroid X2/U3 and Odroid XU3 Changes for v3: - Remove the patch which adds new common setup header file from v2 - Remove the wrong patch to fix GPIO information of Exynos 5800 - Remove unnecessary node from DT file - Remove unnecessary features from config file - Fix some trivial typos in comments Changes for v4: - Add MMC FIFO buffer's configuration to DT file - Make CONFIG_OF_CONTROL be set by the target information - Add basic document to doc/README.odroid-xu3 - Add CONFIG_CMD_EXT4 to config file - Add environment size and offset to config file - Add extra default environment to make bootable without modification - Remove unnecessary features from config file Changes for v5: - Add the specific build instruction - Update the information of patchset by Akshay Saraswat - Convert /include/ to #include in DT file Changes for v6: - Separate out the documentation to new commit - Remove unnecessary header file inclusuib from the board-specific setup file - Make the function board_clock_init be declared, only when CONFIG_BOARD_EARLY_INIT_F is defined Changes for v7: - Fix several errata in the documentation - Remove OF_CONTROL dependency from !SPL_BUILD Changes for v8: - Remove unnecessary properties in DT mmc node Changes for v9: - Remove the first patch which change GPIO entries order. It became useless, after DT support is added - Remove useless variables in the default environment - Add the new contents to the documentation of Odroid X2/U2, instead of making new document for Odorid XU3 - Remove the detailed information in the header file, and leave the reference to the documentation Hyungwon Hwang (2): Odroid-XU3: Add support for Odroid-XU3 Odroid-XU3: Add documentation for Odroid-XU3 arch/arm/cpu/armv7/exynos/Kconfig | 5 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/exynos5422-odroidxu3.dts | 57 +++++++++++++++ board/samsung/odroid-xu3/Kconfig | 12 +++ board/samsung/odroid-xu3/MAINTAINERS | 6 ++ board/samsung/odroid-xu3/Makefile | 7 ++ board/samsung/odroid-xu3/odroid-xu3.c | 122 +++++++++++++++++++++++++++++++ board/samsung/odroid-xu3/setup.h | 95 ++++++++++++++++++++++++ configs/odroid-xu3_defconfig | 4 + doc/README.odroid | 46 ++++++++---- include/configs/odroid.h | 5 -- include/configs/odroid_xu3.h | 133 ++++++++++++++++++++++++++++++++++ 12 files changed, 473 insertions(+), 22 deletions(-) create mode 100644 arch/arm/dts/exynos5422-odroidxu3.dts create mode 100644 board/samsung/odroid-xu3/Kconfig create mode 100644 board/samsung/odroid-xu3/MAINTAINERS create mode 100644 board/samsung/odroid-xu3/Makefile create mode 100644 board/samsung/odroid-xu3/odroid-xu3.c create mode 100644 board/samsung/odroid-xu3/setup.h create mode 100644 configs/odroid-xu3_defconfig create mode 100644 include/configs/odroid_xu3.h -- 1.9.1

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[U-Boot] [PATCH] ARM: UniPhier: add a simple README file for UniPhier platform
by Masahiro Yamada 07 Jan '15

07 Jan '15

Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- doc/README.uniphier | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 doc/README.uniphier diff --git a/doc/README.uniphier b/doc/README.uniphier new file mode 100644 index 0000000..44ba7f7 --- /dev/null +++ b/doc/README.uniphier @@ -0,0 +1,69 @@ +U-Boot for UniPhier SoC family +============================== + + +Tested toolchains +----------------- + + (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-) + + If you are building U-Boot on Ubuntu, its standard package is recommended. + You can install it as follows: + + $ sudo apt-get install gcc-arm-linux-gnueabi- + + (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-) + + You can download pre-built toolchains from: + + http://www.linaro.org/downloads/ + + (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-) + + You can download pre-built toolchains from: + + ftp://www.kernel.org/pub/tools/crosstool/files/bin/ + + +Compile the source +------------------ + +PH1-Pro4: + $ make ph1_pro4_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + +PH1-LD4: + $ make ph1_ld4_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + +PH1-sLD8: + $ make ph1_sld8_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + +You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" +to use your favorite compiler. + + +Burn U-Boot images to NAND +-------------------------- + +Write two files to the NAND device as follows: + - spl/u-boot-spl.bin at the offset address 0x00000000 + - u-boot-dtb.img at the offset address 0x00010000 + + +Supported devices +----------------- + + - UART (on-chip) + - NAND + - USB (2.0) + - LAN (on-board SMSC9118) + - I2C + - EEPROM (connected to the on-board I2C bus) + - Support card (SRAM, NOR flash, some peripherals) + + +-- +Masahiro Yamada <yamada.m(a)jp.panasonic.com> +Jan. 2015 -- 1.9.1

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Re: [U-Boot] [Question] DM SPI FLASH
by Jagan Teki 07 Jan '15

07 Jan '15

On 7 January 2015 at 14:32, Peng.Fan(a)freescale.com <Peng.Fan(a)freescale.com> wrote: > Hi, Simon, > > It works for me using aliases. This aliases node reassigns req_seq number to dev, so it works. > > Another question, spi device driver can not get cs value? > `sf probe 0:0`. Bus is 0, and cs is 0. I want to use cs value to configure qspi controller, but i did not find way to do this. `0:0` is a new created device whose parent is spi controller device. But spi driver works at bus level. I am not sure whether this is correct, just want one way to get cs to configure qspi controller. Yes, dm-spi not quite well this run-time cs change as of now. We discussed the same while implementing, may be you can add cs attribute number for that particular bus or add support in dm-spi itself to support runtime configurable using sf probe [[bus:]cs]] > > Thanks, > Peng. > > -----Original Message----- > From: sjg(a)google.com [mailto:sjg@google.com] On Behalf Of Simon Glass > Sent: Wednesday, January 07, 2015 1:33 PM > To: Fan Peng-B51431 > Cc: Jagan Teki; u-Boot Mailing List > Subject: Re: [Question] DM SPI FLASH > > Hi Peng, > > On 6 January 2015 at 20:06, Peng Fan <B51431(a)freescale.com> wrote: >> Hi Simon, >> >> I am hacking DTB and DM SPI FLASH support for i.MX 6SoloX. I have a >> question about `sf probe`. In original way, `sf probe` or `sf probe >> 0:0` can detect qspi flashes on my platform. But after using DM, I >> should use `sf probe 35536896:0` to probe flashes. 35536896 is the >> address of QSPI controller's reg base 0x021e4000 in hex format. Does I >> miss something in my driver? It seems dev->seq is not valid so should >> pass req_seq which is the address of qspi controller in dts file. >> >> Any ideas? > > You can use: > > aliases { > spi0 = "/spi@xxxx"; > } > > to correct the sequence number. > > It would be better if we had a way to indicate a bus where reg provides the sequence number, so we know when it doesn't. I haven't come up with a good idea on that yet. > >> >> The log using `sf probe 0:0`. Fail to probe flash => sf probe 0:0 >> uclass_find_device_by_seq: 0 0 >> - 35536896 35536896 >> - not found >> spi_find_bus_and_cs: No bus 0 >> uclass_find_device_by_seq: 0 0 >> - 35536896 35536896 >> - not found >> uclass_find_device_by_seq: 1 0 >> - 35536896 35536896 >> - not found >> Invalid bus 0 (err=-19) >> Failed to initialize SPI flash at 0:0 (error -19) >> >> The log using `sf probe 35536896:0`. Success to probe flash. >> => sf probe 35536896:0 >> uclass_find_device_by_seq: 0 35536896 >> - 35536896 -1 >> - not found >> spi_find_bus_and_cs: No bus 35536896 >> uclass_find_device_by_seq: 0 35536896 >> - 35536896 -1 >> - not found >> uclass_find_device_by_seq: 1 35536896 >> - 35536896 -1 >> - found >> uclass_find_device_by_seq: 0 -1 >> uclass_find_device_by_seq: 0 0 >> - -1 -1 >> - 33554432 -1 >> - 33554432 -1 >> - 34373632 -1 >> - -1 -1 >> - 34603008 -1 >> - 35651584 -1 >> - 35913728 -1 >> - -1 -1 >> - not found >> uclass_find_device_by_seq: 0 34603008 >> - -1 0 >> - 33554432 -1 >> - 33554432 -1 >> - 34373632 -1 >> - -1 -1 >> - 34603008 -1 >> - 35651584 -1 >> - 35913728 -1 >> - -1 -1 >> - not found >> uclass_find_device_by_seq: 0 35536896 >> - 35536896 -1 >> - not found >> fdtdec_get_int_array: reg >> get_prop_check_min_len: reg >> fdtdec_get_int: spi-max-frequency: (not found) >> fsl_qspi_ofdata_to_platdata: reg_base=0x21e4000 amba_base=0x70000000 >> max-frequency=500000 >> fdtdec_get_int: spi-max-frequency: (not found) >> spi_get_bus_and_cs: Binding new device '35536896:0', busnum=35536896, >> cs=0, driver=spi_flash_std >> fdtdec_get_int: reg: (not found) >> Bound device 35536896:0 to qspi@021e4000 >> fdtdec_get_int: reg: (not found) >> fdtdec_get_int: spi-max-frequency: (not found) >> fdtdec_get_bool: spi-cpol >> fdtdec_get_bool: spi-cpha >> fdtdec_get_bool: spi-cs-high >> fdtdec_get_bool: spi-half-duplex >> uclass_find_device_by_seq: 0 -1 >> uclass_find_device_by_seq: 0 0 >> - -1 -1 >> - not found >> spi_flash_std_probe: slave=bfc5b208, cs=0 >> fsl_qspi_set_speed: hz=100000 >> fsl_qspi_set_mode: mode=0 >> SF: Got idcodes >> 00000000: 20 ba 19 10 00 .... >> SF: Detected N25Q256 with page size 256 Bytes, erase size 4 KiB, total >> 32 MiB >> SF: Warning - Only lower 16MiB accessible, Full access #define >> CONFIG_SPI_FLASH_BAR >> fsl_qspi_set_speed: hz=1000000 >> fsl_qspi_set_mode: mode=3 >> spi_get_bus_and_cs: bus=bfc53308, slave=bfc5b208 thanks! -- Jagan.

1 0

[U-Boot] [PATCH] spi: cadence_qspi: Fix checking return value of fdt_first_subnode()
by Axel Lin 07 Jan '15

07 Jan '15

fdt_first_subnode() returns -FDT_ERR_NOTFOUND if no subnode found. 0 is supposed to be a valid offset returns from fdt_first_subnode(). Signed-off-by: Axel Lin <axel.lin(a)ingics.com> --- drivers/spi/cadence_qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index fa95b19..98ae3b8 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -297,7 +297,7 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) /* All other paramters are embedded in the child node */ subnode = fdt_first_subnode(blob, node); - if (!subnode) { + if (subnode < 0) { printf("Error: subnode with SPI flash config missing!\n"); return -ENODEV; } -- 1.9.1

2 1

[U-Boot] [PATCH] x86: Remove CONFIG_DISPLAY_CPUINFO in chromebook_link.h
by Bin Meng 07 Jan '15

07 Jan '15

CONFIG_DISPLAY_CPUINFO is already defined in x86-common.h, so remove it to avoid duplication. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- include/configs/chromebook_link.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index e0bf309..7e6d239 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -20,7 +20,6 @@ #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_DISPLAY_CPUINFO #define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 -- 1.8.2.1

2 2

[U-Boot] [RESEND PATCH v4 0/12] x86: Better support of coreboot
by Bin Meng 07 Jan '15

07 Jan '15

In theory U-Boot built for coreboot is supposed to run as a payload to be loaded by coreboot on every board that coreboot supports. The U-Boot build process uses SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE which are hardcoded in board defconfig and Kconfig files. For better support of coreboot, we want to make these two options configurable so that we can easily change them during 'make menuconfig' so that the generated U-Boot image for coreboot is board configuration aware. Note v2/v3/v4 patch series aims to better support coreboot, while v1 patch series just tried to resolve the issues seen on qemu. Several issues are fixed to make coreboot support in U-Boot more robust. See v1 patch discussion @ http://lists.denx.de/pipermail/u-boot/2015-January/200140.html The official qemu U-Boot support will come in the future. This patch series have been tested with coreboot running on qemu and Intel Crown Bay (my own unofficiall simple port, not in coreboot mainline) then loading the U-Boot built with the new mechanism. Changes in v4: - Hide XIP_ROM_SIZE too after rebase - Rebase to u-boot-x86/next Changes in v3: - Make coreboot options wrapped by TARGET_COREBOOT - Remove these options from include/configs/coreboot.h for bisectability - Move CONFIG_VIDEO_X86 to drivers/video/Kconfig - Fix several typos in README.x86 Changes in v2: - Fix the CONFIG_COLLECT_TIMESTAMPS typo in the comment block and commit message - Spell out TSC, MSR and PIT in the Kconfig help - New patch to move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig - New patch to hide ROM chip size when CONFIG_X86_RESET_VECTOR is not selected - New patch to make SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE configurable - New patch to move coreboot specific defines from coreboot.h to Kconfig - New patch to move CONFIG_SYS_CAR_xxx to Kconfig - New patch to remove include/configs/coreboot.h - New patch to make chromebook_link the default board for coreboot - Leave CROS_EC defines unchanged in coreboot.h - New patch to configure pci memory regions - New patch to update REAME.x86 for coreboot support Bin Meng (12): x86: coreboot: Set up timer base correctly x86: Allow a hardcoded TSC frequency provided by Kconfig x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig x86: Hide ROM chip size when CONFIG_X86_RESET_VECTOR is not selected x86: coreboot: Make SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE configurable x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig x86: Move CONFIG_SYS_CAR_xxx to Kconfig x86: Remove include/configs/coreboot.h x86: Make chromebook_link the default board for coreboot x86: coreboot: Wrap cros_ec initialization x86: coreboot: Configure pci memory regions x86: Update README.x86 for coreboot support arch/x86/Kconfig | 33 ++++++ arch/x86/cpu/coreboot/Kconfig | 15 +++ arch/x86/cpu/coreboot/pci.c | 30 ++++- arch/x86/cpu/coreboot/timestamp.c | 33 +++--- arch/x86/dts/Makefile | 3 +- arch/x86/dts/chromebook_link.dts | 217 ++++++++++++++++++++++++++++++++++- arch/x86/dts/link.dts | 216 ---------------------------------- arch/x86/lib/tsc_timer.c | 8 +- board/coreboot/coreboot/Kconfig | 27 ++++- board/coreboot/coreboot/MAINTAINERS | 2 +- board/coreboot/coreboot/coreboot.c | 2 + board/google/chromebook_link/Kconfig | 9 ++ board/intel/crownbay/Kconfig | 1 + configs/chromebook_link_defconfig | 1 + configs/coreboot-x86_defconfig | 1 - doc/README.x86 | 39 ++++++- drivers/video/Kconfig | 8 ++ include/configs/chromebook_link.h | 7 +- include/configs/coreboot.h | 75 ------------ include/configs/crownbay.h | 2 - 20 files changed, 406 insertions(+), 323 deletions(-) create mode 100644 arch/x86/cpu/coreboot/Kconfig mode change 120000 => 100644 arch/x86/dts/chromebook_link.dts delete mode 100644 arch/x86/dts/link.dts delete mode 100644 include/configs/coreboot.h -- 1.8.2.1

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[U-Boot] [PATCH] x86: fsp: Drop get_hob_type() and get_hob_length()
by Bin Meng 07 Jan '15

07 Jan '15

These two are not worth having separate inline functions as they are really simple, so drop them. Also changed 'type' parameter of fsp_get_next_hob() from u16 to uint. Suggested-by: Simon Glass <sjg(a)chromium.org> Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- arch/x86/cpu/queensbay/fsp_support.c | 10 +++--- arch/x86/cpu/queensbay/tnc_dram.c | 4 +-- arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h | 36 ++-------------------- .../include/asm/arch-queensbay/fsp/fsp_support.h | 2 +- arch/x86/lib/cmd_hob.c | 6 ++-- 5 files changed, 14 insertions(+), 44 deletions(-) diff --git a/arch/x86/cpu/queensbay/fsp_support.c b/arch/x86/cpu/queensbay/fsp_support.c index 4764e3c..aed3e2b 100644 --- a/arch/x86/cpu/queensbay/fsp_support.c +++ b/arch/x86/cpu/queensbay/fsp_support.c @@ -242,7 +242,7 @@ u32 fsp_get_usable_lowmem_top(const void *hob_list) /* * Collect memory ranges */ top = FSP_LOWMEM_BASE; while (!end_of_hob(hdr)) { - if (get_hob_type(hdr) == HOB_TYPE_RES_DESC) { + if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_SYS_MEM) { phys_start = res_desc->phys_start; @@ -271,7 +271,7 @@ u64 fsp_get_usable_highmem_top(const void *hob_list) /* Collect memory ranges */ top = FSP_HIGHMEM_BASE; while (!end_of_hob(hdr)) { - if (get_hob_type(hdr) == HOB_TYPE_RES_DESC) { + if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_SYS_MEM) { phys_start = res_desc->phys_start; @@ -297,7 +297,7 @@ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, /* Collect memory ranges */ while (!end_of_hob(hdr)) { - if (get_hob_type(hdr) == HOB_TYPE_RES_DESC) { + if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_MEM_RESERVED) { if (compare_guid(&res_desc->owner, guid)) { @@ -342,7 +342,7 @@ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) return base; } -const struct hob_header *fsp_get_next_hob(u16 type, const void *hob_list) +const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list) { const struct hob_header *hdr; @@ -350,7 +350,7 @@ const struct hob_header *fsp_get_next_hob(u16 type, const void *hob_list) /* Parse the HOB list until end of list or matching type is found */ while (!end_of_hob(hdr)) { - if (get_hob_type(hdr) == type) + if (hdr->type == type) return hdr; hdr = get_next_hob(hdr); diff --git a/arch/x86/cpu/queensbay/tnc_dram.c b/arch/x86/cpu/queensbay/tnc_dram.c index b669dbc..df79a39 100644 --- a/arch/x86/cpu/queensbay/tnc_dram.c +++ b/arch/x86/cpu/queensbay/tnc_dram.c @@ -19,7 +19,7 @@ int dram_init(void) hdr = gd->arch.hob_list; while (!end_of_hob(hdr)) { - if (get_hob_type(hdr) == HOB_TYPE_RES_DESC) { + if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_SYS_MEM || res_desc->type == RES_MEM_RESERVED) { @@ -63,7 +63,7 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) hdr = gd->arch.hob_list; while (!end_of_hob(hdr)) { - if (get_hob_type(hdr) == HOB_TYPE_RES_DESC) { + if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; entries[num_entries].addr = res_desc->phys_start; entries[num_entries].size = res_desc->len; diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h index 5110361..6cca7f5 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h @@ -183,36 +183,6 @@ struct hob_guid { }; /** - * get_hob_type() - return the type of a HOB - * - * This macro returns the type field from the HOB header for the - * HOB specified by hob. - * - * @hob: A pointer to a HOB. - * - * @return: HOB type. - */ -static inline u16 get_hob_type(const struct hob_header *hdr) -{ - return hdr->type; -} - -/** - * get_hob_length() - return the length, in bytes, of a HOB - * - * This macro returns the len field from the HOB header for the - * HOB specified by hob. - * - * @hob: A pointer to a HOB. - * - * @return: HOB length. - */ -static inline u16 get_hob_length(const struct hob_header *hdr) -{ - return hdr->len; -} - -/** * get_next_hob() - return a pointer to the next HOB in the HOB list * * This macro returns a pointer to HOB that follows the HOB specified by hob @@ -224,7 +194,7 @@ static inline u16 get_hob_length(const struct hob_header *hdr) */ static inline const struct hob_header *get_next_hob(const struct hob_header *hdr) { - return (const struct hob_header *)((u32)hdr + get_hob_length(hdr)); + return (const struct hob_header *)((u32)hdr + hdr->len); } /** @@ -241,7 +211,7 @@ static inline const struct hob_header *get_next_hob(const struct hob_header *hdr */ static inline bool end_of_hob(const struct hob_header *hdr) { - return get_hob_type(hdr) == HOB_TYPE_EOH; + return hdr->type == HOB_TYPE_EOH; } /** @@ -273,7 +243,7 @@ static inline void *get_guid_hob_data(const struct hob_header *hdr) */ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) { - return get_hob_length(hdr) - sizeof(struct hob_guid); + return hdr->len - sizeof(struct hob_guid); } /* FSP specific GUID HOB definitions */ diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h index 2a3e987..ebdbd03 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h @@ -145,7 +145,7 @@ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); * * @retval: A HOB object with matching type; Otherwise NULL. */ -const struct hob_header *fsp_get_next_hob(u16 type, const void *hob_list); +const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list); /** * Returns the next instance of the matched GUID HOB from the starting HOB. diff --git a/arch/x86/lib/cmd_hob.c b/arch/x86/lib/cmd_hob.c index 8d1f038..a0ef037 100644 --- a/arch/x86/lib/cmd_hob.c +++ b/arch/x86/lib/cmd_hob.c @@ -29,7 +29,7 @@ static char *hob_type[] = { int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { const struct hob_header *hdr; - u16 type; + uint type; char *desc; int i = 0; @@ -41,7 +41,7 @@ int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("----|----------|---------------------|----------------\n"); while (!end_of_hob(hdr)) { printf("%-3d | %08x | ", i, (unsigned int)hdr); - type = get_hob_type(hdr); + type = hdr->type; if (type == HOB_TYPE_UNUSED) desc = "*Unused*"; else if (type == HOB_TYPE_EOH) @@ -50,7 +50,7 @@ int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) desc = hob_type[type]; else desc = "*Invalid Type*"; - printf("%-19s | %-15d\n", desc, get_hob_length(hdr)); + printf("%-19s | %-15d\n", desc, hdr->len); hdr = get_next_hob(hdr); i++; } -- 1.8.2.1

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[U-Boot] [PATCH v1 03/24] ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores
by York Sun 06 Jan '15

06 Jan '15

From: Arnab Basu <arnab.basu(a)freescale.com> U-Boot should only add "enable-method" and "cpu-release-address" properties to the "cpu" node of the online cores. Signed-off-by: Arnab Basu <arnab.basu(a)freescale.com> Signed-off-by: York Sun <yorksun(a)freescale.com> --- arch/arm/cpu/armv8/fsl-lsch3/fdt.c | 23 ++++++++++++++--------- arch/arm/cpu/armv8/fsl-lsch3/mp.c | 8 ++++++++ arch/arm/cpu/armv8/fsl-lsch3/mp.h | 1 + 3 files changed, 23 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c index e392eb9..2287e26 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c @@ -16,7 +16,7 @@ void ft_fixup_cpu(void *blob) __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr(); fdt32_t *reg; int addr_cells; - u64 val; + u64 val, core_id; size_t *boot_code_size = &(__secondary_boot_code_size); off = fdt_path_offset(blob, "/cpus"); @@ -29,15 +29,20 @@ void ft_fixup_cpu(void *blob) off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); while (off != -FDT_ERR_NOTFOUND) { reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); + core_id = of_read_number(reg, addr_cells); if (reg) { - val = spin_tbl_addr; - val += id_to_core(of_read_number(reg, addr_cells)) - * SPIN_TABLE_ELEM_SIZE; - val = cpu_to_fdt64(val); - fdt_setprop_string(blob, off, "enable-method", - "spin-table"); - fdt_setprop(blob, off, "cpu-release-addr", - &val, sizeof(val)); + if (core_id == 0 || (is_core_online(core_id))) { + val = spin_tbl_addr; + val += id_to_core(core_id) * + SPIN_TABLE_ELEM_SIZE; + val = cpu_to_fdt64(val); + fdt_setprop_string(blob, off, "enable-method", + "spin-table"); + fdt_setprop(blob, off, "cpu-release-addr", + &val, sizeof(val)); + } else { + debug("skipping offline core\n"); + } } else { puts("Warning: found cpu node without reg property\n"); } diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.c b/arch/arm/cpu/armv8/fsl-lsch3/mp.c index 94998bf..ce9c0c1 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/mp.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.c @@ -83,6 +83,14 @@ int is_core_valid(unsigned int core) return !!((1 << core) & cpu_mask()); } +int is_core_online(u64 cpu_id) +{ + u64 *table; + int pos = id_to_core(cpu_id); + table = (u64 *)get_spin_tbl_addr() + pos * WORDS_PER_SPIN_TABLE_ENTRY; + return table[SPIN_TABLE_ELEM_STATUS_IDX] == 1; +} + int cpu_reset(int nr) { puts("Feature is not implemented.\n"); diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.h b/arch/arm/cpu/armv8/fsl-lsch3/mp.h index 06ac0bc..66144d6 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/mp.h +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.h @@ -32,5 +32,6 @@ int fsl_lsch3_wake_seconday_cores(void); void *get_spin_tbl_addr(void); phys_addr_t determine_mp_bootpg(void); void secondary_boot_func(void); +int is_core_online(u64 cpu_id); #endif #endif /* _FSL_CH3_MP_H */ -- 1.7.9.5

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