January 2015 - U-Boot

[U-Boot] [PATCH 0/2] qspi:fsl support AHB read
by Peng Fan 08 Jan '15

08 Jan '15

This patch set is to support AHB read in qspi driver and add related configuration in board configuration file. Detailed log info is in patch commit log. Peng Fan (2): qspi:fsl implement AHB read imx:mx6sxsabresd support qspi AHB read drivers/spi/fsl_qspi.c | 137 ++++++++++++++++++++++++++++++++++++++--- drivers/spi/fsl_qspi.h | 15 +++++ include/configs/mx6sxsabresd.h | 3 + 3 files changed, 145 insertions(+), 10 deletions(-) -- 1.8.4

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[U-Boot] sunxi: video: Add LCD output and A13-Olinuxino VGA output support
by Hans de Goede 08 Jan '15

08 Jan '15

Hi All, After a couple of days of work I'm very happy to send out the next sunxi video improvement series. This series adds support for outputting video through the sunxi lcd controller. This means we now have u-boot status and console output on e.g. A23 tablets, reducing the need to solder a serial console to their PCB-s :) Besides this, this series also adds support for the special VGA output found on A13-Olinuxino[-Micro] boards. I've one more series (or hopefully a few small patches) planned to also add support for the native vga dac found on most sunxi SoCs and actually routed to a VGA connector on some boards. After that I'm done with the sunxi video support work, and I hope to slowly start on A80 support. As always please review. Merry Christmas & Regards, Hans

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[U-Boot] [PATCH 0/6] sunxi: video: Add hdmi output fmt support + misc fixes
by Hans de Goede 08 Jan '15

08 Jan '15

Hi Anatolij & Ian, Here is a second series of sunxi video support improvments. Anatolij, can you please review the first patch of the series? You're input on the rest is welcome too of course :) Regards, Hans

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[U-Boot] [PATCH v2 00/11] video: Add / fix videomodes modes, use for sunxi, enable EDID on sunxi
by Hans de Goede 08 Jan '15

08 Jan '15

Hi Anatolij & Ian, Here is v2 of my patch-series to make the video-mode configurable on sunxi and use EDID where available. In version 2 I've switched to using the existing infra in videomodes.c as much as possible, including using the standard video-mode env. variable, and the existing functions to parse it. Anatolij this series starts with a bunch of fixes / additions to videomodes.c, can you please review (and ack :) these ? Since the only user of the new functionality is sunxi code I would like to take these upstream through u-boot-sunxi/next if that is ok with you, but I do need your ack for them before merging them there. Ian, can you review the sunxi specific patches ? Thanks & Regards, Hans

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[U-Boot] [PATCH] ARM: UniPhier: add UART initialization routine for low-level debug
by Masahiro Yamada 08 Jan '15

08 Jan '15

The low-level debugging functions are useful to debug the early boot stage where the full UART driver is not available. UniPhier SoCs need to initialize the UART port 0 to use this feature. The initialization routine is called at the very entry of the lowlevel_init(). Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- arch/arm/cpu/armv7/uniphier/lowlevel_init.S | 4 +++ arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile | 1 + .../cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S | 29 ++++++++++++++++ arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile | 1 + .../cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S | 39 ++++++++++++++++++++++ arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile | 1 + .../cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S | 29 ++++++++++++++++ arch/arm/include/asm/arch-uniphier/debug-uart.S | 24 +++++++++++++ 8 files changed, 128 insertions(+) create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S create mode 100644 arch/arm/include/asm/arch-uniphier/debug-uart.S diff --git a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S b/arch/arm/cpu/armv7/uniphier/lowlevel_init.S index 0ea12d3..c208ab6 100644 --- a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S +++ b/arch/arm/cpu/armv7/uniphier/lowlevel_init.S @@ -26,6 +26,10 @@ ENTRY(lowlevel_init) orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache mcr p15, 0, r0, c1, c0, 0 +#ifdef CONFIG_DEBUG_LL + bl setup_lowlevel_debug +#endif + /* * Now we are using the page table embedded in the Boot ROM. * It is not handy since it is not a straight mapped table for sLD3. diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile index 8794629..0752906 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile +++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o obj-y += boot-mode.o +obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-$(CONFIG_SOC_INIT) += bcu_init.o sbc_init.o sg_init.o pll_init.o \ clkrst_init.o obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S new file mode 100644 index 0000000..c0778a0 --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S @@ -0,0 +1,29 @@ +/* + * On-chip UART initializaion for low-level debugging + * + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m(a)jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> +#include <asm/arch/sg-regs.h> + +#define UART_CLK 36864000 +#include <asm/arch/debug-uart.S> + +ENTRY(setup_lowlevel_debug) + init_debug_uart r0, r1, r2 + + /* UART Port 0 */ + set_pinsel 85, 1, r0, r1 + set_pinsel 88, 1, r0, r1 + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + mov pc, lr +ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile index cee7878..8206e2a 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile +++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o obj-y += boot-mode.o +obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-$(CONFIG_SOC_INIT) += sbc_init.o sg_init.o pll_init.o clkrst_init.o obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o ddrphy_init.o diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S new file mode 100644 index 0000000..a793b7c --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S @@ -0,0 +1,39 @@ +/* + * On-chip UART initializaion for low-level debugging + * + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m(a)jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> +#include <asm/arch/sc-regs.h> +#include <asm/arch/sg-regs.h> + +#define UART_CLK 73728000 +#include <asm/arch/debug-uart.S> + +ENTRY(setup_lowlevel_debug) + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CLK_PERI + str r1, [r0] + + init_debug_uart r0, r1, r2 + + /* UART Port 0 */ + set_pinsel 127, 0, r0, r1 + set_pinsel 128, 0, r0, r1 + + ldr r0, =SG_LOADPINCTRL + mov r1, #1 + str r1, [r0] + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + mov pc, lr +ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile b/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile index 8794629..0752906 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile +++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o obj-y += boot-mode.o +obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-$(CONFIG_SOC_INIT) += bcu_init.o sbc_init.o sg_init.o pll_init.o \ clkrst_init.o obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S new file mode 100644 index 0000000..a413e5f --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S @@ -0,0 +1,29 @@ +/* + * On-chip UART initializaion for low-level debugging + * + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m(a)jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> +#include <asm/arch/sg-regs.h> + +#define UART_CLK 80000000 +#include <asm/arch/debug-uart.S> + +ENTRY(setup_lowlevel_debug) + init_debug_uart r0, r1, r2 + + /* UART Port 0 */ + set_pinsel 70, 3, r0, r1 + set_pinsel 71, 3, r0, r1 + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + mov pc, lr +ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/include/asm/arch-uniphier/debug-uart.S b/arch/arm/include/asm/arch-uniphier/debug-uart.S new file mode 100644 index 0000000..af55fee --- /dev/null +++ b/arch/arm/include/asm/arch-uniphier/debug-uart.S @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m(a)jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/serial_reg.h> + +#if !defined(CONFIG_DEBUG_SEMIHOSTING) +#include CONFIG_DEBUG_LL_INCLUDE +#endif + +#define BAUDRATE 115200 +#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d)) +#define DIVISOR DIV_ROUND(UART_CLK, 16 * BAUDRATE) + + .macro init_debug_uart, ra, rb, rc + addruart \ra, \rb, \rc + mov \rb, #UART_LCR_WLEN8 + strb \rb, [\ra, #0x11] + ldr \rb, =DIVISOR + str \rb, [\ra, #0x24] + .endm -- 1.9.1

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[U-Boot] [PATCH] ARM: UniPhier: enable output of system bus
by Masahiro Yamada 08 Jan '15

08 Jan '15

For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs, the output of the system bus is disabled by default. It must be enabled by software to have access to the system bus. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c | 7 +++++++ arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c | 7 +++++++ arch/arm/include/asm/arch-uniphier/sbc-regs.h | 1 + 3 files changed, 15 insertions(+) diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c index a37ed16..4839c94 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c @@ -12,6 +12,13 @@ void sbc_init(void) { + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); + /* XECS1: sub/boot memory (boot swap = off/on) */ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c index af44dee..5efee9c 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c @@ -12,6 +12,13 @@ void sbc_init(void) { + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); + #if !defined(CONFIG_SPL_BUILD) /* XECS0 : dummy */ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); diff --git a/arch/arm/include/asm/arch-uniphier/sbc-regs.h b/arch/arm/include/asm/arch-uniphier/sbc-regs.h index 8e41078..efb68e8 100644 --- a/arch/arm/include/asm/arch-uniphier/sbc-regs.h +++ b/arch/arm/include/asm/arch-uniphier/sbc-regs.h @@ -95,6 +95,7 @@ #define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500 #define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010 +#define PC0CTRL 0x598000c0 #define ROM_BOOT_ROMRSV2 0x59801208 #ifndef __ASSEMBLY__ -- 1.9.1

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[U-Boot] [PATCH] ARM: UniPhier: fix SRAM size on support card
by Masahiro Yamada 08 Jan '15

08 Jan '15

The max size of available memories on slot0 and slot1 is 32MB because - EA[25] signal is not output on the save-pin mode which is used PH1-LD4 or later SoCs. - EA[25] signal is not connected by the limitation (or bug?) of the PLD logic of DCC support card. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- arch/arm/cpu/armv7/uniphier/support_card.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/uniphier/support_card.c b/arch/arm/cpu/armv7/uniphier/support_card.c index 419012e..443224c 100644 --- a/arch/arm/cpu/armv7/uniphier/support_card.c +++ b/arch/arm/cpu/armv7/uniphier/support_card.c @@ -160,12 +160,12 @@ static const struct memory_bank memory_banks_boot_swap_on[] = { #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) static const struct memory_bank memory_banks_boot_swap_off[] = { - {0x04000000, 0x04000000}, + {0x04000000, 0x02000000}, }; static const struct memory_bank memory_banks_boot_swap_on[] = { - {0x00000000, 0x04000000}, - {0x04000000, 0x04000000}, + {0x00000000, 0x02000000}, + {0x04000000, 0x02000000}, }; #endif -- 1.9.1

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[U-Boot] [PATCH] watchdog: omap: Add handling for CONFIG_WATCHDOG_TIMEOUT_MSECS
by Marek Belisko 08 Jan '15

08 Jan '15

This change add possibility to change watchdog timeout compile time. Previous default value is kept when CONFIG_WATCHDOG_TIMEOUT_MSECS is not defined in config file. Signed-off-by: Marek Belisko <marek.belisko(a)gmail.com> --- drivers/watchdog/omap_wdt.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index 7ea4b60..26774d6 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c @@ -44,9 +44,6 @@ #include <asm/processor.h> #include <asm/arch/cpu.h> -/* Hardware timeout in seconds */ -#define WDT_HW_TIMEOUT 60 - static unsigned int wdt_trgr_pattern = 0x1234; void hw_watchdog_reset(void) @@ -92,8 +89,15 @@ void hw_watchdog_init(void) writel(WDT_WCLR_PRE | (PTV << WDT_WCLR_PTV_OFF), &wdt->wdtwclr); while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WCLR) ; + /* + * If timeuot is not defined in config file + * use default 60 seconds + */ +#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 +#endif - omap_wdt_set_timeout(WDT_HW_TIMEOUT); + omap_wdt_set_timeout(CONFIG_WATCHDOG_TIMEOUT_MSECS); /* Sequence to enable the watchdog */ writel(0xBBBB, &wdt->wdtwspr); -- 1.7.9.5

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[U-Boot] [PATCH] spl: spl_nor: surround Linux-load code with #ifdef CONFIG_SPL_OS_BOOT
by Masahiro Yamada 08 Jan '15

08 Jan '15

If CONFIG_SPL_NOR_SUPPORT is defined, spl_nor_load_image() requires spl_start_uboot(), CONFIG_SYS_OS_BASE, CONFIG_SYS_SPL_ARGS_ADDR, CONFIG_SYS_FDT_BASE to be defined even if users just want to run U-Boot, not Linux. This is inconvenient. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- common/spl/spl_nor.c | 74 +++++++++++++++++++++++++++++----------------------- 1 file changed, 41 insertions(+), 33 deletions(-) diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index b444a3e..6f91176 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -7,6 +7,45 @@ #include <common.h> #include <spl.h> +#if defined(CONFIG_SPL_OS_BOOT) +int load_linux(void) +{ + if (spl_start_uboot()) + return -1; + + spl_parse_image_header( + (const struct image_header *)CONFIG_SYS_OS_BASE); + + memcpy((void *)spl_image.load_addr, + (void *)(CONFIG_SYS_OS_BASE + sizeof(struct image_header)), + spl_image.size); + + /* + * Copy DT blob (fdt) to SDRAM. Passing pointer to flash + * doesn't work (16 KiB should be enough for DT) + */ + memcpy((void *)CONFIG_SYS_SPL_ARGS_ADDR, (void *)(CONFIG_SYS_FDT_BASE), + 16 << 10); + + return 0; +} +#else +int load_linux(void) +{ + return -1; +} +#endif + +void load_uboot(void) +{ + spl_parse_image_header( + (const struct image_header *)CONFIG_SYS_UBOOT_BASE); + + memcpy((void *)spl_image.load_addr, + (void *)(CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header)), + spl_image.size); +} + void spl_nor_load_image(void) { /* @@ -15,37 +54,6 @@ void spl_nor_load_image(void) */ spl_image.flags |= SPL_COPY_PAYLOAD_ONLY; - if (spl_start_uboot()) { - /* - * Load real U-Boot from its location in NOR flash to its - * defined location in SDRAM - */ - spl_parse_image_header( - (const struct image_header *)CONFIG_SYS_UBOOT_BASE); - - memcpy((void *)spl_image.load_addr, - (void *)(CONFIG_SYS_UBOOT_BASE + - sizeof(struct image_header)), - spl_image.size); - } else { - /* - * Load Linux from its location in NOR flash to its defined - * location in SDRAM - */ - spl_parse_image_header( - (const struct image_header *)CONFIG_SYS_OS_BASE); - - memcpy((void *)spl_image.load_addr, - (void *)(CONFIG_SYS_OS_BASE + - sizeof(struct image_header)), - spl_image.size); - - /* - * Copy DT blob (fdt) to SDRAM. Passing pointer to flash - * doesn't work (16 KiB should be enough for DT) - */ - memcpy((void *)CONFIG_SYS_SPL_ARGS_ADDR, - (void *)(CONFIG_SYS_FDT_BASE), - (16 << 10)); - } + if (load_linux() < 0) + load_uboot(); } -- 1.9.1

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[U-Boot] [PATCH 3/5] i2c: imx: Optimize the i2c device recovery solution
by Peng Fan 08 Jan '15

08 Jan '15

From: Fugang Duan <b38611(a)freescale.com> >From i2c spec, if device pull down the SDA line that causes i2c bus dead, host can send out 9 clock to let device release SDA. But for some special device like pfuze100, it pull down SDA line and the solution cannot take effort. The patch just add NACK and STOP signal after 8 dummy clock, and pmic can release SDA line after the recovery. Test case catch 375 times of i2c hang, and all are recovered. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Signed-off-by: Fugang Duan <B38611(a)freescale.com> --- arch/arm/imx-common/i2c-mxv7.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c index 1a632e7..b1d4ec4 100644 --- a/arch/arm/imx-common/i2c-mxv7.c +++ b/arch/arm/imx-common/i2c-mxv7.c @@ -33,13 +33,36 @@ static int force_idle_bus(void *priv) printf("%s: sda=%d scl=%d sda.gp=0x%x scl.gp=0x%x\n", __func__, sda, scl, p->sda.gp, p->scl.gp); + gpio_direction_output(p->scl.gp, 1); + udelay(1000); /* Send high and low on the SCL line */ for (i = 0; i < 9; i++) { - gpio_direction_output(p->scl.gp, 0); + gpio_direction_output(p->scl.gp, 1); udelay(50); - gpio_direction_input(p->scl.gp); + gpio_direction_output(p->scl.gp, 0); udelay(50); } + + /* Simulate the NACK */ + gpio_direction_output(p->sda.gp, 1); + udelay(50); + gpio_direction_output(p->scl.gp, 1); + udelay(50); + gpio_direction_output(p->scl.gp, 0); + udelay(50); + + /* Simulate the STOP signal */ + gpio_direction_output(p->sda.gp, 0); + udelay(50); + gpio_direction_output(p->scl.gp, 1); + udelay(50); + gpio_direction_output(p->sda.gp, 1); + udelay(50); + + /* Get the bus status */ + gpio_direction_input(p->sda.gp); + gpio_direction_input(p->scl.gp); + start_time = get_timer(0); for (;;) { sda = gpio_get_value(p->sda.gp); -- 1.8.4

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