July 2014 - U-Boot

[U-Boot] [PATCH] drivers: net: remove dead drivers
by Masahiro Yamada 01 Aug '14

01 Aug '14

The following configs are not defined at all: - CONFIG_FTMAC110 - CONFIG_INCA_IP_SWITCH - CONFIG_PBL2800_ETHER - CONFIG_PHY_ICPLUS Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- drivers/net/Makefile | 3 - drivers/net/ftmac110.c | 480 ---------------------------------------------- drivers/net/ftmac110.h | 176 ----------------- drivers/net/phy/Makefile | 1 - drivers/net/phy/icplus.c | 80 -------- drivers/net/phy/phy.c | 3 - drivers/net/plb2800_eth.c | 373 ----------------------------------- include/netdev.h | 2 - 8 files changed, 1118 deletions(-) delete mode 100644 drivers/net/ftmac110.c delete mode 100644 drivers/net/ftmac110.h delete mode 100644 drivers/net/phy/icplus.c delete mode 100644 drivers/net/plb2800_eth.c diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 7cc6b6f..42f21a6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -27,10 +27,8 @@ obj-$(CONFIG_ETHOC) += ethoc.o obj-$(CONFIG_FEC_MXC) += fec_mxc.o obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o obj-$(CONFIG_FTGMAC100) += ftgmac100.o -obj-$(CONFIG_FTMAC110) += ftmac110.o obj-$(CONFIG_FTMAC100) += ftmac100.o obj-$(CONFIG_GRETH) += greth.o -obj-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o obj-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o @@ -46,7 +44,6 @@ obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o obj-$(CONFIG_NETCONSOLE) += netconsole.o obj-$(CONFIG_NS8382X) += ns8382x.o obj-$(CONFIG_PCNET) += pcnet.o -obj-$(CONFIG_PLB2800_ETHER) += plb2800_eth.o obj-$(CONFIG_RTL8139) += rtl8139.o obj-$(CONFIG_RTL8169) += rtl8169.o obj-$(CONFIG_SH_ETHER) += sh_eth.o diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c deleted file mode 100644 index 98c4f09..0000000 --- a/drivers/net/ftmac110.c +++ /dev/null @@ -1,480 +0,0 @@ -/* - * Faraday 10/100Mbps Ethernet Controller - * - * (C) Copyright 2013 Faraday Technology - * Dante Su <dantesu(a)faraday-tech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <malloc.h> -#include <net.h> -#include <asm/errno.h> -#include <asm/io.h> -#include <asm/dma-mapping.h> - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) -#include <miiphy.h> -#endif - -#include "ftmac110.h" - -#define CFG_RXDES_NUM 8 -#define CFG_TXDES_NUM 2 -#define CFG_XBUF_SIZE 1536 - -#define CFG_MDIORD_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ -#define CFG_MDIOWR_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ -#define CFG_LINKUP_TIMEOUT (CONFIG_SYS_HZ << 2) /* 4 sec */ - -/* - * FTMAC110 DMA design issue - * - * Its DMA engine has a weird restriction that its Rx DMA engine - * accepts only 16-bits aligned address, 32-bits aligned is not - * acceptable. However this restriction does not apply to Tx DMA. - * - * Conclusion: - * (1) Tx DMA Buffer Address: - * 1 bytes aligned: Invalid - * 2 bytes aligned: O.K - * 4 bytes aligned: O.K (-> u-boot ZeroCopy is possible) - * (2) Rx DMA Buffer Address: - * 1 bytes aligned: Invalid - * 2 bytes aligned: O.K - * 4 bytes aligned: Invalid - */ - -struct ftmac110_chip { - void __iomem *regs; - uint32_t imr; - uint32_t maccr; - uint32_t lnkup; - uint32_t phy_addr; - - struct ftmac110_desc *rxd; - ulong rxd_dma; - uint32_t rxd_idx; - - struct ftmac110_desc *txd; - ulong txd_dma; - uint32_t txd_idx; -}; - -static int ftmac110_reset(struct eth_device *dev); - -static uint16_t mdio_read(struct eth_device *dev, - uint8_t phyaddr, uint8_t phyreg) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - uint32_t tmp, ts; - uint16_t ret = 0xffff; - - tmp = PHYCR_READ - | (phyaddr << PHYCR_ADDR_SHIFT) - | (phyreg << PHYCR_REG_SHIFT); - - writel(tmp, &regs->phycr); - - for (ts = get_timer(0); get_timer(ts) < CFG_MDIORD_TIMEOUT; ) { - tmp = readl(&regs->phycr); - if (tmp & PHYCR_READ) - continue; - break; - } - - if (tmp & PHYCR_READ) - printf("ftmac110: mdio read timeout\n"); - else - ret = (uint16_t)(tmp & 0xffff); - - return ret; -} - -static void mdio_write(struct eth_device *dev, - uint8_t phyaddr, uint8_t phyreg, uint16_t phydata) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - uint32_t tmp, ts; - - tmp = PHYCR_WRITE - | (phyaddr << PHYCR_ADDR_SHIFT) - | (phyreg << PHYCR_REG_SHIFT); - - writel(phydata, &regs->phydr); - writel(tmp, &regs->phycr); - - for (ts = get_timer(0); get_timer(ts) < CFG_MDIOWR_TIMEOUT; ) { - if (readl(&regs->phycr) & PHYCR_WRITE) - continue; - break; - } - - if (readl(&regs->phycr) & PHYCR_WRITE) - printf("ftmac110: mdio write timeout\n"); -} - -static uint32_t ftmac110_phyqry(struct eth_device *dev) -{ - ulong ts; - uint32_t maccr; - uint16_t pa, tmp, bmsr, bmcr; - struct ftmac110_chip *chip = dev->priv; - - /* Default = 100Mbps Full */ - maccr = MACCR_100M | MACCR_FD; - - /* 1. find the phy device */ - for (pa = 0; pa < 32; ++pa) { - tmp = mdio_read(dev, pa, MII_PHYSID1); - if (tmp == 0xFFFF || tmp == 0x0000) - continue; - chip->phy_addr = pa; - break; - } - if (pa >= 32) { - puts("ftmac110: phy device not found!\n"); - goto exit; - } - - /* 2. wait until link-up & auto-negotiation complete */ - chip->lnkup = 0; - bmcr = mdio_read(dev, chip->phy_addr, MII_BMCR); - ts = get_timer(0); - do { - bmsr = mdio_read(dev, chip->phy_addr, MII_BMSR); - chip->lnkup = (bmsr & BMSR_LSTATUS) ? 1 : 0; - if (!chip->lnkup) - continue; - if (!(bmcr & BMCR_ANENABLE) || (bmsr & BMSR_ANEGCOMPLETE)) - break; - } while (get_timer(ts) < CFG_LINKUP_TIMEOUT); - if (!chip->lnkup) { - puts("ftmac110: link down\n"); - goto exit; - } - if (!(bmcr & BMCR_ANENABLE)) - puts("ftmac110: auto negotiation disabled\n"); - else if (!(bmsr & BMSR_ANEGCOMPLETE)) - puts("ftmac110: auto negotiation timeout\n"); - - /* 3. derive MACCR */ - if ((bmcr & BMCR_ANENABLE) && (bmsr & BMSR_ANEGCOMPLETE)) { - tmp = mdio_read(dev, chip->phy_addr, MII_ADVERTISE); - tmp &= mdio_read(dev, chip->phy_addr, MII_LPA); - if (tmp & LPA_100FULL) /* 100Mbps full-duplex */ - maccr = MACCR_100M | MACCR_FD; - else if (tmp & LPA_100HALF) /* 100Mbps half-duplex */ - maccr = MACCR_100M; - else if (tmp & LPA_10FULL) /* 10Mbps full-duplex */ - maccr = MACCR_FD; - else if (tmp & LPA_10HALF) /* 10Mbps half-duplex */ - maccr = 0; - } else { - if (bmcr & BMCR_SPEED100) - maccr = MACCR_100M; - else - maccr = 0; - if (bmcr & BMCR_FULLDPLX) - maccr |= MACCR_FD; - } - -exit: - printf("ftmac110: %d Mbps, %s\n", - (maccr & MACCR_100M) ? 100 : 10, - (maccr & MACCR_FD) ? "Full" : "half"); - return maccr; -} - -static int ftmac110_reset(struct eth_device *dev) -{ - uint8_t *a; - uint32_t i, maccr; - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - - /* 1. MAC reset */ - writel(MACCR_RESET, &regs->maccr); - for (i = get_timer(0); get_timer(i) < 1000; ) { - if (readl(&regs->maccr) & MACCR_RESET) - continue; - break; - } - if (readl(&regs->maccr) & MACCR_RESET) { - printf("ftmac110: reset failed\n"); - return -ENXIO; - } - - /* 1-1. Init tx ring */ - for (i = 0; i < CFG_TXDES_NUM; ++i) { - /* owned by SW */ - chip->txd[i].ctrl &= cpu_to_le64(FTMAC110_TXD_CLRMASK); - } - chip->txd_idx = 0; - - /* 1-2. Init rx ring */ - for (i = 0; i < CFG_RXDES_NUM; ++i) { - /* owned by HW */ - chip->rxd[i].ctrl &= cpu_to_le64(FTMAC110_RXD_CLRMASK); - chip->rxd[i].ctrl |= cpu_to_le64(FTMAC110_RXD_OWNER); - } - chip->rxd_idx = 0; - - /* 2. PHY status query */ - maccr = ftmac110_phyqry(dev); - - /* 3. Fix up the MACCR value */ - chip->maccr = maccr | MACCR_CRCAPD | MACCR_RXALL | MACCR_RXRUNT - | MACCR_RXEN | MACCR_TXEN | MACCR_RXDMAEN | MACCR_TXDMAEN; - - /* 4. MAC address setup */ - a = dev->enetaddr; - writel(a[1] | (a[0] << 8), &regs->mac[0]); - writel(a[5] | (a[4] << 8) | (a[3] << 16) - | (a[2] << 24), &regs->mac[1]); - - /* 5. MAC registers setup */ - writel(chip->rxd_dma, &regs->rxba); - writel(chip->txd_dma, &regs->txba); - /* interrupt at each tx/rx */ - writel(ITC_DEFAULT, &regs->itc); - /* no tx pool, rx poll = 1 normal cycle */ - writel(APTC_DEFAULT, &regs->aptc); - /* rx threshold = [6/8 fifo, 2/8 fifo] */ - writel(DBLAC_DEFAULT, &regs->dblac); - /* disable & clear all interrupt status */ - chip->imr = 0; - writel(ISR_ALL, &regs->isr); - writel(chip->imr, &regs->imr); - /* enable mac */ - writel(chip->maccr, &regs->maccr); - - return 0; -} - -static int ftmac110_probe(struct eth_device *dev, bd_t *bis) -{ - debug("ftmac110: probe\n"); - - if (ftmac110_reset(dev)) - return -1; - - return 0; -} - -static void ftmac110_halt(struct eth_device *dev) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - - writel(0, &regs->imr); - writel(0, &regs->maccr); - - debug("ftmac110: halt\n"); -} - -static int ftmac110_send(struct eth_device *dev, void *pkt, int len) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - struct ftmac110_desc *txd; - uint64_t ctrl; - - if (!chip->lnkup) - return 0; - - if (len <= 0 || len > CFG_XBUF_SIZE) { - printf("ftmac110: bad tx pkt len(%d)\n", len); - return 0; - } - - len = max(60, len); - - txd = &chip->txd[chip->txd_idx]; - ctrl = le64_to_cpu(txd->ctrl); - if (ctrl & FTMAC110_TXD_OWNER) { - /* kick-off Tx DMA */ - writel(0xffffffff, &regs->txpd); - printf("ftmac110: out of txd\n"); - return 0; - } - - memcpy(txd->vbuf, (void *)pkt, len); - dma_map_single(txd->vbuf, len, DMA_TO_DEVICE); - - /* clear control bits */ - ctrl &= FTMAC110_TXD_CLRMASK; - /* set len, fts and lts */ - ctrl |= FTMAC110_TXD_LEN(len) | FTMAC110_TXD_FTS | FTMAC110_TXD_LTS; - /* set owner bit */ - ctrl |= FTMAC110_TXD_OWNER; - /* write back to descriptor */ - txd->ctrl = cpu_to_le64(ctrl); - - /* kick-off Tx DMA */ - writel(0xffffffff, &regs->txpd); - - chip->txd_idx = (chip->txd_idx + 1) % CFG_TXDES_NUM; - - return len; -} - -static int ftmac110_recv(struct eth_device *dev) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_desc *rxd; - uint32_t len, rlen = 0; - uint64_t ctrl; - uint8_t *buf; - - if (!chip->lnkup) - return 0; - - do { - rxd = &chip->rxd[chip->rxd_idx]; - ctrl = le64_to_cpu(rxd->ctrl); - if (ctrl & FTMAC110_RXD_OWNER) - break; - - len = (uint32_t)FTMAC110_RXD_LEN(ctrl); - buf = rxd->vbuf; - - if (ctrl & FTMAC110_RXD_ERRMASK) { - printf("ftmac110: rx error\n"); - } else { - dma_map_single(buf, len, DMA_FROM_DEVICE); - NetReceive(buf, len); - rlen += len; - } - - /* owned by hardware */ - ctrl &= FTMAC110_RXD_CLRMASK; - ctrl |= FTMAC110_RXD_OWNER; - rxd->ctrl |= cpu_to_le64(ctrl); - - chip->rxd_idx = (chip->rxd_idx + 1) % CFG_RXDES_NUM; - } while (0); - - return rlen; -} - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - -static int ftmac110_mdio_read( - const char *devname, uint8_t addr, uint8_t reg, uint16_t *value) -{ - int ret = 0; - struct eth_device *dev; - - dev = eth_get_dev_by_name(devname); - if (dev == NULL) { - printf("%s: no such device\n", devname); - ret = -1; - } else { - *value = mdio_read(dev, addr, reg); - } - - return ret; -} - -static int ftmac110_mdio_write( - const char *devname, uint8_t addr, uint8_t reg, uint16_t value) -{ - int ret = 0; - struct eth_device *dev; - - dev = eth_get_dev_by_name(devname); - if (dev == NULL) { - printf("%s: no such device\n", devname); - ret = -1; - } else { - mdio_write(dev, addr, reg, value); - } - - return ret; -} - -#endif /* #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) */ - -int ftmac110_initialize(bd_t *bis) -{ - int i, card_nr = 0; - struct eth_device *dev; - struct ftmac110_chip *chip; - - dev = malloc(sizeof(*dev) + sizeof(*chip)); - if (dev == NULL) { - panic("ftmac110: out of memory 1\n"); - return -1; - } - chip = (struct ftmac110_chip *)(dev + 1); - memset(dev, 0, sizeof(*dev) + sizeof(*chip)); - - sprintf(dev->name, "FTMAC110#%d", card_nr); - - dev->iobase = CONFIG_FTMAC110_BASE; - chip->regs = (void __iomem *)dev->iobase; - dev->priv = chip; - dev->init = ftmac110_probe; - dev->halt = ftmac110_halt; - dev->send = ftmac110_send; - dev->recv = ftmac110_recv; - - if (!eth_getenv_enetaddr_by_index("eth", card_nr, dev->enetaddr)) - eth_random_addr(dev->enetaddr); - - /* allocate tx descriptors (it must be 16 bytes aligned) */ - chip->txd = dma_alloc_coherent( - sizeof(struct ftmac110_desc) * CFG_TXDES_NUM, &chip->txd_dma); - if (!chip->txd) - panic("ftmac110: out of memory 3\n"); - memset(chip->txd, 0, - sizeof(struct ftmac110_desc) * CFG_TXDES_NUM); - for (i = 0; i < CFG_TXDES_NUM; ++i) { - void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE); - - if (!va) - panic("ftmac110: out of memory 4\n"); - chip->txd[i].vbuf = va; - chip->txd[i].pbuf = cpu_to_le32(virt_to_phys(va)); - chip->txd[i].ctrl = 0; /* owned by SW */ - } - chip->txd[i - 1].ctrl |= cpu_to_le64(FTMAC110_TXD_END); - chip->txd_idx = 0; - - /* allocate rx descriptors (it must be 16 bytes aligned) */ - chip->rxd = dma_alloc_coherent( - sizeof(struct ftmac110_desc) * CFG_RXDES_NUM, &chip->rxd_dma); - if (!chip->rxd) - panic("ftmac110: out of memory 4\n"); - memset((void *)chip->rxd, 0, - sizeof(struct ftmac110_desc) * CFG_RXDES_NUM); - for (i = 0; i < CFG_RXDES_NUM; ++i) { - void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE + 2); - - if (!va) - panic("ftmac110: out of memory 5\n"); - /* it needs to be exactly 2 bytes aligned */ - va = ((uint8_t *)va + 2); - chip->rxd[i].vbuf = va; - chip->rxd[i].pbuf = cpu_to_le32(virt_to_phys(va)); - chip->rxd[i].ctrl = cpu_to_le64(FTMAC110_RXD_OWNER - | FTMAC110_RXD_BUFSZ(CFG_XBUF_SIZE)); - } - chip->rxd[i - 1].ctrl |= cpu_to_le64(FTMAC110_RXD_END); - chip->rxd_idx = 0; - - eth_register(dev); - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_register(dev->name, ftmac110_mdio_read, ftmac110_mdio_write); -#endif - - card_nr++; - - return card_nr; -} diff --git a/drivers/net/ftmac110.h b/drivers/net/ftmac110.h deleted file mode 100644 index 2772ae7..0000000 --- a/drivers/net/ftmac110.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Faraday 10/100Mbps Ethernet Controller - * - * (C) Copyright 2013 Faraday Technology - * Dante Su <dantesu(a)faraday-tech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _FTMAC110_H -#define _FTMAC110_H - -struct ftmac110_regs { - uint32_t isr; /* 0x00: Interrups Status Register */ - uint32_t imr; /* 0x04: Interrupt Mask Register */ - uint32_t mac[2]; /* 0x08: MAC Address */ - uint32_t mht[2]; /* 0x10: Multicast Hash Table Register */ - uint32_t txpd; /* 0x18: Tx Poll Demand Register */ - uint32_t rxpd; /* 0x1c: Rx Poll Demand Register */ - uint32_t txba; /* 0x20: Tx Ring Base Address Register */ - uint32_t rxba; /* 0x24: Rx Ring Base Address Register */ - uint32_t itc; /* 0x28: Interrupt Timer Control Register */ - uint32_t aptc; /* 0x2C: Automatic Polling Timer Control Register */ - uint32_t dblac; /* 0x30: DMA Burst Length&Arbitration Control */ - uint32_t revr; /* 0x34: Revision Register */ - uint32_t fear; /* 0x38: Feature Register */ - uint32_t rsvd[19]; - uint32_t maccr; /* 0x88: MAC Control Register */ - uint32_t macsr; /* 0x8C: MAC Status Register */ - uint32_t phycr; /* 0x90: PHY Control Register */ - uint32_t phydr; /* 0x94: PHY Data Register */ - uint32_t fcr; /* 0x98: Flow Control Register */ - uint32_t bpr; /* 0x9C: Back Pressure Register */ -}; - -/* - * Interrupt status/mask register(ISR/IMR) bits - */ -#define ISR_ALL 0x3ff -#define ISR_PHYSTCHG (1 << 9) /* phy status change */ -#define ISR_AHBERR (1 << 8) /* bus error */ -#define ISR_RXLOST (1 << 7) /* rx lost */ -#define ISR_RXFIFO (1 << 6) /* rx to fifo */ -#define ISR_TXLOST (1 << 5) /* tx lost */ -#define ISR_TXOK (1 << 4) /* tx to ethernet */ -#define ISR_NOTXBUF (1 << 3) /* out of tx buffer */ -#define ISR_TXFIFO (1 << 2) /* tx to fifo */ -#define ISR_NORXBUF (1 << 1) /* out of rx buffer */ -#define ISR_RXOK (1 << 0) /* rx to buffer */ - -/* - * MACCR control bits - */ -#define MACCR_100M (1 << 18) /* 100Mbps mode */ -#define MACCR_RXBCST (1 << 17) /* rx broadcast packet */ -#define MACCR_RXMCST (1 << 16) /* rx multicast packet */ -#define MACCR_FD (1 << 15) /* full duplex */ -#define MACCR_CRCAPD (1 << 14) /* tx crc append */ -#define MACCR_RXALL (1 << 12) /* rx all packets */ -#define MACCR_RXFTL (1 << 11) /* rx packet even it's > 1518 byte */ -#define MACCR_RXRUNT (1 << 10) /* rx packet even it's < 64 byte */ -#define MACCR_RXMCSTHT (1 << 9) /* rx multicast hash table */ -#define MACCR_RXEN (1 << 8) /* rx enable */ -#define MACCR_RXINHDTX (1 << 6) /* rx in half duplex tx */ -#define MACCR_TXEN (1 << 5) /* tx enable */ -#define MACCR_CRCDIS (1 << 4) /* tx packet even it's crc error */ -#define MACCR_LOOPBACK (1 << 3) /* loop-back */ -#define MACCR_RESET (1 << 2) /* reset */ -#define MACCR_RXDMAEN (1 << 1) /* rx dma enable */ -#define MACCR_TXDMAEN (1 << 0) /* tx dma enable */ - -/* - * PHYCR control bits - */ -#define PHYCR_READ (1 << 26) -#define PHYCR_WRITE (1 << 27) -#define PHYCR_REG_SHIFT 21 -#define PHYCR_ADDR_SHIFT 16 - -/* - * ITC control bits - */ - -/* Tx Cycle Length */ -#define ITC_TX_CYCLONG (1 << 15) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define ITC_TX_CYCNORM (0 << 15) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Tx Threshold: Aggregate n interrupts as 1 interrupt */ -#define ITC_TX_THR(n) (((n) & 0x7) << 12) -/* Tx Interrupt Timeout = n * Tx Cycle */ -#define ITC_TX_ITMO(n) (((n) & 0xf) << 8) -/* Rx Cycle Length */ -#define ITC_RX_CYCLONG (1 << 7) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define ITC_RX_CYCNORM (0 << 7) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Rx Threshold: Aggregate n interrupts as 1 interrupt */ -#define ITC_RX_THR(n) (((n) & 0x7) << 4) -/* Rx Interrupt Timeout = n * Rx Cycle */ -#define ITC_RX_ITMO(n) (((n) & 0xf) << 0) - -#define ITC_DEFAULT \ - (ITC_TX_THR(1) | ITC_TX_ITMO(0) | ITC_RX_THR(1) | ITC_RX_ITMO(0)) - -/* - * APTC contrl bits - */ - -/* Tx Cycle Length */ -#define APTC_TX_CYCLONG (1 << 12) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define APTC_TX_CYCNORM (0 << 12) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Tx Poll Timeout = n * Tx Cycle, 0=No auto polling */ -#define APTC_TX_PTMO(n) (((n) & 0xf) << 8) -/* Rx Cycle Length */ -#define APTC_RX_CYCLONG (1 << 4) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define APTC_RX_CYCNORM (0 << 4) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Rx Poll Timeout = n * Rx Cycle, 0=No auto polling */ -#define APTC_RX_PTMO(n) (((n) & 0xf) << 0) - -#define APTC_DEFAULT (APTC_TX_PTMO(0) | APTC_RX_PTMO(1)) - -/* - * DBLAC contrl bits - */ -#define DBLAC_BURST_MAX_ANY (0 << 14) /* un-limited */ -#define DBLAC_BURST_MAX_32X4 (2 << 14) /* max = 32 x 4 bytes */ -#define DBLAC_BURST_MAX_64X4 (3 << 14) /* max = 64 x 4 bytes */ -#define DBLAC_RXTHR_EN (1 << 9) /* enable rx threshold arbitration */ -#define DBLAC_RXTHR_HIGH(n) (((n) & 0x7) << 6) /* upper bound = n/8 fifo */ -#define DBLAC_RXTHR_LOW(n) (((n) & 0x7) << 3) /* lower bound = n/8 fifo */ -#define DBLAC_BURST_CAP16 (1 << 2) /* support burst 16 */ -#define DBLAC_BURST_CAP8 (1 << 1) /* support burst 8 */ -#define DBLAC_BURST_CAP4 (1 << 0) /* support burst 4 */ - -#define DBLAC_DEFAULT \ - (DBLAC_RXTHR_EN | DBLAC_RXTHR_HIGH(6) | DBLAC_RXTHR_LOW(2)) - -/* - * descriptor structure - */ -struct ftmac110_desc { - uint64_t ctrl; - uint32_t pbuf; - void *vbuf; -}; - -#define FTMAC110_RXD_END ((uint64_t)1 << 63) -#define FTMAC110_RXD_BUFSZ(x) (((uint64_t)(x) & 0x7ff) << 32) - -#define FTMAC110_RXD_OWNER ((uint64_t)1 << 31) /* owner: 1=HW, 0=SW */ -#define FTMAC110_RXD_FRS ((uint64_t)1 << 29) /* first pkt desc */ -#define FTMAC110_RXD_LRS ((uint64_t)1 << 28) /* last pkt desc */ -#define FTMAC110_RXD_ODDNB ((uint64_t)1 << 22) /* odd nibble */ -#define FTMAC110_RXD_RUNT ((uint64_t)1 << 21) /* runt pkt */ -#define FTMAC110_RXD_FTL ((uint64_t)1 << 20) /* frame too long */ -#define FTMAC110_RXD_CRC ((uint64_t)1 << 19) /* pkt crc error */ -#define FTMAC110_RXD_ERR ((uint64_t)1 << 18) /* bus error */ -#define FTMAC110_RXD_ERRMASK ((uint64_t)0x1f << 18) -#define FTMAC110_RXD_BCST ((uint64_t)1 << 17) /* Bcst pkt */ -#define FTMAC110_RXD_MCST ((uint64_t)1 << 16) /* Mcst pkt */ -#define FTMAC110_RXD_LEN(x) ((uint64_t)((x) & 0x7ff)) - -#define FTMAC110_RXD_CLRMASK \ - (FTMAC110_RXD_END | FTMAC110_RXD_BUFSZ(0x7ff)) - -#define FTMAC110_TXD_END ((uint64_t)1 << 63) /* end of ring */ -#define FTMAC110_TXD_TXIC ((uint64_t)1 << 62) /* tx done interrupt */ -#define FTMAC110_TXD_TX2FIC ((uint64_t)1 << 61) /* tx fifo interrupt */ -#define FTMAC110_TXD_FTS ((uint64_t)1 << 60) /* first pkt desc */ -#define FTMAC110_TXD_LTS ((uint64_t)1 << 59) /* last pkt desc */ -#define FTMAC110_TXD_LEN(x) ((uint64_t)((x) & 0x7ff) << 32) - -#define FTMAC110_TXD_OWNER ((uint64_t)1 << 31) /* owner: 1=HW, 0=SW */ -#define FTMAC110_TXD_COL ((uint64_t)3) /* collision */ - -#define FTMAC110_TXD_CLRMASK \ - (FTMAC110_TXD_END) - -#endif /* FTMAC110_H */ diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index dbf7bf7..9556536 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_PHY_ATHEROS) += atheros.o obj-$(CONFIG_PHY_BROADCOM) += broadcom.o obj-$(CONFIG_PHY_DAVICOM) += davicom.o obj-$(CONFIG_PHY_ET1011C) += et1011c.o -obj-$(CONFIG_PHY_ICPLUS) += icplus.o obj-$(CONFIG_PHY_LXT) += lxt.o obj-$(CONFIG_PHY_MARVELL) += marvell.o obj-$(CONFIG_PHY_MICREL) += micrel.o diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c deleted file mode 100644 index 5971955..0000000 --- a/drivers/net/phy/icplus.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * ICPlus PHY drivers - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - */ -#include <phy.h> - -/* IP101A/G - IP1001 */ -#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */ -#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */ -#define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */ -#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */ -#define IP101A_G_APS_ON 2 /* IP101A/G APS Mode bit */ -#define IP101A_G_IRQ_CONF_STATUS 0x11 /* Conf Info IRQ & Status Reg */ -#define IP101A_G_IRQ_PIN_USED (1<<15) /* INTR pin used */ -#define IP101A_G_IRQ_DEFAULT IP101A_G_IRQ_PIN_USED - -static int ip1001_config(struct phy_device *phydev) -{ - int c; - - /* Enable Auto Power Saving mode */ - c = phy_read(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2); - if (c < 0) - return c; - c |= IP1001_APS_ON; - c = phy_write(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2, c); - if (c < 0) - return c; - - /* INTR pin used: speed/link/duplex will cause an interrupt */ - c = phy_write(phydev, MDIO_DEVAD_NONE, IP101A_G_IRQ_CONF_STATUS, - IP101A_G_IRQ_DEFAULT); - if (c < 0) - return c; - - if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { - /* - * Additional delay (2ns) used to adjust RX clock phase - * at RGMII interface - */ - c = phy_read(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS); - if (c < 0) - return c; - - c |= IP1001_PHASE_SEL_MASK; - c = phy_write(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS, - c); - if (c < 0) - return c; - } - - return 0; -} - -static int ip1001_startup(struct phy_device *phydev) -{ - genphy_update_link(phydev); - genphy_parse_link(phydev); - - return 0; -} -static struct phy_driver IP1001_driver = { - .name = "ICPlus IP1001", - .uid = 0x02430d90, - .mask = 0x0ffffff0, - .features = PHY_GBIT_FEATURES, - .config = &ip1001_config, - .startup = &ip1001_startup, - .shutdown = &genphy_shutdown, -}; - -int phy_icplus_init(void) -{ - phy_register(&IP1001_driver); - - return 0; -} diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index aac85c4..1d6c14f 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -454,9 +454,6 @@ int phy_init(void) #ifdef CONFIG_PHY_ET1011C phy_et1011c_init(); #endif -#ifdef CONFIG_PHY_ICPLUS - phy_icplus_init(); -#endif #ifdef CONFIG_PHY_LXT phy_lxt_init(); #endif diff --git a/drivers/net/plb2800_eth.c b/drivers/net/plb2800_eth.c deleted file mode 100644 index f869514..0000000 --- a/drivers/net/plb2800_eth.c +++ /dev/null @@ -1,373 +0,0 @@ -/* - * PLB2800 internal switch ethernet driver. - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <malloc.h> -#include <net.h> -#include <netdev.h> -#include <asm/addrspace.h> - - -#define NUM_RX_DESC PKTBUFSRX -#define TOUT_LOOP 1000000 - -#define LONG_REF(addr) (*((volatile unsigned long*)addr)) - -#define CMAC_CRX_CTRL LONG_REF(0xb800c870) -#define CMAC_CTX_CTRL LONG_REF(0xb800c874) -#define SYS_MAC_ADDR_0 LONG_REF(0xb800c878) -#define SYS_MAC_ADDR_1 LONG_REF(0xb800c87c) -#define MIPS_H_MASK LONG_REF(0xB800C810) - -#define MA_LEARN LONG_REF(0xb8008004) -#define DA_LOOKUP LONG_REF(0xb8008008) - -#define CMAC_CRX_CTRL_PD 0x00000001 -#define CMAC_CRX_CTRL_CG 0x00000002 -#define CMAC_CRX_CTRL_PL_SHIFT 2 -#define CMAC_CRIT 0x0 -#define CMAC_NON_CRIT 0x1 -#define MBOX_STAT_ID_SHF 28 -#define MBOX_STAT_CP 0x80000000 -#define MBOX_STAT_MB 0x00000001 -#define EN_MA_LEARN 0x02000000 -#define EN_DA_LKUP 0x01000000 -#define MA_DEST_SHF 11 -#define DA_DEST_SHF 11 -#define DA_STATE_SHF 19 -#define TSTAMP_MS 0x00000000 -#define SW_H_MBOX4_MASK 0x08000000 -#define SW_H_MBOX3_MASK 0x04000000 -#define SW_H_MBOX2_MASK 0x02000000 -#define SW_H_MBOX1_MASK 0x01000000 - -typedef volatile struct { - unsigned int stat; - unsigned int cmd; - unsigned int cnt; - unsigned int adr; -} mailbox_t; - -#define MBOX_REG(mb) ((mailbox_t*)(0xb800c830+(mb<<4))) - -typedef volatile struct { - unsigned int word0; - unsigned int word1; - unsigned int word2; -} mbhdr_t; - -#define MBOX_MEM(mb) ((void*)(0xb800a000+((3-mb)<<11))) - - -static int plb2800_eth_init(struct eth_device *dev, bd_t * bis); -static int plb2800_eth_send(struct eth_device *dev, void *packet, int length); -static int plb2800_eth_recv(struct eth_device *dev); -static void plb2800_eth_halt(struct eth_device *dev); - -static void plb2800_set_mac_addr(struct eth_device *dev, unsigned char * addr); -static unsigned char * plb2800_get_mac_addr(void); - -static int rx_new; -static int mac_addr_set = 0; - - -int plb2800_eth_initialize(bd_t * bis) -{ - struct eth_device *dev; - ulong temp; - -#ifdef DEBUG - printf("Entered plb2800_eth_initialize()\n"); -#endif - - if (!(dev = (struct eth_device *) malloc (sizeof *dev))) - { - printf("Failed to allocate memory\n"); - return -1; - } - memset(dev, 0, sizeof(*dev)); - - sprintf(dev->name, "PLB2800 Switch"); - dev->init = plb2800_eth_init; - dev->halt = plb2800_eth_halt; - dev->send = plb2800_eth_send; - dev->recv = plb2800_eth_recv; - - eth_register(dev); - - /* bug fix */ - *(ulong *)0xb800e800 = 0x838; - - /* Set MBOX ownership */ - temp = CMAC_CRIT << MBOX_STAT_ID_SHF; - MBOX_REG(0)->stat = temp; - MBOX_REG(1)->stat = temp; - - temp = CMAC_NON_CRIT << MBOX_STAT_ID_SHF; - MBOX_REG(2)->stat = temp; - MBOX_REG(3)->stat = temp; - - plb2800_set_mac_addr(dev, plb2800_get_mac_addr()); - - /* Disable all Mbox interrupt */ - temp = MIPS_H_MASK; - temp &= ~ (SW_H_MBOX1_MASK | SW_H_MBOX2_MASK | SW_H_MBOX3_MASK | SW_H_MBOX4_MASK) ; - MIPS_H_MASK = temp; - -#ifdef DEBUG - printf("Leaving plb2800_eth_initialize()\n"); -#endif - - return 0; -} - -static int plb2800_eth_init(struct eth_device *dev, bd_t * bis) -{ -#ifdef DEBUG - printf("Entering plb2800_eth_init()\n"); -#endif - - plb2800_set_mac_addr(dev, dev->enetaddr); - - rx_new = 0; - -#ifdef DEBUG - printf("Leaving plb2800_eth_init()\n"); -#endif - - return 0; -} - - -static int plb2800_eth_send(struct eth_device *dev, void *packet, int length) -{ - int i; - int res = -1; - u32 temp; - mailbox_t * mb = MBOX_REG(0); - char * mem = MBOX_MEM(0); - -#ifdef DEBUG - printf("Entered plb2800_eth_send()\n"); -#endif - - if (length <= 0) - { - printf ("%s: bad packet size: %d\n", dev->name, length); - goto Done; - } - - if (length < 64) - { - length = 64; - } - - temp = CMAC_CRX_CTRL_CG | ((length + 4) << CMAC_CRX_CTRL_PL_SHIFT); - -#ifdef DEBUG - printf("0 mb->stat = 0x%x\n", mb->stat); -#endif - - for(i = 0; mb->stat & (MBOX_STAT_CP | MBOX_STAT_MB); i++) - { - if (i >= TOUT_LOOP) - { - printf("%s: tx buffer not ready\n", dev->name); - printf("1 mb->stat = 0x%x\n", mb->stat); - goto Done; - } - } - - /* For some strange reason, memcpy doesn't work, here! - */ - do - { - int words = (length >> 2) + 1; - unsigned int* dst = (unsigned int*)(mem); - unsigned int* src = (unsigned int*)(packet); - for (i = 0; i < words; i++) - { - *dst = *src; - dst++; - src++; - }; - } while(0); - - CMAC_CRX_CTRL = temp; - mb->cmd = MBOX_STAT_CP; - -#ifdef DEBUG - printf("2 mb->stat = 0x%x\n", mb->stat); -#endif - - res = length; -Done: - -#ifdef DEBUG - printf("Leaving plb2800_eth_send()\n"); -#endif - - return res; -} - - -static int plb2800_eth_recv(struct eth_device *dev) -{ - int length = 0; - mailbox_t * mbox = MBOX_REG(3); - unsigned char * hdr = MBOX_MEM(3); - unsigned int stat; - -#ifdef DEBUG - printf("Entered plb2800_eth_recv()\n"); -#endif - - for (;;) - { - stat = mbox->stat; - - if (!(stat & MBOX_STAT_CP)) - { - break; - } - - length = ((*(hdr + 6) & 0x3f) << 8) + *(hdr + 7); - memcpy((void *)NetRxPackets[rx_new], hdr + 12, length); - - stat &= ~MBOX_STAT_CP; - mbox->stat = stat; -#ifdef DEBUG - { - int i; - for (i=0;i<length - 4;i++) - { - if (i % 16 == 0) printf("\n%04x: ", i); - printf("%02X ", NetRxPackets[rx_new][i]); - } - printf("\n"); - } -#endif - - if (length) - { -#ifdef DEBUG - printf("Received %d bytes\n", length); -#endif - NetReceive((void*)(NetRxPackets[rx_new]), - length - 4); - } - else - { -#if 1 - printf("Zero length!!!\n"); -#endif - } - - rx_new = (rx_new + 1) % NUM_RX_DESC; - } - -#ifdef DEBUG - printf("Leaving plb2800_eth_recv()\n"); -#endif - - return length; -} - - -static void plb2800_eth_halt(struct eth_device *dev) -{ -#ifdef DEBUG - printf("Entered plb2800_eth_halt()\n"); -#endif - -#ifdef DEBUG - printf("Leaving plb2800_eth_halt()\n"); -#endif -} - -static void plb2800_set_mac_addr(struct eth_device *dev, unsigned char * addr) -{ - char packet[60]; - ulong temp; - int ix; - - if (mac_addr_set || - NULL == addr || memcmp(addr, "\0\0\0\0\0\0", 6) == 0) - { - return; - } - - /* send one packet through CPU port - * in order to learn system MAC address - */ - - /* Set DA_LOOKUP register */ - temp = EN_MA_LEARN | (0 << DA_STATE_SHF) | (63 << DA_DEST_SHF); - DA_LOOKUP = temp; - - /* Set MA_LEARN register */ - temp = 50 << MA_DEST_SHF; /* static entry */ - MA_LEARN = temp; - - /* set destination address */ - for (ix=0;ix<6;ix++) - packet[ix] = 0xff; - - /* set source address = system MAC address */ - for (ix=0;ix<6;ix++) - packet[6+ix] = addr[ix]; - - /* set type field */ - packet[12]=0xaa; - packet[13]=0x55; - - /* set data field */ - for(ix=14;ix<60;ix++) - packet[ix] = 0x00; - -#ifdef DEBUG - for (ix=0;ix<6;ix++) - printf("mac_addr[%d]=%02X\n", ix, (unsigned char)packet[6+ix]); -#endif - - /* set one packet */ - plb2800_eth_send(dev, packet, sizeof(packet)); - - /* delay for a while */ - for(ix=0;ix<65535;ix++) - temp = ~temp; - - /* Set CMAC_CTX_CTRL register */ - temp = TSTAMP_MS; /* no autocast */ - CMAC_CTX_CTRL = temp; - - /* Set DA_LOOKUP register */ - temp = EN_DA_LKUP; - DA_LOOKUP = temp; - - mac_addr_set = 1; -} - -static unsigned char * plb2800_get_mac_addr(void) -{ - static unsigned char addr[6]; - char *tmp, *end; - int i; - - tmp = getenv ("ethaddr"); - if (NULL == tmp) return NULL; - - for (i=0; i<6; i++) { - addr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; - if (tmp) - tmp = (*end) ? end+1 : end; - } - - return addr; -} diff --git a/include/netdev.h b/include/netdev.h index e45dd7a..3e46171 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -51,7 +51,6 @@ int fecmxc_initialize(bd_t *bis); int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); int ftgmac100_initialize(bd_t *bits); int ftmac100_initialize(bd_t *bits); -int ftmac110_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int ks8695_eth_initialize(void); @@ -69,7 +68,6 @@ int ne2k_register(void); int npe_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); -int plb2800_eth_initialize(bd_t *bis); int ppc_4xx_eth_initialize (bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); -- 1.9.1

2 2

[U-Boot] [PATCH] kconfig: Fix compiler warning in menu.c
by Hans de Goede 01 Aug '14

01 Aug '14

This fixes the following compiler warning: In file included from scripts/kconfig/zconf.tab.c:2537:0: scripts/kconfig/menu.c: In function ‘get_symbol_str’: scripts/kconfig/menu.c:590:18: warning: ‘jump’ may be used uninitialized in this function [-Wmaybe-uninitialized] jump->offset = strlen(r->s); ^ In file included from scripts/kconfig/zconf.tab.c:2537:0: scripts/kconfig/menu.c:551:19: note: ‘jump’ was declared here struct jump_key *jump; Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- scripts/kconfig/menu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/kconfig/menu.c b/scripts/kconfig/menu.c index a26cc5d..584e0fc 100644 --- a/scripts/kconfig/menu.c +++ b/scripts/kconfig/menu.c @@ -548,7 +548,7 @@ static void get_prompt_str(struct gstr *r, struct property *prop, { int i, j; struct menu *submenu[8], *menu, *location = NULL; - struct jump_key *jump; + struct jump_key *jump = NULL; str_printf(r, _("Prompt: %s\n"), _(prop->text)); menu = prop->menu->parent; -- 2.0.3

2 3

[U-Boot] [PATCH] pxe: detect image format before calling bootm/bootz
by Bryan Wu 31 Jul '14

31 Jul '14

Trying bootm for zImage will print out several error message which is not necessary for this case. So detect image format firstly, only try bootm for legacy and FIT format image then try bootz for others. Signed-off-by: Bryan Wu <pengw(a)nvidia.com> --- common/cmd_pxe.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c index ba48692..a9cf576 100644 --- a/common/cmd_pxe.c +++ b/common/cmd_pxe.c @@ -1,5 +1,6 @@ /* * Copyright 2010-2011 Calxeda, Inc. + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -771,11 +772,14 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) if (bootm_argv[3]) bootm_argc = 4; - do_bootm(cmdtp, 0, bootm_argc, bootm_argv); + /* Try bootm for legacy and FIT format image */ + if (genimg_get_format(bootm_argv[1]) != IMAGE_FORMAT_INVALID) + do_bootm(cmdtp, 0, bootm_argc, bootm_argv); #ifdef CONFIG_CMD_BOOTZ - /* Try booting a zImage if do_bootm returns */ - do_bootz(cmdtp, 0, bootm_argc, bootm_argv); + /* Try booting a zImage */ + else + do_bootz(cmdtp, 0, bootm_argc, bootm_argv); #endif return 1; } -- 1.9.1

2 2

[U-Boot] [PATCH] omap5912osk: change the status to Orphan
by Masahiro Yamada 31 Jul '14

31 Jul '14

Emails to "Rishi Bhattacharya <rishi(a)ti.com>" have been bouncing. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> Cc: Tom Rini <trini(a)ti.com> --- This patch is here because Tom did not respond to my request: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/190418/focus=191067 You can reject this patch and assign a new board maintainer. board/ti/omap5912osk/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/ti/omap5912osk/MAINTAINERS b/board/ti/omap5912osk/MAINTAINERS index 43ffb9b..5ba896b 100644 --- a/board/ti/omap5912osk/MAINTAINERS +++ b/board/ti/omap5912osk/MAINTAINERS @@ -1,6 +1,6 @@ OMAP5912OSK BOARD M: Rishi Bhattacharya <rishi(a)ti.com> -S: Maintained +S: Orphan (since 2014-08) F: board/ti/omap5912osk/ F: include/configs/omap5912osk.h F: configs/omap5912osk_defconfig -- 1.9.1

2 1

[U-Boot] [PATCH] ARM: tegra: Use mem size from MC rather than ODMDATA
by Stephen Warren 31 Jul '14

31 Jul '14

From: Stephen Warren <swarren(a)nvidia.com> In at least Tegra124, the Tegra memory controller (MC) has a register that controls the memory size. Read this to determine the memory size rather than requiring this to be redundantly encoded into the ODMDATA. This way, changes to the BCT (i.e. MC configuration) automatically updated SW's view of the memory size, without requiring manual changes to the ODMDATA. Future work potentially required: * Clip the memory size to architectural limits; U-Boot probably doesn't and won't support either LPAE or Tegra's "swiss cheese" memory layout, at least one of which would be required for >2GB RAM. * Subtract out any carveout required by firmware on future SoCs. Based-on-work-by: Tom Warren <twarren(a)nvidia.com> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- Note: this patch depends on Bryan's/Alex's "ARM: tegra: Disable VPR", since that introduces mc.h, which this patch relies on. --- arch/arm/cpu/tegra-common/board.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index 6a6faf4b2760..433da09d10c2 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -27,11 +27,12 @@ enum { UART_COUNT = 5, }; +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ + defined(CONFIG_TEGRA114) /* * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0, * so we are using this value to identify memory size. */ - unsigned int query_sdram_size(void) { struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; @@ -72,6 +73,21 @@ unsigned int query_sdram_size(void) } #endif } +#else +#include <asm/arch/mc.h> + +/* Read the RAM size directly from the memory controller */ +unsigned int query_sdram_size(void) +{ + struct mc_ctlr *const mc = (struct mc_ctlr *)NV_PA_MC_BASE; + u32 size_mb; + + size_mb = readl(&mc->mc_emem_cfg); + debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", size_mb); + + return size_mb * 1024 * 1024; +} +#endif int dram_init(void) { -- 1.8.1.5

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[U-Boot] Please pull u-boot-sunxi.git/master
by Hans de Goede 31 Jul '14

31 Jul '14

Hi Albert Please pull from u-boot-sunxi.git/master for a set of patches adding AHCI, EHCI, PSCI support + support for 14 new boards. The following changes since commit 9d195a546179bc732aba9eacccf0a9a3db591288: ARM: HYP/non-sec: remove MIDR check to validate CBAR (2014-07-28 17:19:55 +0200) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 4854154002d92b3fc9fd708774cec7c04c954247: sun7i: Add bananapi board (2014-07-30 10:23:07 +0200) ---------------------------------------------------------------- Hans de Goede (8): sun4i: add USB EHCI settings sun5i: add USB EHCI settings sunxi: Enable EHCI on various sunxi boards sunxi: Add CONFIG_MACPWR option sun4i: Add support for a number of new sun4i boards sun5i: Add support for a number of new sun5i boards sun7i: Add support for a number of new sun7i boards sun7i: Add bananapi board Ian Campbell (2): ahci: provide sunxi SATA driver using AHCI platform framework cubieboard2: Enable AXP209 power controller Marc Zyngier (2): sunxi: HYP/non-sec: add sun7i PSCI backend sunxi: HYP/non-sec: configure CNTFRQ on all CPUs Roman Byshko (5): sunxi: add defines to control USB Host clocks/resets sunxi: add USB EHCI driver sunxi: add general USB settings sun7i: add USB EHCI settings sun7i: cubietruck: enable USB EHCI arch/arm/cpu/armv7/sunxi/Makefile | 3 + arch/arm/cpu/armv7/sunxi/board.c | 5 + arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 4 + arch/arm/cpu/armv7/sunxi/psci.S | 162 +++++++++++++++++++++ arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 15 +- board/sunxi/Makefile | 16 ++ board/sunxi/ahci.c | 84 +++++++++++ board/sunxi/dram_a10_olinuxino_l.c | 31 ++++ board/sunxi/dram_a10s_olinuxino_m.c | 31 ++++ board/sunxi/dram_a13_olinuxino.c | 31 ++++ board/sunxi/dram_bananapi.c | 31 ++++ board/sunxi/dram_linksprite_pcduino3.c | 31 ++++ board/sunxi/dram_sun4i_360_1024_iow16.c | 31 ++++ board/sunxi/dram_sun4i_360_1024_iow8.c | 31 ++++ board/sunxi/dram_sun4i_360_512.c | 31 ++++ board/sunxi/dram_sun4i_384_1024_iow8.c | 31 ++++ board/sunxi/dram_sun7i_384_1024_iow16.c | 31 ++++ board/sunxi/dram_sun7i_384_512_busw16_iow16.c | 31 ++++ boards.cfg | 28 +++- drivers/block/ahci.c | 16 ++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-sunxi.c | 201 ++++++++++++++++++++++++++ include/ahci.h | 4 + include/configs/sun4i.h | 12 ++ include/configs/sun5i.h | 5 + include/configs/sun7i.h | 19 +++ include/configs/sunxi-common.h | 18 +++ 27 files changed, 923 insertions(+), 11 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/psci.S create mode 100644 board/sunxi/ahci.c create mode 100644 board/sunxi/dram_a10_olinuxino_l.c create mode 100644 board/sunxi/dram_a10s_olinuxino_m.c create mode 100644 board/sunxi/dram_a13_olinuxino.c create mode 100644 board/sunxi/dram_bananapi.c create mode 100644 board/sunxi/dram_linksprite_pcduino3.c create mode 100644 board/sunxi/dram_sun4i_360_1024_iow16.c create mode 100644 board/sunxi/dram_sun4i_360_1024_iow8.c create mode 100644 board/sunxi/dram_sun4i_360_512.c create mode 100644 board/sunxi/dram_sun4i_384_1024_iow8.c create mode 100644 board/sunxi/dram_sun7i_384_1024_iow16.c create mode 100644 board/sunxi/dram_sun7i_384_512_busw16_iow16.c create mode 100644 drivers/usb/host/ehci-sunxi.c Regards, Hans

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[U-Boot] Setting Uboot environment variables from within Linux
by Rossco 31 Jul '14

31 Jul '14

Hi, I have an issue when attempting to access my uboot variables from within my linux distribution. My set-up is as follows... Cyclone V SoC with ARM Cortex A9 processor running 3.11 kernel (git revision a946a64), uboot version 2013.01.01 - only modification being to configure for QSPI boot and to add some extra environment variables. I am running a QSPI boot configuration, my QSPI has three partitions... 1. Raw partition containing Pre-loader, device-tree and uboot 2. Kernel1 - containing initial kernel 3. Kernel2 - for future updated kernel I have a NAND device offering UBI filesystem. I created the fw_printenv and exported to my development board, created sym link to create fw_setenv. Also copied across the fw_env.config which looks like this (I have not modified this)... # NOR example # MTD device name Device offset Env. size Flash sector size /dev/mtd1 0x0000 0x4000 0x4000 /dev/mtd2 0x0000 0x4000 0x4000 # MTD SPI-dataflash example # MTD device name Device offset Env. size Flash sector size #/dev/mtd5 0x4200 0x4200 #/dev/mtd6 0x4200 0x4200 # NAND example #/dev/mtd0 0x4000 0x4000 0x20000 cat /proc/mtd look like... dev: size erasesize name mtd0: 40000000 00040000 "denali-nand" mtd1: 00800000 00010000 "Flash 0 Raw Data" mtd2: 01900000 00010000 "Kernel Partition 1" mtd3: 01900000 00010000 "Kernel Partition 2" When I attempt to run fw_printenv I get the following error message.. Warning: Bad CRC, using default environment I'm assuming that my config file is wrong but I'm not sure how to change it. Do I need to manually workout where the environment variables are being stored? Should I have a separate environment variables image? If so how do I get that image? Any guidance greatly appreciated :-) Thanks Rossco -- View this message in context: http://u-boot.10912.n7.nabble.com/Setting-Uboot-environment-variables-from-… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [U-boot] the first 0x20 bytes in u-boot.bin
by TigerLiu＠via-alliance.com 31 Jul '14

31 Jul '14

Hi, Albert: I am studying 2014.07 release u-boot package. I found u-boot.bin's first bytes were not code in start.S . Taken for compling smdkv310 as an example: The compiled u-boot.bin's first 0x20 bytes were: 18 F0 9F E5 18 F0 9F E5 18 F0 9F E5 18 F0 9F E5 18 F0 9F E5 18 F0 9F E5 18 F0 9F E5 18 F0 9F E5 ...... So, Is it equal to "ldr pc, [pc,#0x18]" ? Best wishes,

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Re: [U-Boot] Can not boot Linux with new FIT image on ARMv8
by Simon Glass 31 Jul '14

31 Jul '14

Hi, On 31 July 2014 02:24, Duxiaoqiang <duxiaoqiang(a)huawei.com> wrote: > Hi Simon > > > >> This problem has confused me several days, I will appreciated if you > can give me susggestions. > > >You could try 'setenv verify n' to turn off verification. That will make > sure that the problem is actually related to verified boot. Does the image > boot OK without verified boot? > > ################Added by Jason############## > I tried "setenv verify n", but boot the image is not OK. So the problem > should not related verified boot. > > >It says: > > >> Loading Device Tree to 000000009fe00000, end 000000009fe04a91 ... > >> fdt_rsv_mem_addr = 00000000c32b2540 > > >Is that a valid address? What addresses are the kernel, FDT and ramdisk > loaded to when you use the legacy image? > > I think the address is normal, I run on foundation platform, the physical > memory space is up to 4G. > I used to load legacy image as bellow: > Kernel Image load/entry: 0x90000000 > Fdt blod address:0xa0000000 > Ramdisk : 0xa1000000 > Uboot code section: 0x88000000 > > The address space for now new FIT image > Kernel Image load/entry: 0x89000000 > Fdt blob: It is relocated by uboot, speculate from debug information, it > is 0x9fe00000 > RAM disk: It is set to 0xaa000000 at FIT file, but relocated by uboot. > Speculate from debug information, the address is 0xe7c83000 > Uboot code section:0x88000000 > FIT image to be load:0xc3000004 > Well then I'm not sure what is going on, but it is probably worth debugging into the kernel and asking on the kernel mailing list. Perhaps with a debugger attached you might figure out where it goes into the weeds? - Simon

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[U-Boot] Please pick up the maintainership on orphan boards
by Masahiro Yamada 31 Jul '14

31 Jul '14

Hi, When I see boards.cfg file, I notice some email addresses are invalid. Tom, Chan-Taek Park <c-park(a)ti.com> is invalid address. Can anybody in TI take over the maintainership of "tnetv107x_evm" board? Wolfgang, Gary Jennejohn <garyj(a)denx.de> is not working any more. Is it possible to assign a new maintainer for "quad100hd" board? Minkyu, Inderpal Singh <inderpal.singh(a)linaro.org> is invalid. Could you assign another enginner resposible for "arndale" board? Linus, Matt Waddel <matt.waddel(a)linaro.org> is unreachable addres. Can anybody pick up the maintainership on "vexpress_ca5x2" and "vexpress_ca9x4" boards? If nobody takes an action, I will move those boards to Orphan.

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