May 2014 - U-Boot

[U-Boot] please pull u-boot-arc master
by Alexey Brodkin 05 Jun '14

05 Jun '14

Dear Tom, The following changes since commit adcdeacc3eda1e5949e54062aa99c299e12483be: Merge branch 'master' of git://git.denx.de/u-boot-mips (2014-04-23 11:07:11 -0400) are available in the git repository at: ssh://gu-arc@git.denx.de/u-boot-arc master for you to fetch changes up to 0cdd762027340ad82fdc2bf7476e8e791529a251: axs101: bump DDR size from 256 to 512 Mb (2014-04-25 18:00:23 +0400) ---------------------------------------------------------------- Alexey Brodkin (2): axs101: increase EEPROM page write delay from 32 to 64 msec axs101: bump DDR size from 256 to 512 Mb include/configs/axs101.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- Best regards, Alexey Brodkin

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[U-Boot] [PULL] u-boot-avr32/master -> u-boot/master
by Andreas Bießmann 05 Jun '14

05 Jun '14

Dear Tom Rini, Please pull the following changes from u-boot-avr32/master into u-boot/master. The following changes since commit 9665fa8f9e1488209d5e01d0792c243e0a220c5a: Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-05-24 06:34:08 -0400) are available in the git repository at: git://git.denx.de/u-boot-avr32.git master for you to fetch changes up to 024cd74174a7ee11e71a430395d9f8ae334fec43: atngw100mkii: add missing CONFIG_SYS_TEXT_BASE (2014-05-26 21:23:54 +0200) ---------------------------------------------------------------- Andreas Bießmann (1): atngw100mkii: add missing CONFIG_SYS_TEXT_BASE include/configs/atngw100mkii.h | 1 + 1 file changed, 1 insertion(+)

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[U-Boot] [PATCH] Separate EBV Socrates board from Altera Cyclone 5 board
by Pavel Machek 05 Jun '14

05 Jun '14

Altera Cyclone 5 board is very different board (big, rectangular, expensive) than EBV Socrates (small, circular, cheap) board. Different parts are used there, too, but same configuration of u-boot works on both. Nevertheless, printing wrong name confuses users. Therefore this splits the configuration so that u-boot knows they are different. So far it is only used for correcting the puts, but there may be other uses in future. Signed-off-by: Pavel Machek <pavel(a)denx.de> diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c index 576066b..4540b1b 100644 --- a/board/altera/socfpga/socfpga_cyclone5.c +++ b/board/altera/socfpga/socfpga_cyclone5.c @@ -26,7 +26,7 @@ int print_cpuinfo(void) */ int checkboard(void) { - puts("BOARD : Altera SOCFPGA Cyclone5 Board\n"); + puts("BOARD : " ALTERA_BOARD_NAME "\n"); return 0; } diff --git a/boards.cfg b/boards.cfg index 375f2d4..20534c3 100644 --- a/boards.cfg +++ b/boards.cfg @@ -340,6 +340,7 @@ Active arm armv7 rmobile kmc kzm9g Active arm armv7 s5pc1xx samsung goni s5p_goni - Minkyu Kang <mk7.kang(a)samsung.com> Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang <mk7.kang(a)samsung.com> Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - +Active arm armv7 socfpga altera socfpga socfpga_socrates - - Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier(a)linaro.org> Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <b18965(a)freescale.com> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h new file mode 100644 index 0000000..6d4dfcf --- /dev/null +++ b/include/configs/socfpga_common.h @@ -0,0 +1,240 @@ +/* + * Copyright (C) 2012 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_COMMON_H +#define __CONFIG_COMMON_H + +#include <asm/arch/socfpga_base_addrs.h> +#include "../../board/altera/socfpga/pinmux_config.h" + +/* + * High level configuration + */ +/* Virtual target or real hardware */ +#define CONFIG_SOCFPGA_VIRTUAL_TARGET + +#define CONFIG_ARMV7 +#define CONFIG_L2_OFF +#define CONFIG_SYS_DCACHE_OFF +#undef CONFIG_USE_IRQ + +#define CONFIG_MISC_INIT_R +#define CONFIG_SINGLE_BOOTLOADER +#define CONFIG_SOCFPGA + +/* base address for .text section */ +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define CONFIG_SYS_TEXT_BASE 0x08000040 +#else +#define CONFIG_SYS_TEXT_BASE 0x01000040 +#endif +#define CONFIG_SYS_LOAD_ADDR 0x7fc0 + +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 256 +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT "SOCFPGA_CYCLONE5 # " +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* + * Display CPU and Board Info + */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* + * Enable early stage initialization at C environment + */ +#define CONFIG_BOARD_EARLY_INIT_F + +/* flat device tree */ +#define CONFIG_OF_LIBFDT +/* skip updating the FDT blob */ +#define CONFIG_FDT_BLOB_SKIP_UPDATE +/* Initial Memory map size for Linux, minus 4k alignment for DFT blob */ +#define CONFIG_SYS_BOOTMAPSZ ((256*1024*1024) - (4*1024)) + +#define CONFIG_SPL_RAM_DEVICE +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start)) +#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start) + +/* + * Memory allocation (MALLOC) + */ +/* Room required on the stack for the environment data */ +#define CONFIG_ENV_SIZE 1024 +/* Size of DRAM reserved for malloc() use */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) + +/* SP location before relocation, must use scratch RAM */ +#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 +/* Reserving 0x100 space at back of scratch RAM for debug info */ +#define CONFIG_SYS_INIT_RAM_SIZE (0x10000 - 0x100) +/* Stack pointer prior relocation, must situated at on-chip RAM */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + + +/* + * Command line configuration. + */ +#define CONFIG_SYS_NO_FLASH +#include <config_cmd_default.h> +/* FAT file system support */ +#define CONFIG_CMD_FAT + + +/* + * Misc + */ +#define CONFIG_DOS_PARTITION 1 + +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_PARTITIONS +#endif + +/* + * Environment setup + */ + +/* Delay before automatically booting the default image */ +#define CONFIG_BOOTDELAY 3 +/* Enable auto completion of commands using TAB */ +#define CONFIG_AUTO_COMPLETE +/* use "hush" command parser */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMD_RUN + +#define CONFIG_BOOTCOMMAND "run ramboot" + +/* + * arguments passed to the bootm command. The value of + * CONFIG_BOOTARGS goes into the environment value "bootargs". + * Do note the value will overide also the chosen node in FDT blob. + */ +#define CONFIG_BOOTARGS "console=ttyS0,57600,mem=256M@0x0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=n\0" \ + "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ + "bootm ${loadaddr} - ${fdt_addr}\0" \ + "bootimage=uImage\0" \ + "fdt_addr=100\0" \ + "fsloadcmd=ext2load\0" \ + "bootm ${loadaddr} - ${fdt_addr}\0" \ + "qspiroot=/dev/mtdblock0\0" \ + "qspirootfstype=jffs2\0" \ + "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ + " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ + "bootm ${loadaddr} - ${fdt_addr}\0" + +/* using environment setting for stdin, stdout, stderr */ +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +/* Enable the call to overwrite_console() */ +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +/* Enable overwrite of previous console environment settings */ +#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE + +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 + + +/* + * Hardware drivers + */ + +/* + * SDRAM Memory Map + */ +/* We have 1 bank of DRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +/* SDRAM Bank #1 */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +/* SDRAM memory size */ +#define PHYS_SDRAM_1_SIZE 0x40000000 + +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_START 0x00000000 +#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE + +/* + * NS16550 Configuration + */ +#define UART0_BASE SOCFPGA_UART0_ADDRESS +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 UART0_BASE +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define V_NS16550_CLK 1000000 +#else +#define V_NS16550_CLK 100000000 +#endif +#define CONFIG_BAUDRATE 115200 + +/* + * FLASH + */ +#define CONFIG_SYS_NO_FLASH + +/* + * L4 OSC1 Timer 0 + */ +/* This timer use eosc1 where the clock frequency is fixed + * throughout any condition */ +#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS +/* reload value when timer count to zero */ +#define TIMER_LOAD_VAL 0xFFFFFFFF +/* Timer info */ +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define CONFIG_SYS_TIMER_RATE 2400000 +#else +#define CONFIG_SYS_TIMER_RATE 25000000 +#endif +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) + +#define CONFIG_ENV_IS_NOWHERE + +/* + * SPL "Second Program Loader" aka Initial Software + */ + +/* Enable building of SPL globally */ +#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK + +/* TEXT_BASE for linking the SPL binary */ +#define CONFIG_SPL_TEXT_BASE 0xFFFF0000 + +/* Stack size for SPL */ +#define CONFIG_SPL_STACK_SIZE (4 * 1024) + +/* MALLOC size for SPL */ +#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) + +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_BOARD_INIT + +#define CHUNKSZ_CRC32 (1 * 1024) + +#define CONFIG_CRC32_VERIFY + +/* Linker script for SPL */ +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/socfpga/u-boot-spl.lds" + +/* Support for common/libcommon.o in SPL binary */ +#define CONFIG_SPL_LIBCOMMON_SUPPORT +/* Support for lib/libgeneric.o in SPL binary */ +#define CONFIG_SPL_LIBGENERIC_SUPPORT + +#endif /* __CONFIG_COMMON_H */ diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 980636c..87de4d2 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -6,235 +6,12 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/socfpga_base_addrs.h> -#include "../../board/altera/socfpga/pinmux_config.h" +#include <configs/socfpga_common.h> -/* - * High level configuration - */ -/* Virtual target or real hardware */ -#define CONFIG_SOCFPGA_VIRTUAL_TARGET - -#define CONFIG_ARMV7 -#define CONFIG_L2_OFF -#define CONFIG_SYS_DCACHE_OFF -#undef CONFIG_USE_IRQ - -#define CONFIG_MISC_INIT_R -#define CONFIG_SINGLE_BOOTLOADER -#define CONFIG_SOCFPGA - -/* base address for .text section */ #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define CONFIG_SYS_TEXT_BASE 0x08000040 +#define ALTERA_BOARD_NAME "Altera VTDEV5XS1 Virtual Board" #else -#define CONFIG_SYS_TEXT_BASE 0x01000040 -#endif -#define CONFIG_SYS_LOAD_ADDR 0x7fc0 - -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 -/* Monitor Command Prompt */ -#define CONFIG_SYS_PROMPT "SOCFPGA_CYCLONE5 # " -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* - * Display CPU and Board Info - */ -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - -/* - * Enable early stage initialization at C environment - */ -#define CONFIG_BOARD_EARLY_INIT_F - -/* flat device tree */ -#define CONFIG_OF_LIBFDT -/* skip updating the FDT blob */ -#define CONFIG_FDT_BLOB_SKIP_UPDATE -/* Initial Memory map size for Linux, minus 4k alignment for DFT blob */ -#define CONFIG_SYS_BOOTMAPSZ ((256*1024*1024) - (4*1024)) - -#define CONFIG_SPL_RAM_DEVICE -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start)) -#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start) - -/* - * Memory allocation (MALLOC) - */ -/* Room required on the stack for the environment data */ -#define CONFIG_ENV_SIZE 1024 -/* Size of DRAM reserved for malloc() use */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* SP location before relocation, must use scratch RAM */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 -/* Reserving 0x100 space at back of scratch RAM for debug info */ -#define CONFIG_SYS_INIT_RAM_SIZE (0x10000 - 0x100) -/* Stack pointer prior relocation, must situated at on-chip RAM */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - - -/* - * Command line configuration. - */ -#define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> -/* FAT file system support */ -#define CONFIG_CMD_FAT - - -/* - * Misc - */ -#define CONFIG_DOS_PARTITION 1 - -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_PARTITIONS +#define ALTERA_BOARD_NAME "Altera SOCFPGA Cyclone 5 Board" #endif -/* - * Environment setup - */ - -/* Delay before automatically booting the default image */ -#define CONFIG_BOOTDELAY 3 -/* Enable auto completion of commands using TAB */ -#define CONFIG_AUTO_COMPLETE -/* use "hush" command parser */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_CMD_RUN - -#define CONFIG_BOOTCOMMAND "run ramboot" - -/* - * arguments passed to the bootm command. The value of - * CONFIG_BOOTARGS goes into the environment value "bootargs". - * Do note the value will overide also the chosen node in FDT blob. - */ -#define CONFIG_BOOTARGS "console=ttyS0,57600,mem=256M@0x0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "bootimage=uImage\0" \ - "fdt_addr=100\0" \ - "fsloadcmd=ext2load\0" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "qspiroot=/dev/mtdblock0\0" \ - "qspirootfstype=jffs2\0" \ - "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ - "bootm ${loadaddr} - ${fdt_addr}\0" - -/* using environment setting for stdin, stdout, stderr */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -/* Enable the call to overwrite_console() */ -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -/* Enable overwrite of previous console environment settings */ -#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE - -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 - - -/* - * Hardware drivers - */ - -/* - * SDRAM Memory Map - */ -/* We have 1 bank of DRAM */ -#define CONFIG_NR_DRAM_BANKS 1 -/* SDRAM Bank #1 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -/* SDRAM memory size */ -#define PHYS_SDRAM_1_SIZE 0x40000000 - -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_START 0x00000000 -#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE - -/* - * NS16550 Configuration - */ -#define UART0_BASE SOCFPGA_UART0_ADDRESS -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 UART0_BASE -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define V_NS16550_CLK 1000000 -#else -#define V_NS16550_CLK 100000000 -#endif -#define CONFIG_BAUDRATE 115200 - -/* - * FLASH - */ -#define CONFIG_SYS_NO_FLASH - -/* - * L4 OSC1 Timer 0 - */ -/* This timer use eosc1 where the clock frequency is fixed - * throughout any condition */ -#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS -/* reload value when timer count to zero */ -#define TIMER_LOAD_VAL 0xFFFFFFFF -/* Timer info */ -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define CONFIG_SYS_TIMER_RATE 2400000 -#else -#define CONFIG_SYS_TIMER_RATE 25000000 -#endif -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) - -#define CONFIG_ENV_IS_NOWHERE - -/* - * SPL "Second Program Loader" aka Initial Software - */ - -/* Enable building of SPL globally */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK - -/* TEXT_BASE for linking the SPL binary */ -#define CONFIG_SPL_TEXT_BASE 0xFFFF0000 - -/* Stack size for SPL */ -#define CONFIG_SPL_STACK_SIZE (4 * 1024) - -/* MALLOC size for SPL */ -#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) - -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_BOARD_INIT - -#define CHUNKSZ_CRC32 (1 * 1024) - -#define CONFIG_CRC32_VERIFY - -/* Linker script for SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/socfpga/u-boot-spl.lds" - -/* Support for common/libcommon.o in SPL binary */ -#define CONFIG_SPL_LIBCOMMON_SUPPORT -/* Support for lib/libgeneric.o in SPL binary */ -#define CONFIG_SPL_LIBGENERIC_SUPPORT - #endif /* __CONFIG_H */ diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h new file mode 100644 index 0000000..2f1c3a4 --- /dev/null +++ b/include/configs/socfpga_socrates.h @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2012 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/socfpga_common.h> + +#define ALTERA_BOARD_NAME "EBV SoCrates - Cyclone V SoC FPGA Board" + +#endif /* __CONFIG_H */ -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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[U-Boot] Booting armv8 kernel on uboot
by Vishal Bhoj 04 Jun '14

04 Jun '14

Hi , I have added mmc driver into the vexpress64 board file for uboot and tested it on FVP base model. I tried booting a kernel on that but it is aborting with the following message: Final value for argc=3 Loading Kernel Image ... OK kernel loaded at 0x00080000, end = 0x00827024 using: FDT reserving fdt memory region: addr=80000000 size=10000 ## initrd_high = 0xffffffffffffffff, copy_to_ram = 1 ramdisk load start = 0x00000000, ramdisk load end = 0x00000000 ## device tree at 0000000090008000 ... 000000009000a850 (len=22609 [0x5851]) Loading Device Tree to 000000009fffa000, end 000000009ffff850 ... OK Initial value for argc=3 Final value for argc=3 ## Transferring control to Linux (at address 80000)... Starting kernel ... "Synchronous Abort" handler, esr 0x02000000 ELR: 80000 LR: fff90fc8 x0 : 000000009fffa000 x1 : 000000001c090000 x2 : 000000001c090000 x3 : 0000000000000020 x4 : 00000000fff6b834 x5 : 0000000000000000 x6 : 00000000fff6bb40 x7 : 00000000ffffffd0 x8 : 000000000000000f x9 : 000000007ff8e000 x10: 00000000fffb7188 x11: 0000000000000000 x12: 0000000000006000 x13: 0000000000000004 x14: 0000000000000003 x15: 00000000fffc7c20 x16: 0000000000000000 x17: 0000000000000000 x18: 00000000fff6beb8 x19: 0000000000080000 x20: 00000000fffc7a70 x21: 0000000000000000 x22: 0000000000000000 x23: 00000000fff6d8d8 x24: 0000000000000000 x25: 00000000fffc2630 x26: 0000000000000000 x27: 0000000080008000 x28: 0000000000000000 x29: 00000000fff6bb40 Can anyone please provide the procedure on how to boot the kernel with u-boot on armv8 models ? -- View this message in context: http://u-boot.10912.n7.nabble.com/Booting-armv8-kernel-on-uboot-tp180377.ht… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [PATCH 0/9] ARMv7: add PSCI support to u-boot
by Marc Zyngier 04 Jun '14

04 Jun '14

PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management - CPU hotplug - big.LITTLE migration models - System shutdown and reset It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code. More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended. The main idea here is to reuse some of the existing u-boot code to create a separate blob that can live in SRAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when u-boot is long gone, hence the need for a piece of memory that will not be touched by the OS. This patch series contains 3 parts: - the first four patches are just bug fixes - the next three contain the generic PSCI code and build infrastructure - the last two implement the CPU_ON method of the Allwinner A20 (aka sun7i). I realize the A20 u-boot code is not upstream yet (BTW is anyone actively working on that?), but hopefully that should give a good idea of how things are structured so far. The patches are against a merge of u-boot mainline and the sunxi tree as of ten days ago. As for using this code, it goes like this: sun7i# ext2load mmc 0:1 0x40000000 /boot/sunxi-psci.bin 908 bytes read in 18 ms (48.8 KiB/s) sun7i# cp 0x40000000 0x4000 0x1000 sun7i# ext2load mmc 0:1 40008000 /boot/zImage 3415087 bytes read in 184 ms (17.7 MiB/s) sun7i# setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/nfs nfsroot=10.1.203.35:/export/roots/bobby-brown,tcp,v3 rw ip=dhcp sun7i# bootz 40008000 The kernel now boots in HYP mode, finds its secondary CPU without any additional SMP code, and runs KVM out of the box. Hopefully, the Xen/ARM guys can do the same fairly easily. I'm wildly cross-posting this patch series, including to lists I'm not subscribed to. Please keep me on Cc for any comment you may have. Cheers, M. Marc Zyngier (9): ARM: HYP/non-sec: fix alignment requirements for vectors ARM: HYP/non-sec: move switch to non-sec to the last boot phase ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 ARM: non-sec: reset CNTVOFF to zero ARM: HYP/non-sec: add generic ARMv7 PSCI code ARM: HYP/non-sec: make pen code sections depend on !ARMV7_PSCI ARM: HYP/non-sec: add the option for a second-stage monitor sunxi: HYP/non-sec: add sun7i PSCI backend sunxi: HYP/non-sec: configure CNTFRQ on all CPUs Makefile | 5 ++ arch/arm/cpu/armv7/Makefile | 4 ++ arch/arm/cpu/armv7/nonsec_virt.S | 21 +++++- arch/arm/cpu/armv7/psci.S | 109 ++++++++++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/Makefile | 3 + arch/arm/cpu/armv7/sunxi/config.mk | 6 +- arch/arm/cpu/armv7/sunxi/psci.S | 119 +++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/u-boot-psci.lds | 63 ++++++++++++++++ arch/arm/cpu/armv7/virt-v7.c | 2 + arch/arm/lib/bootm.c | 5 +- include/configs/sun7i.h | 7 ++ psci/Makefile | 67 +++++++++++++++++ 12 files changed, 406 insertions(+), 5 deletions(-) create mode 100644 arch/arm/cpu/armv7/psci.S create mode 100644 arch/arm/cpu/armv7/sunxi/psci.S create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-psci.lds create mode 100644 psci/Makefile -- 1.8.2.3

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[U-Boot] [PATCH 1/2] usb: hub: fix power good delay timing
by Stephen Warren 03 Jun '14

03 Jun '14

From: Stephen Warren <swarren(a)nvidia.com> usb_hub_power_on() currently waits for the maximum of (a) the hub port's power output to become good, (b) the max time the USB specification allows a device to take to connect. However, these two operations must occur in series rather than in parallel. First, the power supply ramps up to the level required to power the USB device, and then the device may take a certain amount of time to connect (assert D+/D- pullups). Related, the maximum time that a device has to assert pullups is 1s not 100ms. This is explained in "Connect Timing ECN.pdf", itself part of usb_20_042814.zip from www.usb.org. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- common/usb_hub.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/common/usb_hub.c b/common/usb_hub.c index ffac0e743cef..4875a51aceaf 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -36,7 +36,7 @@ #endif #ifndef CONFIG_USB_HUB_MIN_POWER_ON_DELAY -#define CONFIG_USB_HUB_MIN_POWER_ON_DELAY 100 +#define CONFIG_USB_HUB_MIN_POWER_ON_DELAY 1000 #endif #define USB_BUFSIZ 512 @@ -138,8 +138,11 @@ static void usb_hub_power_on(struct usb_hub_device *hub) debug("port %d returns %lX\n", i + 1, dev->status); } - /* Wait for power to become stable */ - mdelay(max(pgood_delay, CONFIG_USB_HUB_MIN_POWER_ON_DELAY)); + /* + * Wait for power to become stable, + * plus spec-defined max time for device to connect + */ + mdelay(pgood_delay + CONFIG_USB_HUB_MIN_POWER_ON_DELAY); } void usb_hub_reset(void) -- 1.8.1.5

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[U-Boot] secure embedded linux system
by Mahendra Dobariya 03 Jun '14

03 Jun '14

hello,,I am from India.I am electronics hobbyist.currently I am using beaglebone black in my project.and I am afraid of security of linux systemits quite easy to copy or modify data from linux system if it has physical access.lets say ,I have BBB , and I boot it from external device(like external mmc ). and mount internal emmc then modify shadow file. and then boot from internal Emmc. now I will get root access , and I can modify anything on the system. sir, I want to secure embedded linux system(BBB). Kindly help on this..how can I secure data on beaglebone black..?? without entering password during boot process..(in case of encrypted rootfs) thanks in advance.. Best Regards,,Mahendracontact number:+91-9033544852

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[U-Boot] coreboot and u-boot integration x86: "No tick base available"
by Martin Ertsås 03 Jun '14

03 Jun '14

Hi. I'm trying to use u-boot as a payload to coreboot. Problem is that when coreboot starts u-boot, it fails with panic("No tick base available"); When looking at the backtrace this gives a recursive error, as panic calls __udelay and get_ticks, which again panics. I heard this was because u-boot overwrote the memory location of coreboot, and that there have been some patches going around that fixes this issue, but have not made it upstream. As far as I can tell, chromebook v2 uses these patches to make their stuff boot. Can anyone point me in the right direction for those patches? I have tried finding them myself, but can't seem to find them. Regards - Martin

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[U-Boot] Command repeat
by Thomas.Betker＠rohde-schwarz.com 03 Jun '14

03 Jun '14

Hello all, I have noticed that command repeat doesn't work as it should. CONFIG_SYS_HUSH_PARSER is disabled in my config. Here is what happens: main_loop() expects run_command() to return -1 for failure, 0 or 1 for success (not repeatable or repeatable). However, run_command() actually returns 1 for failure, 0 for success. So if a command is successful, main_loop() always thinks that it is not repeatable ... I guess that instead of run_command(), main_loop() should call builtin_run_command(). Note that main_loop() calls run_command() only when CONFIG_SYS_HUSH_PARSER is not enabled, and in this case, run_command() just calls builtin_run_command() anyway -- except that it remaps the return code. This issue was introduced by the patches in 2012-03-06, and in particular, commit 5307153236caaf2304e578c148e00a4b65cb8604, "Stop using builtin_run_command()". There is one other location which relies on the -1/0/1 logic, viz., bedbug_main_loop(). Perhaps we need some general function which is called by main_loop() and bedbug_main_loop(): int run_command_repeatable(const char *cmd, int flag) { #ifndef CONFIG_SYS_HUSH_PARSER return builtin_run_command(cmd, flag); #else if (parse_string_outer(cmd, FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP)) return -1; return 0; #endif } [Note: parse_string_outer() always returns 0 for success, 1 for failure.] Any thoughts on this? I am willing to prepare a patch, but I certainly don't mind if this is handled by somebody else who is deeper into u-boot than me. Best regards, Thomas Betker

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[U-Boot] [PATCH v2 0/11] Minor improvements to secure boot and enable on beaglebone
by Simon Glass 03 Jun '14

03 Jun '14

This series fixes a few problems that have come up since the secure boot series was merged: - A recent commit broken the assumption that u-boot.bin ends at a known address (thus making things appended to U-Boot inaccessible from the code). This is fixed for Beaglebone and also a new test is added to the Makefile to ensure that it does not break again. All boards have been tested. - A way is needed to provide an externally-build device tree binary for U-Boot. This allows signing to happen outside the U-Boot build system. - The .img files generated by an OMAP build need to include the FDT if one is appended. - Adding signatures to an FDT can cause the FDT to run out of space. The fix is to regenerate the FDT from scratch with different dtc parameters, so pretty painful. Instead, we automatically expand the FDT. The last two commits enable secure boot on Beaglebone (this will have no effect unless signed images are used). This could be moved to a separate configuration if required, or these patches could even be ignored: am33xx/omap: Enable FIT support am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE This series has been run through buildman: /tools/buildman/buildman -b talk2 -s Summary of 12 commits for 1210 boards (32 threads, 1 job per thread) 01: Prepare v2014.04 blackfin: + bf609-ezkit m68k: + M54455EVB_a66 M5329AFEE M5249EVB M5208EVBE eb_cpu5282 M54451EVB astro_mcf5373l M54418TWR_serial_rmii M54455EVB_intel M5475FFE M5282EVB M54455EVB_i66 M5475GFE M5253DEMO M54455EVB_stm33 M5485BFE M5485DFE TASREG M5329BFEE M52277EVB M5475EFE M5475CFE cobra5272 M5485AFE M53017EVB M5485HFE M5235EVB M5253EVBE M54418TWR_nand_mii M54418TWR_nand_rmii_lowfreq M5475BFE M54418TWR_nand_rmii M5475DFE M5275EVB M52277EVB_stmicro eb_cpu5282_internal M54451EVB_stmicro M5485GFE M5373EVB M5485EFE M5485FFE M54418TWR M5235EVB_Flash32 M54418TWR_serial_mii M5485CFE M54455EVB M5475AFE M5272C3 powerpc: + SIMPC8313_SP P1023RDS_NAND MPC8569MDS_NAND P2020RDB_NAND MPC8536DS_NAND P1020RDB_NAND MPC8315ERDB_NAND P1011RDB_NAND SIMPC8313_LP MPC8572DS_NAND P2010RDB_NAND sparc: + grsim grsim_leon2 gr_cpci_ax2000 gr_xc3s_1500 gr_ep2s60 sh: + rsk7269 rsk7264 rsk7203 nios2: + nios2-generic PK1C20 microblaze: + microblaze-generic openrisc: + openrisc-generic arm: + tricorder tricorder_flash 02: Check that u-boot.bin size looks correct arm: + am335x_evm_uart5 am335x_evm_uart4 am335x_evm_uart1 am335x_evm_uart3 am335x_boneblack am335x_evm_usbspl am335x_evm_nor cm_t335 am335x_evm_norboot am335x_evm_spiboot am335x_evm am335x_evm_uart2 mx31ads 03: ti: am335x: Fix the U-Boot binary output arm: am335x_evm_uart5 am335x_evm_uart4 am335x_evm_uart1 am335x_evm_uart3 am335x_boneblack am335x_evm_usbspl am335x_evm_nor am335x_evm_norboot am335x_evm_spiboot am335x_evm am335x_evm_uart2 04: am33xx/omap: Allow cache enable for all Sitara/OMAP 05: hash: Export functions to find and show hash 06: fdt: Add DEV_TREE_BIN option to specify a device tree binary file 07: fdt: Update functions which write to an FDT to return -ENOSPC 08: mkimage: Automatically make space in FDT when full 09: arm: ti: Increase malloc size to 16MB for armv7 boards 10: am33xx/omap: Enable CONFIG_OF_CONTROL 11: am33xx/omap: Enable FIT support 12: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE The breakage in 02 is because I add the check before fixing the problem, in order to verify what is affected. The order can be changed when applying if required. Changes in v2: - Add new patch to check u-boot.bin size against symbol table - Add new patch to ensure the hash section is inside the image for am335x - Update to cover all omap devices - Adjust for kbuild changes - Fix line over 80cols - Move device tree files into arch/arm/dts Simon Glass (11): Check that u-boot.bin size looks correct ti: am335x: Fix the U-Boot binary output am33xx/omap: Allow cache enable for all Sitara/OMAP hash: Export functions to find and show hash fdt: Add DEV_TREE_BIN option to specify a device tree binary file fdt: Update functions which write to an FDT to return -ENOSPC mkimage: Automatically make space in FDT when full arm: ti: Increase malloc size to 16MB for armv7 boards am33xx/omap: Enable CONFIG_OF_CONTROL am33xx/omap: Enable FIT support am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE Makefile | 16 +- arch/arm/cpu/armv7/am33xx/board.c | 8 - arch/arm/cpu/armv7/omap-common/Makefile | 4 + arch/arm/cpu/armv7/omap-common/hwinit-common.c | 42 -- arch/arm/cpu/armv7/omap-common/omap-cache.c | 56 +++ arch/arm/cpu/armv7/omap3/board.c | 8 - arch/arm/dts/Makefile | 1 + arch/arm/dts/am335x-bone-common.dtsi | 262 ++++++++++ arch/arm/dts/am335x-boneblack.dts | 17 + arch/arm/dts/am33xx.dtsi | 649 +++++++++++++++++++++++++ arch/arm/dts/dt-bindings/gpio/gpio.h | 15 + arch/arm/dts/dt-bindings/pinctrl/am33xx.h | 42 ++ arch/arm/dts/dt-bindings/pinctrl/omap.h | 55 +++ arch/arm/dts/tps65217.dtsi | 56 +++ board/ti/am335x/u-boot.lds | 3 +- common/hash.c | 13 +- common/image-fit.c | 4 +- doc/README.fdt-control | 16 +- dts/Makefile | 4 + include/configs/am335x_evm.h | 9 + include/configs/ti_armv7_common.h | 2 +- include/hash.h | 22 + include/rsa.h | 3 +- lib/rsa/rsa-sign.c | 28 +- tools/fit_image.c | 165 +++++-- tools/image-host.c | 26 +- 26 files changed, 1381 insertions(+), 145 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap-common/omap-cache.c create mode 100644 arch/arm/dts/am335x-bone-common.dtsi create mode 100644 arch/arm/dts/am335x-boneblack.dts create mode 100644 arch/arm/dts/am33xx.dtsi create mode 100644 arch/arm/dts/dt-bindings/gpio/gpio.h create mode 100644 arch/arm/dts/dt-bindings/pinctrl/am33xx.h create mode 100644 arch/arm/dts/dt-bindings/pinctrl/omap.h create mode 100644 arch/arm/dts/tps65217.dtsi -- 1.9.1.423.g4596e3a

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