April 2014 - U-Boot

[U-Boot] [PATCH] video: Add support for TI's AM335x LCD-Controller
by Hannes Petermaier 11 Aug '14

11 Aug '14

- Adds support for a minimal framebuffer driver of TI's AM335x SoC to be compatible with Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- drivers/video/Makefile | 1 + drivers/video/am335x-fb.c | 169 +++++++++++++++++++++++++++++++++++++++++++++ drivers/video/am335x-fb.h | 67 ++++++++++++++++++ 3 files changed, 237 insertions(+) create mode 100644 drivers/video/am335x-fb.c create mode 100644 drivers/video/am335x-fb.h diff --git a/drivers/video/Makefile b/drivers/video/Makefile index a7f5469..ac3d6c7 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -39,3 +39,4 @@ obj-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o obj-$(CONFIG_VIDEO_TEGRA) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_FORMIKE) += formike.o +obj-$(CONFIG_AM335X_LCD) += am335x-fb.o diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c new file mode 100644 index 0000000..ab98941 --- /dev/null +++ b/drivers/video/am335x-fb.c @@ -0,0 +1,169 @@ +/* + * Copyright (C) 2013 Hannes Petermaier <oe5hpm(a)oevsv.at> + * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * + * minimal framebuffer driver for TI's AM335x SoC to be compatible with + * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) + * + * - supporting only 24bit RGB/TFT raster Mode (not using palette) + * - sets up LCD controller as in 'am335x_lcdpanel' struct given + * - starts output DMA from gd->fb_base buffer + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/arch/hardware.h> +#include <lcd.h> +#include "am335x-fb.h" + +#if !defined(LCD_CNTL_BASE) +#error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!" +#endif + + +/* LCD Control Register */ +#define LCD_CLK_DIVISOR(x) ((x) << 8) +#define LCD_RASTER_MODE 0x01 +/* LCD Clock Enable Register */ +#define LCD_CORECLKEN (0x01 << 0) +#define LCD_LIDDCLKEN (0x01 << 1) +#define LCD_DMACLKEN (0x01 << 2) +/* LCD DMA Control Register */ +#define LCD_DMA_BURST_SIZE(x) ((x) << 4) +#define LCD_DMA_BURST_1 0x0 +#define LCD_DMA_BURST_2 0x1 +#define LCD_DMA_BURST_4 0x2 +#define LCD_DMA_BURST_8 0x3 +#define LCD_DMA_BURST_16 0x4 +/* LCD Timing_0 Register */ +#define LCD_HBPLSB(x) ((((x)-1) & 0xFF) << 24) +#define LCD_HFPLSB(x) ((((x)-1) & 0xFF) << 16) +#define LCD_HSWLSB(x) ((((x)-1) & 0x3F) << 10) +#define LCD_HORLSB(x) (((((x) >> 4)-1) & 0x3F) << 4) +#define LCD_HORMSB(x) (((((x) >> 4)-1) & 0x40) >> 4) +/* LCD Timing_1 Register */ +#define LCD_VBP(x) ((x) << 24) +#define LCD_VFP(x) ((x) << 16) +#define LCD_VSW(x) (((x)-1) << 10) +#define LCD_VERLSB(x) (((x)-1) & 0x3FF) +/* LCD Timing_2 Register */ +#define LCD_HSWMSB(x) ((((x)-1) & 0x3C0) << 21) +#define LCD_VERMSB(x) ((((x)-1) & 0x400) << 16) +#define LCD_HBPMSB(x) ((((x)-1) & 0x300) >> 4) +#define LCD_HFPMSB(x) ((((x)-1) & 0x300) >> 8) +#define LCD_INVMASK(x) ((x) & 0x3F00000) +/* LCD Raster Ctrl Register */ +#define LCD_TFT_24BPP_MODE (1 << 25) +#define LCD_TFT_24BPP_UNPACK (1 << 26) +#define LCD_PALMODE_RAWDATA (0x10 << 20) +#define LCD_TFT_MODE (0x01 << 7) +#define LCD_RASTER_ENABLE (0x01 << 0) + + +/* Macro definitions */ +#define FBSIZE(x) ((x->hactive * x->vactive * x->bpp) >> 3) + +struct am335x_lcdhw { + unsigned int pid; /* 0x00 */ + unsigned int ctrl; /* 0x04 */ + unsigned int gap0; /* 0x08 */ + unsigned int lidd_ctrl; /* 0x0C */ + unsigned int lidd_cs0_conf; /* 0x10 */ + unsigned int lidd_cs0_addr; /* 0x14 */ + unsigned int lidd_cs0_data; /* 0x18 */ + unsigned int lidd_cs1_conf; /* 0x1C */ + unsigned int lidd_cs1_addr; /* 0x20 */ + unsigned int lidd_cs1_data; /* 0x24 */ + unsigned int raster_ctrl; /* 0x28 */ + unsigned int raster_timing0; /* 0x2C */ + unsigned int raster_timing1; /* 0x30 */ + unsigned int raster_timing2; /* 0x34 */ + unsigned int raster_subpanel; /* 0x38 */ + unsigned int raster_subpanel2; /* 0x3C */ + unsigned int lcddma_ctrl; /* 0x40 */ + unsigned int lcddma_fb0_base; /* 0x44 */ + unsigned int lcddma_fb0_ceiling; /* 0x48 */ + unsigned int lcddma_fb1_base; /* 0x4C */ + unsigned int lcddma_fb1_ceiling; /* 0x50 */ + unsigned int sysconfig; /* 0x54 */ + unsigned int irqstatus_raw; /* 0x58 */ + unsigned int irqstatus; /* 0x5C */ + unsigned int irqenable_set; /* 0x60 */ + unsigned int irqenable_clear; /* 0x64 */ + unsigned int gap1; /* 0x68 */ + unsigned int clkc_enable; /* 0x6C */ + unsigned int clkc_reset; /* 0x70 */ +}; + +static struct am335x_lcdhw *lcdhw = (void *)LCD_CNTL_BASE; +DECLARE_GLOBAL_DATA_PTR; + +int lcd_get_size(int *line_length) +{ + *line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8; + return *line_length * panel_info.vl_row + 0x20; +} + +int am335xfb_init(struct am335x_lcdpanel *panel) +{ + if (0 == gd->fb_base) { + printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n"); + return -1; + } + if (0 == panel) { + printf("ERROR: missing ptr to am335x_lcdpanel!\n"); + return -1; + } + + debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", + panel->hactive, panel->vactive, panel->bpp, + panel->hfp, panel->hbp, panel->hsw); + debug("vfp=%d,vbp=%d,vsw=%d / clk-div=%d)\n", + panel->vfp, panel->vfp, panel->vsw, panel->pxl_clk_div); + debug("using frambuffer at 0x%08x with size %d.\n", + (unsigned int)gd->fb_base, FBSIZE(panel)); + + /* palette default entry */ + memset((void *)gd->fb_base, 0, 0x20); + *(unsigned int *)gd->fb_base = 0x4000; + + lcdhw->clkc_enable = LCD_CORECLKEN | LCD_LIDDCLKEN | LCD_DMACLKEN; + lcdhw->raster_ctrl = 0; + lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; + lcdhw->lcddma_fb0_base = gd->fb_base; + lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; + lcdhw->lcddma_fb1_base = gd->fb_base; + lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; + lcdhw->lcddma_ctrl = LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); + + lcdhw->raster_timing0 = LCD_HORLSB(panel->hactive) | + LCD_HORMSB(panel->hactive) | + LCD_HFPLSB(panel->hfp) | + LCD_HBPLSB(panel->hbp) | + LCD_HSWLSB(panel->hsw); + lcdhw->raster_timing1 = LCD_VBP(panel->vbp) | + LCD_VFP(panel->vfp) | + LCD_VSW(panel->vsw) | + LCD_VERLSB(panel->vactive); + lcdhw->raster_timing2 = LCD_HSWMSB(panel->hsw) | + LCD_VERMSB(panel->vactive) | + LCD_INVMASK(panel->pol) | + LCD_HBPMSB(panel->hbp) | + LCD_HFPMSB(panel->hfp) | + 0x0000FF00; /* clk cycles for ac-bias */ + lcdhw->raster_ctrl = LCD_TFT_24BPP_MODE | + LCD_TFT_24BPP_UNPACK | + LCD_PALMODE_RAWDATA | + LCD_TFT_MODE | + LCD_RASTER_ENABLE; + + gd->fb_base += 0x20; /* point fb behind palette */ + + /* turn ON display through powercontrol function if accessible */ + if (0 != panel->panel_power_ctrl) { + mdelay(panel->pon_delay); + panel->panel_power_ctrl(1); + } + + return 0; +} diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h new file mode 100644 index 0000000..8a0b131 --- /dev/null +++ b/drivers/video/am335x-fb.h @@ -0,0 +1,67 @@ +/* + * Copyright (C) 2013 Hannes Petermaier <oe5hpm(a)oevsv.at> - + * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef AM335X_FB_H +#define AM335X_FB_H + +#define HSVS_CONTROL (0x01 << 25) /* + * 0 = lcd_lp and lcd_fp are driven on + * opposite edges of pixel clock than + * the lcd_pixel_o + * 1 = lcd_lp and lcd_fp are driven + * according to bit 24 Note that this + * bit MUST be set to '0' for Passive + * Matrix displays the edge timing is + * fixed + */ +#define HSVS_RISEFALL (0x01 << 24) /* + * 0 = lcd_lp and lcd_fp are driven on + * the rising edge of pixel clock (bit + * 25 must be set to 1) + * 1 = lcd_lp and lcd_fp are driven on + * the falling edge of pixel clock (bit + * 25 must be set to 1) + */ +#define DE_INVERT (0x01 << 23) /* + * 0 = DE is low-active + * 1 = DE is high-active + */ +#define PXCLK_INVERT (0x01 << 22) /* + * 0 = pix-clk is high-active + * 1 = pic-clk is low-active + */ +#define HSYNC_INVERT (0x01 << 21) /* + * 0 = HSYNC is active high + * 1 = HSYNC is avtive low + */ +#define VSYNC_INVERT (0x01 << 20) /* + * 0 = VSYNC is active high + * 1 = VSYNC is active low + */ + +struct am335x_lcdpanel { + unsigned int hactive; /* Horizontal active area */ + unsigned int vactive; /* Vertical active area */ + unsigned int bpp; /* bits per pixel */ + unsigned int hfp; /* Horizontal front porch */ + unsigned int hbp; /* Horizontal back porch */ + unsigned int hsw; /* Horizontal Sync Pulse Width */ + unsigned int vfp; /* Vertical front porch */ + unsigned int vbp; /* Vertical back porch */ + unsigned int vsw; /* Vertical Sync Pulse Width */ + unsigned int pxl_clk_div; /* Pixel clock divider*/ + unsigned int pol; /* polarity of sync, clock signals */ + unsigned int pon_delay; /* + * time in ms for turning on lcd after + * initializing lcd-controller + */ + void (*panel_power_ctrl)(int); /* fp for power on/off display */ +}; + +int am335xfb_init(struct am335x_lcdpanel *panel); + +#endif /* AM335X_FB_H */ -- 1.7.9.5

4 6

[U-Boot] [PATCH] lcd: cleanup unused functions
by Hannes Petermaier 11 Aug '14

11 Aug '14

This patch removes following two functions: - lcd_getbgcolor(...) not used somewhere outside lcd.c, internally we use now the global variable lcd_color_bg (was return value of function before) - lcd_getfgcolor(...) not used in any place of u-boot Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- common/lcd.c | 17 +---------------- include/lcd.h | 2 -- 2 files changed, 1 insertion(+), 18 deletions(-) diff --git a/common/lcd.c b/common/lcd.c index aa81522..3f73541 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -110,7 +110,6 @@ static int lcd_init(void *lcdbase); static void *lcd_logo(void); -static int lcd_getbgcolor(void); static void lcd_setfgcolor(int color); static void lcd_setbgcolor(int color); @@ -454,7 +453,7 @@ void lcd_clear(void) #else /* set framebuffer to background color */ memset((char *)lcd_base, - COLOR_MASK(lcd_getbgcolor()), + COLOR_MASK(lcd_color_bg), lcd_line_length * panel_info.vl_row); #endif /* Paint the logo and retrieve LCD base address */ @@ -563,20 +562,6 @@ static void lcd_setbgcolor(int color) lcd_color_bg = color; } -/*----------------------------------------------------------------------*/ - -int lcd_getfgcolor(void) -{ - return lcd_color_fg; -} - -/*----------------------------------------------------------------------*/ - -static int lcd_getbgcolor(void) -{ - return lcd_color_bg; -} - /************************************************************************/ /* ** Chipset depending Bitmap / Logo stuff... */ /************************************************************************/ diff --git a/include/lcd.h b/include/lcd.h index d06d6f1..d1cb6b1 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -26,8 +26,6 @@ void lcd_enable(void); void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue); void lcd_initcolregs(void); -int lcd_getfgcolor(void); - /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */ struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, void **alloc_addr); -- 1.7.10.4

2 1

[U-Boot] [PATCH] Add support for 32-bit organized framebuffers
by Hannes Petermaier 11 Aug '14

11 Aug '14

- Adds support for 32-bit organized framebuffers to the LCD-framework. - cleaned up unused functions Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- common/lcd.c | 52 +++++++++++++++++++++++++++++++++------------------- include/lcd.h | 19 ++++++++++++++++--- 2 files changed, 49 insertions(+), 22 deletions(-) diff --git a/common/lcd.c b/common/lcd.c index aa81522..e552340 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -94,7 +94,8 @@ #if LCD_BPP == LCD_MONOCHROME # define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \ (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7) -#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16) +#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16) || \ + (LCD_BPP == LCD_COLOR32) # define COLOR_MASK(c) (c) #else # error Unsupported LCD BPP. @@ -110,7 +111,6 @@ static int lcd_init(void *lcdbase); static void *lcd_logo(void); -static int lcd_getbgcolor(void); static void lcd_setfgcolor(int color); static void lcd_setbgcolor(int color); @@ -164,10 +164,20 @@ static void console_scrollup(void) CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows); /* Clear the last rows */ +#if (LCD_BPP != LCD_COLOR32) memset(lcd_console_address + CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE * rows); - +#else + u32 *ppix = lcd_console_address + + CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows; + u32 i; + for (i = 0; + i < (CONSOLE_ROW_SIZE * rows) / NBYTES(panel_info.vl_bpix); + i++) { + *ppix++ = COLOR_MASK(lcd_color_bg); + } +#endif lcd_sync(); console_row -= rows; } @@ -285,13 +295,15 @@ static void lcd_drawchars(ushort x, ushort y, uchar *str, int count) ushort off = x * (1 << LCD_BPP) % 8; #endif - dest = (uchar *)(lcd_base + y * lcd_line_length + x * (1 << LCD_BPP) / 8); + dest = (uchar *)(lcd_base + y * lcd_line_length + x * NBITS(LCD_BPP)/8); for (row = 0; row < VIDEO_FONT_HEIGHT; ++row, dest += lcd_line_length) { uchar *s = str; int i; #if LCD_BPP == LCD_COLOR16 ushort *d = (ushort *)dest; +#elif LCD_BPP == LCD_COLOR32 + u32 *d = (u32 *)dest; #else uchar *d = dest; #endif @@ -324,6 +336,12 @@ static void lcd_drawchars(ushort x, ushort y, uchar *str, int count) lcd_color_fg : lcd_color_bg; bits <<= 1; } +#elif LCD_BPP == LCD_COLOR32 + for (c = 0; c < 8; ++c) { + *d++ = (bits & 0x80) ? + lcd_color_fg : lcd_color_bg; + bits <<= 1; + } #endif } #if LCD_BPP == LCD_MONOCHROME @@ -453,9 +471,19 @@ void lcd_clear(void) test_pattern(); #else /* set framebuffer to background color */ +#if (LCD_BPP != LCD_COLOR32) memset((char *)lcd_base, - COLOR_MASK(lcd_getbgcolor()), + COLOR_MASK(lcd_color_bg), lcd_line_length * panel_info.vl_row); +#else + u32 *ppix = lcd_base; + u32 i; + for (i = 0; + i < (lcd_line_length * panel_info.vl_row)/NBYTES(panel_info.vl_bpix); + i++) { + *ppix++ = COLOR_MASK(lcd_color_bg); + } +#endif #endif /* Paint the logo and retrieve LCD base address */ debug("[LCD] Drawing the logo...\n"); @@ -563,20 +591,6 @@ static void lcd_setbgcolor(int color) lcd_color_bg = color; } -/*----------------------------------------------------------------------*/ - -int lcd_getfgcolor(void) -{ - return lcd_color_fg; -} - -/*----------------------------------------------------------------------*/ - -static int lcd_getbgcolor(void) -{ - return lcd_color_bg; -} - /************************************************************************/ /* ** Chipset depending Bitmap / Logo stuff... */ /************************************************************************/ diff --git a/include/lcd.h b/include/lcd.h index d06d6f1..df707f6 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -26,8 +26,6 @@ void lcd_enable(void); void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue); void lcd_initcolregs(void); -int lcd_getfgcolor(void); - /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */ struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, void **alloc_addr); @@ -334,7 +332,7 @@ int lcd_dt_simplefb_enable_existing_node(void *blob); #define LCD_COLOR4 2 #define LCD_COLOR8 3 #define LCD_COLOR16 4 - +#define LCD_COLOR32 5 /*----------------------------------------------------------------------*/ #if defined(CONFIG_LCD_INFO_BELOW_LOGO) # define LCD_INFO_X 0 @@ -385,6 +383,21 @@ int lcd_dt_simplefb_enable_existing_node(void *blob); # define CONSOLE_COLOR_GREY 14 # define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */ +#elif LCD_BPP == LCD_COLOR32 +/* + * 32bpp color definitions + */ +# define CONSOLE_COLOR_RED 0x00ff0000 +# define CONSOLE_COLOR_GREEN 0x0000ff00 +# define CONSOLE_COLOR_YELLOW 0x00ffff00 +# define CONSOLE_COLOR_BLUE 0x000000ff +# define CONSOLE_COLOR_MAGENTA 0x00ff00ff +# define CONSOLE_COLOR_CYAN 0x0000ffff +# define CONSOLE_COLOR_GREY 0x00aaaaaa +# define CONSOLE_COLOR_BLACK 0x00000000 +# define CONSOLE_COLOR_WHITE 0x00ffffff /* Must remain last / highest*/ +# define NBYTES(bit_code) (NBITS(bit_code) >> 3) + #else /* -- 1.7.9.5

3 3

[U-Boot] [PATCH] powerpc/t1040qds: Remove Video - HDMI support
by Dongsheng Wang 07 Aug '14

07 Aug '14

From: Wang Dongsheng <dongsheng.wang(a)freescale.com> We should remove this support. First, there is not any documents to say we need to support this feature, and kernel also not support this feature. Second, Kerneal not support this on T1040QDS, so if we open it in u-boot, FPGA will be changed and that will affect deep sleep feature. Signed-off-by: Wang Dongsheng <dongsheng.wang(a)freescale.com> diff --git a/board/freescale/t1040qds/Makefile b/board/freescale/t1040qds/Makefile index 19ed21b..c7470d7 100644 --- a/board/freescale/t1040qds/Makefile +++ b/board/freescale/t1040qds/Makefile @@ -10,4 +10,3 @@ obj-$(CONFIG_PCI) += pci.o obj-y += law.o obj-y += tlb.o obj-y += eth.o -obj-y += diu.o diff --git a/board/freescale/t1040qds/diu.c b/board/freescale/t1040qds/diu.c deleted file mode 100644 index 0214224..0000000 --- a/board/freescale/t1040qds/diu.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * Author: Priyanka Jain <Priyanka.Jain(a)freescale.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <linux/ctype.h> -#include <asm/io.h> -#include <stdio_dev.h> -#include <video_fb.h> -#include <fsl_diu_fb.h> -#include "../common/qixis.h" -#include "../common/diu_ch7301.h" -#include "t1040qds.h" -#include "t1040qds_qixis.h" - -/* - * DIU Area Descriptor - * - * Note that we need to byte-swap the value before it's written to the AD - * register. So even though the registers don't look like they're in the same - * bit positions as they are on the MPC8610, the same value is written to the - * AD register on the MPC8610 and on the P1022. - */ -#define AD_BYTE_F 0x10000000 -#define AD_ALPHA_C_SHIFT 25 -#define AD_BLUE_C_SHIFT 23 -#define AD_GREEN_C_SHIFT 21 -#define AD_RED_C_SHIFT 19 -#define AD_PIXEL_S_SHIFT 16 -#define AD_COMP_3_SHIFT 12 -#define AD_COMP_2_SHIFT 8 -#define AD_COMP_1_SHIFT 4 -#define AD_COMP_0_SHIFT 0 - -void diu_set_pixel_clock(unsigned int pixclock) -{ - unsigned long speed_ccb, temp; - u32 pixval; - int ret = 0; - speed_ccb = get_bus_freq(0); - temp = 1000000000 / pixclock; - temp *= 1000; - pixval = speed_ccb / temp; - - /* Program HDMI encoder */ - /* Switch channel to DIU */ - select_i2c_ch_pca9547(I2C_MUX_CH_DIU); - - /* Set dispaly encoder */ - ret = diu_set_dvi_encoder(temp); - if (ret) { - puts("Failed to set DVI encoder\n"); - return; - } - - /* Switch channel to default */ - select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - - /* Program pixel clock */ - out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, - ((pixval << PXCK_BITS_START) & PXCK_MASK)); - /* enable clock*/ - out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, PXCKEN_MASK | - ((pixval << PXCK_BITS_START) & PXCK_MASK)); -} - -int platform_diu_init(unsigned int xres, unsigned int yres, const char *port) -{ - u32 pixel_format; - u8 sw; - - /*Route I2C4 to DIU system as HSYNC/VSYNC*/ - sw = QIXIS_READ(brdcfg[5]); - QIXIS_WRITE(brdcfg[5], - ((sw & ~(BRDCFG5_IMX_MASK)) | (BRDCFG5_IMX_DIU))); - - /*Configure Display ouput port as HDMI*/ - sw = QIXIS_READ(brdcfg[15]); - QIXIS_WRITE(brdcfg[15], - ((sw & ~(BRDCFG15_LCDPD_MASK | BRDCFG15_DIUSEL_MASK)) - | (BRDCFG15_LCDPD_ENABLED | BRDCFG15_DIUSEL_HDMI))); - - pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) | - (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) | - (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) | - (8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) | - (8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT)); - - printf("DIU: Switching to monitor @ %ux%u\n", xres, yres); - - - return fsl_diu_init(xres, yres, pixel_format, 0); -} diff --git a/board/freescale/t1040qds/t1040qds.h b/board/freescale/t1040qds/t1040qds.h index 5041f37..79bdeda 100644 --- a/board/freescale/t1040qds/t1040qds.h +++ b/board/freescale/t1040qds/t1040qds.h @@ -9,6 +9,5 @@ void fdt_fixup_board_enet(void *blob); void pci_of_setup(void *blob, bd_t *bd); -int select_i2c_ch_pca9547(u8 ch); #endif diff --git a/board/freescale/t1040qds/t1040qds_qixis.h b/board/freescale/t1040qds/t1040qds_qixis.h index 98d2d39..2ce8795 100644 --- a/board/freescale/t1040qds/t1040qds_qixis.h +++ b/board/freescale/t1040qds/t1040qds_qixis.h @@ -13,18 +13,6 @@ #define BRDCFG4_EMISEL_MASK 0xE0 #define BRDCFG4_EMISEL_SHIFT 5 -/* BRDCFG5[0:1] controls routing and use of I2C3 & I2C4 ports*/ -#define BRDCFG5_IMX_MASK 0xC0 -#define BRDCFG5_IMX_DIU 0x80 - -/* BRDCFG15[3] controls LCD Panel Powerdown*/ -#define BRDCFG15_LCDPD_MASK 0x10 -#define BRDCFG15_LCDPD_ENABLED 0x00 - -/* BRDCFG15[6:7] controls DIU MUX selction*/ -#define BRDCFG15_DIUSEL_MASK 0x03 -#define BRDCFG15_DIUSEL_HDMI 0x00 - /* SYSCLK */ #define QIXIS_SYSCLK_66 0x0 #define QIXIS_SYSCLK_83 0x1 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index f4c8547..61bffce 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -375,7 +375,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* Serial Port - controlled on board with jumper J8 * open - index 2 @@ -401,26 +401,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -/* Video */ -#define CONFIG_FSL_DIU_FB -#ifdef CONFIG_FSL_DIU_FB -#define CONFIG_FSL_DIU_CH7301 -#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO -#define CONFIG_CMD_BMP -#define CONFIG_CFB_CONSOLE -#define CONFIG_VIDEO_SW_CURSOR -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -/* - * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so - * disable empty flash sector detection, which is I/O-intensive. - */ -#undef CONFIG_SYS_FLASH_EMPTY_INFO -#endif - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP @@ -446,11 +426,6 @@ unsigned long get_board_ddr_clk(void); /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 -#define I2C_MUX_CH_DIU 0xC - -/* LDI/DVI Encoder for display */ -#define CONFIG_SYS_I2C_LDI_ADDR 0x38 -#define CONFIG_SYS_I2C_DVI_ADDR 0x75 /* * RTC configuration @@ -728,7 +703,6 @@ unsigned long get_board_ddr_clk(void); "bank_intlv=cs0_cs1;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "video-mode=fslfb:1024x768-32@60,monitor=dvi\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ -- 1.8.5

5 7

[U-Boot] [PATCH] net: phy/cortina: Add four phy addresses support
by Chunhe Lan 18 Jul '14

18 Jul '14

Before CORTINA driver only supports two phy addresses. This patch adds the four phy addresses support for CORTINA PHY module. Signed-off-by: Chunhe Lan <Chunhe.Lan(a)freescale.com> --- drivers/net/phy/cortina.c | 28 ++++++++++++++++++++++------ 1 files changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index 7e46679..1b9434f 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -289,25 +289,41 @@ int phy_cortina_init(void) int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) { int phy_reg; + bool cortina_phy = false; + + switch (addr) { +#ifdef CORTINA_PHY_ADDR1 + case CORTINA_PHY_ADDR1: +#endif +#ifdef CORTINA_PHY_ADDR2 + case CORTINA_PHY_ADDR2: +#endif +#ifdef CORTINA_PHY_ADDR3 + case CORTINA_PHY_ADDR3: +#endif +#ifdef CORTINA_PHY_ADDR4 + case CORTINA_PHY_ADDR4: +#endif + cortina_phy = true; + break; + default: + break; + } -#if defined(CORTINA_PHY_ADDR1) || defined(CORTINA_PHY_ADDR2) /* Cortina PHY has non-standard offset of PHY ID registers */ - if (addr == CORTINA_PHY_ADDR1 || addr == CORTINA_PHY_ADDR2) + if (cortina_phy) phy_reg = bus->read(bus, addr, 0, VILLA_GLOBAL_CHIP_ID_LSB); else -#endif phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); if (phy_reg < 0) return -EIO; *phy_id = (phy_reg & 0xffff) << 16; -#if defined(CORTINA_PHY_ADDR1) || defined(CORTINA_PHY_ADDR2) /* Cortina PHY has non-standard offset of PHY ID registers */ - if (addr == CORTINA_PHY_ADDR1 || addr == CORTINA_PHY_ADDR2) + if (cortina_phy) phy_reg = bus->read(bus, addr, 0, VILLA_GLOBAL_CHIP_ID_MSB); else -#endif phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); if (phy_reg < 0) -- 1.7.6.5

2 2

[U-Boot] [PATCH v2] gpio: spear_gpio: Fix gpio_set_value() implementation
by Axel Lin 04 Jul '14

04 Jul '14

In current gpio_set_value() implementation, it always sets the gpio control bit no matter the value argument is 0 or 1. Thus the GPIOs never set to low. This patch fixes this bug. The address bus is used as a mask on read/write operations, so that independent software drivers can set their GPIO bits without affecting any other pins in a single write operation. Thus we don't need a read-modify-write to update the register. Signed-off-by: Axel Lin <axel.lin(a)ingics.com> Acked-by: Stefan Roese <sr(a)denx.de> Reviewed-by: Vipin Kumar <vipin.kumar(a)st.com> Reviewed-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- v2: Update commit log to explain why a read-modify-write is not necessary for clearing specific GPIO bit. Also added Michael Trimarchi's reviewed-by tag since he does review the patch and said the patch is fine. drivers/gpio/spear_gpio.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c index 367b670..6fb4117 100644 --- a/drivers/gpio/spear_gpio.c +++ b/drivers/gpio/spear_gpio.c @@ -36,7 +36,10 @@ int gpio_set_value(unsigned gpio, int value) { struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE; - writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]); + if (value) + writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]); + else + writel(0, &regs->gpiodata[DATA_REG_ADDR(gpio)]); return 0; } -- 1.8.1.2

2 1

[U-Boot] [PATCH 2/2 v2] usb: r8a66597: Fix initilization size of r8a66597 info structure
by Yasuhisa Umano 25 Jun '14

25 Jun '14

Initialization of r8a66597 info structure is not enough. Because initilization was used size of pointer. This fixes that use size of r8a6659 info structure. Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc(a)renesas.com> --- v2 : Change from sizeof(struct r8a66597) to sizeof(*r8a66597) drivers/usb/host/r8a66597-hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index c58d2a9..5114544 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -807,7 +807,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) R8A66597_DPRINT("%s\n", __func__); - memset(r8a66597, 0, sizeof(r8a66597)); + memset(r8a66597, 0, sizeof(*r8a66597)); r8a66597->reg = CONFIG_R8A66597_BASE_ADDR; disable_controller(r8a66597); -- 1.7.9.5

2 2

[U-Boot] [PATCH 0/3] cm_t54: add MAC address and env partiton handling
by Dmitry Lifshitz 25 Jun '14

25 Jun '14

Add Eth MAC address handling, stored in onboard EEPROM. cm-t54 config defines eMMC as env storage device. cm-t54 U-Boot environment is stored in the same partition as boot loader. It can be both - eMMC boot or user data partition. Add support for setting environment partition number in runtime. Dmitry Lifshitz (3): cm-t54: add EEPROM support and MAC address handling env_mmc: support env partition setup in runtime cm-t54: add environment partition runtime detection board/compulab/cm_t54/cm_t54.c | 85 ++++++++++++++++++++++++++++++++++++++++ common/env_mmc.c | 35 ++++++++++++---- include/configs/cm_t54.h | 10 +++++ 3 files changed, 121 insertions(+), 9 deletions(-) -- 1.7.5.4

4 11

[U-Boot] [PATCH] ARM: imx6: nitrogen6x: Enable CONFIG_SYS_GENERIC_BOARD
by Eric Nelson 22 Jun '14

22 Jun '14

Signed-off-by: Eric Nelson <eric.nelson(a)boundarydevices.com> --- Note that this seems a bit premature until we have some infrastructure around DTB files in place, but we certainly don't want big hairy warning messages on our boards. Is anyone planning on pulling in at least the pinfunc and .dtsi files for i.MX? I'm not sure how much else will be useful in U-Boot. include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index f7e7315..895f36f 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -24,6 +24,7 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -- 1.9.1

4 5

[U-Boot] [PATCH v2 0/9] Refactoring and Endian bug fixes of fdt_support
by Masahiro Yamada 19 Jun '14

19 Jun '14

Masahiro Yamada (9): fdt_support: delete unnecessary DECLARE_GLOBAL_DATA_PTR fdt_support: refactor with fdt_find_or_add_subnode helper func fdt_support: delete force argument of fdt_initrd() fdt_support: delete force argument of fdt_chosen() fdt_support: refactor fdt_fixup_stdout() function fdt_support: add 'const' qualifier for unchanged argument fdt_support: fix an endian bug of fdt_fixup_memory_banks fdt_support: fix an endian bug of fdt_initrd() fdt_support: correct the return condition of fdt_initrd() arch/microblaze/lib/bootm.c | 2 +- common/cmd_fdt.c | 4 +- common/fdt_support.c | 295 +++++++++++++++++++++----------------------- common/image-fdt.c | 4 +- include/fdt_support.h | 4 +- 5 files changed, 151 insertions(+), 158 deletions(-) -- 1.8.3.2

3 29