February 2014 - U-Boot

Re: [U-Boot] [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround for IFC errata A003399
by Scott Wood 03 Feb '14

03 Feb '14

On Sun, 2014-01-26 at 23:27 -0600, Bansal Aneesh-B39320 wrote: > > -----Original Message----- > > From: Wood Scott-B07421 > > Sent: Tuesday, January 21, 2014 3:36 AM > > To: Bansal Aneesh-B39320 > > Cc: u-boot(a)lists.denx.de; Sun York-R58495 > > Subject: Re: [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround > > for IFC errata A003399 > > > > On Mon, 2014-01-20 at 14:57 +0530, Aneesh Bansal wrote: > > > The workaround for IFC errata A003399 was not enabled in case of > > > secure boot. So, secure boot from NOR was not working. > > > > > > Signed-off-by: Aneesh Bansal <aneesh.bansal(a)freescale.com> > > > --- > > > include/configs/P1010RDB.h | 3 +-- > > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > > > diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h > > > index c21cf07..b0e51fb 100644 > > > --- a/include/configs/P1010RDB.h > > > +++ b/include/configs/P1010RDB.h > > > @@ -455,8 +455,7 @@ extern unsigned long get_sdram_size(void); #endif > > > > > > #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 > > > -#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT)\ > > > - && !defined(CONFIG_SECURE_BOOT) > > > +#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) > > > #define CONFIG_A003399_NOR_WORKAROUND #endif #endif > > > > Why do you need the workaround? Doesn't secure boot involve the bootrom > > loading U-Boot into SRAM, rather than execute-in-place from NOR? > > > > -Scott > > > The Boot ROM code does not copy the U-boot from NOR into SRAM. In case of secure > boot from NOR, it is executed as an execute-in-place memory and so this workaround > is required. That doesn't sound very secure. -Scott

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[U-Boot] [PATCH] powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDS
by Aneesh Bansal 03 Feb '14

03 Feb '14

Changes: 1. L2 cache is being invalidated by Boot ROM code for e6500 core. So removing the invalidation from start.S 2. Clear the LAW and corresponding configuration for CPC. Boot ROM code uses it as hosekeeping area. 3. For Secure boot, CPC is configured as SRAM and used as house keeping area. This configuration is to be disabled once in uboot. Earlier this disabling of CPC as SRAM was happening in cpu_init_r. As a result cache invalidation function was getting skipped in case CPC is configured as SRAM.This was causing random crashes. Signed-off-by: Ruchika Gupta <ruchika.gupta(a)freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal(a)freescale.com> --- README | 4 ++++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 27 ++++++++++++++++++++++----- arch/powerpc/cpu/mpc85xx/start.S | 3 ++- arch/powerpc/include/asm/fsl_secure_boot.h | 6 ++++++ boards.cfg | 1 + 5 files changed, 35 insertions(+), 6 deletions(-) Changes from v2: Squashed with previous patch after removing the ISBC version as per discussion diff --git a/README b/README index 176de61..3ca307f 100644 --- a/README +++ b/README @@ -428,6 +428,10 @@ The following options need to be configured: In this mode, a single differential clock is used to supply clocks to the sysclock, ddrclock and usbclock. + CONFIG_SYS_SECURE_HKAREA_CPC + This CONFIG is defined for the SoC's in which the BootROM code uses + the platform cache configured as SRAM for house keeping. + - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index b31efb7..2b2fd27 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -125,17 +125,14 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm) #endif #ifdef CONFIG_SYS_FSL_CPC -static void enable_cpc(void) +#if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_SECURE_HKAREA_CPC) +static void disable_cpc_sram(void) { int i; - u32 size = 0; cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR; for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { - u32 cpccfg0 = in_be32(&cpc->cpccfg0); - size += CPC_CFG0_SZ_K(cpccfg0); -#ifdef CONFIG_RAMBOOT_PBL if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN) { /* find and disable LAW of SRAM */ struct law_entry law = find_law(CONFIG_SYS_INIT_L3_ADDR); @@ -150,8 +147,21 @@ static void enable_cpc(void) out_be32(&cpc->cpccsr0, 0); out_be32(&cpc->cpcsrcr0, 0); } + } +} #endif +static void enable_cpc(void) +{ + int i; + u32 size = 0; + + cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR; + + for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { + u32 cpccfg0 = in_be32(&cpc->cpccfg0); + size += CPC_CFG0_SZ_K(cpccfg0); + #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002 setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS); #endif @@ -250,6 +260,10 @@ void cpu_init_f (void) law = find_law(CONFIG_SYS_PBI_FLASH_BASE); if (law.index != -1) disable_law(law.index); + +#if defined(CONFIG_SYS_SECURE_HKAREA_CPC) + disable_cpc_sram(); +#endif #endif #ifdef CONFIG_CPM2 @@ -550,6 +564,9 @@ skip_l2: puts("disabled\n"); #endif +#if defined(CONFIG_RAMBOOT_PBL) + disable_cpc_sram(); +#endif enable_cpc(); #ifndef CONFIG_SYS_FSL_NO_SERDES diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index dbbd8e5..4ef0985 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -115,7 +115,8 @@ _start_e500: #endif -#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) +#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \ + !defined(CONFIG_E6500) /* ISBC uses L2 as stack. * Disable L2 cache here so that u-boot can enable it later * as part of it's normal flow diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 4c7f0b1..9973100 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -15,5 +15,11 @@ #endif #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 +#if defined(CONFIG_B4860QDS) +#define CONFIG_SYS_SECURE_HKAREA_CPC +#undef CONFIG_SYS_INIT_L3_ADDR +#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 +#endif + #endif #endif diff --git a/boards.cfg b/boards.cfg index 2dfd2b4..0312595 100644 --- a/boards.cfg +++ b/boards.cfg @@ -781,6 +781,7 @@ Active powerpc mpc85xx - freescale b4860qds Active powerpc mpc85xx - freescale b4860qds B4420QDS_NAND B4860QDS:PPC_B4420,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale b4860qds B4420QDS_SPIFLASH B4860QDS:PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale b4860qds B4860QDS B4860QDS:PPC_B4860 - +Active powerpc mpc85xx - freescale b4860qds B4860QDS_SECURE_BOOT B4860QDS:PPC_B4860,SECURE_BOOT Aneesh Bansal <aneesh.bansal(a)freescale.com> Active powerpc mpc85xx - freescale b4860qds B4860QDS_NAND B4860QDS:PPC_B4860,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale b4860qds B4860QDS_SPIFLASH B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale b4860qds B4860QDS_SRIO_PCIE_BOOT B4860QDS:PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -- 1.8.1.4

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Re: [U-Boot] [PATCH V5 5/6] exynos: Add a common DT based PMIC driver initialization
by Minkyu Kang 03 Feb '14

03 Feb '14

On 16/01/14 17:55, Leela Krishna Amudala wrote: > Most of i2c PMIC drivers follow the same initialization sequence, > let's generalize it in a common file. > > The initialization function finds the PMIC in the device tree, and if > found - registers it in the list of known PMICs and initializes it, > iterating through the table of settings supplied by the caller. > > Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> > Signed-off-by: Leela Krishna Amudala <l.krishna(a)samsung.com> > Reviewed-by: Doug Anderson <dianders(a)google.com> > Acked-by: Simon Glass <sjg(a)chromium.org> > --- > board/samsung/common/board.c | 26 ++++++++++++ > drivers/power/pmic/Makefile | 1 + > drivers/power/pmic/pmic_common.c | 87 ++++++++++++++++++++++++++++++++++++++ > drivers/power/power_core.c | 14 ++++++ > include/power/pmic.h | 36 ++++++++++++++++ > 5 files changed, 164 insertions(+) > create mode 100644 drivers/power/pmic/pmic_common.c > > diff --git a/drivers/power/pmic/pmic_common.c b/drivers/power/pmic/pmic_common.c > new file mode 100644 > index 0000000..ea1e90f > --- /dev/null > +++ b/drivers/power/pmic/pmic_common.c > @@ -0,0 +1,87 @@ > +/* > + * Copyright (c) 2013 The Chromium OS Authors. All rights reserved. > + * > + * SPDX-License-Identifier: GPL-2.0+ > + * > + * Author: Vadim Bendebury <vbendeb(a)chromium.org> > + */ > +#include <common.h> > +#include <fdtdec.h> > +#include <errno.h> > +#include <power/pmic.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +int pmic_common_init(enum fdt_compat_id pmic_compat, > + const struct pmic_init_ops *pmic_ops, > + unsigned int number_of_regs) > +{ > + const void *blob = gd->fdt_blob; > + struct pmic *p; > + int node, parent, ret; > + const char *pmic_name, *comma; > + > + if (!number_of_regs) { > + printf("%s: %s - not a supported PMIC\n", > + __func__, fdtdec_get_compatible(pmic_compat)); > + return -1; > + } > + > + node = fdtdec_next_compatible(blob, 0, pmic_compat); > + if (node < 0) { > + debug("PMIC: Error %s. No node for %s in device tree\n", > + fdt_strerror(node), fdtdec_get_compatible(pmic_compat)); > + return node; > + } > + > + pmic_name = fdtdec_get_compatible(pmic_compat); > + comma = strchr(pmic_name, ','); > + if (comma) > + pmic_name = comma + 1; > + > + p = pmic_alloc(); > + > + if (!p) { > + printf("%s: POWER allocation error!\n", __func__); > + return -ENOMEM; > + } > + parent = fdt_parent_offset(blob, node); > + if (parent < 0) { > + debug("%s: Cannot find node parent\n", __func__); > + return -1; > + } > + > + p->bus = i2c_get_bus_num_fdt(parent); > + if (p->bus < 0) { > + debug("%s: Cannot find I2C bus\n", __func__); > + return -1; > + } > + p->hw.i2c.addr = fdtdec_get_int(blob, node, "reg", 9); > + > + p->name = pmic_name; > + p->interface = PMIC_I2C; > + p->hw.i2c.tx_num = 1; > + p->number_of_regs = number_of_regs; > + p->compat_id = pmic_compat; > + > + ret = 0; ret = 0; unnecessary. > + while (pmic_ops->reg_op != PMIC_REG_BAIL) { > + if (pmic_ops->reg_op == PMIC_REG_WRITE) > + ret = pmic_reg_write(p, > + pmic_ops->reg_addr, > + pmic_ops->reg_value); > + else > + ret = pmic_reg_update(p, > + pmic_ops->reg_addr, > + pmic_ops->reg_value); > + if (ret) { > + printf("%s: Failed accessing reg 0x%x of %s\n", > + __func__, pmic_ops->reg_addr, p->name); > + return ret; > + } > + pmic_ops++; > + } > + > + printf("PMIC %s initialized\n", p->name); > + return ret; > +} > diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c > index a1c4fd0..f40be31 100644 > --- a/drivers/power/power_core.c > +++ b/drivers/power/power_core.c > @@ -228,6 +228,20 @@ int pmic_reg_update(struct pmic *p, int reg, u32 val) > return 0; > } > > +struct pmic *pmic_get_by_id(enum fdt_compat_id pmic_compat) Seems to did not use anywhere. > +{ > + struct pmic *p; > + > + list_for_each_entry(p, &pmic_list, list) { > + if (p->compat_id == pmic_compat) { > + debug("%s: pmic %s -> 0x%p\n", __func__, p->name, p); > + return p; > + } > + } > + > + return NULL; > +} > + > U_BOOT_CMD( > pmic, CONFIG_SYS_MAXARGS, 1, do_pmic, > "PMIC", Thanks, Minkyu Kang.

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[U-Boot] [PATCH] config: trats: trats2: extend dfu_alt_info by env update settings
by Przemyslaw Marczak 03 Feb '14

03 Feb '14

This change allows updating environment stored on MMC by dfu or thor. New setting: - "params.bin mmc 0x38 0x8" File params.bin can be generated by: tools/mkenvimage. e.g. ./mkenvimage -s 4096 -o params.bin <env_text_file> Every new env variable in text file should start with a new line. Sample env text file: - board/samsung/common/dfu_sample_env.txt Requirements: - file name: "params.bin" - file size: 4096 Bytes - the same as CONFIG_ENV_SIZE. Other size will cause CRC miscalculation at boot. Signed-off-by: Przemyslaw Marczak <p.marczak(a)samsung.com> CC: Piotr Wilczek <p.wilczek(a)samsung.com> CC: Lukasz Majewski <l.majewski(a)samsung.com> --- board/samsung/common/dfu_sample_env.txt | 9 +++++++++ include/configs/trats.h | 3 ++- include/configs/trats2.h | 3 ++- 3 files changed, 13 insertions(+), 2 deletions(-) create mode 100644 board/samsung/common/dfu_sample_env.txt diff --git a/board/samsung/common/dfu_sample_env.txt b/board/samsung/common/dfu_sample_env.txt new file mode 100644 index 0000000..d6ee8a2 --- /dev/null +++ b/board/samsung/common/dfu_sample_env.txt @@ -0,0 +1,9 @@ +mmcboot=setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} ${rootfstype} rootwait ${console}; run loaduimage; bootm 0x40007FC0 +rootfstype=ext4 +loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage +mmcdev=0 +mmcbootpart=2 +mmcrootpart=5 +console=console=ttySAC2,115200n8 +bootcmd=run mmcboot +dfu_alt_info=u-boot mmc 80 800;params.bin mmc 0x38 0x8;uImage ext4 0 2 diff --git a/include/configs/trats.h b/include/configs/trats.h index fdd8b46..d09f7c7 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -147,7 +147,8 @@ ""PARTS_BOOT" part 0 2;" \ ""PARTS_ROOT" part 0 5;" \ ""PARTS_DATA" part 0 6;" \ - ""PARTS_UMS" part 0 7\0" + ""PARTS_UMS" part 0 7;" \ + "params.bin mmc 0x38 0x8\0" #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_CONSOLE_INFO_QUIET diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 83633b0..31c52f1 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -178,7 +178,8 @@ ""PARTS_BOOT" part 0 2;" \ ""PARTS_ROOT" part 0 5;" \ ""PARTS_DATA" part 0 6;" \ - ""PARTS_UMS" part 0 7\0" + ""PARTS_UMS" part 0 7;" \ + "params.bin mmc 0x38 0x8\0" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ -- 1.7.9.5

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[U-Boot] [PATCH 00/10] Introduce Samsung misc file and LCD menu.
by Przemyslaw Marczak 03 Feb '14

03 Feb '14

This patch set includes changes required to: - properly use of all gpios - introduce common file for Samsung misc code - keys support (PWR, VOL:UP,DOWN) - console support on LCD - 16bpp logo support - introduce LCD menu on Samsung devices Przemyslaw Marczak (10): s5p: gpio: change gpio coding method for s5p gpio. trats2: Code cleanup. samsung: common: Add misc file and common function misc_init_r(). samsung: misc: move display logo function to misc.c file. lib: tizen: add Tizen 16bpp logo support. video: exynos: fimd: always use 16bpp display mode. samsung: misc: Add LCD download menu. Trats: add LCD download menu support trats2: add LCD download menu support universal: add LCD download menu support arch/arm/include/asm/arch-exynos/gpio.h | 169 +- arch/arm/include/asm/arch-s5pc1xx/gpio.h | 47 +- board/samsung/common/Makefile | 1 + board/samsung/common/keys.h | 78 + board/samsung/common/misc.c | 409 ++ board/samsung/trats/trats.c | 5 +- board/samsung/trats2/trats2.c | 25 +- board/samsung/universal_c210/universal.c | 6 +- drivers/gpio/s5p_gpio.c | 15 +- drivers/power/battery/bat_trats2.c | 2 +- drivers/video/exynos_fb.c | 28 - drivers/video/exynos_fimd.c | 10 +- include/configs/s5p_goni.h | 4 +- include/configs/s5pc210_universal.h | 27 +- include/configs/trats.h | 23 +- include/configs/trats2.h | 29 +- lib/tizen/tizen.c | 16 +- lib/tizen/tizen_hd_logo_16bpp.h | 7518 ++++++++++++++++++++++++++++++ 18 files changed, 8190 insertions(+), 222 deletions(-) create mode 100644 board/samsung/common/keys.h create mode 100644 board/samsung/common/misc.c create mode 100644 lib/tizen/tizen_hd_logo_16bpp.h -- 1.7.9.5

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[U-Boot] [PATCH v2 1/2] QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
by Zhao Qiang 03 Feb '14

03 Feb '14

CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address. Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address, and CONFIG_SYS_QE_FW_ADDR for QE microcode address. Signed-off-by: Zhao Qiang <B45475(a)freescale.com> --- README | 9 +++++++-- arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +- drivers/net/fm/fm.c | 12 ++++++------ drivers/qe/qe.c | 2 +- include/configs/B4860QDS.h | 10 +++++----- include/configs/MPC8569MDS.h | 2 +- include/configs/P1023RDB.h | 2 +- include/configs/P1023RDS.h | 4 ++-- include/configs/P2041RDB.h | 10 +++++----- include/configs/T1040QDS.h | 8 ++++---- include/configs/T1040RDB.h | 8 ++++---- include/configs/T1042RDB_PI.h | 8 ++++---- include/configs/T2080QDS.h | 10 +++++----- include/configs/T4240EMU.h | 2 +- include/configs/T4240QDS.h | 10 +++++----- include/configs/corenet_ds.h | 10 +++++----- include/configs/km/km8309-common.h | 2 +- include/configs/km/kmp204x-common.h | 2 +- include/configs/p1_p2_rdb_pc.h | 2 +- include/configs/p1_twr.h | 2 +- 20 files changed, 61 insertions(+), 56 deletions(-) diff --git a/README b/README index 176de61..b2b2d73 100644 --- a/README +++ b/README @@ -4445,8 +4445,13 @@ This firmware often needs to be loaded during U-Boot booting, so macros are used to identify the storage device (NOR flash, SPI, etc) and the address within that device. -- CONFIG_SYS_QE_FMAN_FW_ADDR - The address in the storage device where the firmware is located. The +- CONFIG_SYS_FMAN_FW_ADDR + The address in the storage device where the FMAN microcode is located. The + meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro + is also specified. + +- CONFIG_SYS_QE_FW_ADDR + The address in the storage device where the QE microcode is located. The meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro is also specified. diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index b31efb7..ec6eefb 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -743,7 +743,7 @@ void cpu_secondary_init_r(void) /* load QE firmware from NAND flash to DDR first */ ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_IN_NAND, - &fw_length, (u_char *)CONFIG_SYS_QE_FMAN_FW_ADDR); + &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR); if (ret && ret == -EUCLEAN) { printf ("NAND read for QE firmware at offset %x failed %d\n", diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index bca20b3..400e9dd 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -350,16 +350,16 @@ int fm_init_common(int index, struct ccsr_fman *reg) { int rc; #if defined(CONFIG_SYS_QE_FMAN_FW_IN_NOR) - void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR; + void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR; #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_NAND) size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH; void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); - rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_ADDR, + rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_FMAN_FW_ADDR, &fw_length, (u_char *)addr); if (rc == -EUCLEAN) { printf("NAND read of FMAN firmware at offset 0x%x failed %d\n", - CONFIG_SYS_QE_FMAN_FW_ADDR, rc); + CONFIG_SYS_FMAN_FW_ADDR, rc); } #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH) struct spi_flash *ucode_flash; @@ -371,7 +371,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) if (!ucode_flash) printf("SF: probe for ucode failed\n"); else { - ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FMAN_FW_ADDR, + ret = spi_flash_read(ucode_flash, CONFIG_SYS_FMAN_FW_ADDR, CONFIG_SYS_QE_FMAN_FW_LENGTH, addr); if (ret) printf("SF: read for ucode failed\n"); @@ -381,7 +381,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) int dev = CONFIG_SYS_MMC_ENV_DEV; void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512; - u32 blk = CONFIG_SYS_QE_FMAN_FW_ADDR / 512; + u32 blk = CONFIG_SYS_FMAN_FW_ADDR / 512; struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); if (!mmc) @@ -395,7 +395,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) flush_cache((ulong)addr, cnt * 512); } #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE) - void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR; + void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR; #else void *addr = NULL; #endif diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index b5ddc4b..b1da75e 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -165,7 +165,7 @@ void qe_init(uint qe_base) /* * Upload microcode to IRAM for those SOCs which do not have ROM in QE. */ - qe_upload_firmware((const void *)CONFIG_SYS_QE_FMAN_FW_ADDR); + qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR); /* enable the microcode in IRAM */ out_be32(&qe_immr->iram.iready,QE_IRAM_READY); diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 39c0b6d..d4d606f 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -597,7 +597,7 @@ unsigned long get_board_ddr_clk(void); * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -605,10 +605,10 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1130) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -618,10 +618,10 @@ unsigned long get_board_ddr_clk(void); * master LAW->the ucode address in master's memory space. */ #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index d877e8b..5208069 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -494,7 +494,7 @@ extern unsigned long get_clock_freq(void); /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xfff00000 +#define CONFIG_SYS_QE_FW_ADDR 0xfff00000 /* * BOOTP options diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 78a0aa2..7c83362 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -361,7 +361,7 @@ extern unsigned long get_clock_freq(void); /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index d2aaf98..5d015e0 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -502,10 +502,10 @@ extern unsigned long get_clock_freq(void); /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x1f00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x1f00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 6934c61..a02e438 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -508,7 +508,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -516,10 +516,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -529,10 +529,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); * master LAW->the ucode address in master's memory space. */ #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 91b511b..0282922 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -579,7 +579,7 @@ unsigned long get_board_ddr_clk(void); * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -587,13 +587,13 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 65b4b26..1ca1a1a 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -517,7 +517,7 @@ * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -525,13 +525,13 @@ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index 104bb92..5b248e4 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -525,7 +525,7 @@ * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -533,13 +533,13 @@ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index d6d1f93..26828e5 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -540,7 +540,7 @@ unsigned long get_board_ddr_clk(void); * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -548,10 +548,10 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -561,10 +561,10 @@ unsigned long get_board_ddr_clk(void); * master LAW->the ucode address in master's memory space. */ #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T4240EMU.h b/include/configs/T4240EMU.h index c81c457..ad5a9a6 100644 --- a/include/configs/T4240EMU.h +++ b/include/configs/T4240EMU.h @@ -98,7 +98,7 @@ #define CONFIG_SYS_INTERLAKEN #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 0d43c27..d88b3b5 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -375,7 +375,7 @@ unsigned long get_board_ddr_clk(void); * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -383,10 +383,10 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -396,10 +396,10 @@ unsigned long get_board_ddr_clk(void); * master LAW->the ucode address in master's memory space. */ #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index fa748f7..be00871 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -514,7 +514,7 @@ * env, so we got 0x110000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -522,10 +522,10 @@ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -535,10 +535,10 @@ * master LAW->the ucode address in master's memory space. */ #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/km/km8309-common.h b/include/configs/km/km8309-common.h index 47355ab..d27911f 100644 --- a/include/configs/km/km8309-common.h +++ b/include/configs/km/km8309-common.h @@ -28,7 +28,7 @@ /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR /* at end of uboot partition, before env */ -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xF00B0000 +#define CONFIG_SYS_QE_FW_ADDR 0xF00B0000 /* * System IO Config diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 0463fcb..fbe9940 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -334,7 +334,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); * ucode is stored after env, so we got 0x120000. */ #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x120000 +#define CONFIG_SYS_QE_FW_ADDR 0x120000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 95e23ac..93a0aa9 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -769,7 +769,7 @@ #ifdef CONFIG_QE /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xefec0000 +#define CONFIG_SYS_QE_FW_ADDR 0xefec0000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #endif /* CONFIG_QE */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index a7fe90f..f6b76b8 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -352,7 +352,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_QE /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xefec0000 +#define CONFIG_SYS_QE_FW_ADDR 0xefec0000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #endif /* CONFIG_QE */ -- 1.8.5

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[U-Boot] [PATCH 1/2] exynos5250: usb: Fix VBus gpio numbers for ehci and xhci controllers
by Vivek Gautam 03 Feb '14

03 Feb '14

The gpio_*() apis require the exact gpio line number to deduce the gpio bank and the gpio pin addresses. So fix the gpio number for VBUS used for EHCI ports as well as XHCI ports on exynos5250 boards. Signed-off-by: Vivek Gautam <gautam.vivek(a)samsung.com> Cc: Julius Werner <jwerner(a)chromium.org> Cc: Minkyu Kang <mk7.kang(a)samsung.com> Cc: Marek Vasut <marex(a)denx.de> --- board/samsung/dts/exynos5250-smdk5250.dts | 2 +- board/samsung/dts/exynos5250-snow.dts | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts index c4ed346..9020382 100644 --- a/board/samsung/dts/exynos5250-smdk5250.dts +++ b/board/samsung/dts/exynos5250-smdk5250.dts @@ -146,6 +146,6 @@ }; ehci@12110000 { - samsung,vbus-gpio = <&gpio 0xbe 0>; /* X26 */ + samsung,vbus-gpio = <&gpio 0x316 0>; /* X26 */ }; }; diff --git a/board/samsung/dts/exynos5250-snow.dts b/board/samsung/dts/exynos5250-snow.dts index 091cdb9..9b48a0c 100644 --- a/board/samsung/dts/exynos5250-snow.dts +++ b/board/samsung/dts/exynos5250-snow.dts @@ -110,11 +110,11 @@ }; ehci@12110000 { - samsung,vbus-gpio = <&gpio 0xb1 0>; /* X11 */ + samsung,vbus-gpio = <&gpio 0x309 0>; /* X11 */ }; xhci@12000000 { - samsung,vbus-gpio = <&gpio 0xbf 0>; /* X27 */ + samsung,vbus-gpio = <&gpio 0x317 0>; /* X27 */ }; tmu@10060000 { -- 1.7.10.4

4 9

[U-Boot] [PATCH] Do not merge this to u-boot/master: disable fixdep
by Masahiro Yamada 03 Feb '14

03 Feb '14

--- Do not merge this patch to the main line --- This patch is used for Kbuild performance test. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- scripts/Kbuild.include | 4 +--- scripts/Makefile.build | 6 +----- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 6504571..9d4dabe 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -232,9 +232,7 @@ if_changed = $(if $(strip $(any-prereq) $(arg-check)), \ if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), \ @set -e; \ $(echo-cmd) $(cmd_$(1)); \ - scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;\ - rm -f $(depfile); \ - mv -f $(dot-target).tmp $(dot-target).cmd) + echo 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd) # Usage: $(call if_changed_rule,foo) # Will check if $(cmd_foo) or any of the prerequisites changed, diff --git a/scripts/Makefile.build b/scripts/Makefile.build index f37957f..dae809b 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -322,11 +322,7 @@ define rule_cc_o_c $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ $(cmd_modversions) \ $(call echo-cmd,record_mcount) \ - $(cmd_record_mcount) \ - scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \ - $(dot-target).tmp; \ - rm -f $(depfile); \ - mv -f $(dot-target).tmp $(dot-target).cmd + $(cmd_record_mcount) endef # Built-in and composite module parts -- 1.8.3.2

1 0

[U-Boot] [PATCH 1/2] OMAP24xx I2C: Add support for 'setspeed'
by Hannes Petermaier 01 Feb '14

01 Feb '14

Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- drivers/i2c/omap24xx_i2c.c | 122 ++++++++++++++++++++++++++++---------------- 1 file changed, 77 insertions(+), 45 deletions(-) diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index c784004..51ceda1 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -32,6 +32,10 @@ * - Status functions now read irqstatus_raw as per TRM guidelines * (except for OMAP243X and OMAP34XX). * - Driver now supports up to I2C5 (OMAP5). + * + * Copyright (c) 2014 Hannes Petermaier <oe5hpm(a)oevsv.at>, B&R + * - Added support for set_speed + * */ #include <common.h> @@ -53,43 +57,65 @@ static int wait_for_bb(struct i2c_adapter *adap); static struct i2c *omap24_get_base(struct i2c_adapter *adap); static u16 wait_for_event(struct i2c_adapter *adap); static void flush_fifo(struct i2c_adapter *adap); - -static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) +static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed) { - struct i2c *i2c_base = omap24_get_base(adap); - int psc, fsscll, fssclh; - int hsscll = 0, hssclh = 0; - u32 scll, sclh; - int timeout = I2C_TIMEOUT; + unsigned int sampleclk, psc; + int fsscll, fssclh; - /* Only handle standard, fast and high speeds */ - if ((speed != OMAP_I2C_STANDARD) && - (speed != OMAP_I2C_FAST_MODE) && - (speed != OMAP_I2C_HIGH_SPEED)) { - printf("Error : I2C unsupported speed %d\n", speed); - return; - } + speed <<= 1; + psc = 0; + /* some divisors may cause a precission loss, but shouldn't + * be a big thing, because i2c_clk is then allready very slow. + */ + while (psc <= 0xFF) { + sampleclk = I2C_IP_CLK / (psc+1); + + fsscll = = sampleclk / speed; + fssclh = fsscll; + fsscll -= I2C_FASTSPEED_SCLL_TRIM; + fssclh -= I2C_FASTSPEED_SCLH_TRIM; + + if (((fsscll > 0) && (fssclh > 0)) && + ((fsscll <= (255-I2C_FASTSPEED_SCLL_TRIM)) && + (fssclh <= (255-I2C_FASTSPEED_SCLH_TRIM)))) { - psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK; - psc -= 1; - if (psc < I2C_PSC_MIN) { - printf("Error : I2C unsupported prescalar %d\n", psc); - return; + if (pscl) + *pscl = fsscll; + if (psch) + *psch = fssclh; + + return psc; + } + psc++; } + return -1; +} +static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed) +{ + struct i2c *i2c_base = omap24_get_base(adap); + int psc, fsscll = 0, fssclh = 0; + int hsscll = 0, hssclh = 0; + u32 scll = 0, sclh = 0; - if (speed == OMAP_I2C_HIGH_SPEED) { + if (speed >= OMAP_I2C_HIGH_SPEED) { /* High speed */ + psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK; + psc -= 1; + if (psc < I2C_PSC_MIN) { + printf("Error : I2C unsupported prescaler %d\n", psc); + return -1; + } /* For first phase of HS mode */ - fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / - (2 * OMAP_I2C_FAST_MODE); + fsscll = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); + fssclh = fsscll; fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM; fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM; if (((fsscll < 0) || (fssclh < 0)) || ((fsscll > 255) || (fssclh > 255))) { puts("Error : I2C initializing first phase clock\n"); - return; + return -1; } /* For second phase of HS mode */ @@ -100,7 +126,7 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) if (((fsscll < 0) || (fssclh < 0)) || ((fsscll > 255) || (fssclh > 255))) { puts("Error : I2C initializing second phase clock\n"); - return; + return -1; } scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll; @@ -108,20 +134,29 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) } else { /* Standard and fast speed */ - fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); - - fsscll -= I2C_FASTSPEED_SCLL_TRIM; - fssclh -= I2C_FASTSPEED_SCLH_TRIM; - if (((fsscll < 0) || (fssclh < 0)) || - ((fsscll > 255) || (fssclh > 255))) { + psc = omap24_i2c_findpsc(&scll, &sclh, speed); + if (0 > psc) { puts("Error : I2C initializing clock\n"); - return; + return -1; } - - scll = (unsigned int)fsscll; - sclh = (unsigned int)fssclh; } + adap->speed = speed; + adap->waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */ + writew(0, &i2c_base->con); + writew(psc, &i2c_base->psc); + writew(scll, &i2c_base->scll); + writew(sclh, &i2c_base->sclh); + writew(I2C_CON_EN, &i2c_base->con); + writew(0xFFFF, &i2c_base->stat); /* clear all pending status */ + + return 0; +} +static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) +{ + struct i2c *i2c_base = omap24_get_base(adap); + int timeout = I2C_TIMEOUT; + if (readw(&i2c_base->con) & I2C_CON_EN) { writew(0, &i2c_base->con); udelay(50000); @@ -139,14 +174,11 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) udelay(1000); } - writew(0, &i2c_base->con); - writew(psc, &i2c_base->psc); - writew(scll, &i2c_base->scll); - writew(sclh, &i2c_base->sclh); + omap24_i2c_setspeed(adap, speed); /* own address */ writew(slaveadd, &i2c_base->oa); - writew(I2C_CON_EN, &i2c_base->con); + #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) /* * Have to enable interrupts for OMAP2/3, these IPs don't have @@ -220,8 +252,8 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip) /* Check for ACK (!NAK) */ if (!(status & I2C_STAT_NACK)) { - res = 0; /* Device found */ - udelay(I2C_WAIT); /* Required by AM335X in SPL */ + res = 0; /* Device found */ + udelay(adap->waitdelay);/* Required by AM335X in SPL */ /* Abort transfer (force idle state) */ writew(I2C_CON_MST | I2C_CON_TRX, &i2c_base->con); /* Reset */ udelay(1000); @@ -490,7 +522,7 @@ static int wait_for_bb(struct i2c_adapter *adap) I2C_STAT_BB) && timeout--) { #endif writew(stat, &i2c_base->stat); - udelay(I2C_WAIT); + udelay(adap->waitdelay); } if (timeout <= 0) { @@ -513,7 +545,7 @@ static u16 wait_for_event(struct i2c_adapter *adap) int timeout = I2C_TIMEOUT; do { - udelay(I2C_WAIT); + udelay(adap->waitdelay); #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) status = readw(&i2c_base->stat); #else @@ -580,12 +612,12 @@ static struct i2c *omap24_get_base(struct i2c_adapter *adap) #endif U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe, - omap24_i2c_read, omap24_i2c_write, NULL, + omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed, CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE, 0) U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe, - omap24_i2c_read, omap24_i2c_write, NULL, + omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed, CONFIG_SYS_OMAP24_I2C_SPEED1, CONFIG_SYS_OMAP24_I2C_SLAVE1, 1) -- 1.7.9.5 >From 72e40b7243b74205ce03739861305cdbdad05241 Mon Sep 17 00:00:00 2001 From: Hannes Petermaier <oe5hpm(a)oevsv.at> Date: Sat, 1 Feb 2014 22:12:46 +0100 Subject: [PATCH 2/2] OMAP24xx I2C: Add support for 'set-speed' Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- include/i2c.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/i2c.h b/include/i2c.h index f93a183..cf5ae0e 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -67,7 +67,7 @@ struct i2c_adapter { int len); uint (*set_bus_speed)(struct i2c_adapter *adap, uint speed); - int speed; + int speed, waitdelay; int slaveaddr; int init_done; int hwadapnr; -- 1.7.9.5

1 0

[U-Boot] [PATCH] OMAP24xx I2C: Add support for 'setspeed'
by Hannes Petermaier 01 Feb '14

01 Feb '14

supports changing the bus-speed of the OMAP24xx Adapter. Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- drivers/i2c/omap24xx_i2c.c | 122 ++++++++++++++++++++++++++++---------------- 1 file changed, 77 insertions(+), 45 deletions(-) diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index c784004..51ceda1 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -32,6 +32,10 @@ * - Status functions now read irqstatus_raw as per TRM guidelines * (except for OMAP243X and OMAP34XX). * - Driver now supports up to I2C5 (OMAP5). + * + * Copyright (c) 2014 Hannes Petermaier <oe5hpm(a)oevsv.at>, B&R + * - Added support for set_speed + * */ #include <common.h> @@ -53,43 +57,65 @@ static int wait_for_bb(struct i2c_adapter *adap); static struct i2c *omap24_get_base(struct i2c_adapter *adap); static u16 wait_for_event(struct i2c_adapter *adap); static void flush_fifo(struct i2c_adapter *adap); - -static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) +static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed) { - struct i2c *i2c_base = omap24_get_base(adap); - int psc, fsscll, fssclh; - int hsscll = 0, hssclh = 0; - u32 scll, sclh; - int timeout = I2C_TIMEOUT; + unsigned int sampleclk, psc; + int fsscll, fssclh; - /* Only handle standard, fast and high speeds */ - if ((speed != OMAP_I2C_STANDARD) && - (speed != OMAP_I2C_FAST_MODE) && - (speed != OMAP_I2C_HIGH_SPEED)) { - printf("Error : I2C unsupported speed %d\n", speed); - return; - } + speed <<= 1; + psc = 0; + /* some divisors may cause a precission loss, but shouldn't + * be a big thing, because i2c_clk is then allready very slow. + */ + while (psc <= 0xFF) { + sampleclk = I2C_IP_CLK / (psc+1); + + fsscll = = sampleclk / speed; + fssclh = fsscll; + fsscll -= I2C_FASTSPEED_SCLL_TRIM; + fssclh -= I2C_FASTSPEED_SCLH_TRIM; + + if (((fsscll > 0) && (fssclh > 0)) && + ((fsscll <= (255-I2C_FASTSPEED_SCLL_TRIM)) && + (fssclh <= (255-I2C_FASTSPEED_SCLH_TRIM)))) { - psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK; - psc -= 1; - if (psc < I2C_PSC_MIN) { - printf("Error : I2C unsupported prescalar %d\n", psc); - return; + if (pscl) + *pscl = fsscll; + if (psch) + *psch = fssclh; + + return psc; + } + psc++; } + return -1; +} +static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed) +{ + struct i2c *i2c_base = omap24_get_base(adap); + int psc, fsscll = 0, fssclh = 0; + int hsscll = 0, hssclh = 0; + u32 scll = 0, sclh = 0; - if (speed == OMAP_I2C_HIGH_SPEED) { + if (speed >= OMAP_I2C_HIGH_SPEED) { /* High speed */ + psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK; + psc -= 1; + if (psc < I2C_PSC_MIN) { + printf("Error : I2C unsupported prescaler %d\n", psc); + return -1; + } /* For first phase of HS mode */ - fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / - (2 * OMAP_I2C_FAST_MODE); + fsscll = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); + fssclh = fsscll; fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM; fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM; if (((fsscll < 0) || (fssclh < 0)) || ((fsscll > 255) || (fssclh > 255))) { puts("Error : I2C initializing first phase clock\n"); - return; + return -1; } /* For second phase of HS mode */ @@ -100,7 +126,7 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) if (((fsscll < 0) || (fssclh < 0)) || ((fsscll > 255) || (fssclh > 255))) { puts("Error : I2C initializing second phase clock\n"); - return; + return -1; } scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll; @@ -108,20 +134,29 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) } else { /* Standard and fast speed */ - fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); - - fsscll -= I2C_FASTSPEED_SCLL_TRIM; - fssclh -= I2C_FASTSPEED_SCLH_TRIM; - if (((fsscll < 0) || (fssclh < 0)) || - ((fsscll > 255) || (fssclh > 255))) { + psc = omap24_i2c_findpsc(&scll, &sclh, speed); + if (0 > psc) { puts("Error : I2C initializing clock\n"); - return; + return -1; } - - scll = (unsigned int)fsscll; - sclh = (unsigned int)fssclh; } + adap->speed = speed; + adap->waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */ + writew(0, &i2c_base->con); + writew(psc, &i2c_base->psc); + writew(scll, &i2c_base->scll); + writew(sclh, &i2c_base->sclh); + writew(I2C_CON_EN, &i2c_base->con); + writew(0xFFFF, &i2c_base->stat); /* clear all pending status */ + + return 0; +} +static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) +{ + struct i2c *i2c_base = omap24_get_base(adap); + int timeout = I2C_TIMEOUT; + if (readw(&i2c_base->con) & I2C_CON_EN) { writew(0, &i2c_base->con); udelay(50000); @@ -139,14 +174,11 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) udelay(1000); } - writew(0, &i2c_base->con); - writew(psc, &i2c_base->psc); - writew(scll, &i2c_base->scll); - writew(sclh, &i2c_base->sclh); + omap24_i2c_setspeed(adap, speed); /* own address */ writew(slaveadd, &i2c_base->oa); - writew(I2C_CON_EN, &i2c_base->con); + #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) /* * Have to enable interrupts for OMAP2/3, these IPs don't have @@ -220,8 +252,8 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip) /* Check for ACK (!NAK) */ if (!(status & I2C_STAT_NACK)) { - res = 0; /* Device found */ - udelay(I2C_WAIT); /* Required by AM335X in SPL */ + res = 0; /* Device found */ + udelay(adap->waitdelay);/* Required by AM335X in SPL */ /* Abort transfer (force idle state) */ writew(I2C_CON_MST | I2C_CON_TRX, &i2c_base->con); /* Reset */ udelay(1000); @@ -490,7 +522,7 @@ static int wait_for_bb(struct i2c_adapter *adap) I2C_STAT_BB) && timeout--) { #endif writew(stat, &i2c_base->stat); - udelay(I2C_WAIT); + udelay(adap->waitdelay); } if (timeout <= 0) { @@ -513,7 +545,7 @@ static u16 wait_for_event(struct i2c_adapter *adap) int timeout = I2C_TIMEOUT; do { - udelay(I2C_WAIT); + udelay(adap->waitdelay); #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) status = readw(&i2c_base->stat); #else @@ -580,12 +612,12 @@ static struct i2c *omap24_get_base(struct i2c_adapter *adap) #endif U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe, - omap24_i2c_read, omap24_i2c_write, NULL, + omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed, CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE, 0) U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe, - omap24_i2c_read, omap24_i2c_write, NULL, + omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed, CONFIG_SYS_OMAP24_I2C_SPEED1, CONFIG_SYS_OMAP24_I2C_SLAVE1, 1) -- 1.7.9.5

2 1