October 2014 - U-Boot

[U-Boot] Can't start Linux if U-Boot built with CONFIG_WATCHDOG
by Matthew Lear 26 Aug '15

26 Aug '15

Hello all, I've added watchdog support based on U-Boot (git) for the m68k coldfire mcf54455evb platform. I've fed the patch to the maintainer to help in development. However, I am unable to start my m68k w/MMU coldfire Linux kernel from U-Boot if U-Boot is built with CONFIG_WATCHDOG regardless if the watchdog_enable(), watchdog_reset() and watchdog_disable() functions touch hardware or not. I initially thought this was a problem with enabling the watchdog somehow (ie when Linux started, some hw configuration in the device was getting upset or corrupted etc resulting in the failure), but when I commented out the code from the above functions that actually accesses the hw (ie to enable, kick and disable the watchdog timer hw block), Linux is still unable to start. In fact, I don't think Linux actually gets started! That's the problem. If I rebuild the same U-Boot code base with CONFIG_WATCHDOG undefined, Linux can start just fine. As far as I can tell, there are no functional differences in building U-Boot with or without CONFIG_WATCHDOG enabled when the functions above are stubs and do absolutely nothing at all. If I build U-Boot with debug, what I see is as follows: ## Transferring control to Linux (at address 40020000) ... BIV ...and then the board is dead. I occasionally see something like the following from U-Boot: *** Unexpected exception *** Vector Number: 4 Format: 04 Fault Status: 0 PC: 4fdbfdc8 SR: 00002700 SP: 4fd72a64 D0: 00000004 D1: 000003f9 D2: 4fdb4202 D3: 004fa3da D4: 00000000 D5: 4fdc7c8c D6: 122c0034 D7: 4fd82f76 A0: 4033cb98 A1: 4025aa39 A2: 40020000 A3: 4fdbfdc8 A4: 00000000 A5: 4fdc5800 A6: 4fd72afb *** Please Reset Board! *** The 'BIV' is relevant because in my 2.6.29 kernel src arch/m68k/include/asm/bootinfo_mm.h, BOOTINFOV_MAGIC is defined to be 0x4249561A which is BIV^Z. This ascii text is located in the kernel image header info: >From arch/m68k/coldfire/head.S: .section ".text.head","ax" ENTRY(_stext) bras 1f /* Jump over bootinfo version numbers */ .long BOOTINFOV_MAGIC .long 0 And from U-Boot itself: -> md ${loadaddr} 40010000: 27051956 97342d7d 4a54afd5 00300000 '..V.4-}JT...0.. 40010010: 40020000 40020000 8a006fc1 050c0200 @...@.....o..... 40010020: 4c696e75 78204b65 726e656c 20496d61 Linux Kernel Ima 40010030: 67650000 00000000 00000000 00000000 ge.............. 40010040: 60084249 561a0000 00004ef9 40304000 `.BIV.....N.@0@. I suspect that the failure of starting Linux is caused by some mismatch in data structures (or versions there of) shared/copied between Linux and U-Boot and that this data has somehow changed when U-Boot is built with CONFIG_WATCHDOG #defined. However, I can't find any evidence of this in the U-Boot code base. The bras instruction above must be key and I suspect that this is the area causing the problem. Can anybody offer any advice / explanation of what exactly could be going on and why? I wouldn't have expected that defining CONFIG_WATCHDOG would change anything as fundamental as this. Apologies for the cross-post (U-Boot and m68k kernel dev) but I hope to get opinions/feedback/help from both communities. Any assistance very much appreciated indeed. Many thanks, -- Matt

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[U-Boot] [PATCH 0/3] DM9000 support for multiple interfaces
by Andrew Ruder 11 Aug '15

11 Aug '15

This is a rework of the DM9000 driver to support registering interfaces dynamically (i.e. determine how many ethernet chips we have at boot and register 0, 1, 2, or more). It was tested on a yet-to-be-submitted board which is based on the PXA270 + 0, 1, or 2 DM9000 chips. To maintain backwards compatibility with older board files, we add a new initialize function taking the io address, data address, and availability of a SROM chip. The old initialize function is now a shim around this new initialize function but provides the parameters based on the old DM9000 preprocessor symbols. I have compile-tested this on all the arm-based boards. Cc: Joe Hershberger <joe.hershberger(a)gmail.com> Andrew Ruder (3): dm9000: mark dump_regs() function as unused dm9000: Add struct eth_device * to SROM functions dm9000: rework dm9000 to support multiple devices board/trizepsiv/eeprom.c | 5 +- drivers/net/dm9000x.c | 382 +++++++++++++++++++++++++++-------------------- include/dm9000.h | 8 +- include/netdev.h | 1 + 4 files changed, 224 insertions(+), 172 deletions(-) -- 2.1.1

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[U-Boot] [PATCH v2 00/40] ARM: tegra: Add PCIe support
by Thierry Reding 15 Jul '15

15 Jul '15

From: Thierry Reding <treding(a)nvidia.com> This series adds PCIe support for Tegra20, Tegra30 and Tegra124. The size is mostly due to the large number of infrastructure that's added (libfdt, Tegra specific drivers required by the PCIe driver). In this version I've included all patches that were previously split into three separate series. Spreading them over multiple series is probably not worth it since there might be some dependencies between them and only the end result gives a completely working setup. Patch 1 adds a %pa modifier to printf() to print physical addresses. This is required to allow code to output such addresses irrespective of whether a 64 bit or 32 bit architecture is built for. Patches 2-7 add various FDT helpers to make it easier to parse complex device trees. Patch 8 is a minor cleanup to the PCI command that prevents a spew of error messages if a bus does not exist. Patch 9 modifies the PCI enumeration code to honor theh restrictions encoded within a host controller driver's pci_ski_dev() implementation. This is required to prevent exceptions from the NVIDIA Tegra PCIe controller. Patch 10 imports the pr_fmt() macro used within the Linux kernel to reduce the number of characters consumed by literal strings by allowing a source file to specify a prefix or suffix that should be applied to all format strings in the file. It is currently used by the debug() and error() macros. Patches 11-14 are some cleanup and refactoring of I2C core code, the addition of a higher level API that makes it easier for I2C client drivers to talk to devices. The Tegra I2C driver now implements i2c_get_bus_num_fdt() to obtain bus numbers corresponding to a DT node. Patch 15 implements a driver for the AS3722 PMIC used on the Venice2 and Jetson TK1 boards. Patches 16-21 are preparatory work for the Tegra PCIe controller. They add missing clock driver functionality as well as drivers for the Tegra powergate and XUSB pad controller blocks. Patch 22 adds the PCIe controller driver for Tegra20, Tegra30 and Tegra124. Device tree nodes and configurations options to enable PCIe on the TrimSlice (Tegra20), Beaver, Cardhu (Tegra30) and Jetson TK1 (Tegra124) boards are added in patches 23-31. Patches 32-35 implement non-cached memory support that will be used in the last batch of patches to implement more reliable packet transfers in the r8169 driver. Patch 36 enables non-cached memory support on Tegra. Finally, patches 37-40 implement non-cached memory support and various fixes in the r8169 driver and add support for the revision of the NIC found on the Jetson TK1. The above boards all have an ethernet NIC connected to PCIe, which is what I tested with. Thierry Reding (40): vsprintf: Add modifier for phys_addr_t fdt: Add a function to count strings fdt: Add a function to get the index of a string fdt: Add functions to retrieve strings fdt: Add resource parsing functions fdt: Add a function to return PCI BDF triplet fdt: Add a subnodes iterator macro pci: Abort early if bus does not exist pci: Honour pci_skip_dev() Add pr_fmt() macro i2c: Initialize the correct bus i2c: Refactor adapter initialization i2c: Add high-level API i2c: tegra: Implement i2c_get_bus_num_fdt() power: Add AMS AS3722 PMIC support ARM: tegra: Implement tegra_plle_enable() ARM: tegra: Provide PCIEXCLK reset ID ARM: tegra: Implement powergate support ARM: tegra: Implement XUSB pad controller ARM: tegra: Add XUSB pad controller on Tegra124 ARM: tegra: Enable XUSB pad controller on Jetson TK1 pci: tegra: Add Tegra PCIe driver ARM: tegra: Add Tegra20 PCIe device tree node ARM: tegra: Enable PCIe on TrimSlice ARM: tegra: Add GIC for Tegra30 ARM: tegra: Add Tegra30 PCIe device tree node ARM: tegra: Enable PCIe on Cardhu ARM: tegra: Enable PCIe on Beaver ARM: tegra: Add GIC for Tegra124 ARM: tegra: Add Tegra124 PCIe device tree node ARM: tegra: Enable PCIe on Jetson TK1 ARM: cache_v7: Various minor cleanups ARM: cache-cp15: Use more accurate types malloc: Output region when debugging ARM: Implement non-cached memory support ARM: tegra: Enable non-cached memory net: rtl8169: Honor CONFIG_SYS_RX_ETH_BUFFER net: rtl8169: Properly align buffers net: rtl8169: Use non-cached memory if available net: rtl8169: Add support for RTL-8168/8111g README | 19 + arch/arm/cpu/armv7/cache_v7.c | 14 +- arch/arm/cpu/tegra-common/Makefile | 2 + arch/arm/cpu/tegra-common/powergate.c | 102 ++ arch/arm/cpu/tegra-common/xusb-padctl.c | 39 + arch/arm/cpu/tegra124-common/Makefile | 1 + arch/arm/cpu/tegra124-common/clock.c | 109 +++ arch/arm/cpu/tegra124-common/xusb-padctl.c | 716 ++++++++++++++ arch/arm/cpu/tegra20-common/clock.c | 141 ++- arch/arm/cpu/tegra30-common/clock.c | 155 +++ arch/arm/dts/tegra124-jetson-tk1.dts | 373 +++++++ arch/arm/dts/tegra124.dtsi | 90 ++ arch/arm/dts/tegra20-trimslice.dts | 69 ++ arch/arm/dts/tegra20.dtsi | 60 ++ arch/arm/dts/tegra30-beaver.dts | 245 +++++ arch/arm/dts/tegra30-cardhu.dts | 362 +++++++ arch/arm/dts/tegra30.dtsi | 84 ++ arch/arm/include/asm/arch-tegra/powergate.h | 38 + arch/arm/include/asm/arch-tegra/xusb-padctl.h | 24 + arch/arm/include/asm/arch-tegra114/powergate.h | 6 + arch/arm/include/asm/arch-tegra124/clock.h | 2 + arch/arm/include/asm/arch-tegra124/powergate.h | 6 + arch/arm/include/asm/arch-tegra20/clock-tables.h | 2 +- arch/arm/include/asm/arch-tegra20/clock.h | 2 + arch/arm/include/asm/arch-tegra20/powergate.h | 6 + arch/arm/include/asm/arch-tegra30/clock.h | 2 + arch/arm/include/asm/arch-tegra30/powergate.h | 6 + arch/arm/include/asm/system.h | 7 +- arch/arm/lib/cache-cp15.c | 6 +- arch/arm/lib/cache.c | 42 + board/compulab/trimslice/trimslice.c | 8 + board/nvidia/cardhu/cardhu.c | 56 ++ board/nvidia/common/board.c | 3 + board/nvidia/jetson-tk1/jetson-tk1.c | 52 + common/board_r.c | 11 + common/cmd_pci.c | 7 + common/dlmalloc.c | 3 + drivers/i2c/i2c_core.c | 80 +- drivers/i2c/tegra_i2c.c | 13 + drivers/net/rtl8169.c | 127 ++- drivers/pci/Makefile | 1 + drivers/pci/pci.c | 3 + drivers/pci/pci_tegra.c | 1143 ++++++++++++++++++++++ drivers/power/Makefile | 1 + drivers/power/as3722.c | 300 ++++++ include/common.h | 14 +- include/configs/beaver.h | 10 + include/configs/cardhu.h | 10 + include/configs/jetson-tk1.h | 13 + include/configs/tegra-common.h | 1 + include/configs/trimslice.h | 10 + include/dt-bindings/clock/tegra124-car.h | 341 +++++++ include/dt-bindings/clock/tegra20-car.h | 158 +++ include/dt-bindings/clock/tegra30-car.h | 265 +++++ include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h | 7 + include/fdtdec.h | 69 ++ include/i2c.h | 96 ++ include/libfdt.h | 72 ++ include/pci.h | 1 + include/power/as3722.h | 27 + lib/fdtdec.c | 76 ++ lib/libfdt/fdt_ro.c | 76 ++ lib/vsprintf.c | 16 +- 63 files changed, 5736 insertions(+), 64 deletions(-) create mode 100644 arch/arm/cpu/tegra-common/powergate.c create mode 100644 arch/arm/cpu/tegra-common/xusb-padctl.c create mode 100644 arch/arm/cpu/tegra124-common/xusb-padctl.c create mode 100644 arch/arm/include/asm/arch-tegra/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra/xusb-padctl.h create mode 100644 arch/arm/include/asm/arch-tegra114/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra124/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra20/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra30/powergate.h create mode 100644 drivers/pci/pci_tegra.c create mode 100644 drivers/power/as3722.c create mode 100644 include/dt-bindings/clock/tegra124-car.h create mode 100644 include/dt-bindings/clock/tegra20-car.h create mode 100644 include/dt-bindings/clock/tegra30-car.h create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h create mode 100644 include/power/as3722.h -- 2.0.4

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[U-Boot] [PATCH v10 02/14] patman: Fix indentation in terminal.py
by Simon Glass 14 Jul '15

14 Jul '15

This code came from a different project with 2-character indentation. Fix it for U-Boot. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - Add new patch to fix indentation in teminal.py Changes in v5: None tools/patman/terminal.py | 108 ++++++++++++++++++++++++----------------------- 1 file changed, 55 insertions(+), 53 deletions(-) diff --git a/tools/patman/terminal.py b/tools/patman/terminal.py index 597d526..11f80d8 100644 --- a/tools/patman/terminal.py +++ b/tools/patman/terminal.py @@ -15,66 +15,68 @@ import sys COLOR_IF_TERMINAL, COLOR_ALWAYS, COLOR_NEVER = range(3) class Color(object): - """Conditionally wraps text in ANSI color escape sequences.""" - BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8) - BOLD = -1 - BRIGHT_START = '\033[1;%dm' - NORMAL_START = '\033[22;%dm' - BOLD_START = '\033[1m' - RESET = '\033[0m' + """Conditionally wraps text in ANSI color escape sequences.""" + BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8) + BOLD = -1 + BRIGHT_START = '\033[1;%dm' + NORMAL_START = '\033[22;%dm' + BOLD_START = '\033[1m' + RESET = '\033[0m' - def __init__(self, colored=COLOR_IF_TERMINAL): - """Create a new Color object, optionally disabling color output. + def __init__(self, colored=COLOR_IF_TERMINAL): + """Create a new Color object, optionally disabling color output. - Args: - enabled: True if color output should be enabled. If False then this - class will not add color codes at all. - """ - self._enabled = (colored == COLOR_ALWAYS or - (colored == COLOR_IF_TERMINAL and os.isatty(sys.stdout.fileno()))) + Args: + enabled: True if color output should be enabled. If False then this + class will not add color codes at all. + """ + self._enabled = (colored == COLOR_ALWAYS or + (colored == COLOR_IF_TERMINAL and os.isatty(sys.stdout.fileno()))) - def Start(self, color, bright=True): - """Returns a start color code. + def Start(self, color, bright=True): + """Returns a start color code. - Args: - color: Color to use, .e.g BLACK, RED, etc. + Args: + color: Color to use, .e.g BLACK, RED, etc. - Returns: - If color is enabled, returns an ANSI sequence to start the given color, - otherwise returns empty string - """ - if self._enabled: - base = self.BRIGHT_START if bright else self.NORMAL_START - return base % (color + 30) - return '' + Returns: + If color is enabled, returns an ANSI sequence to start the given + color, otherwise returns empty string + """ + if self._enabled: + base = self.BRIGHT_START if bright else self.NORMAL_START + return base % (color + 30) + return '' - def Stop(self): - """Retruns a stop color code. + def Stop(self): + """Retruns a stop color code. - Returns: - If color is enabled, returns an ANSI color reset sequence, otherwise - returns empty string - """ - if self._enabled: - return self.RESET - return '' + Returns: + If color is enabled, returns an ANSI color reset sequence, + otherwise returns empty string + """ + if self._enabled: + return self.RESET + return '' - def Color(self, color, text, bright=True): - """Returns text with conditionally added color escape sequences. + def Color(self, color, text, bright=True): + """Returns text with conditionally added color escape sequences. - Keyword arguments: - color: Text color -- one of the color constants defined in this class. - text: The text to color. + Keyword arguments: + color: Text color -- one of the color constants defined in this + class. + text: The text to color. - Returns: - If self._enabled is False, returns the original text. If it's True, - returns text with color escape sequences based on the value of color. - """ - if not self._enabled: - return text - if color == self.BOLD: - start = self.BOLD_START - else: - base = self.BRIGHT_START if bright else self.NORMAL_START - start = base % (color + 30) - return start + text + self.RESET + Returns: + If self._enabled is False, returns the original text. If it's True, + returns text with color escape sequences based on the value of + color. + """ + if not self._enabled: + return text + if color == self.BOLD: + start = self.BOLD_START + else: + base = self.BRIGHT_START if bright else self.NORMAL_START + start = base % (color + 30) + return start + text + self.RESET -- 2.1.0.rc2.206.gedb03e5

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[U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support
by Stefan Roese 15 May '15

15 May '15

Hi! So this is my 3rd posting regarding the Candence SPI driver on SoCFPGA. The current status is, that SPI NOR flash works now without problems. And dcache is still enabled. The previous disabling was not needed. And only caused problems while booting into Linux. No cache flush or invalidate is needed. As no DMA engine is involved in this transfer. The "solution" I used to get SPI NOR flash support working now is implemented in patch 0004 (still marked as RFC). Here a software reset is issued on the Micron N25Q256A SPI NOR flash. This seems to solve all problems and reading / writing to the SPI NOR flash seems to work now just fine. Even rebooting via pushbutton-reset or reset command works. I think this version is now in much better state. Thats why I removed the WIP from the subject lines. Again, this is tested on the EBV SoCrates eval board. Thanks, Stefan Cc: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)altera.com> Cc: Vince Bridgers <vbridger(a)altera.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Pavel Machek <pavel(a)denx.de> Cc: Michael Trimarchi <michael(a)amarulasolutions.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com>

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[U-Boot] [PATCH V2] sf: Add support for flag status register on Micron chips
by Hou Zhiqiang 09 May '15

09 May '15

Enter 3 Byte address mode at first, because it may change to 4 Byte address mode in kernel driver and not reset to 3 Byte address mode after reboot. Add clear flag status register operation that some Micron SPI flash chips required after reading the flag status register to check some operations completion. Signed-off-by: Hou Zhiqiang <B48286(a)freescale.com> Signed-off-by: Mingkai.Hu <Mingkai.Hu(a)freescale.com> --- V1: Based on git://git.denx.de/u-boot.git. Also can be applied to git://www.denx.de/git/u-boot-mpc85xx.git. Tested on board T2080QDS and T2080RDB. V2: Add the operation of enter 3 Byte address mode in probe. drivers/mtd/spi/sf_internal.h | 17 ++++++++++++ drivers/mtd/spi/sf_ops.c | 64 +++++++++++++++++++++++++++++++++++++------ drivers/mtd/spi/sf_probe.c | 5 ++++ 3 files changed, 78 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 19d4914..49e5a2c 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -36,6 +36,11 @@ #define CMD_WRITE_ENABLE 0x06 #define CMD_READ_CONFIG 0x35 #define CMD_FLAG_STATUS 0x70 +#define CMD_CLEAR_FLAG_STATUS 0x50 + +/* Used for Macronix and Winbond flashes */ +#define CMD_ENTER_4B_ADDR 0xB7 +#define CMD_EXIT_4B_ADDR 0xE9 /* Read commands */ #define CMD_READ_ARRAY_SLOW 0x03 @@ -59,6 +64,8 @@ #define STATUS_QEB_WINSPAN (1 << 1) #define STATUS_QEB_MXIC (1 << 6) #define STATUS_PEC (1 << 7) +#define STATUS_PROT (1 << 1) +#define STATUS_ERASE (1 << 5) #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN #define STATUS_SRWD (1 << 7) /* SR write protect */ @@ -124,6 +131,12 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0); } +/* Clear flag status register */ +static inline int spi_flash_cmd_clear_flag_status(struct spi_flash *flash) +{ + return spi_flash_cmd(flash->spi, CMD_CLEAR_FLAG_STATUS, NULL, 0); +} + /* * Send the read status command to the device and wait for the wip * (write-in-progress) bit to clear itself. @@ -160,4 +173,8 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, size_t len, void *data); +#if defined(CONFIG_SPI_FLASH_STMICRO) +int spi_flash_cmd_4B_addr_switch(struct spi_flash *flash, int enable); +#endif + #endif /* _SF_INTERNAL_H_ */ diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 85cf22d..8a532b8 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -93,6 +93,30 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc) } #endif +#if defined(CONFIG_SPI_FLASH_STMICRO) +int spi_flash_cmd_4B_addr_switch(struct spi_flash *flash, int enable) +{ + int ret; + u8 cmd; + + cmd = enable ? CMD_ENTER_4B_ADDR : CMD_EXIT_4B_ADDR; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: unable to claim SPI bus\n"); + return ret; + } + + ret = spi_flash_cmd_write_enable(flash); + if (ret < 0) { + debug("SF: enabling write failed\n"); + return ret; + } + + return spi_flash_cmd(flash->spi, cmd, NULL, 0); +} +#endif + #ifdef CONFIG_SPI_FLASH_BAR static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) { @@ -160,6 +184,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) unsigned long timebase; unsigned long flags = SPI_XFER_BEGIN; int ret; + int out_of_time = 1; u8 status; u8 check_status = 0x0; u8 poll_bit = STATUS_WIP; @@ -186,22 +211,45 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) WATCHDOG_RESET(); ret = spi_xfer(spi, 8, NULL, &status, 0); - if (ret) + if (ret) { + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); return -1; + } - if ((status & poll_bit) == check_status) + if ((status & poll_bit) == check_status) { + out_of_time = 0; break; + } } while (get_timer(timebase) < timeout); spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); - if ((status & poll_bit) == check_status) - return 0; + if (out_of_time) { + /* Timed out */ + debug("SF: time out!\n"); + if (cmd == CMD_FLAG_STATUS) { + if (spi_flash_cmd_clear_flag_status(flash) < 0) + debug("SF: clear flag status failed\n"); + } + ret = -1; + } +#ifdef CONFIG_SPI_FLASH_STMICRO + else if (cmd == CMD_FLAG_STATUS) { + if (!(status & (STATUS_PROT | STATUS_ERASE))) { + ret = 0; + } else { + debug("SF: flag status error"); + ret = -1; + } - /* Timed out */ - debug("SF: time out!\n"); - return -1; + if (spi_flash_cmd_clear_flag_status(flash) < 0) { + debug("SF: clear flag status failed\n"); + ret = -1; + } + } +#endif + return ret; } int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, @@ -234,7 +282,7 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, ret = spi_flash_cmd_wait_ready(flash, timeout); if (ret < 0) { - debug("SF: write %s timed out\n", + debug("SF: write %s failed\n", timeout == SPI_FLASH_PROG_TIMEOUT ? "program" : "page erase"); return ret; diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4d148d1..79b876d 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -221,6 +221,11 @@ static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, #ifdef CONFIG_SPI_FLASH_STMICRO if (params->flags & E_FSR) flash->poll_cmd = CMD_FLAG_STATUS; + + if (flash->size > SPI_FLASH_16MB_BOUN) { + if (spi_flash_cmd_4B_addr_switch(flash, 0) < 0) + debug("SF: enter 3B address mode failed\n"); + } #endif /* Configure the BAR - discover bank cmds and read current bank */ -- 2.1.0.27.g96db324

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[U-Boot] Recommended SH toolchain
by Vasili Galka 08 May '15

08 May '15

Hi Nobuhiro, I'm trying to verify the correct build of all SH boards in U-Boot. What is the recommended toolchain to use? I tried the one from kernel.org [1], but it does not work for all the boards, I get build errors like this one: Building rsk7203 board... sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration make[3]: *** [include/autoconf.mk] Error 1 make[3]: *** [include/autoconf.mk.dep] Error 1 make[2]: *** [silentoldconfig] Error 1 make: *** [sub-make] Error 2 sh4-linux-size: '/home/lab/dev/u-boot/out/all_sh/u-boot': No such file sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration make[3]: *** [include/autoconf.mk] Error 1 make[3]: *** Waiting for unfinished jobs.... make[3]: *** [include/autoconf.mk.dep] Error 1 'make -f /home/lab/dev/u-boot/scripts/Makefile.autoconf obj=include include/autoconf.mk include/autoconf.mk.dep' Failed make[2]: *** [silentoldconfig] Error 1 make[1]: *** No rule to make target `include/config/auto.conf', needed by `include/config/uboot.release'. Stop. make: *** [sub-make] Error 2 I'll appreciate your help. [1] https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/ Regards, Vasili

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[U-Boot] [UBOOT PATCH] ci_udc: Update the ci_udc driver to support bulk transfers
by Siva Durga Prasad Paladugu 29 Apr '15

29 Apr '15

Update the ci_udc driver to support bulk transfer and also added capability of having multiple dtds if requested data is more thank 16K. These changes are tested for both the DFU and lthor. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- drivers/usb/gadget/ci_udc.c | 135 +++++++++++++++++++++++++++++++++++++------ drivers/usb/gadget/ci_udc.h | 1 + 2 files changed, 117 insertions(+), 19 deletions(-) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 2572b34..d1d19dc 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -50,6 +50,8 @@ /* For each endpoint, we need 2 QTDs, one for each of IN and OUT */ #define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ) +#define EP_MAX_LENGTH_TRANSFER 0x4000 + #ifndef DEBUG #define DBG(x...) do {} while (0) #else @@ -102,13 +104,28 @@ static struct usb_ep_ops ci_ep_ops = { }; /* Init values for USB endpoints. */ -static const struct usb_ep ci_ep_init[2] = { +static const struct usb_ep ci_ep_init[5] = { [0] = { /* EP 0 */ .maxpacket = 64, .name = "ep0", .ops = &ci_ep_ops, }, - [1] = { /* EP 1..n */ + [1] = { + .maxpacket = 512, + .name = "ep1in-bulk", + .ops = &ci_ep_ops, + }, + [2] = { + .maxpacket = 512, + .name = "ep2out-bulk", + .ops = &ci_ep_ops, + }, + [3] = { + .maxpacket = 512, + .name = "ep3in-int", + .ops = &ci_ep_ops, + }, + [4] = { .maxpacket = 512, .name = "ep-", .ops = &ci_ep_ops, @@ -197,6 +214,19 @@ static void ci_flush_qtd(int ep_num) } /** + * ci_flush_td - flush cache over queue item + * @td: td pointer + * + * This function flushes cache for particular transfer descriptor. + */ +static void ci_flush_td(struct ept_queue_item *td) +{ + const uint32_t start = (uint32_t)td; + const uint32_t end = (uint32_t) td + ILIST_ENT_SZ; + flush_dcache_range(start, end); +} + +/** * ci_invalidate_qtd - invalidate cache over queue item * @ep_num: Endpoint number * @@ -211,6 +241,19 @@ static void ci_invalidate_qtd(int ep_num) invalidate_dcache_range(start, end); } +/** + * ci_invalidate_td - invalidate cache over queue item + * @td: td pointer + * + * This function invalidates cache for particular transfer descriptor. + */ +static void ci_invalidate_td(struct ept_queue_item *td) +{ + const uint32_t start = (uint32_t)td; + const uint32_t end = start + ILIST_ENT_SZ; + invalidate_dcache_range(start, end); +} + static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) { @@ -376,6 +419,9 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) struct ept_queue_head *head; int bit, num, len, in; struct ci_req *ci_req; + u8 *buf; + uint32_t length, actlen; + struct ept_queue_item *dtd, *qtd; ci_ep->req_primed = true; @@ -387,16 +433,41 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); len = ci_req->req.length; - item->info = INFO_BYTES(len) | INFO_ACTIVE; - item->page0 = (uint32_t)ci_req->hw_buf; - item->page1 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x1000; - item->page2 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x2000; - item->page3 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x3000; - item->page4 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x4000; - head->next = (unsigned) item; head->info = 0; + ci_req->dtd_count = 0; + buf = ci_req->hw_buf; + actlen = 0; + dtd = item; + + do { + length = min(ci_req->req.length - actlen, + (unsigned)EP_MAX_LENGTH_TRANSFER); + + dtd->info = INFO_BYTES(length) | INFO_ACTIVE; + dtd->page0 = (uint32_t)buf; + dtd->page1 = ((uint32_t)buf & 0xfffff000) + 0x1000; + dtd->page2 = ((uint32_t)buf & 0xfffff000) + 0x2000; + dtd->page3 = ((uint32_t)buf & 0xfffff000) + 0x3000; + dtd->page4 = ((uint32_t)buf & 0xfffff000) + 0x4000; + + len -= length; + actlen += length; + buf += length; + + if (len) { + qtd = (struct ept_queue_item *) + memalign(ILIST_ALIGN, ILIST_ENT_SZ); + dtd->next = (uint32_t)qtd; + dtd = qtd; + memset(dtd, 0, ILIST_ENT_SZ); + } + + ci_req->dtd_count++; + } while (len); + + item = dtd; /* * When sending the data for an IN transaction, the attached host * knows that all data for the IN is sent when one of the following @@ -432,6 +503,12 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_flush_qtd(num); + item = (struct ept_queue_item *)head->next; + while (item->next != TERMINATE) { + ci_flush_td((struct ept_queue_item *)item->next); + item = (struct ept_queue_item *)item->next; + } + DBG("ept%d %s queue len %x, req %p, buffer %p\n", num, in ? "in" : "out", len, ci_req, ci_req->hw_buf); ci_flush_qh(num); @@ -497,21 +574,31 @@ static void flip_ep0_direction(void) static void handle_ep_complete(struct ci_ep *ci_ep) { - struct ept_queue_item *item; - int num, in, len; + struct ept_queue_item *item, *next_td; + int num, in, len, j; struct ci_req *ci_req; num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; item = ci_get_qtd(num, in); ci_invalidate_qtd(num); + ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); - len = (item->info >> 16) & 0x7fff; - if (item->info & 0xff) - printf("EP%d/%s FAIL info=%x pg0=%x\n", - num, in ? "in" : "out", item->info, item->page0); + next_td = item; + len = 0; + for (j = 0; j < ci_req->dtd_count; j++) { + ci_invalidate_td(next_td); + item = next_td; + len += (item->info >> 16) & 0x7fff; + if (item->info & 0xff) + printf("EP%d/%s FAIL info=%x pg0=%x\n", + num, in ? "in" : "out", item->info, item->page0); + if (j != ci_req->dtd_count - 1) + next_td = (struct ept_queue_item *)item->next; + if (j != 0) + free(item); + } - ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); list_del_init(&ci_req->queue); ci_ep->req_primed = false; @@ -847,9 +934,19 @@ static int ci_udc_probe(void) controller.gadget.ep0 = &controller.ep[0].ep; INIT_LIST_HEAD(&controller.gadget.ep0->ep_list); - /* Init EP 1..n */ - for (i = 1; i < NUM_ENDPOINTS; i++) { - memcpy(&controller.ep[i].ep, &ci_ep_init[1], + /* Init EP 1..3 */ + for (i = 1; i < 4; i++) { + memcpy(&controller.ep[i].ep, &ci_ep_init[i], + sizeof(*ci_ep_init)); + INIT_LIST_HEAD(&controller.ep[i].queue); + controller.ep[i].req_primed = false; + list_add_tail(&controller.ep[i].ep.ep_list, + &controller.gadget.ep_list); + } + + /* Init EP 4..n */ + for (i = 4; i < NUM_ENDPOINTS; i++) { + memcpy(&controller.ep[i].ep, &ci_ep_init[4], sizeof(*ci_ep_init)); INIT_LIST_HEAD(&controller.ep[i].queue); controller.ep[i].req_primed = false; diff --git a/drivers/usb/gadget/ci_udc.h b/drivers/usb/gadget/ci_udc.h index 346164a..95cc079 100644 --- a/drivers/usb/gadget/ci_udc.h +++ b/drivers/usb/gadget/ci_udc.h @@ -86,6 +86,7 @@ struct ci_req { /* Buffer for the current transfer. Either req.buf/len or b_buf/len */ uint8_t *hw_buf; uint32_t hw_len; + uint32_t dtd_count; }; struct ci_ep { -- 1.7.4

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[U-Boot] fatload from eMMC general purpose partition
by Andreas Naumann 24 Apr '15

24 Apr '15

Hi, using an eMMC I want to load uImage and dtb from a general purpose partition (since these can be configured as pSLC independent of the user data area). From the kernel I can format and access the GP-partition, in my case mkfs.vfat. However, U-Boots fatload/extload on the GP-partition do not work or maybe I just give the wrong parameters. Is this implemented at all, any hints? Regards Andreas

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[U-Boot] [PATCH 00/19] [RFC] Power(full) framework based on Driver Model
by Przemyslaw Marczak 24 Apr '15

24 Apr '15

Hello, This piece of code was a base for prepare my presentation talk for the U-Boot Mini Summit, which taking place at ELCE2014 conference, 13-th October 2014 Dusseldorf, Germany. The tittle of talk: "Power(full) framework based on Driver Model" The presentation will be shared after the Summit. This patchset introduces the new one PMIC framework for the U-Boot. It is still under the construction, but the basic functionality was achieved and tested. Please feel free to comment and share the opinion. I think that each patch is described full enough, but for some more design details, please look into the documentation file. It includes some basic examples for the PMIC drivers. Quick summary of: Framework: - The new approach - UCLASS_PMIC - simple and designed for device I/O only - Add new uclass types: UCLASS_PMIC and UCLASS_PMIC_REGULATOR - Two uclass drivers for above types - A common regulator operations - will easy cover the real devices design Drivers: - Introduce new PMIC API for drivers - now everything base on "struct udevice" - Introduce Regulator Voltage descriptors and Operation Mode descriptors which are usually taken from the device tree (board dependent data) - Two uclass device drivers for MAX77686(PMIC+REGULATOR) User Interface: - command pmic, unchanged functionality and ported to the driver model - command regulator(NEW) for safe regulator setup from commandline, - now can check output Voltage and operation mode of the regulators, - also can check the board Voltage limits and driver available modes The future plans: - Wait for the I2c Driver Model implementation - Introduce a common way to bind pmic devices - now done by alias "pmic" - Add additional uclass types: MUIC, CHARGER, BATTERY, MFD and maybe more. - Introduce optimal operations for new uclasses - Port all U-Boot drivers to the new Framework - Remove the old drivers and the old PMIC Framework code The assumptions of this work is: - Add new code to independent files - Keep two Frameworks as independent and without conflicts - Don't mix OLD/NEW Framework code - for the readability - Port all drivers using new API - Remove the old Framework and the old drivers A disadvantage: - some parts of the present code is duplicated Need help: - After merge this, it is welcome to help with driver porting. - Everything should be tested The extra feature: The first commit introduces errno_str() function. It is a common function which I hope will be usefull for commands and not only. If any visible error says: -19 or some other magic number, then it means that this function should be used. U-Boot Mini Summit members: This code is maybe not as good as it could be, but the time was limited, and the conference is comming soon. I don't expects a code review of this now, but it would be nice if you take a look of this piece of code before our U-Boot Mini Summit. Of course it depends on you. Best Regards and see you in Dusseldorf! Przemyslaw Marczak Przemyslaw Marczak (19): lib: errno: introduce errno_str(): returns errno related message exynos: config-common: enable errno_str() function exynos: config-common: enable generic fs command dm: pmic: add implementation of driver model pmic uclass dm: pmic: add implementation of driver model regulator uclass dm: common: board_r: add call and weak of power_init_dm() dm: pmic: add max77686 pmic driver dm: regulator: add max77686 regulator driver dm: pmic: new commands: pmic and regulator dm: board:samsung: power_init_board: add requirement of CONFIG_DM_PMIC doc: driver-model: pmic and regulator uclass documentation samsung: board: lcd menu: check if any power framework is enabled samsung: misc: power_key_pressed: add support to dm pmic framework trats2: board: add support to dm pmic api trats2: dts: max77686: add pmic alias and names cleanup trats2: config: enable dm pmic, dm regulator api, dm max77686 odroid: board: add support to dm pmic api odroid: dts: add 'voltage-regulators' description to max77686 node odroid: config: enable dm pmic, dm regulator and max77686 driver Makefile | 1 + arch/arm/dts/exynos4412-odroid.dts | 250 +++++++++- arch/arm/dts/exynos4412-trats2.dts | 17 +- board/samsung/common/board.c | 5 +- board/samsung/common/misc.c | 21 +- board/samsung/odroid/odroid.c | 31 +- board/samsung/trats2/trats2.c | 208 ++------ common/board_r.c | 8 + doc/driver-model/dm-pmic-framework.txt | 450 ++++++++++++++++++ drivers/power/Makefile | 6 +- drivers/power/cmd_pmic.c | 845 +++++++++++++++++++++++++++++++++ drivers/power/pmic-uclass.c | 255 ++++++++++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/max77686.c | 89 ++++ drivers/power/pmic_i2c.c | 136 ++++++ drivers/power/pmic_spi.c | 137 ++++++ drivers/power/regulator-uclass.c | 250 ++++++++++ drivers/power/regulator/Makefile | 8 + drivers/power/regulator/max77686.c | 749 +++++++++++++++++++++++++++++ include/configs/exynos-common.h | 3 + include/configs/odroid.h | 8 +- include/configs/trats2.h | 14 +- include/dm/uclass-id.h | 4 + include/errno.h | 3 + include/power/max77686_pmic.h | 28 +- include/power/pmic.h | 82 ++++ include/power/regulator.h | 267 +++++++++++ lib/Makefile | 1 + lib/errno_str.c | 147 ++++++ 29 files changed, 3823 insertions(+), 201 deletions(-) create mode 100644 doc/driver-model/dm-pmic-framework.txt create mode 100644 drivers/power/cmd_pmic.c create mode 100644 drivers/power/pmic-uclass.c create mode 100644 drivers/power/pmic/max77686.c create mode 100644 drivers/power/pmic_i2c.c create mode 100644 drivers/power/pmic_spi.c create mode 100644 drivers/power/regulator-uclass.c create mode 100644 drivers/power/regulator/Makefile create mode 100644 drivers/power/regulator/max77686.c create mode 100644 include/power/regulator.h create mode 100644 lib/errno_str.c -- 1.9.1

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