January 2014 - U-Boot

[U-Boot] [PATCH v5 15/30] zynq: zc70x: Add Catalyst 24WC08 EEPROM config support
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- include/configs/zynq-common.h | 10 ++++++++++ include/configs/zynq_zc70x.h | 1 + 2 files changed, 11 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e5b1e1d..cf96333 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -97,6 +97,16 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 #endif +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ +#endif + #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 6950d41..0a7fa97 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -20,6 +20,7 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD #include <configs/zynq-common.h> -- 1.8.3

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[U-Boot] [PATCH v5 14/30] zynq-common: Define exact TEXT_BASE
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

Defined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bb9e337..e5b1e1d 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -121,7 +121,7 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x4000000 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -- 1.8.3

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[U-Boot] [PATCH v5 13/30] zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- include/configs/zynq-common.h | 1 - include/configs/zynq_zc70x.h | 2 ++ include/configs/zynq_zed.h | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bce1094..bb9e337 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -125,7 +125,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 9910804..6950d41 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZC70X_H #define __CONFIG_ZYNQ_ZC70X_H +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 278db1e..31926df 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZED_H #define __CONFIG_ZYNQ_ZED_H +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 -- 1.8.3

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[U-Boot] [PATCH v5 12/30] zynq: Add zynq zed board support
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- boards.cfg | 1 + include/configs/zynq_zed.h | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 include/configs/zynq_zed.h diff --git a/boards.cfg b/boards.cfg index cc536c3..c38ceb1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -359,6 +359,7 @@ Active arm armv7 u8500 st-ericsson snowball Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <b18965(a)freescale.com> Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <monstr(a)monstr.eu>:Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <monstr(a)monstr.eu>:Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <twarren(a)nvidia.com> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel <alban.bedel(a)avionic-design.de> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel <alban.bedel(a)avionic-design.de> diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h new file mode 100644 index 0000000..278db1e --- /dev/null +++ b/include/configs/zynq_zed.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Zynq Evaluation and Development Board - ZedBoard + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZED_H +#define __CONFIG_ZYNQ_ZED_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZED_H */ -- 1.8.3

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[U-Boot] [PATCH v5 11/30] zynq: Add zynq zc70x board support
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- boards.cfg | 1 + include/configs/zynq-common.h | 9 --------- include/configs/zynq_zc70x.h | 25 +++++++++++++++++++++++++ 3 files changed, 26 insertions(+), 9 deletions(-) create mode 100644 include/configs/zynq_zc70x.h diff --git a/boards.cfg b/boards.cfg index 09c2e1d..cc536c3 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier(a)linaro.org> Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <b18965(a)freescale.com> +Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <monstr(a)monstr.eu>:Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <twarren(a)nvidia.com> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel <alban.bedel(a)avionic-design.de> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel <alban.bedel(a)avionic-design.de> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 9fe06e8..bce1094 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -36,7 +36,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL_UART1 #ifdef CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 # define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE @@ -60,8 +59,6 @@ #endif /* Ethernet driver */ -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) # define CONFIG_NET_MULTI # define CONFIG_ZYNQ_GEM @@ -71,7 +68,6 @@ # define CONFIG_PHY_MARVELL #endif -#define CONFIG_ZYNQ_SPI /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH @@ -79,10 +75,6 @@ # define CONFIG_CMD_SF #endif -/* NOR */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC @@ -96,7 +88,6 @@ # define CONFIG_DOS_PARTITION #endif -#define CONFIG_ZYNQ_I2C0 /* I2C */ #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) # define CONFIG_CMD_I2C diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h new file mode 100644 index 0000000..9910804 --- /dev/null +++ b/include/configs/zynq_zc70x.h @@ -0,0 +1,25 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC70X_H +#define __CONFIG_ZYNQ_ZC70X_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZC70X_H */ -- 1.8.3

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[U-Boot] [PATCH v5 10/30] doc: zynq: Add information on zynq u-boot
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

Information on zynq u-boot about - zynq boards - mainline status - TODO Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- doc/README.zynq | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 doc/README.zynq diff --git a/doc/README.zynq b/doc/README.zynq new file mode 100644 index 0000000..56a74b4 --- /dev/null +++ b/doc/README.zynq @@ -0,0 +1,60 @@ +# +# Xilinx ZYNQ U-Boot +# +# (C) Copyright 2013 Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +1. About this + +This document describes the information about Xilinx Zynq U-Boot - +like supported boards, ML status and TODO list. + +2. Zynq boards + +Xilinx Zynq-7000 All Programmable SoCs enable extensive system level +differentiation, integration, and flexibility through hardware, software, +and I/O programmability. + +* zc70x + - zc702 (single qspi, gem0, mmc) [1] + - zc706 (dual parallel qspi, gem0, mmc) [2] +* zed (single qspi, gem0, mmc) [3] +* microzed (single qspi, gem0, mmc) [4] +* zc770 + - zc770-xm010 (single qspi, gem0, mmc) + - zc770-xm011 (8 or 16 bit nand) + - zc770-xm012 (nor) + - zc770-xm013 (dual parallel qspi, gem1) + +3. Mainline status + +- Added basic board configurations support. +- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq +- Added zynq boards named - zynq, zynq_dcc +- Added zynq drivers: + serial - drivers/serial/serial_zynq.c + net - drivers/net/zynq_gem.c + mmc - drivers/mmc/zynq_sdhci.c + mmc - drivers/mmc/zynq_sdhci.c + spi- drivers/spi/zynq_spi.c + i2c - drivers/i2c/zynq_i2c.c + +4. TODO + +- Add zynq boards support - zc70x, zed, microzed, zc770 +- Add zynq qspi controller driver +- Add zynq nand controller driver +- d-cache support for zynq_gem.c +- FDT support for zynq boards +- Need proper cleanups on board configurations + +[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm +[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm +[3] http://zedboard.org/product/zedboard +[4] http://zedboard.org/product/microzed + +-- +Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> +Sun Dec 15 14:52:41 IST 2013 -- 1.8.3

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[U-Boot] [PATCH v5 09/30] zynq-common: Rename zynq with zynq-common
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

zynq.h -> zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- boards.cfg | 2 -- include/configs/{zynq.h => zynq-common.h} | 9 ++++++--- 2 files changed, 6 insertions(+), 5 deletions(-) rename include/configs/{zynq.h => zynq-common.h} (95%) diff --git a/boards.cfg b/boards.cfg index 01ff5b5..09c2e1d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,8 +358,6 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier(a)linaro.org> Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <b18965(a)freescale.com> -Active arm armv7 zynq xilinx zynq zynq - Michal Simek <monstr(a)monstr.eu> -Active arm armv7 zynq xilinx zynq zynq_dcc zynq:ZYNQ_DCC Michal Simek <monstr(a)monstr.eu> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <twarren(a)nvidia.com> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel <alban.bedel(a)avionic-design.de> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel <alban.bedel(a)avionic-design.de> diff --git a/include/configs/zynq.h b/include/configs/zynq-common.h similarity index 95% rename from include/configs/zynq.h rename to include/configs/zynq-common.h index ea25159..9fe06e8 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq-common.h @@ -1,11 +1,14 @@ /* * (C) Copyright 2012 Michal Simek <monstr(a)monstr.eu> + * (C) Copyright 2013 Xilinx, Inc. + * + * Common configuration options for all Zynq boards. * * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_ZYNQ_H -#define __CONFIG_ZYNQ_H +#ifndef __CONFIG_ZYNQ_COMMON_H +#define __CONFIG_ZYNQ_COMMON_H /* High Level configuration Options */ #define CONFIG_ARMV7 @@ -170,4 +173,4 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -#endif /* __CONFIG_ZYNQ_H */ +#endif /* __CONFIG_ZYNQ_COMMON_H */ -- 1.8.3

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[U-Boot] [PATCH v5 08/30] zynq: Add GEM0, GEM1 configs support
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- include/configs/zynq.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index f104558..ea25159 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -57,10 +57,16 @@ #endif /* Ethernet driver */ -#define CONFIG_NET_MULTI -#define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif #define CONFIG_ZYNQ_SPI /* SPI */ @@ -103,12 +109,6 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -/* MII and Phylib */ -#define CONFIG_MII -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_PHYLIB -#define CONFIG_PHY_MARVELL - /* Environment */ #define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -- 1.8.3

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[U-Boot] [PATCH v5 07/30] zynq: Add UART0, UART1 configs support
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

Zynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- include/configs/zynq.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 6e545e5..f104558 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -33,10 +33,22 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL -#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000 -#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE -#define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#define CONFIG_ZYNQ_SERIAL_UART1 +#ifdef CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#endif + +#ifdef CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 +#endif + +#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +#endif /* DCC driver */ #if defined(CONFIG_ZYNQ_DCC) -- 1.8.3

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[U-Boot] [PATCH v5 06/30] zynq: Enable cache options
by Jagannadha Sutradharudu Teki 08 Jan '14

08 Jan '14

- Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- include/configs/zynq.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index c8ab06f..6e545e5 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -16,6 +16,16 @@ # define CONFIG_CPU_FREQ_HZ 800000000 #endif +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif + /* Serial drivers */ #define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */ -- 1.8.3

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