April 2013 - U-Boot

[U-Boot] [PATCH] mmc: mx6qsabrelite: fsl_esdhc: Define maximum bus width supported by SabreLite board
by Abbas Raza 03 Apr '13

03 Apr '13

From: Abbas Raza <Abbas_Raza(a)mentor.com> Maximum bus width supported by SabreLite board is not 8bit like all other mx6q specific boards. In case where both host controller and card support 8bit transfers, they agree to communicate on 8bit interface while boards like the SabreLite support only 4bit interface. Due to this reason the mmc 8bit default mode fails on the SabreLite. To rectify this, define maximum bus width supported by this board (4bit). If max_bus_width is not defined, it is 0 by default and 8bit width support will be enabled in host capabilities otherwise host capabilities are modified accordingly. It is tested with a MMCplus card. Signed-off-by: Abbas Raza <Abbas_Raza(a)mentor.com> cc: stefano Babic <sbabic(a)denx.de> cc: Andy Fleming <afleming(a)gmail.com> Acked-by: Dirk Behme <dirk.behme(a)de.bosch.com> Acked-by: Andrew Gabbasov <andrew_gabbasov(a)mentor.com> --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 3 +++ drivers/mmc/fsl_esdhc.c | 7 +++++++ include/fsl_esdhc.h | 1 + 3 files changed, 11 insertions(+) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index d563464..14c299b 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -110,6 +110,9 @@ int board_mmc_init(bd_t *bis) usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 4; + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 3d5c9c0..d2a505e 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -579,6 +579,13 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC; + if (cfg->max_bus_width > 0) { + if (cfg->max_bus_width < 8) + mmc->host_caps &= ~MMC_MODE_8BIT; + if (cfg->max_bus_width < 4) + mmc->host_caps &= ~MMC_MODE_4BIT; + } + if (caps & ESDHC_HOSTCAPBLT_HSS) mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 47d2fe4..0a1a071 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -168,6 +168,7 @@ struct fsl_esdhc_cfg { u32 esdhc_base; u32 sdhc_clk; + u8 max_bus_width; }; /* Select the correct accessors depending on endianess */ -- 1.8.2

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[U-Boot] [PATCH 1/3] wandboard: Remove duplicate 'mmc dev'
by Fabio Estevam 03 Apr '13

03 Apr '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> No need to call 'mmc dev' twice. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- include/configs/wandboard.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index c4fb704..00c656e 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -150,7 +150,6 @@ "fi;\0" #define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ -- 1.7.9.5

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[U-Boot] [PATCH v2] mx6: Fix get_board_rev() for the mx6 solo case
by Fabio Estevam 03 Apr '13

03 Apr '13

When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev() returns 0x62xxx, which is not a value understood by the VPU (Video Processing Unit) library in the kernel and causes the video playback to fail. The expected values for get_board_rev are: 0x63xxx: For mx6quad/dual 0x61xxx: For mx6dual-lite/solo So adjust get_board_rev() accordingly and make it as weak function, so that we do not need to define it in every mx6 board file. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Avoid extra call to get_cpu_rev() arch/arm/cpu/armv7/mx6/soc.c | 12 ++++++++++++ board/boundary/nitrogen6x/nitrogen6x.c | 5 ----- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 5 ----- board/freescale/mx6qsabresd/mx6qsabresd.c | 5 ----- board/wandboard/wandboard.c | 5 ----- 5 files changed, 12 insertions(+), 20 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 193ba12..4f3cd14 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -61,6 +61,18 @@ u32 get_cpu_rev(void) return (type << 12) | (reg + 0x10); } +#ifdef CONFIG_REVISION_TAG +u32 __weak get_board_rev(void) +{ + u32 cpurev = get_cpu_rev(); + u32 type = ((cpurev >> 12) & 0xff); + if (type == MXC_CPU_MX6SOLO) + cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF); + + return cpurev; +} +#endif + void init_aips(void) { struct aipstz_regs *aips1, *aips2; diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 229c237..1b1bedf 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -328,11 +328,6 @@ int board_mmc_init(bd_t *bis) } #endif -u32 get_board_rev(void) -{ - return 0x63000; -} - #ifdef CONFIG_MXC_SPI iomux_v3_cfg_t const ecspi1_pads[] = { /* SS1 */ diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 5b69a6d..782e5ba 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -298,11 +298,6 @@ int board_mmc_init(bd_t *bis) } #endif -u32 get_board_rev(void) -{ - return 0x63000 ; -} - #ifdef CONFIG_MXC_SPI iomux_v3_cfg_t const ecspi1_pads[] = { /* SS1 */ diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 2b3926a..806769f 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -239,11 +239,6 @@ int board_eth_init(bd_t *bis) return 0; } -u32 get_board_rev(void) -{ - return 0x63000; -} - int board_early_init_f(void) { setup_iomux_uart(); diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index d95189f..1e379fb 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -168,11 +168,6 @@ int board_init(void) return 0; } -u32 get_board_rev(void) -{ - return get_cpu_rev(); -} - int checkboard(void) { puts("Board: Wandboard\n"); -- 1.7.9.5

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[U-Boot] [PATCH] mx23_olinuxino: Change definitions to use spaces instead of tabs
by Otavio Salvador 03 Apr '13

03 Apr '13

Change all "#define/ifdef<TAB>" sequences into "#define/ifdef<SPACE>". Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- include/configs/mx23_olinuxino.h | 160 +++++++++++++++++++-------------------- 1 file changed, 80 insertions(+), 80 deletions(-) diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 03893d7..2ace10d 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -24,57 +24,57 @@ /* * SoC configurations */ -#define CONFIG_MX23 /* i.MX23 SoC */ -#define CONFIG_MXS_GPIO /* GPIO control */ -#define CONFIG_SYS_HZ 1000 /* Ticks per second */ +#define CONFIG_MX23 /* i.MX23 SoC */ +#define CONFIG_MXS_GPIO /* GPIO control */ +#define CONFIG_SYS_HZ 1000 /* Ticks per second */ -#define CONFIG_MACH_TYPE 4105 +#define CONFIG_MACH_TYPE 4105 #include <asm/arch/regs-base.h> -#define CONFIG_SYS_NO_FLASH -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_ARCH_MISC_INIT +#define CONFIG_SYS_NO_FLASH +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_ARCH_MISC_INIT /* * SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_NO_CPU_SUPPORT_CODE -#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL +#define CONFIG_SPL_NO_CPU_SUPPORT_CODE +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT /* * U-Boot Commands */ #include <config_cmd_default.h> -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DOS_PARTITION +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_GPIO -#define CONFIG_CMD_LED -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NET -#define CONFIG_CMD_USB +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_LED +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NET +#define CONFIG_CMD_USB /* * Memory configurations */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x40000000 /* Base address */ -#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ -#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ -#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ -#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ +#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ +#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ +#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Point initial SP in SRAM so SPL can use it too. */ #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 @@ -89,49 +89,49 @@ * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot * binary. In case there was more of this mess, 0x100 bytes are skipped. */ -#define CONFIG_SYS_TEXT_BASE 0x40000100 +#define CONFIG_SYS_TEXT_BASE 0x40000100 /* * U-Boot general configurations */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "=> " -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ -#define CONFIG_SYS_PBSIZE \ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ -#define CONFIG_AUTO_COMPLETE /* Command auto complete */ -#define CONFIG_CMDLINE_EDITING /* Command history etc */ -#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ +#define CONFIG_AUTO_COMPLETE /* Command auto complete */ +#define CONFIG_CMDLINE_EDITING /* Command history etc */ +#define CONFIG_SYS_HUSH_PARSER /* * Serial Driver */ -#define CONFIG_PL011_SERIAL -#define CONFIG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ /* * Status LED */ -#define CONFIG_STATUS_LED -#define CONFIG_GPIO_LED -#define CONFIG_BOARD_SPECIFIC_LED -#define STATUS_LED_BOOT 0 -#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1 -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) +#define CONFIG_STATUS_LED +#define CONFIG_GPIO_LED +#define CONFIG_BOARD_SPECIFIC_LED +#define STATUS_LED_BOOT 0 +#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1 +#define STATUS_LED_STATE STATUS_LED_ON +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* * MMC Driver */ -#ifdef CONFIG_CMD_MMC +#ifdef CONFIG_CMD_MMC #define CONFIG_MMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_GENERIC_MMC @@ -144,41 +144,41 @@ #define CONFIG_APBH_DMA /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MXS -#define CONFIG_EHCI_MXS_PORT0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_EHCI_IS_TDI -#define CONFIG_USB_STORAGE +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS +#define CONFIG_EHCI_MXS_PORT0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE #endif /* Ethernet */ -#ifdef CONFIG_CMD_NET -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX +#ifdef CONFIG_CMD_NET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX #endif /* * Boot Linux */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_LOADADDR 0x42000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_OF_LIBFDT +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT /* * Environment */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (256 * 1024) -#define CONFIG_ENV_SIZE (16 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OVERWRITE +#ifdef CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (256 * 1024) +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 #endif /* -- 1.8.1

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[U-Boot] [PATCH] mx25pdk: Enable imxdi RTC
by Benoît Thébaudeau 03 Apr '13

03 Apr '13

The mx25pdk board supports the i.MX25 DryIce RTC (imxdi), so enable it. This allows to compile-test the imxdi driver in the mainline tree. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau(a)advansee.com> --- include/configs/mx25pdk.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index c10e78b..4782f68 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -124,6 +124,10 @@ #define CONFIG_SYS_I2C_BASE IMX_I2C_BASE #define CONFIG_SYS_I2C_SPEED 100000 +/* RTC */ +#define CONFIG_RTC_IMXDI +#define CONFIG_CMD_DATE + /* Ethernet Configs */ #define CONFIG_CMD_PING -- 1.7.10.4

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[U-Boot] [PATCH] mx6qsabrelite: README: No need to pass 'u-boot.imx'
by Fabio Estevam 03 Apr '13

03 Apr '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> The u-boot.imx binary is generated by default, so no need to pass it in the 'make' line. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- board/freescale/mx6qsabrelite/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx6qsabrelite/README b/board/freescale/mx6qsabrelite/README index 6f2f534..7458ff3 100644 --- a/board/freescale/mx6qsabrelite/README +++ b/board/freescale/mx6qsabrelite/README @@ -63,7 +63,7 @@ https://wiki.linaro.org/Boards/MX6QSabreLite To build U-Boot for the SabreLite board: make mx6qsabrelite_config - make u-boot.imx + make To copy the resulting u-boot.imx to the SD card: -- 1.7.9.5

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[U-Boot] [PATCH] mx28evk: Introduce a new target for saving env vars to NAND
by Fabio Estevam 03 Apr '13

03 Apr '13

Introduce 'mx28evk_nand' target for saving environment variables into NAND. The mx28evk board does not come with a NAND flash populated from the factory. It comes with an empty slot (U23), which allows the insertion of a 48-pin TSOP flash device. Tested with a K9LBG08U0D. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- boards.cfg | 3 ++- doc/README.mx28evk | 18 ++++++++++++++++++ include/configs/mx28evk.h | 31 ++++++++++++++++++++++++++++++- 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/boards.cfg b/boards.cfg index 7a0b79d..a9a061b 100644 --- a/boards.cfg +++ b/boards.cfg @@ -195,7 +195,8 @@ mx23_olinuxino arm arm926ejs mx23_olinuxino olimex apx4devkit arm arm926ejs apx4devkit bluegiga mxs apx4devkit mx23evk arm arm926ejs mx23evk freescale mxs mx23evk m28evk arm arm926ejs m28evk denx mxs m28evk -mx28evk arm arm926ejs mx28evk freescale mxs mx28evk +mx28evk arm arm926ejs mx28evk freescale mxs mx28evk:ENV_IS_IN_MMC +mx28evk_nand arm arm926ejs mx28evk freescale mxs mx28evk:ENV_IS_IN_NAND sc_sps_1 arm arm926ejs sc_sps_1 schulercontrol mxs nhk8815 arm arm926ejs nhk8815 st nomadik nhk8815_onenand arm arm926ejs nhk8815 st nomadik nhk8815:BOOT_ONENAND diff --git a/doc/README.mx28evk b/doc/README.mx28evk index 2fc5069..d0c5ae8 100644 --- a/doc/README.mx28evk +++ b/doc/README.mx28evk @@ -23,6 +23,24 @@ To boot MX28EVK from an SD card, set the boot mode DIP switches as: * VDD 5V: To the left (off) * Hold Button: Down (off) + +Environment Storage +------------------- + +There are two targets for mx28evk: + +"make mx28evk_config" - store enviroment variables into MMC + +or + +"make mx28evk_nand_config" - store enviroment variables into NAND flash + +Choose the target accordingly. + +Note: The mx28evk board does not come with a NAND flash populated from the +factory. It comes with an empty slot (U23), which allows the insertion of a +48-pin TSOP flash device. + Follow the instructions from doc/README.mx28_common to generate a bootable SD card. diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 0d918a1..9cc236f 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -69,6 +69,7 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_I2C +#define CONFIG_CMD_NAND /* * Memory configurations @@ -132,7 +133,6 @@ /* * MMC Driver */ -#define CONFIG_ENV_IS_IN_MMC #ifdef CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET (256 * 1024) #define CONFIG_ENV_SIZE (16 * 1024) @@ -149,11 +149,40 @@ /* * NAND Driver */ +#define CONFIG_ENV_SIZE (16 * 1024) #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_MXS #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x60000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE + +/* Environment is in NAND */ +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_RANGE (512 * 1024) +#ifndef CONFIG_ENV_OFFSET +#define CONFIG_ENV_OFFSET 0x300000 +#endif +#define CONFIG_ENV_OFFSET_REDUND \ + (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) + +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define MTDIDS_DEFAULT "nand0=gpmi-nand" +#define MTDPARTS_DEFAULT \ + "mtdparts=gpmi-nand:" \ + "3m(bootloader)ro," \ + "512k(environment)," \ + "512k(redundant-environment)," \ + "4m(kernel)," \ + "128k(fdt)," \ + "8m(ramdisk)," \ + "-(filesystem)" #endif /* -- 1.7.9.5

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[U-Boot] [PATCH v5 0/3] i.MX6 SabreSD and SabreAUTO bmode support
by Otavio Salvador 03 Apr '13

03 Apr '13

This adds the bmode support for i.MX6 SabreSD and SabreAUTO boards. This allows user to choose the boot mode at runtime making it easy to boot from USB or other media. This patchset has been tested in SabreSD but only build tested in SabreAUTO as I don't have the board for testing. Changes in v5: - Improve comment in code for easier understanding (Fabio) - Fix build failure in SabreAUTO - Move include of boot_mode.h header to this patch Changes in v4: - Fix switch code to proper break (Stefano) Changes in v3: - Drop change in bootdelay; the change where done by me while testing it and I mistakenly included it. Changes in v2: - Improve commit log - Rework code to use a 'ret' variable (Fabio) Otavio Salvador (3): mx6qsabresd: Document the mapping of USDHC[2-4] mx6qsabresd: Fix card detection for invalid card id case mx6qsabre{sd,auto}: Add boot mode select board/freescale/mx6qsabreauto/mx6qsabreauto.c | 18 +++++++++++ board/freescale/mx6qsabresd/mx6qsabresd.c | 43 ++++++++++++++++++++++++--- include/configs/mx6qsabre_common.h | 2 ++ 3 files changed, 59 insertions(+), 4 deletions(-) -- 1.8.1

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[U-Boot] [PATCH] Makefile: fix clobber target
by Andreas Bießmann 03 Apr '13

03 Apr '13

Remove the $(CONFIG_SPL_TARGET) from ALL-y if not set. This prevents following warning: ---8<--- abiessmann@punisher % ./MAKEALL -a arm -s omap3 rm: cannot remove `/tmp/build_test/eco5pk/': Is a directory make: *** [clobber] Error 1 rm: cannot remove `/tmp/build_test/omap3_overo/': Is a directory make: *** [clobber] Error 1 --->8--- Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile b/Makefile index d60a14b..5302c0a 100644 --- a/Makefile +++ b/Makefile @@ -406,7 +406,9 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin +ifneq ($(CONFIG_SPL_TARGET),) ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET)) +endif ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin # enable combined SPL/u-boot/dtb rules for tegra -- 1.7.10.4

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Re: [U-Boot] [PATCH v7] mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support
by Jagannadha Sutradharudu Teki 03 Apr '13

03 Apr '13

Hi, Any update on this. Thanks, Jagan. > -----Original Message----- > From: Jagannadha Sutradharudu Teki [mailto:jagannadha.sutradharudu- > teki(a)xilinx.com] > Sent: 03 March 2013 16:45 > To: u-boot(a)lists.denx.de > Cc: Stefan Roese; Aaron Williams; Luka Perkov; monstr(a)monstr.eu; > Jagannadha Sutradharudu Teki > Subject: [PATCH v7] mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support > > From: aaron.williams(a)caviumnetworks.com > > This commit is based on that patch from > aaron.williams(a)caviumnetworks.com with same commit title. pulled the > same code changes into current u-boot tree. > > http://patchwork.ozlabs.org/patch/140863/ > http://lists.denx.de/pipermail/u-boot/2011-April/089606.html > > This patch corrects the addresses used when working with Spansion/AMD > FLASH chips. > Addressing for 8 and 16 bits is almost identical except in the 16-bit case the > LSB of the address is always 0. The confusion arose because the addresses in > the datasheet for 16-bit mode are word addresses but this code assumed it > was byte addresses. > > I have only been able to test this on our Octeon boards which use either an > 8-bit or 16-bit bus. I have not tested the case where there's an 8-bit part on > a 16-bit bus. > > This patch also adds some delays as suggested by Spansion. > > If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an 8- > bit bus is detected. > > Apart from the pulled changes, fixed few minor code cleanups and tested on > 256M29EW, 512M29EW flashes. > > Before this fix: > --------------- > Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors > AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF > Erase timeout: 4096 ms, write timeout: 2 ms > Buffer write timeout: 5 ms, buffer size: 1024 bytes > > After this fix: > -------------- > Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors > AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301 > Erase timeout: 4096 ms, write timeout: 2 ms > Buffer write timeout: 5 ms, buffer size: 1024 bytes > > Signed-off-by: Aaron Williams <aaron.williams(a)caviumnetworks.com> > Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> > Tested-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> > --- > Changes for v3: > - Fixed few minor code cleanups > Changes for v4: > - Updated the S-o-b for original authors Changes for v5: > - Collect all S-o-b together > Changes for v6: > - Preserving author details > Changes for v7: > - Remove Luka Perkov from T-b > > drivers/mtd/cfi_flash.c | 78 +++++++++++++++++++++++++++++++++----------- > --- > include/mtd/cfi_flash.h | 41 ++++++++++++------------ > 2 files changed, 76 insertions(+), 43 deletions(-) > > diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index > 60dbb78..6b9fc1a 100644 > --- a/drivers/mtd/cfi_flash.c > +++ b/drivers/mtd/cfi_flash.c > @@ -210,9 +210,11 @@ unsigned long flash_sector_size(flash_info_t *info, > flash_sect_t sect) static inline void * flash_map (flash_info_t * info, > flash_sect_t sect, uint offset) { > - unsigned int byte_offset = offset * info->portwidth; > + unsigned int byte_offset = offset * info->portwidth / info->chipwidth; > + unsigned int addr = (info->start[sect] + byte_offset); > + unsigned int mask = 0xffffffff << (info->portwidth - 1); > > - return (void *)(info->start[sect] + byte_offset); > + return (void *)(addr & mask); > } > > static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, @@ - > 398,6 +400,8 @@ void flash_write_cmd (flash_info_t * info, flash_sect_t > sect, #endif > flash_write64(cword.ll, addr); > break; > + default: > + printf("fwc: Unknown port width %d\n", info->portwidth); > } > > /* Ensure all the instructions are fully finished */ @@ -585,7 +589,6 > @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, > prompt, info->start[sector], > flash_read_long (info, sector, 0)); > flash_write_cmd (info, sector, 0, info->cmd_reset); > - udelay(1); > return ERR_TIMOUT; > } > udelay (1); /* also triggers watchdog */ > @@ -753,12 +756,8 @@ static void flash_add_byte (flash_info_t * info, > cfiword_t * cword, uchar c) static flash_sect_t find_sector (flash_info_t * > info, ulong addr) { > static flash_sect_t saved_sector; /* previously found sector */ > - static flash_info_t *saved_info; /* previously used flash bank */ > flash_sect_t sector = saved_sector; > > - if ((info != saved_info) || (sector >= info->sector_count)) > - sector = 0; > - > while ((info->start[sector] < addr) > && (sector < info->sector_count - 1)) > sector++; > @@ -770,7 +769,6 @@ static flash_sect_t find_sector (flash_info_t * info, > ulong addr) > sector--; > > saved_sector = sector; > - saved_info = info; > return sector; > } > > @@ -787,12 +785,15 @@ static int flash_write_cfiword (flash_info_t * info, > ulong dest, > /* Check if Flash is (sufficiently) erased */ > switch (info->portwidth) { > case FLASH_CFI_8BIT: > + debug("%s: 8-bit 0x%02x\n", __func__, cword.c); > flag = ((flash_read8(dstaddr) & cword.c) == cword.c); > break; > case FLASH_CFI_16BIT: > + debug("%s: 16-bit 0x%04x\n", __func__, cword.w); > flag = ((flash_read16(dstaddr) & cword.w) == cword.w); > break; > case FLASH_CFI_32BIT: > + debug("%s: 32-bit 0x%08lx\n", __func__, cword.l); > flag = ((flash_read32(dstaddr) & cword.l) == cword.l); > break; > case FLASH_CFI_64BIT: > @@ -1053,6 +1054,8 @@ int flash_erase (flash_info_t * info, int s_first, int > s_last) > flash_sect_t sect; > int st; > > + debug("%s: erasing sectors %d to %d\n", __func__, s_first, s_last); > + > if (info->flash_id != FLASH_MAN_CFI) { > puts ("Can't erase unknown flash type - aborted\n"); > return 1; > @@ -1162,6 +1165,9 @@ int flash_erase (flash_info_t * info, int s_first, int > s_last) > rcode = 1; > else if (flash_verbose) > putc ('.'); > + } else { > + debug("\nSector %d is protected.\n", > + info->protect[sect]); > } > } > > @@ -1857,7 +1863,7 @@ static void flash_read_cfi (flash_info_t *info, void > *buf, > unsigned int i; > > for (i = 0; i < len; i++) > - p[i] = flash_read_uchar(info, start + i); > + p[i] = flash_read_uchar(info, start + (i * 2)); > } > > static void __flash_cmd_reset(flash_info_t *info) @@ -1878,21 +1884,40 > @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) { > int cfi_offset; > > - /* Issue FLASH reset command */ > - flash_cmd_reset(info); > - > for (cfi_offset=0; > cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); > cfi_offset++) { > + /* Issue FLASH reset command */ > + flash_cmd_reset(info); > flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], > FLASH_CMD_CFI); > - if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') > - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') > - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) > { > + if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') && > + flash_isequal(info, 0, > + FLASH_OFFSET_CFI_RESP + 2, 'R') && > + flash_isequal(info, 0, > + FLASH_OFFSET_CFI_RESP + 4, 'Y')) { > flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, > sizeof(struct cfi_qry)); > +#ifdef CONFIG_SYS_FLASH_INTERFACE_WIDTH > + info->interface = > CONFIG_SYS_FLASH_INTERFACE_WIDTH; #else > info->interface = le16_to_cpu(qry->interface_desc); > - > + /* Some flash chips can support multiple bus widths. > + * In this case, override the interface width and > + * limit it to the port width. > + */ > + if ((info->interface == FLASH_CFI_X8X16) && > + (info->portwidth == FLASH_CFI_8BIT)) { > + debug("Overriding 16-bit interface" > + " width to 8-bit port > width.\n"); > + info->interface = FLASH_CFI_X8; > + } else if ((info->interface == FLASH_CFI_X16X32) && > + (info->portwidth == FLASH_CFI_16BIT)) { > + debug("Overriding 16-bit interface" > + " width to 16-bit port > width.\n"); > + info->interface = FLASH_CFI_X16; > + } > +#endif > info->cfi_offset = flash_offset_cfi[cfi_offset]; > debug ("device interface is %d\n", > info->interface); > @@ -1903,8 +1928,8 @@ static int __flash_detect_cfi (flash_info_t * info, > struct cfi_qry *qry) > info->chipwidth << CFI_FLASH_SHIFT_WIDTH); > > /* calculate command offsets as in the Linux driver > */ > - info->addr_unlock1 = 0x555; > - info->addr_unlock2 = 0x2aa; > + info->addr_unlock1 = 0xaaa; > + info->addr_unlock2 = 0x555; > > /* > * modify the unlock address if we are @@ -1938,8 > +1963,12 @@ static int flash_detect_cfi (flash_info_t * info, struct cfi_qry > *qry) > for (info->chipwidth = FLASH_CFI_BY8; > info->chipwidth <= info->portwidth; > info->chipwidth <<= 1) > - if (__flash_detect_cfi(info, qry)) > + if (__flash_detect_cfi(info, qry)) { > + debug("Found CFI flash, portwidth %d," > + " chipwidth %d\n", > + info->portwidth, info->chipwidth); > return 1; > + } > } > debug ("not found\n"); > return 0; > @@ -1958,7 +1987,7 @@ static void flash_fixup_amd(flash_info_t *info, > struct cfi_qry *qry) > /* CFI < 1.1, try to guess from device id */ > if ((info->device_id & 0x80) != 0) > cfi_reverse_geometry(qry); > - } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { > + } else if (flash_read_uchar(info, info->ext_addr + 0x1e) == 3) { > /* CFI >= 1.1, deduct from top/bottom flag */ > /* note: ext_addr is valid since cfi_version > 0 */ > cfi_reverse_geometry(qry); > @@ -2054,14 +2083,15 @@ ulong flash_get_size (phys_addr_t base, int > banknum) > > if (flash_detect_cfi (info, &qry)) { > info->vendor = le16_to_cpu(qry.p_id); > - info->ext_addr = le16_to_cpu(qry.p_adr); > + info->ext_addr = le16_to_cpu(qry.p_adr) * 2; > + debug("extended address is 0x%x\n", info->ext_addr); > num_erase_regions = qry.num_erase_regions; > > if (info->ext_addr) { > info->cfi_version = (ushort) flash_read_uchar (info, > - info->ext_addr + 3) << 8; > + info->ext_addr + 6) << 8; > info->cfi_version |= (ushort) flash_read_uchar (info, > - info->ext_addr + 4); > + info->ext_addr + 8); > } > > #ifdef DEBUG > @@ -2112,6 +2142,8 @@ ulong flash_get_size (phys_addr_t base, int > banknum) > debug ("device id is 0x%x\n", info->device_id); > debug ("device id2 is 0x%x\n", info->device_id2); > debug ("cfi version is 0x%04x\n", info->cfi_version); > + debug("port width: %d, chipwidth: %d, interface: %d\n", > + info->portwidth, info->chipwidth, info->interface); > > size_ratio = info->portwidth / info->chipwidth; > /* if the chip is x8/x16 reduce the ratio by half */ diff --git > a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 966b5e0..9bd76eb > 100644 > --- a/include/mtd/cfi_flash.h > +++ b/include/mtd/cfi_flash.h > @@ -78,29 +78,30 @@ > #define FLASH_CONTINUATION_CODE 0x7F > > #define FLASH_OFFSET_MANUFACTURER_ID 0x00 > -#define FLASH_OFFSET_DEVICE_ID 0x01 > -#define FLASH_OFFSET_DEVICE_ID2 0x0E > -#define FLASH_OFFSET_DEVICE_ID3 0x0F > -#define FLASH_OFFSET_CFI 0x55 > +#define FLASH_OFFSET_DEVICE_ID 0x02 > +#define FLASH_OFFSET_DEVICE_ID2 0x1C > +#define FLASH_OFFSET_DEVICE_ID3 0x1E > +#define FLASH_OFFSET_CFI 0xAA > + > #define FLASH_OFFSET_CFI_ALT 0x555 > -#define FLASH_OFFSET_CFI_RESP 0x10 > -#define FLASH_OFFSET_PRIMARY_VENDOR 0x13 > +#define FLASH_OFFSET_CFI_RESP 0x20 > +#define FLASH_OFFSET_PRIMARY_VENDOR 0x26 > /* extended query table primary address */ > -#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 > +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x2A > #define FLASH_OFFSET_WTOUT 0x1F > -#define FLASH_OFFSET_WBTOUT 0x20 > -#define FLASH_OFFSET_ETOUT 0x21 > -#define FLASH_OFFSET_CETOUT 0x22 > -#define FLASH_OFFSET_WMAX_TOUT 0x23 > -#define FLASH_OFFSET_WBMAX_TOUT 0x24 > -#define FLASH_OFFSET_EMAX_TOUT 0x25 > -#define FLASH_OFFSET_CEMAX_TOUT 0x26 > -#define FLASH_OFFSET_SIZE 0x27 > -#define FLASH_OFFSET_INTERFACE 0x28 > -#define FLASH_OFFSET_BUFFER_SIZE 0x2A > -#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C > -#define FLASH_OFFSET_ERASE_REGIONS 0x2D > -#define FLASH_OFFSET_PROTECT 0x02 > +#define FLASH_OFFSET_WBTOUT 0x40 > +#define FLASH_OFFSET_ETOUT 0x4A > +#define FLASH_OFFSET_CETOUT 0x44 > +#define FLASH_OFFSET_WMAX_TOUT 0x46 > +#define FLASH_OFFSET_WBMAX_TOUT 0x48 > +#define FLASH_OFFSET_EMAX_TOUT 0x4A > +#define FLASH_OFFSET_CEMAX_TOUT 0x4C > +#define FLASH_OFFSET_SIZE 0x4E > +#define FLASH_OFFSET_INTERFACE 0x50 > +#define FLASH_OFFSET_BUFFER_SIZE 0x54 > +#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x58 > +#define FLASH_OFFSET_ERASE_REGIONS 0x5A > +#define FLASH_OFFSET_PROTECT 0x04 > #define FLASH_OFFSET_USER_PROTECTION 0x85 > #define FLASH_OFFSET_INTEL_PROTECTION 0x81 > > -- > 1.7.4 > This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

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