December 2013 - U-Boot

[U-Boot] [PATCH] sf: Updated Makefile to group generic files
by Jagannadha Sutradharudu Teki 19 Dec '13

19 Dec '13

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Cc: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- drivers/mtd/spi/Makefile | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 26483a2..fd8f8a4 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -10,8 +10,15 @@ obj-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o endif -obj-$(CONFIG_CMD_SF) += sf.o -obj-$(CONFIG_SPI_FLASH) += sf_probe.o sf_ops.o +ifdef CONFIG_CMD_SF +obj-y += sf.o +endif + +ifdef CONFIG_SPI_FLASH +obj-y += sf_probe.o +obj-y += sf_ops.o +endif + obj-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o obj-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o -- 1.8.3

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[U-Boot] Pull request: nand flash
by Scott Wood 19 Dec '13

19 Dec '13

Note that as discussed at http://patchwork.ozlabs.org/patch/296730/ the "cosmetic" patch is fixing a significant readability regression -- the current indentation is misleading as to the code flow. The following changes since commit fd44194945714a478fab6407c04453caaef0bac9: Prepare v2014.01-rc2 (2013-12-16 13:07:05 -0500) are available in the git repository at: git://git.denx.de/u-boot-nand-flash.git for you to fetch changes up to 72bb956551ecd592bcf0e6468476f31db86d9361: powerpc/cms700: limit NAND data structure size (2013-12-17 22:06:05 -0600) ---------------------------------------------------------------- Nikita Kiryanov (3): mtd: nand: omap: fix HAM1_SW ecc using default value for ecc.size mtd: nand: omap: fix sw->hw->sw ecc switch mtd: nand: omap: fix ecc ops assignment when changing ecc Scott Wood (1): powerpc/cms700: limit NAND data structure size Stefan Roese (1): mtd: nand: omap_gpmc: cosmetic: Fix indentation Tom Rini (1): nand_util.c: Use '%zd' for length in nand_unlock debug print pekon gupta (1): mtd: nand: omap: fix ecc-layout for HAM1 ecc-scheme drivers/mtd/nand/nand_util.c | 2 +- drivers/mtd/nand/omap_gpmc.c | 108 ++++++++++++++++++++++++------------------- include/configs/CMS700.h | 3 ++ 3 files changed, 65 insertions(+), 48 deletions(-)

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[U-Boot] [PATCH v2] Makefile: fix broken pipe error for lcd4_lwmon5 board
by Masahiro Yamada 19 Dec '13

19 Dec '13

Before this commit, a broken pipe error sometimes happened when building lcd4_lwmon5 board with Buildman. This commit re-writes build rules of u-boot.spr and u-boot-img-spl-at-end.bin more simply without using a pipe. Besides fixing a broken pipe error, this commit gives us other advantages: - Do not generate intermidiate files, spl/u-boot-spl.img and spl/u-boot-spl-pad.img for creating u-boot.spr - Do not generate an intermidiate file, u-boot-pad.img for creating u-boot-img-spl-at-end.bin Such intermidiate files were not deleted by "make clean" or "make mrpropr". Nor u-boot-pad.img was ignored by git. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> Acked-by: Stefan Roese <sr(a)denx.de> --- Hello Simon. I noticed a broken pipe error when I was using Buildman. The error happens here: $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ of=$(obj)u-boot-pad.img 2>/dev/null I cannot understand why this error happens on Buildman. (I have never seen it on MAKEALL script.) Does the same error happen on your machine too? Do you have any idea why this error happen? What I did is as follows: $ git checkout master $ git describe v2014.01-rc2 $ git checkout -b cosmetic Add many cosmetic commits. Do not change any source files. (For example, changing README files) I think about 20 commits are enough. $ git branch --set-upstream-to=master $ tool/buildman/buildman -b cosmetic lcd4_lwmon5 No section: 'make-flags' Building 21 commits for 1 boards (1 thread, 8 jobs per thread) Cloning repo for thread 0 14 7 0 /21 lcd4_lwmon5 $ tools/buildman/buildman -se -b cosmetic No section: 'make-flags' Summary of 21 commits for 1194 boards (8 threads, 1 job per thread) 01: Prepare v2014.01-rc2 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 02: cosmetic1 powerpc: lcd4_lwmon5 -tr: write error: Broken pipe -tr: write error 03: cosmetic2 04: cosmetic3 05: cosmetic4 06: cosmetic5 07: cosmetic6 08: cosmetic7 09: cosmetic8 10: cosmetic9 11: cosmetic10 12: cosmetic11 13: cosmetic12 14: cosmetic13 15: cosmetic14 16: cosmetic15 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 17: cosmetic16 18: cosmetic17 19: cosmetic18 20: cosmetic19 21: cosmetic20 Here, a broken pipe error occurred at 01 and fixed at 02. It happend again at 16. But the result changes every time. The error happens randomly. Changes in v2: - Delete an unnecessary line cp $(obj)u-boot.img $@ Makefile | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index f03d116..c9d372b 100644 --- a/Makefile +++ b/Makefile @@ -471,12 +471,10 @@ $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \ - -d $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl.img - tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \ - of=$(obj)spl/u-boot-spl-pad.img 2>/dev/null - dd if=$(obj)spl/u-boot-spl.img of=$(obj)spl/u-boot-spl-pad.img \ - conv=notrunc 2>/dev/null - cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img > $@ + -d $(obj)spl/u-boot-spl.bin $@ + $(OBJCOPY) -I binary -O binary \ + --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@ + cat $(obj)u-boot.img >> $@ ifneq ($(CONFIG_TEGRA),) $(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin @@ -499,11 +497,9 @@ $(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img # at the start padded up to the start of the SPL image. And then concat # the SPL image to the end. $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img - tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ - of=$(obj)u-boot-pad.img 2>/dev/null - dd if=$(obj)u-boot.img of=$(obj)u-boot-pad.img \ - conv=notrunc 2>/dev/null - cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin > $@ + $(OBJCOPY) -I binary -O binary --pad-to=$(CONFIG_UBOOT_PAD_TO) \ + --gap-fill=0xff $(obj)u-boot.img $@ + cat $(obj)spl/u-boot-spl.bin >> $@ ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ -- 1.8.3.2

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[U-Boot] [PULL] u-boot-usb/master
by Marek Vasut 19 Dec '13

19 Dec '13

The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609: serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to eb63218b9b95a59baa8b241f3a88e4415dabf833: usb: ehci: Fix register access (2013-12-18 19:53:19 +0100) ---------------------------------------------------------------- Lukasz Majewski (4): dfu: Export allocated dfu buffer size usb: dfu: f_dfu: Provide infrastructure to adjust DFU's Poll Timeout value usb: f_dfu: cosmetic: Code cleanup ARM: trats: dfu: Enable default Poll Timeout for Trats board Marek Vasut (3): usb: ehci-pci: Clarify and cleanup the EHCI controller detection usb: ehci: Do not de-init uninited controllers usb: ehci: Fix register access drivers/dfu/dfu.c | 5 +++++ drivers/usb/gadget/f_dfu.c | 43 ++++++++++++++++++++++++++++++++++++++----- drivers/usb/gadget/f_dfu.h | 2 ++ drivers/usb/host/ehci-hcd.c | 5 ++++- drivers/usb/host/ehci-pci.c | 28 +++++++++++++++++++++++++--- include/configs/trats.h | 1 + include/dfu.h | 4 ++++ 7 files changed, 79 insertions(+), 9 deletions(-)

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[U-Boot] [PATCH] Makefile: fix the typo error for mrproper
by Bo Shen 19 Dec '13

19 Dec '13

Fix the typo error for mrproper from mkproper. Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- In Makefile, there is no object name is mkproper, so I think this is a typo error. Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 7310c4e..ddbaaf0 100644 --- a/Makefile +++ b/Makefile @@ -168,7 +168,7 @@ endif include $(TOPDIR)/config.mk # Targets which don't build the source code -NON_BUILD_TARGETS = backup clean clobber distclean mkproper tidy unconfig +NON_BUILD_TARGETS = backup clean clobber distclean mrproper tidy unconfig # Only do the generic board check when actually building, not configuring ifeq ($(filter $(NON_BUILD_TARGETS),$(MAKECMDGOALS)),) -- 1.7.9.5

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[U-Boot] [RFC PATCH V2 1/2] ARM: OMAP4/5: Add alternative method for HSIC USB devices reset
by Lubomir Popov 19 Dec '13

19 Dec '13

Add option for individual reset of HSIC-connected USB devices by the ehci-hcd.c driver upon applying port power, with per-device configurable reset hold and delay times. This may replace the reset functionality via usb_hub.c and board file (which does not work on some boards). Make HSIC work on all OMAP543x-ES1.0 ports. Signed-off-by: Lubomir Popov <l-popov(a)ti.com> --- V1 got garbled during transmission, don't know why. V2 is just a resend. drivers/usb/host/ehci-hcd.c | 15 ++++ drivers/usb/host/ehci-omap.c | 174 +++++++++++++++++++++++++++++++++++++----- 2 files changed, 170 insertions(+), 19 deletions(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 8bd1eb8..47b4097 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -119,6 +119,12 @@ static struct descriptor { #define ehci_is_TDI() (0) #endif +/* OMAP HSIC workaround option: */ +__weak void omap_ehci_hsic_reset_device(int port) +{ + return; +} + int __ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg) { return PORTSC_PSPD(reg); @@ -803,6 +809,15 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) { reg |= EHCI_PS_PP; ehci_writel(status_reg, reg); + /* + * OMAP4/5: Reset device for 'fail to connect' + * workaround. Weak function, actual reset + * should happen in ehci-omap.c and only if we + * have defined HSIC devices (in the board file) + * that we want to reset at this moment. + */ + omap_ehci_hsic_reset_device( + le16_to_cpu(req->index)); } break; case USB_PORT_FEAT_RESET: diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 1b215c2..071739d 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -7,6 +7,13 @@ * Sunil Kumar <sunilsaini05(a)gmail.com> * Shashi Ranjan <shashiranjanmca05(a)gmail.com> * + * (C) Copyright 2013 Lubomir Popov, MM Solutions <lpopov(a)mm-sol.com> + * - Add option for individual reset of HSIC-connected USB devices by the + * ehci-hcd.c driver upon applying port power, with per-device configurable + * reset hold and delay times. This may replace the reset functionality via + * usb_hub.c and board file; + * - Make HSIC work on all OMAP5430-ES1.0 ports; + * - Add explanatory comments where appropriate. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -26,6 +33,8 @@ static struct omap_uhh *const uhh = (struct omap_uhh *)OMAP_UHH_BASE; static struct omap_usbtll *const usbtll = (struct omap_usbtll *)OMAP_USBTLL_BASE; static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE; +static struct omap_usbhs_board_data *usbhs_bdp = NULL; + static int omap_uhh_reset(void) { int timeout = 0; @@ -106,7 +115,7 @@ static void omap_usbhs_hsic_init(int port) writel(reg, &usbtll->channel_conf + port); } -#ifdef CONFIG_USB_ULPI +#if defined(CONFIG_USB_ULPI) && defined(CONFIG_USB_ULPI_VIEWPORT_OMAP) static void omap_ehci_soft_phy_reset(int port) { struct ulpi_viewport ulpi_vp; @@ -158,10 +167,141 @@ static inline void omap_ehci_phy_reset(int on, int delay) #define omap_ehci_phy_reset(on, delay) do {} while (0) #endif +/* + * Individual HSIC USB device reset to fix 'fail to connect' for some devices. + * Note that a HSIC-connected device is actually a permanently attached USB + * slave, while a PHY is just a hardware extension of the host port, and + * handling them in the same manner is not appropriate. + * In order to invoke this feature, define CONFIG_OMAP_HSIC_PORTx_RESET_GPIO + * in the board header (where x is the port number with HSIC-attached device + * that we want to reset via this method, and the value is the number of the + * particular GPIO) - the real functions shall then build and override the + * __weak dummy in ehci-hcd.c that is called upon applying port power. The + * active reset hold time, as well as the delay after release of reset, are + * configurable per device (port) via CONFIG_OMAP_PORTx_RST_HOLD_US and + * CONFIG_OMAP_PORTx_DLY_AFTER_US. + * + * Applicable to OMAP4/5 only (except for the OMAP4430, where HSIC is not + * functional). Valid HSIC ports are: + * OMAP4460/70: 1, 2 + * OMAP5430: 1, 2, 3 + * OMAP5432: 2, 3 + */ +#if defined(CONFIG_OMAP_HSIC_PORT1_RESET_GPIO) || \ + defined(CONFIG_OMAP_HSIC_PORT2_RESET_GPIO) || \ + defined(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO) +/* Should not be called for non-HSIC ports */ +static void omap_ehci_hsic_reset(int port, int on, int delay) +{ + debug("HSIC device reset: port %d, reset %s, delay %d us\n", + port, on ? "On" : "Off", delay); +#ifdef CONFIG_OMAP_HSIC_PORT1_RESET_GPIO + if (port == 1) { + gpio_request(CONFIG_OMAP_HSIC_PORT1_RESET_GPIO, + "USB HSIC1 Reset"); + gpio_direction_output(CONFIG_OMAP_HSIC_PORT1_RESET_GPIO, !on); + } +#endif +#ifdef CONFIG_OMAP_HSIC_PORT2_RESET_GPIO + if (port == 2) { + gpio_request(CONFIG_OMAP_HSIC_PORT2_RESET_GPIO, + "USB HSIC2 Reset"); + gpio_direction_output(CONFIG_OMAP_HSIC_PORT2_RESET_GPIO, !on); + } +#endif +#ifdef CONFIG_OMAP_HSIC_PORT3_RESET_GPIO + if (port == 3) { + gpio_request(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO, + "USB HSIC3 Reset"); + gpio_direction_output(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO, !on); + } +#endif + if (delay) + udelay(delay); +} + +/* + * Called by ehci-hcd when setting the USB_PORT_FEAT_POWER feature + * (overrides __weak function in ehci-hcd.c) + */ +void omap_ehci_hsic_reset_device(int port) +{ + int rst_hold; /* Reset active hold time, us */ + int dly_after; /* Delay after releasing reset, us */ + + if ((port <= 0) || + !(usbhs_bdp) || + !(is_ehci_hsic_mode(usbhs_bdp->port_mode[port-1]))) + return; + +#ifdef CONFIG_OMAP_HSIC_PORT1_RESET_GPIO + if (port == 1) { +#ifdef CONFIG_OMAP_PORT1_RST_HOLD_US + rst_hold = CONFIG_OMAP_PORT1_RST_HOLD_US; +#else + rst_hold = 10; /* Provide a default hold time */ +#endif +#ifdef CONFIG_OMAP_PORT1_DLY_AFTER_US + dly_after = CONFIG_OMAP_PORT1_DLY_AFTER_US; +#else + dly_after = 0; /* No delay by default */ +#endif + } +#endif + +#ifdef CONFIG_OMAP_HSIC_PORT2_RESET_GPIO + if (port == 2) { +#ifdef CONFIG_OMAP_PORT2_RST_HOLD_US + rst_hold = CONFIG_OMAP_PORT2_RST_HOLD_US; +#else + rst_hold = 10; /* Provide a default hold time */ +#endif +#ifdef CONFIG_OMAP_PORT2_DLY_AFTER_US + dly_after = CONFIG_OMAP_PORT2_DLY_AFTER_US; +#else + dly_after = 0; /* No delay by default */ +#endif + } +#endif + +#ifdef CONFIG_OMAP_HSIC_PORT3_RESET_GPIO + if (port == 3) { +#ifdef CONFIG_OMAP_PORT3_RST_HOLD_US + rst_hold = CONFIG_OMAP_PORT3_RST_HOLD_US; +#else + rst_hold = 10; /* Provide a default hold time */ +#endif +#ifdef CONFIG_OMAP_PORT3_DLY_AFTER_US + dly_after = CONFIG_OMAP_PORT3_DLY_AFTER_US; +#else + dly_after = 0; /* No delay by default */ +#endif + } +#endif + omap_ehci_hsic_reset(port, 1, rst_hold); + omap_ehci_hsic_reset(port, 0, dly_after); +} + +#else +/* No CONFIG_OMAP_HSIC_PORTx_RESET_GPIO defined */ +#define omap_ehci_hsic_reset(port, on, delay) do {} while (0) +#endif + /* Reset is needed otherwise the kernel-driver will throw an error. */ int omap_ehci_hcd_stop(void) { debug("Resetting OMAP EHCI\n"); + /* Put HSIC devices, if any, in RESET */ +#ifdef CONFIG_OMAP_HSIC_PORT1_RESET_GPIO + omap_ehci_hsic_reset(1, 1, 0); +#endif +#ifdef CONFIG_OMAP_HSIC_PORT2_RESET_GPIO + omap_ehci_hsic_reset(2, 1, 0); +#endif +#ifdef CONFIG_OMAP_HSIC_PORT3_RESET_GPIO + omap_ehci_hsic_reset(3, 1, 0); +#endif + /* Reset PHYs, if any */ omap_ehci_phy_reset(1, 0); if (omap_uhh_reset() < 0) @@ -184,13 +324,15 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, int ret; unsigned int i, reg = 0, rev = 0; - debug("Initializing OMAP EHCI\n"); + debug("Initializing OMAP EHCI %d\n", index); ret = board_usb_init(index, USB_INIT_HOST); if (ret < 0) return ret; - /* Put the PHY in RESET */ + usbhs_bdp = usbhs_pdata; + + /* Put the PHYs, if any, in RESET */ omap_ehci_phy_reset(1, 10); ret = omap_uhh_reset(); @@ -230,35 +372,28 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); else setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); - } else if (rev == OMAP_USBHS_REV2) { - - clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR), - OMAP4_UHH_HOSTCONFIG_APP_START_CLK); - - /* Clear port mode fields for PHY mode */ - - if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0])) - setbits_le32(&reg, OMAP_P1_MODE_HSIC); - - if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1])) - setbits_le32(&reg, OMAP_P2_MODE_HSIC); - - } else if (rev == OMAP_USBHS_REV2_1) { + } else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) { + /* + * OMAP4 and OMAP5-ES1 UHH are R.2.0, OMAP5-ES2 - R.2.1 + * + * Clear port mode fields for ULPI PHY mode. On OMAP4 the P3 + * field is reserved, but clearing it does not harm. + */ clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR | OMAP_P3_MODE_CLEAR), OMAP4_UHH_HOSTCONFIG_APP_START_CLK); - /* Clear port mode fields for PHY mode */ - + /* Warning: HSIC mode for Port 1 not usable on OMAP5432 */ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0])) setbits_le32(&reg, OMAP_P1_MODE_HSIC); if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1])) setbits_le32(&reg, OMAP_P2_MODE_HSIC); + /* Warning: HSIC mode for Port 3 possible on OMAP5 only */ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[2])) setbits_le32(&reg, OMAP_P3_MODE_HSIC); } @@ -270,6 +405,7 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, if (is_ehci_hsic_mode(usbhs_pdata->port_mode[i])) omap_usbhs_hsic_init(i); + /* Release ULPI PHY reset and let PLL lock (may need more delay...) */ omap_ehci_phy_reset(0, 10); /* -- 1.7.9.5

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[U-Boot] [RFC PATCH 2/2] ARM: omap5_uevm: Example usage of alternative HSIC USB device reset
by Lubomir Popov 19 Dec '13

19 Dec '13

This patch demonstrates the usage of the alternative method for HSIC devices reset (via the ehci-hcd and omap-ehci drivers, where this method is implemented through a separate patch; must be applied prior to this one). Board functionality is not altered; a minor improvement is the removal of the second call to omap_ehci_hcd_init() after reset which is not needed anymore. On some other OMAP4/5 boards however this is the only method that works. Signed-off-by: Lubomir Popov <l-popov(a)ti.com> --- board/ti/omap5_uevm/evm.c | 2 ++ include/configs/omap5_uevm.h | 13 ++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index af854da..cae9fd8 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -210,6 +210,7 @@ int ehci_hcd_stop(void) return ret; } +#if !defined(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO) void usb_hub_reset_devices(int port) { /* The LAN9730 needs to be reset after the port power has been set. */ @@ -220,6 +221,7 @@ void usb_hub_reset_devices(int port) } } #endif +#endif #ifdef CONFIG_USB_XHCI_OMAP /** diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 2f128b8..96b5f23 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -50,10 +50,17 @@ #define CONFIG_USB_EHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +/*#define CONFIG_EHCI_HCD_INIT_AFTER_RESET*/ -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80 -#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79 +/* No ULPI PHYs on this board */ +/*#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80*/ +/*#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79*/ +/* + * Due to HSIC connect ussues with some devices, a reset is required + * upon applying port power. A GPIO is needed per HSIC device: + */ +#define CONFIG_OMAP_HSIC_PORT2_RESET_GPIO 80 /* Hub */ +#define CONFIG_OMAP_HSIC_PORT3_RESET_GPIO 79 /* Ethernet Ctrlr */ /* Enabled commands */ #define CONFIG_CMD_DHCP /* DHCP Support */ -- 1.7.9.5

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[U-Boot] [RFC PATCH 1/2] ARM: OMAP4/5: Add alternative method for HSIC USB devices reset
by Lubomir Popov 19 Dec '13

19 Dec '13

Add option for individual reset of HSIC-connected USB devices by the ehci-hcd.c driver upon applying port power, with per-device configurable reset hold and delay times. This may replace the reset functionality via usb_hub.c and board file (which does not work on some boards). Make HSIC work on all OMAP543x-ES1.0 ports. Signed-off-by: Lubomir Popov <l-popov(a)ti.com> --- drivers/usb/host/ehci-hcd.c | 15 ++++ drivers/usb/host/ehci-omap.c | 174 +++++++++++++++++++++++++++++++++++++----- 2 files changed, 170 insertions(+), 19 deletions(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 8bd1eb8..47b4097 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -119,6 +119,12 @@ static struct descriptor { #define ehci_is_TDI() (0) #endif +/* OMAP HSIC workaround option: */ +__weak void omap_ehci_hsic_reset_device(int port) +{ + return; +} + int __ehci_get_port_speed(struct ehci_hcor *hcor, uint32_t reg) { return PORTSC_PSPD(reg); @@ -803,6 +809,15 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) { reg |= EHCI_PS_PP; ehci_writel(status_reg, reg); + /* + * OMAP4/5: Reset device for 'fail to connect' + * workaround. Weak function, actual reset + * should happen in ehci-omap.c and only if we + * have defined HSIC devices (in the board file) + * that we want to reset at this moment. + */ + omap_ehci_hsic_reset_device( + le16_to_cpu(req->index)); } break; case USB_PORT_FEAT_RESET: diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 1b215c2..071739d 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -7,6 +7,13 @@ * Sunil Kumar <sunilsaini05(a)gmail.com> * Shashi Ranjan <shashiranjanmca05(a)gmail.com> * + * (C) Copyright 2013 Lubomir Popov, MM Solutions <lpopov(a)mm-sol.com> + * - Add option for individual reset of HSIC-connected USB devices by the + * ehci-hcd.c driver upon applying port power, with per-device configurable + * reset hold and delay times. This may replace the reset functionality via + * usb_hub.c and board file; + * - Make HSIC work on all OMAP5430-ES1.0 ports; + * - Add explanatory comments where appropriate. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -26,6 +33,8 @@ static struct omap_uhh *const uhh = (struct omap_uhh *)OMAP_UHH_BASE; static struct omap_usbtll *const usbtll = (struct omap_usbtll *)OMAP_USBTLL_BASE; static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE; +static struct omap_usbhs_board_data *usbhs_bdp = NULL; + static int omap_uhh_reset(void) { int timeout = 0; @@ -106,7 +115,7 @@ static void omap_usbhs_hsic_init(int port) writel(reg, &usbtll->channel_conf + port); } -#ifdef CONFIG_USB_ULPI +#if defined(CONFIG_USB_ULPI) && defined(CONFIG_USB_ULPI_VIEWPORT_OMAP) static void omap_ehci_soft_phy_reset(int port) { struct ulpi_viewport ulpi_vp; @@ -158,10 +167,141 @@ static inline void omap_ehci_phy_reset(int on, int delay) #define omap_ehci_phy_reset(on, delay) do {} while (0) #endif +/* + * Individual HSIC USB device reset to fix 'fail to connect' for some devices. + * Note that a HSIC-connected device is actually a permanently attached USB + * slave, while a PHY is just a hardware extension of the host port, and + * handling them in the same manner is not appropriate. + * In order to invoke this feature, define CONFIG_OMAP_HSIC_PORTx_RESET_GPIO + * in the board header (where x is the port number with HSIC-attached device + * that we want to reset via this method, and the value is the number of the + * particular GPIO) - the real functions shall then build and override the + * __weak dummy in ehci-hcd.c that is called upon applying port power. The + * active reset hold time, as well as the delay after release of reset, are + * configurable per device (port) via CONFIG_OMAP_PORTx_RST_HOLD_US and + * CONFIG_OMAP_PORTx_DLY_AFTER_US. + * + * Applicable to OMAP4/5 only (except for the OMAP4430, where HSIC is not + * functional). Valid HSIC ports are: + * OMAP4460/70: 1, 2 + * OMAP5430: 1, 2, 3 + * OMAP5432: 2, 3 + */ +#if defined(CONFIG_OMAP_HSIC_PORT1_RESET_GPIO) || \ + defined(CONFIG_OMAP_HSIC_PORT2_RESET_GPIO) || \ + defined(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO) +/* Should not be called for non-HSIC ports */ +static void omap_ehci_hsic_reset(int port, int on, int delay) +{ + debug("HSIC device reset: port %d, reset %s, delay %d us\n", + port, on ? "On" : "Off", delay); +#ifdef CONFIG_OMAP_HSIC_PORT1_RESET_GPIO + if (port == 1) { + gpio_request(CONFIG_OMAP_HSIC_PORT1_RESET_GPIO, + "USB HSIC1 Reset"); + gpio_direction_output(CONFIG_OMAP_HSIC_PORT1_RESET_GPIO, !on); + } +#endif +#ifdef CONFIG_OMAP_HSIC_PORT2_RESET_GPIO + if (port == 2) { + gpio_request(CONFIG_OMAP_HSIC_PORT2_RESET_GPIO, + "USB HSIC2 Reset"); + gpio_direction_output(CONFIG_OMAP_HSIC_PORT2_RESET_GPIO, !on); + } +#endif +#ifdef CONFIG_OMAP_HSIC_PORT3_RESET_GPIO + if (port == 3) { + gpio_request(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO, + "USB HSIC3 Reset"); + gpio_direction_output(CONFIG_OMAP_HSIC_PORT3_RESET_GPIO, !on); + } +#endif + if (delay) + udelay(delay); +} + +/* + * Called by ehci-hcd when setting the USB_PORT_FEAT_POWER feature + * (overrides __weak function in ehci-hcd.c) + */ +void omap_ehci_hsic_reset_device(int port) +{ + int rst_hold; /* Reset active hold time, us */ + int dly_after; /* Delay after releasing reset, us */ + + if ((port <= 0) || + !(usbhs_bdp) || + !(is_ehci_hsic_mode(usbhs_bdp->port_mode[port-1]))) + return; + +#ifdef CONFIG_OMAP_HSIC_PORT1_RESET_GPIO + if (port == 1) { +#ifdef CONFIG_OMAP_PORT1_RST_HOLD_US + rst_hold = CONFIG_OMAP_PORT1_RST_HOLD_US; +#else + rst_hold = 10; /* Provide a default hold time */ +#endif +#ifdef CONFIG_OMAP_PORT1_DLY_AFTER_US + dly_after = CONFIG_OMAP_PORT1_DLY_AFTER_US; +#else + dly_after = 0; /* No delay by default */ +#endif + } +#endif + +#ifdef CONFIG_OMAP_HSIC_PORT2_RESET_GPIO + if (port == 2) { +#ifdef CONFIG_OMAP_PORT2_RST_HOLD_US + rst_hold = CONFIG_OMAP_PORT2_RST_HOLD_US; +#else + rst_hold = 10; /* Provide a default hold time */ +#endif +#ifdef CONFIG_OMAP_PORT2_DLY_AFTER_US + dly_after = CONFIG_OMAP_PORT2_DLY_AFTER_US; +#else + dly_after = 0; /* No delay by default */ +#endif + } +#endif + +#ifdef CONFIG_OMAP_HSIC_PORT3_RESET_GPIO + if (port == 3) { +#ifdef CONFIG_OMAP_PORT3_RST_HOLD_US + rst_hold = CONFIG_OMAP_PORT3_RST_HOLD_US; +#else + rst_hold = 10; /* Provide a default hold time */ +#endif +#ifdef CONFIG_OMAP_PORT3_DLY_AFTER_US + dly_after = CONFIG_OMAP_PORT3_DLY_AFTER_US; +#else + dly_after = 0; /* No delay by default */ +#endif + } +#endif + omap_ehci_hsic_reset(port, 1, rst_hold); + omap_ehci_hsic_reset(port, 0, dly_after); +} + +#else +/* No CONFIG_OMAP_HSIC_PORTx_RESET_GPIO defined */ +#define omap_ehci_hsic_reset(port, on, delay) do {} while (0) +#endif + /* Reset is needed otherwise the kernel-driver will throw an error. */ int omap_ehci_hcd_stop(void) { debug("Resetting OMAP EHCI\n"); + /* Put HSIC devices, if any, in RESET */ +#ifdef CONFIG_OMAP_HSIC_PORT1_RESET_GPIO + omap_ehci_hsic_reset(1, 1, 0); +#endif +#ifdef CONFIG_OMAP_HSIC_PORT2_RESET_GPIO + omap_ehci_hsic_reset(2, 1, 0); +#endif +#ifdef CONFIG_OMAP_HSIC_PORT3_RESET_GPIO + omap_ehci_hsic_reset(3, 1, 0); +#endif + /* Reset PHYs, if any */ omap_ehci_phy_reset(1, 0); if (omap_uhh_reset() < 0) @@ -184,13 +324,15 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, int ret; unsigned int i, reg = 0, rev = 0; - debug("Initializing OMAP EHCI\n"); + debug("Initializing OMAP EHCI %d\n", index); ret = board_usb_init(index, USB_INIT_HOST); if (ret < 0) return ret; - /* Put the PHY in RESET */ + usbhs_bdp = usbhs_pdata; + + /* Put the PHYs, if any, in RESET */ omap_ehci_phy_reset(1, 10); ret = omap_uhh_reset(); @@ -230,35 +372,28 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); else setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); - } else if (rev == OMAP_USBHS_REV2) { - - clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR), - OMAP4_UHH_HOSTCONFIG_APP_START_CLK); - - /* Clear port mode fields for PHY mode */ - - if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0])) - setbits_le32(&reg, OMAP_P1_MODE_HSIC); - - if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1])) - setbits_le32(&reg, OMAP_P2_MODE_HSIC); - - } else if (rev == OMAP_USBHS_REV2_1) { + } else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) { + /* + * OMAP4 and OMAP5-ES1 UHH are R.2.0, OMAP5-ES2 - R.2.1 + * + * Clear port mode fields for ULPI PHY mode. On OMAP4 the P3 + * field is reserved, but clearing it does not harm. + */ clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR | OMAP_P3_MODE_CLEAR), OMAP4_UHH_HOSTCONFIG_APP_START_CLK); - /* Clear port mode fields for PHY mode */ - + /* Warning: HSIC mode for Port 1 not usable on OMAP5432 */ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0])) setbits_le32(&reg, OMAP_P1_MODE_HSIC); if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1])) setbits_le32(&reg, OMAP_P2_MODE_HSIC); + /* Warning: HSIC mode for Port 3 possible on OMAP5 only */ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[2])) setbits_le32(&reg, OMAP_P3_MODE_HSIC); } @@ -270,6 +405,7 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, if (is_ehci_hsic_mode(usbhs_pdata->port_mode[i])) omap_usbhs_hsic_init(i); + /* Release ULPI PHY reset and let PLL lock (may need more delay...) */ omap_ehci_phy_reset(0, 10); /* -- 1.7.9.5

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[U-Boot] [RFC PATCH 0/2] OMAP4/5: Add alternative method for HSIC USB devices reset
by Lubomir Popov 19 Dec '13

19 Dec '13

This patch introduces an alternative method for resetting HSIC-attached USB devices on OMAP4/5, needed for working around the fail to connect with some types. The solution implemented by Dan Murphy for the OMAP5432 uEVM (reset via a callback in the board file, invoked from within usb_hub.c) does work for that board, but is proven to fail for a custom OMAP5430 design. Moreover, the uEVM should not be taken for a OMAP5 "golden standard" due to a hardware limitation: power switches for the two downstream ports of the USB3503A hub (such switches must be controlled by the hub) have been omitted, and VBUS is always present on the sockets whenever DC input power is applied to the board. This could be one of the possible reasons for U-Boot not being able to detect some particular flash drives (that otherwise work correctly on other OMAP4/5 boards), as well as for some known Linux issues. The proposed patch provides an option for individual reset of HSIC-connected USB devices, with configurable reset hold and delay times, all enabled by defines in the board header only. This option is activated if at least one CONFIG_OMAP_HSIC_PORTx_RESET_GPIO has been defined - then a weak dummy function in ehci-hcd.c (in the USB_PORT_FEAT_POWER feature set by ehci_submit_root()) shall be overridden by a callback in ehci-omap.c that shall do the actual device reset for the specified ports. No changes to the board .c file are required. If desired, Dan's method may be preserved and shall co-exist for other ports if an overriding function is present in the board file. The patch also fixes HSIC operation on all OMAP5-ES1.0 USB ports. It has to be noted that this patch proposes a strict differentiation between PHYs and HSIC devices, which seems reasonable - a HSIC-connected device is actually a permanently attached USB slave, while a PHY is just a hardware extension of the host port, and handling them in the same manner is not appropriate. Tested on the OMAP5432 uEVM, as well as on a custom OMAP5430 board (with two HSIC devices - USB4640 combo hub and LAN9730 Ethernet) and on a custom OMAP4 board (with one USB4640 HSIC hub; tested with OMAP4460 and 4470). Lubomir Popov (2): ARM: OMAP4/5: Add alternative method for HSIC USB devices reset ARM: omap5_uevm: Example usage of alternative HSIC USB device reset board/ti/omap5_uevm/evm.c | 2 + drivers/usb/host/ehci-hcd.c | 15 ++++ drivers/usb/host/ehci-omap.c | 174 +++++++++++++++++++++++++++++++++++++----- include/configs/omap5_uevm.h | 13 +++- 4 files changed, 182 insertions(+), 22 deletions(-) -- 1.7.9.5

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[U-Boot] Please pull u-boot-ti/master
by Tom Rini 19 Dec '13

19 Dec '13

Hey, The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to b65391f99393ce43a8fe2bbcd9e9663dea41682f: ARM: am437x: Adapt to common CONFIG_BOOTCMD (2013-12-18 10:49:32 -0500) ---------------------------------------------------------------- Dan Murphy (1): ARM: am437x: Adapt to common CONFIG_BOOTCMD Lokesh Vutla (12): ARM: AM43xx: Update the base addresses of modules ARM: AM43xx: Adapt to ti_armv7_common.h config file ARM: AM43xx: Add L2 Support ARM: AM43xx: Add extra ENV settings ARM: AM43xx: Select clk source for Timer2 ARM: AM43xx: Update Current Booting devices list ARM: AM43xx: mux: Update mux data ARM: AM43xx: clocks: Update DPLL details ARM: AM33xx+: Update ioregs to pass different values ARM: AM43xx: EPOS_EVM: Add support for LPDDR2 ARM: AM43xx: GP_EVM: Add support for DDR3 ARM: AM43xx: Add Maintainer Sekhar Nori (2): ARM: AM43XX: board: add support for reading onboard EEPROM ARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support Stefan Roese (1): arm: omap3: Fix beagleboard SPL boot hangup (GPIO clocks not enabled) arch/arm/cpu/armv7/am33xx/clock.c | 12 +- arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 15 + arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +- arch/arm/cpu/armv7/am33xx/ddr.c | 146 +++++++- arch/arm/cpu/armv7/am33xx/emif4.c | 25 +- arch/arm/cpu/armv7/omap-common/emif-common.c | 14 - arch/arm/include/asm/arch-am33xx/clock.h | 7 +- arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 3 + arch/arm/include/asm/arch-am33xx/cpu.h | 24 +- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 41 ++- arch/arm/include/asm/arch-am33xx/gpio.h | 12 + arch/arm/include/asm/arch-am33xx/hardware.h | 7 - arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 2 + arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 16 + arch/arm/include/asm/arch-am33xx/mux_am43xx.h | 45 +++ arch/arm/include/asm/arch-am33xx/omap.h | 4 +- arch/arm/include/asm/arch-am33xx/spl.h | 13 +- arch/arm/include/asm/emif.h | 26 ++ board/isee/igep0033/board.c | 10 +- board/phytec/pcm051/board.c | 20 +- board/siemens/dxr2/board.c | 12 +- board/siemens/pxm2/board.c | 10 +- board/siemens/rut/board.c | 10 +- board/ti/am335x/board.c | 40 ++- board/ti/am43xx/board.c | 355 +++++++++++++++++++- board/ti/am43xx/board.h | 36 ++ board/ti/am43xx/mux.c | 35 +- board/ti/ti814x/evm.c | 4 +- board/ti/ti816x/evm.c | 12 +- boards.cfg | 2 +- include/configs/am43xx_evm.h | 218 ++++++------ include/configs/omap3_beagle.h | 3 + 32 files changed, 1010 insertions(+), 181 deletions(-) -- Tom

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