December 2013 - U-Boot

[U-Boot] [PATCH 1/3] mtd: onenand: Fix unaligned access
by Marek Vasut 01 Jan '14

01 Jan '14

Fix unaligned access in OneNAND core. The problem is that the ffchars[] array is an array of "unsigned char", but in onenand_write_ops_nolock() can be passed to the memcpy_16() function. The memcpy_16() function will treat the buffer as an array of "unsigned short", thus triggering unaligned access if the compiler decided ffchars[] to be not aligned. I managed to trigger the problem with regular ELDK 5.4 GCC compiler. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Scott Wood <scottwood(a)freescale.com> Cc: Tom Rini <trini(a)ti.com> --- drivers/mtd/onenand/onenand_base.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 979e4af..e33e8d3 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -91,7 +91,13 @@ static struct nand_ecclayout onenand_oob_32 = { .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } }; -static const unsigned char ffchars[] = { +/* + * Warning! This array is used with the memcpy_16() function, thus + * it must be aligned to 2 bytes. GCC can make this array unaligned + * as the array is made of unsigned char, which memcpy16() doesn't + * like and will cause unaligned access. + */ +static const unsigned char __aligned(2) ffchars[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -- 1.8.4.2

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[U-Boot] [PATCH] wandboard: Set default environment to use zImage
by Otavio Salvador 01 Jan '14

01 Jan '14

From: John Weber <rjohnweber(a)gmail.com> Change the default environment to use zImage instead of uImage, because using zImage does not require a LOADADDR assignment when building the kernel to be consistent with the loadaddr environment variable in u-boot, decreasing the chance for error. This requires changes to the default environment to load a file named zImage instead of uImage, and to use the 'bootz' command instead of 'bootm' when booting the kernel. The zImage works for FSL Linux's kernel fork versions 3.0.35, 3.10.9, and 3.10.17; this also works fine for mainline kernels. There is no reason to continue using uImage for default environment. Signed-off-by: John Weber <rjohnweber(a)gmail.com> Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- include/configs/wandboard.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 5134b2e..3424124 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -115,7 +115,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ - "uimage=uImage\0" \ + "image=zImage\0" \ "console=ttymxc0\0" \ "splashpos=m,m\0" \ "fdt_high=0xffffffff\0" \ @@ -173,22 +173,22 @@ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ - "bootm; " \ + "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ - "bootm; " \ + "bootz; " \ "fi;\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ @@ -200,19 +200,19 @@ "else " \ "setenv get_cmd tftp; " \ "fi; " \ - "${get_cmd} ${uimage}; " \ + "${get_cmd} ${image}; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ - "bootm; " \ + "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ - "bootm; " \ + "bootz; " \ "fi;\0" #define CONFIG_BOOTCOMMAND \ @@ -220,7 +220,7 @@ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ - "if run loaduimage; then " \ + "if run loadimage; then " \ "run mmcboot; " \ "else run netboot; " \ "fi; " \ -- 1.8.5.2

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[U-Boot] [PATCH 1/4] arm: lager: Add support QSPI device and enable boot from SPI flash
by Nobuhiro Iwamatsu 31 Dec '13

31 Dec '13

This supports SH-QSPI device on lager board, and enable booting from SPI flash. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- include/configs/lager.h | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/include/configs/lager.h b/include/configs/lager.h index 8932825..097ace3 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -34,7 +34,13 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ + +#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) #define CONFIG_CMD_FLASH +#else +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#endif #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -104,6 +110,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) +#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) /* USE NOR FLASH */ #define CONFIG_SYS_TEXT_BASE 0x00000000 #define CONFIG_SYS_FLASH_CFI @@ -124,13 +131,32 @@ /* ENV setting */ #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) + +#else /* CONFIG_SYS_USE_BOOT_NORFLASH */ + +/* USE SPI */ +#define CONFIG_SYS_TEXT_BASE 0xE8080000 +#define CONFIG_SPI +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SH_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SH_QSPI_BASE 0xE6B10000 + +/* ENV setting */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_ADDR 0xC0000 +#endif + +/* Common ENV setting */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) /* SH Ether */ #define CONFIG_NET_MULTI -- 1.8.5.1

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[U-Boot] Stack size
by Parimala Baggiri 31 Dec '13

31 Dec '13

Hello, How to increase the user mode stack size which will be used by the standalone application in u-boot?

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[U-Boot] [PATCH] board:trats1:trats2: fix adapter number
by Piotr Wilczek 31 Dec '13

31 Dec '13

This fix is necessary after increased by one the number of adapters in s3c24x0 driver. Tested on Trats and Trats2. Signed-off-by: Piotr Wilczek <p.wilczek(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> Cc: Lukasz Majewski <l.majewski(a)samsung.com> --- board/samsung/trats/trats.c | 2 +- board/samsung/trats2/trats2.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 8aba51c..640a193 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -295,7 +295,7 @@ int power_init_board(void) */ ret = pmic_init(I2C_5); ret |= pmic_init_max8997(); - ret |= power_fg_init(I2C_8); + ret |= power_fg_init(I2C_9); ret |= power_muic_init(I2C_5); ret |= power_bat_init(0); if (ret) diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index 147de17..be15357 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -195,9 +195,9 @@ int power_init_board(void) #endif pmic_init(I2C_7); /* I2C adapter 7 - bus name s3c24x0_7 */ pmic_init_max77686(); - pmic_init_max77693(I2C_9); /* I2C adapter 9 - bus name soft1 */ - power_muic_init(I2C_9); /* I2C adapter 9 - bus name soft1 */ - power_fg_init(I2C_8); /* I2C adapter 8 - bus name soft0 */ + pmic_init_max77693(I2C_10); /* I2C adapter 10 - bus name soft1 */ + power_muic_init(I2C_10); /* I2C adapter 10 - bus name soft1 */ + power_fg_init(I2C_9); /* I2C adapter 9 - bus name soft0 */ power_bat_init(0); p_chrg = pmic_get("MAX77693_PMIC"); -- 1.7.9.5

2 2

[U-Boot] [PATCH] board:trats2: fix default partitions and mmc env
by Piotr Wilczek 31 Dec '13

31 Dec '13

This patch add uuid disk to defualt partions necessary to restore gpt partitions and fixes mmcdev environmental variable. Signed-off-by: Piotr Wilczek <p.wilczek(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- include/configs/trats2.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 5d86a3d..4c0068b 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -160,6 +160,7 @@ #define PARTS_UMS "ums" #define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ "name="PARTS_BOOT",size=64MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ "name="PARTS_MODEM",size=100MiB,uuid=${uuid_gpt_"PARTS_MODEM"};" \ @@ -201,7 +202,7 @@ "${kernelname}\0" \ "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ "${fdtfile}\0" \ - "mmcdev=CONFIG_MMC_DEFAULT_DEV\0" \ + "mmcdev=0\0" \ "mmcbootpart=2\0" \ "mmcrootpart=5\0" \ "opts=always_resume=1\0" \ -- 1.7.9.5

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[U-Boot] [PATCH v2] socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
by Chin Liang See 31 Dec '13

31 Dec '13

To add the DesignWare MMC driver support for Altera SOCFPGA. It required information such as clocks and bus width from platform specific files (SOCFPGA handoff files) Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Andy Fleming <afleming(a)freescale.com> Cc: Pantelis Antoniou <panto(a)antoniou-consulting.com> --- Changes for v2 - Adding u-boot-mmc maintainer --- arch/arm/include/asm/arch-socfpga/dwmmc.h | 12 +++++ drivers/mmc/Makefile | 1 + drivers/mmc/socfpga_dw_mmc.c | 72 +++++++++++++++++++++++++++++ 3 files changed, 85 insertions(+) create mode 100755 arch/arm/include/asm/arch-socfpga/dwmmc.h create mode 100755 drivers/mmc/socfpga_dw_mmc.c diff --git a/arch/arm/include/asm/arch-socfpga/dwmmc.h b/arch/arm/include/asm/arch-socfpga/dwmmc.h new file mode 100755 index 0000000..945eb64 --- /dev/null +++ b/arch/arm/include/asm/arch-socfpga/dwmmc.h @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SOCFPGA_DWMMC_H_ +#define _SOCFPGA_DWMMC_H_ + +extern int socfpga_dwmmc_init(u32 regbase, int bus_width, int index); + +#endif /* _SOCFPGA_SDMMC_H_ */ diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 1ed26ca..e793ed9 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o obj-$(CONFIG_DWMMC) += dw_mmc.o obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o +obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o else diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c new file mode 100755 index 0000000..554f51b --- /dev/null +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <malloc.h> +#include <dwmmc.h> +#include <asm/arch/dwmmc.h> + +#define CLKMGR_PERPLLGRP_EN_REG (SOCFPGA_CLKMGR_ADDRESS + 0xA0) +#define CLKMGR_SDMMC_CLK_ENABLE (1 << 8) +#define SYSMGR_SDMMCGRP_CTRL_REG (SOCFPGA_SYSMGR_ADDRESS + 0x108) +#define SYSMGR_SDMMC_CTRL_GET_DRVSEL(x) (((x) >> 0) & 0x7) +#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \ + ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38)) + +static char *SOCFPGA_NAME = "SOCFPGA DWMMC"; + +static void socfpga_dwmci_clksel(struct dwmci_host *host) +{ + unsigned int en; + unsigned int drvsel; + unsigned int smplsel; + + /* Disable SDMMC clock. */ + en = readl(CLKMGR_PERPLLGRP_EN_REG); + en &= ~CLKMGR_SDMMC_CLK_ENABLE; + writel(en, CLKMGR_PERPLLGRP_EN_REG); + + /* Configures drv_sel and smpl_sel */ + drvsel = 3; + smplsel = 0; + + debug("%s: drvsel %d smplsel %d\n", __FUNCTION__, drvsel, smplsel); + writel(SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel), + SYSMGR_SDMMCGRP_CTRL_REG); + + debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __FUNCTION__, + readl(SYSMGR_SDMMCGRP_CTRL_REG)); + /* Enable SDMMC clock */ + en = readl(CLKMGR_PERPLLGRP_EN_REG); + en |= CLKMGR_SDMMC_CLK_ENABLE; + writel(en, CLKMGR_PERPLLGRP_EN_REG); +} + +int socfpga_dwmmc_init(u32 regbase, int bus_width, int index) +{ + struct dwmci_host *host = NULL; + host = calloc(sizeof(struct dwmci_host), 1); + if (!host) { + printf("dwmci_host calloc fail!\n"); + return 1; + } + + host->name = SOCFPGA_NAME; + host->ioaddr = (void *)regbase; + host->buswidth = bus_width; + host->clksel = socfpga_dwmci_clksel; + host->dev_index = index; + /* fixed clock divide by 4 which due to the SDMMC wrapper */ + host->bus_hz = CONFIG_DWMMC_BUS_HZ; + host->fifoth_val = MSIZE(0x2) | + RX_WMARK(CONFIG_DWMMC_FIFO_DEPTH / 2 - 1) | + TX_WMARK(CONFIG_DWMMC_FIFO_DEPTH / 2); + + add_dwmci(host, host->bus_hz, 400000); + + return 0; +} + -- 1.7.9.5

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[U-Boot] post in uboot
by shobin b 30 Dec '13

30 Dec '13

Hi all, Any one know how to do post in uboot?i am using uboot-toradex.In that when at boot time i have to check the peripherals attached to our board(like usb,uart,ethernet,..).how to do these things in uboot? please tell me the solution. regards, shobin.b

2 1

[U-Boot] [PATCH] i2c: fti2c010: fix compiler warning on paddr[]
by Kuo-Jung Su 30 Dec '13

30 Dec '13

From: Kuo-Jung Su <dantesu(a)faraday-tech.com> This fixes the following compiler warnings: fti2c010.c: In function 'fti2c010_read': fti2c010.c:204:8: warning: 'paddr' may be used uninitialized in this function [-Wuninitialized] fti2c010.c: In function 'fti2c010_write': fti2c010.c:266:8: warning: 'paddr' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Kuo-Jung Su <dantesu(a)faraday-tech.com> Cc: Heiko Schocher <hs(a)denx.de> --- drivers/i2c/fti2c010.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/fti2c010.c b/drivers/i2c/fti2c010.c index fb9fa35..68d9a42 100644 --- a/drivers/i2c/fti2c010.c +++ b/drivers/i2c/fti2c010.c @@ -201,7 +201,7 @@ static int fti2c010_read(struct i2c_adapter *adap, struct fti2c010_chip *chip = chip_list + adap->hwadapnr; struct fti2c010_regs *regs = chip->regs; int ret, pos; - uchar paddr[4]; + uchar paddr[4] = { 0 }; to_i2c_addr(paddr, addr, alen); @@ -263,7 +263,7 @@ static int fti2c010_write(struct i2c_adapter *adap, struct fti2c010_chip *chip = chip_list + adap->hwadapnr; struct fti2c010_regs *regs = chip->regs; int ret, pos; - uchar paddr[4]; + uchar paddr[4] = { 0 }; to_i2c_addr(paddr, addr, alen); -- 1.7.9.5

1 0

[U-Boot] [PATCH] powerpc/t2080qds: some update for t2080qds
by Shengzhou Liu 30 Dec '13

30 Dec '13

- add more serdes protocols support. - fix some serdes lanes route. - fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d. - correct boot location info for SD/SPI boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- board/freescale/t2080qds/eth_t2080qds.c | 11 +++++- board/freescale/t2080qds/t2080qds.c | 66 ++++++++++++++++++++++++++++++--- drivers/net/fm/t2080.c | 10 +++-- 3 files changed, 75 insertions(+), 12 deletions(-) diff --git a/board/freescale/t2080qds/eth_t2080qds.c b/board/freescale/t2080qds/eth_t2080qds.c index 9a909db..6c68ebb 100644 --- a/board/freescale/t2080qds/eth_t2080qds.c +++ b/board/freescale/t2080qds/eth_t2080qds.c @@ -372,9 +372,11 @@ int board_eth_init(bd_t *bis) break; case 0x6c: case 0x6d: + fm_info_set_phy_address(FM1_10GEC1, 4); + fm_info_set_phy_address(FM1_10GEC2, 5); /* SGMII in Slot3 */ fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR); - fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR); + fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR); break; case 0x71: /* SGMII in Slot3 */ @@ -449,7 +451,12 @@ int board_eth_init(bd_t *bis) fm_info_set_mdio(i, mii_dev_for_muxval( mdio_mux[i])); break; - }; + case 3: + mdio_mux[i] = EMI1_SLOT3; + fm_info_set_mdio(i, mii_dev_for_muxval( + mdio_mux[i])); + break; + } break; case PHY_INTERFACE_MODE_RGMII: if (i == FM1_DTSEC3) diff --git a/board/freescale/t2080qds/t2080qds.c b/board/freescale/t2080qds/t2080qds.c index cac32fe..4fe8ccb 100644 --- a/board/freescale/t2080qds/t2080qds.c +++ b/board/freescale/t2080qds/t2080qds.c @@ -40,6 +40,11 @@ int checkboard(void) printf("Sys ID: 0x%02x, Board Arch: V%d, ", QIXIS_READ(id), sw >> 4); printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1); +#ifdef CONFIG_SDCARD + puts("SD/MMC\n"); +#elif CONFIG_SPIFLASH + puts("SPI\n"); +#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -51,6 +56,7 @@ int checkboard(void) puts("NAND\n"); else printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); +#endif printf("FPGA: v%d (%s), build %d", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor()); @@ -97,13 +103,25 @@ int brd_mux_lane_to_slot(void) /* SerDes1 is not enabled */ break; case 0x1c: - case 0x95: case 0xa2: - case 0x94: /* SD1(A:D) => SLOT3 SGMII * SD1(G:H) => SLOT1 SGMII */ - QIXIS_WRITE(brdcfg[12], 0x58); + QIXIS_WRITE(brdcfg[12], 0x1a); + break; + case 0x94: + case 0x95: + /* SD1(A:B) => SLOT3 SGMII(a)1.25bps + * SD1(C:D) => SFP Module, SGMII(a)3.125bps + * SD1(E:H) => SLOT1 SGMII(a)1.25bps + */ + case 0x96: + /* SD1(A:B) => SLOT3 SGMII(a)1.25bps + * SD1(C) => SFP Module, SGMII(a)3.125bps + * SD1(D) => SFP Module, SGMII(a)1.25bps + * SD1(E:H) => SLOT1 PCIe4 x4 + */ + QIXIS_WRITE(brdcfg[12], 0x3a); break; case 0x51: /* SD1(A:D) => SLOT3 XAUI @@ -134,6 +152,34 @@ int brd_mux_lane_to_slot(void) */ QIXIS_WRITE(brdcfg[12], 0xda); break; + case 0x6e: + /* SD1(A:B) => SFP Module, XFI + * SD1(C:D) => SLOT3 SGMII + * SD1(E:F) => SLOT1 PCIe4 x2 + * SD1(G:H) => SLOT2 SGMII + */ + QIXIS_WRITE(brdcfg[12], 0xd9); + break; + case 0xda: + /* SD1(A:H) => SLOT3 PCIe3 x8 + */ + QIXIS_WRITE(brdcfg[12], 0x0); + break; + case 0xc8: + /* SD1(A) => SLOT3 PCIe3 x1 + * SD1(B) => SFP Module, SGMII(a)1.25bps + * SD1(C:D) => SFP Module, SGMII(a)3.125bps + * SD1(E:F) => SLOT1 PCIe4 x2 + * SD1(G:H) => SLOT2 SGMII + */ + QIXIS_WRITE(brdcfg[12], 0x79); + break; + case 0xab: + /* SD1(A:D) => SLOT3 PCIe3 x4 + * SD1(E:H) => SLOT1 PCIe4 x4 + */ + QIXIS_WRITE(brdcfg[12], 0x1a); + break; default: printf("WARNING: unsupported for SerDes1 Protocol %d\n", srds_prtcl_s1); @@ -147,7 +193,7 @@ int brd_mux_lane_to_slot(void) case 0x01: case 0x02: /* SD2(A:H) => SLOT4 PCIe1 */ - QIXIS_WRITE(brdcfg[13], 0x20); + QIXIS_WRITE(brdcfg[13], 0x10); break; case 0x15: case 0x16: @@ -164,7 +210,7 @@ int brd_mux_lane_to_slot(void) * SD2(E:F) => SLOT5 Aurora * SD2(G:H) => SATA1,SATA2 */ - QIXIS_WRITE(brdcfg[13], 0x70); + QIXIS_WRITE(brdcfg[13], 0x78); break; case 0x1f: /* @@ -180,7 +226,15 @@ int brd_mux_lane_to_slot(void) * SD2(A:D) => SLOT4 SRIO2 * SD2(E:H) => SLOT5 SRIO1 */ - QIXIS_WRITE(brdcfg[13], 0x50); + QIXIS_WRITE(brdcfg[13], 0xa0); + break; + case 0x36: + /* + * SD2(A:D) => SLOT4 SRIO2 + * SD2(E:F) => Aurora + * SD2(G:H) => SATA1,SATA2 + */ + QIXIS_WRITE(brdcfg[13], 0x78); break; default: printf("WARNING: unsupported for SerDes2 Protocol %d\n", diff --git a/drivers/net/fm/t2080.c b/drivers/net/fm/t2080.c index b5c1e9f..3b6212f 100644 --- a/drivers/net/fm/t2080.c +++ b/drivers/net/fm/t2080.c @@ -50,15 +50,17 @@ phy_interface_t fman_port_enet_if(enum fm_port port) if (is_device_disabled(port)) return PHY_INTERFACE_MODE_NONE; - if ((port == FM1_10GEC1 || port == FM1_10GEC2 || - port == FM1_10GEC3 || port == FM1_10GEC4) && + if ((port == FM1_10GEC1 || port == FM1_10GEC2) && ((is_serdes_configured(XAUI_FM1_MAC9)) || - (is_serdes_configured(XFI_FM1_MAC1)) || - (is_serdes_configured(XFI_FM1_MAC2)) || (is_serdes_configured(XFI_FM1_MAC9)) || (is_serdes_configured(XFI_FM1_MAC10)))) return PHY_INTERFACE_MODE_XGMII; + if ((port == FM1_10GEC3 || port == FM1_10GEC4) && + ((is_serdes_configured(XFI_FM1_MAC1)) || + (is_serdes_configured(XFI_FM1_MAC2)))) + return PHY_INTERFACE_MODE_XGMII; + if ((port == FM1_DTSEC3) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC1) == FSL_CORENET_RCWSR13_EC1_DTSEC3_RGMII)) return PHY_INTERFACE_MODE_RGMII; -- 1.8.0

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