January 2013 - U-Boot

[U-Boot] [PATCH V3 0/7] Add splash screen for CM-T35
by Nikita Kiryanov 10 Mar '13

10 Mar '13

This patchset adds splash screen support for CM-T35. It includes the ability to initialize the display subsystem either using predefines (selected via env variable "displaytype"), or user supplied configuration options, also stored in an environment variables and pointed to by displaytype. The splash image data is currently read from NAND. As a preparation for the above functionality this patchset adds: - new DSS #defines - an option for board-specific splash screen preparation, which can be invoked in lcd_logo() right before displaying the splash screen (typical use case: load the image data from non-memory mapped storage in time for it to be displayed). - struct panel_config is extended to support setting the gfx_format dynamically - protection from data aborts due to unaligned bmp headers is added to lcd_logo's splashscreen section (I'm also looking into refining this protection later on). Changes in V3: - No unnecessary #defines in arch-omap3/dss.h [Wolfgang Denk] - Reworded patch 2 comment [Wolfgang Denk] - Used a #define for cmap addr [Wolfgang Denk] Changes in V2: - DSS #defines are defined shiften where possible [Jeroen Hofstee] - GFXFORMAT_RGB16 now passed to omap3_dss_panel_config() in a new field of panel_cfg. Updated existing panel_config structs to set this field to the value that was originally hardcoded into omap3_dss_panel_config(). [Jeroen Hofstee] - Used LCD_BPP for vl_bpix. [Jeroen Hofstee] - Added a comment to explain the choice of GFXFORMAT_RGB16. [Jeroen Hofstee] - Added an address check (and fix) to the address of splashimage in order to avoid alignment problems with bmp header. A similar check appears in board_splash_screen_prepare() for cm_t35. [Albert ARIBAUD] - Do not manually set gfx burst size to GFXBURSTSIZE16, as it is apparently not necessary. GFXBURSTSIZE* #defines were kept in patch 1 anyway in the hope they will be useful for someone. Nikita Kiryanov (7): omap3: add useful dss defines omap3: allow dynamic selection of gfx_format lcd: prevent unaligned memory access when displaying splash screen lcd: add option for board specific splash screen preparation cm-t35: add support for dvi displays cm-t35: add support for user defined lcd parameters cm-t35: add support for loading splash image from NAND README | 8 + arch/arm/include/asm/arch-omap3/dss.h | 31 +++ board/cm_t35/Makefile | 1 + board/cm_t35/cm_t35.c | 68 ++++++ board/cm_t35/display.c | 428 +++++++++++++++++++++++++++++++++ board/htkw/mcx/mcx.c | 1 + board/teejet/mt_ventoux/mt_ventoux.c | 2 + board/ti/beagle/beagle.h | 6 +- common/lcd.c | 23 ++ drivers/video/omap3_dss.c | 2 +- include/configs/cm_t35.h | 11 + include/lcd.h | 1 + 12 files changed, 579 insertions(+), 3 deletions(-) create mode 100644 board/cm_t35/display.c -- 1.7.10.4

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[U-Boot] [RFC PATCH 0/22] RFC: image: Reduce code duplication and refactor
by Simon Glass 09 Mar '13

09 Mar '13

In creating a new feature[*] I found that the image code includes quite a bit of duplication in places. In particular the code to load a kernel, FDT and ramdisk is all fairly similar, but subtly different. This series introduces a new function fit_image_load() which loads an image from a FIT and supports the various features. For the bootstage updates, these are standardised so that each file has its own range and the events within that range have corresponding numbers. This means that the boot progress numbers will change slightly with this series. The image.c file is still very long. Rather than perpetuate the #ifdefs in the code I have split out the image.c code that is dependent on CONFIG_OF_LIBFDT into image-fdt.c. Several architectures have their own way of setting up a ramdisk and FDT for booting. An attempt is made here to unify these by providing a function image_setup_linux() to handle the overall task, and image_setup_fdt() to set up the FDT. For ARM, the bootm code is a maze of #ifdefs, which means that many boards compile the code differently and it takes longer to detect breakages. To get around this, some defines are added to ARM's bootm.h to permit the use of if() instead of #ifdef, making use of the compiler's dead code elimination. Also this series introduces a very basic test of image loading using sandbox. Some patches add bootm support for sandbox, and also a 'sb save' command to save memory to a host file (used to check that the bootm actually worked). A test program for sandbox is added as a basic sanity check of image loading as performed by bootm. This series depends on the verified boot series since it builds on the clean-up in that. You can get this series from: http://git.denx.de/u-boot-x86.git branch name 'image'. * The new feature is support for FIT booting on x86, will get back to this later. Simon Glass (22): sandbox: Allow -c argument to provide a command list sandbox: Support 'source' command fs: Add support for saving data to filesystems sandbox: fs: Add support for saving files to host filesystem image: Split libfdt code into image-fdt.c image: Add device tree setup to image library arm: Refactor bootm to reduce #ifdefs arm: Use image_setup_linux() instead of local code powerpc: Use image_setup_linux() instead of local code m68k: Use image_setup_linux() instead of local code sparc: Use image_setup_linux() instead of local code bootstage: Introduce sub-IDs for use with image loading mkimage: Add map_sysmem() and IH_ARCH_DEFAULT to simplfy building image: Introduce fit_image_load() to load images from FITs image: Use fit_image_load() to load ramdisk image: Use fit_image_load() to load FDT sandbox: Adjust bootm command to work with sandbox image: Use fit_image_load() to load kernel sandbox: image: Adjust FIT image printing to work with sandbox bootstage: Remove unused entries related to kernel/ramdisk/fdt load sandbox: image: Create a test for loading FIT images WIP: sandbox: config: Remove boot command arch/arm/include/asm/bootm.h | 54 +++- arch/arm/include/asm/u-boot-arm.h | 2 - arch/arm/lib/Makefile | 1 + arch/arm/lib/bootm-fdt.c | 52 +++ arch/arm/lib/bootm.c | 145 +------- arch/m68k/lib/bootm.c | 15 +- arch/powerpc/lib/bootm.c | 84 +----- arch/sandbox/cpu/start.c | 2 +- arch/sparc/lib/bootm.c | 13 +- common/Makefile | 1 + common/cmd_bootm.c | 182 ++-------- common/cmd_sandbox.c | 18 +- common/cmd_source.c | 11 +- common/image-fdt.c | 512 +++++++++++++++++++++++++ common/image-fit.c | 293 +++++++++++----- common/image.c | 738 ++++--------------------------------- fs/fs.c | 75 ++++ fs/sandbox/sandboxfs.c | 33 ++ include/bootstage.h | 51 ++-- include/common.h | 9 + include/configs/sandbox.h | 1 - include/fdt_support.h | 2 - include/fs.h | 2 + include/image.h | 145 +++++++- include/lmb.h | 2 - include/sandboxfs.h | 1 + test/image/test-fit.py | 422 +++++++++++++++++++++ tools/mkimage.h | 12 + 28 files changed, 1674 insertions(+), 1204 deletions(-) create mode 100644 arch/arm/lib/bootm-fdt.c create mode 100644 common/image-fdt.c create mode 100755 test/image/test-fit.py -- 1.7.7.3

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[U-Boot] [PATCH 1/2] powerpc/82xx/km: make handle_mgcoge3un_reset static
by Holger Brunck 09 Mar '13

09 Mar '13

Signed-off-by: Holger Brunck <holger.brunck(a)keymile.com> --- board/keymile/km82xx/km82xx.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index 67b69f6..8cf3035 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -370,7 +370,7 @@ static void set_pin(int state, unsigned long mask); * will toggle once what forces the mgocge3un part to restart * immediately. */ -void handle_mgcoge3un_reset(void) +static void handle_mgcoge3un_reset(void) { char *bobcatreset = getenv("bobcatreset"); if (bobcatreset) { -- 1.7.1

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[U-Boot] [PATCH] mpc5200: spl_boot.c: Change init oder to first enable printf
by Stefan Roese 09 Mar '13

09 Mar '13

On MPC5200, the initial RAM (and gd) is located in the internal SRAM. So we can actually call the preloader console init code before calling initdram(). This makes serial output (printf) available very early, even before SDRAM init, which has been an U-Boot priciple from day 1. Signed-off-by: Stefan Roese <sr(a)denx.de> --- arch/powerpc/cpu/mpc5xxx/spl_boot.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc5xxx/spl_boot.c b/arch/powerpc/cpu/mpc5xxx/spl_boot.c index 9f14127..080bd58 100644 --- a/arch/powerpc/cpu/mpc5xxx/spl_boot.c +++ b/arch/powerpc/cpu/mpc5xxx/spl_boot.c @@ -41,13 +41,12 @@ void board_init_f(ulong bootflag) end_align = (u32)__spl_flash_end; /* - * First we need to initialize the SDRAM, so that the real - * U-Boot or the OS (Linux) can be loaded + * On MPC5200, the initial RAM (and gd) is located in the internal + * SRAM. So we can actually call the preloader console init code + * before calling initdram(). This makes serial output (printf) + * available very early, even before SDRAM init, which has been + * an U-Boot priciple from day 1. */ - initdram(0); - - /* Clear bss */ - memset(__bss_start, '\0', __bss_end__ - __bss_start); /* * Init global_data pointer. Has to be done before calling @@ -71,6 +70,15 @@ void board_init_f(ulong bootflag) preloader_console_init(); /* + * First we need to initialize the SDRAM, so that the real + * U-Boot or the OS (Linux) can be loaded + */ + initdram(0); + + /* Clear bss */ + memset(__bss_start, '\0', __bss_end__ - __bss_start); + + /* * Call board_init_r() (SPL framework version) to load and boot * real U-Boot or OS */ -- 1.8.0.1

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[U-Boot] [PATCH 0/7] omap mmc: implement card detect and write protection
by Nikita Kiryanov 09 Mar '13

09 Mar '13

This patchset implements card detection and write protection check for omap mmc. The write protect implementation also adds generic code that is usable by other mmc drivers. The first 3 patches are preparation patches that contain general maintenance for omap mmc driver. This patchset depends on http://patchwork.ozlabs.org/patch/202384/ Nikita Kiryanov (7): omap: consolidate common mmc definitions omap_hsmmc: fix out of bounds array access omap_hsmmc: introduce omap_hsmmc_data struct omap_hsmmc: implement driver check for card detection cm-t35: implement board specific card detect check mmc: add support for write protection omap_hsmmc: add driver check for write protection arch/arm/cpu/armv7/am33xx/board.c | 4 +- arch/arm/cpu/armv7/omap-common/boot-common.c | 4 +- arch/arm/cpu/armv7/omap3/board.c | 4 +- arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 140 +------------------ arch/arm/include/asm/arch-omap3/mmc_host_def.h | 139 +------------------ arch/arm/include/asm/arch-omap4/mmc_host_def.h | 140 +------------------ arch/arm/include/asm/arch-omap5/mmc_host_def.h | 140 +------------------ arch/arm/include/asm/omap_mmc.h | 168 +++++++++++++++++++++++ board/cm_t35/cm_t35.c | 13 +- board/comelit/dig297/dig297.c | 3 +- board/corscience/tricorder/tricorder.c | 2 +- board/htkw/mcx/mcx.c | 2 +- board/isee/igep0020/igep0020.c | 3 +- board/isee/igep0030/igep0030.c | 3 +- board/logicpd/am3517evm/am3517evm.c | 3 +- board/logicpd/omap3som/omap3logic.c | 2 +- board/logicpd/zoom1/zoom1.c | 3 +- board/logicpd/zoom2/zoom2.c | 3 +- board/matrix_vision/mvblx/mvblx.c | 4 +- board/nokia/rx51/rx51.c | 4 +- board/overo/overo.c | 3 +- board/pandora/pandora.c | 3 +- board/technexion/twister/twister.c | 2 +- board/teejet/mt_ventoux/mt_ventoux.c | 2 +- board/ti/am3517crane/am3517crane.c | 3 +- board/ti/beagle/beagle.c | 3 +- board/ti/evm/evm.c | 3 +- board/ti/omap5_evm/evm.c | 4 +- board/ti/panda/panda.c | 3 +- board/ti/sdp3430/sdp.c | 3 +- board/ti/sdp4430/sdp.c | 4 +- board/timll/devkit8000/devkit8000.c | 3 +- common/cmd_mmc.c | 7 + drivers/mmc/arm_pl180_mmci.c | 1 + drivers/mmc/bfin_sdh.c | 1 + drivers/mmc/davinci_mmc.c | 1 + drivers/mmc/fsl_esdhc.c | 1 + drivers/mmc/ftsdc010_esdhc.c | 1 + drivers/mmc/gen_atmel_mci.c | 1 + drivers/mmc/mmc.c | 17 +++ drivers/mmc/mmc_spi.c | 1 + drivers/mmc/mxcmmc.c | 1 + drivers/mmc/mxsmmc.c | 1 + drivers/mmc/omap_hsmmc.c | 78 +++++++++-- drivers/mmc/sdhci.c | 1 + drivers/mmc/sh_mmcif.c | 1 + drivers/mmc/tegra_mmc.c | 1 + include/mmc.h | 2 + 48 files changed, 324 insertions(+), 612 deletions(-) create mode 100644 arch/arm/include/asm/omap_mmc.h -- 1.7.10.4

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Re: [U-Boot] Atheros "ART" data crc calculation
by Dmytro 09 Mar '13

09 Mar '13

Hello again Allan, Can you on work device (with correct ART section and with no checksum error), enter the u-boot command - "printenv" ? Also would you please share your ART section of the same device? Idea is this, it is necessary to calculate the checksum of ART section (only not clearly what part of the calculate, with empty sectors "FF" or workspace) in CRC32 format, then correct this checksum in "buf_crc" environment variable. https://forum.openwrt.org/viewtopic.php?pid=153580#p153580 Best regards, Dmytro

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[U-Boot] [PATCH] powerpc: fix 8xx and 82xx type-punning warnings with GCC 4.7
by Scott Wood 09 Mar '13

09 Mar '13

C99's strict aliasing rules are insane to use in low-level code such as a bootloader, but as Wolfgang has rejected -fno-strict-aliasing in the past, add a union so that 16-bit accesses can be performed. Compile-tested only. Signed-off-by: Scott Wood <scottwood(a)freescale.com> --- arch/powerpc/cpu/mpc8260/commproc.c | 2 +- arch/powerpc/cpu/mpc8260/cpu.c | 2 +- arch/powerpc/cpu/mpc8260/i2c.c | 8 ++++---- arch/powerpc/cpu/mpc8260/serial_smc.c | 4 ++-- arch/powerpc/cpu/mpc8260/spi.c | 2 +- arch/powerpc/cpu/mpc8xx/cpu.c | 6 +++--- arch/powerpc/include/asm/8xx_immap.h | 7 ++++++- arch/powerpc/include/asm/immap_8260.h | 19 ++++++++++++------- common/cmd_immap.c | 2 +- examples/standalone/mem_to_mem_idma2intr.c | 3 ++- 10 files changed, 33 insertions(+), 22 deletions(-) diff --git a/arch/powerpc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c index 082957e..70af613 100644 --- a/arch/powerpc/cpu/mpc8260/commproc.c +++ b/arch/powerpc/cpu/mpc8260/commproc.c @@ -43,7 +43,7 @@ m8260_cpm_reset(void) } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000); #ifdef CONFIG_HARD_I2C - *((unsigned short*)(&immr->im_dprambase[PROFF_I2C_BASE])) = 0; + immr->im_dprambase16[PROFF_I2C_BASE / 2] = 0; #endif } diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c index 220c1e2..85d209e 100644 --- a/arch/powerpc/cpu/mpc8260/cpu.c +++ b/arch/powerpc/cpu/mpc8260/cpu.c @@ -107,7 +107,7 @@ int checkcpu (void) * in the mask. */ m = immr & (IMMR_PARTNUM_MSK | IMMR_MASKNUM_MSK); - k = *((ushort *) & immap->im_dprambase[PROFF_REVNUM]); + k = immap->im_dprambase16[PROFF_REVNUM / 2]; switch (m) { case 0x0000: diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c index 7382cba..70c1b6f 100644 --- a/arch/powerpc/cpu/mpc8260/i2c.c +++ b/arch/powerpc/cpu/mpc8260/i2c.c @@ -221,14 +221,14 @@ void i2c_init(int speed, int slaveadd) i2c_init_board(); #endif - dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / 2]; if (dpaddr == 0) { /* need to allocate dual port ram */ dpaddr = m8260_cpm_dpalloc(64 + (NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) + MAX_TX_SPACE, 64); - *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])) = + immap->im_dprambase16[PROFF_I2C_BASE / 2] = dpaddr; } @@ -305,7 +305,7 @@ void i2c_newio(i2c_state_t *state) debug("[I2C] i2c_newio\n"); - dpaddr = *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / 2]; iip = (iic_t *)&immap->im_dprambase[dpaddr]; state->rx_idx = 0; state->tx_idx = 0; @@ -480,7 +480,7 @@ int i2c_doio(i2c_state_t *state) return I2CERR_QUEUE_EMPTY; } - dpaddr = *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / 2]; iip = (iic_t *)&immap->im_dprambase[dpaddr]; iip->iic_rbptr = iip->iic_rbase; iip->iic_tbptr = iip->iic_tbase; diff --git a/arch/powerpc/cpu/mpc8260/serial_smc.c b/arch/powerpc/cpu/mpc8260/serial_smc.c index feba1f6..50c81ed 100644 --- a/arch/powerpc/cpu/mpc8260/serial_smc.c +++ b/arch/powerpc/cpu/mpc8260/serial_smc.c @@ -105,7 +105,7 @@ static int mpc8260_smc_serial_init(void) /* initialize pointers to SMC */ sp = (smc_t *) &(im->im_smc[SMC_INDEX]); - *(ushort *)(&im->im_dprambase[PROFF_SMC_BASE]) = PROFF_SMC; + im->im_dprambase16[PROFF_SMC_BASE / 2] = PROFF_SMC; up = (smc_uart_t *)&im->im_dprambase[PROFF_SMC]; /* Disable transmitter/receiver. */ @@ -331,7 +331,7 @@ kgdb_serial_init (void) /* initialize pointers to SMC */ sp = (smc_t *) &(im->im_smc[KGDB_SMC_INDEX]); - *(ushort *)(&im->im_dprambase[KGDB_PROFF_SMC_BASE]) = KGDB_PROFF_SMC; + im->im_dprambase16[KGDB_PROFF_SMC_BASE / 2] = KGDB_PROFF_SMC; up = (smc_uart_t *)&im->im_dprambase[KGDB_PROFF_SMC]; /* Disable transmitter/receiver. */ diff --git a/arch/powerpc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c index dc98ea7..24386a5 100644 --- a/arch/powerpc/cpu/mpc8260/spi.c +++ b/arch/powerpc/cpu/mpc8260/spi.c @@ -146,7 +146,7 @@ void spi_init_f (void) immr = (immap_t *) CONFIG_SYS_IMMR; cp = (cpm8260_t *) &immr->im_cpm; - *(ushort *)(&immr->im_dprambase[PROFF_SPI_BASE]) = PROFF_SPI; + immr->im_dprambase16[PROFF_SPI_BASE / 2] = PROFF_SPI; spi = (spi_t *)&immr->im_dprambase[PROFF_SPI]; /* 1 */ diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c index b3fcfe5..4a11d10 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu.c +++ b/arch/powerpc/cpu/mpc8xx/cpu.c @@ -79,7 +79,7 @@ static int check_CPU (long clock, uint pvr, uint immr) if ((pvr >> 16) != 0x0050) return -1; - k = (immr << 16) | *((ushort *) & immap->im_cpm.cp_dparam[0xB0]); + k = (immr << 16) | immap->im_cpm.cp_dparam16[0xB0 / 2]; m = 0; suf = ""; @@ -195,7 +195,7 @@ static int check_CPU (long clock, uint pvr, uint immr) if ((pvr >> 16) != 0x0050) return -1; - k = (immr << 16) | *((ushort *) & immap->im_cpm.cp_dparam[0xB0]); + k = (immr << 16) | in_be16((ushort *)&immap->im_cpm.cp_dparam[0xB0]); m = 0; switch (k) { @@ -313,7 +313,7 @@ static int check_CPU (long clock, uint pvr, uint immr) if ((pvr >> 16) != 0x0050) return -1; - k = (immr << 16) | *((ushort *) & immap->im_cpm.cp_dparam[0xB0]); + k = (immr << 16) | in_be16((ushort *)&immap->im_cpm.cp_dparam[0xB0]); m = 0; switch (k) { diff --git a/arch/powerpc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/8xx_immap.h index 40679cb..01129ed 100644 --- a/arch/powerpc/include/asm/8xx_immap.h +++ b/arch/powerpc/include/asm/8xx_immap.h @@ -485,7 +485,12 @@ typedef struct comm_proc { * Some processors don't have all of it populated. */ u_char cp_dpmem[0x1C00]; /* BD / Data / ucode */ - u_char cp_dparam[0x400]; /* Parameter RAM */ + + /* Parameter RAM */ + union { + u_char cp_dparam[0x400]; + u16 cp_dparam16[0x200]; + }; } cpm8xx_t; /* Internal memory map. diff --git a/arch/powerpc/include/asm/immap_8260.h b/arch/powerpc/include/asm/immap_8260.h index 4974ae5..c7021a7 100644 --- a/arch/powerpc/include/asm/immap_8260.h +++ b/arch/powerpc/include/asm/immap_8260.h @@ -526,13 +526,18 @@ typedef struct immap { /* Some references are into the unique and known dpram spaces, * others are from the generic base. */ -#define im_dprambase im_dpram1 - u_char im_dpram1[16*1024]; - char res1[16*1024]; - u_char im_dpram2[4*1024]; - char res2[8*1024]; - u_char im_dpram3[4*1024]; - char res3[16*1024]; + union { + struct { + u_char im_dpram1[16 * 1024]; + char res1[16 * 1024]; + u_char im_dpram2[4 * 1024]; + char res2[8 * 1024]; + u_char im_dpram3[4 * 1024]; + char res3[16 * 1024]; + }; + u8 im_dprambase[64 * 1024]; + u16 im_dprambase16[32 * 1024]; + }; sysconf8260_t im_siu_conf; /* SIU Configuration */ memctl8260_t im_memctl; /* Memory Controller */ diff --git a/common/cmd_immap.c b/common/cmd_immap.c index 1f59c1e..1fcc13d 100644 --- a/common/cmd_immap.c +++ b/common/cmd_immap.c @@ -535,7 +535,7 @@ do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) volatile iic_t *iip; uint dpaddr; - dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / 2]; if (dpaddr == 0) iip = NULL; else diff --git a/examples/standalone/mem_to_mem_idma2intr.c b/examples/standalone/mem_to_mem_idma2intr.c index d0a75ea..1b83876 100644 --- a/examples/standalone/mem_to_mem_idma2intr.c +++ b/examples/standalone/mem_to_mem_idma2intr.c @@ -309,7 +309,8 @@ int idma_init (void) memaddr = dpalloc (sizeof (pram_idma_t), 64); - *(volatile ushort *) &immap->im_dprambase[PROFF_IDMA2_BASE] = memaddr; + *(volatile u16 *)&immap->im_dprambase16[PROFF_IDMA2_BASE / 2] = + memaddr; piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr); piptr->pi_resv1 = 0; /* manual says: clear it */ -- 1.7.9.5

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[U-Boot] [PATCH 00/12] cmd_sf: Add support for read and write instructions
by Jagannadha Sutradharudu Teki 09 Mar '13

09 Mar '13

All these patches are added a support for read and write instruction for programming/reading SPI flash. Read and Write instruction are implemented as a command line arguments for 'sf write' , 'sf read' and 'sf update' commands. Currently I have added below instructions those are commonly available on all flash types. pp - Page Program (existing one) qpp - Quad-input Page Program afr - Array Fast Read (existing one) asr - Array Slow Read dofr - Dual Output Fast Read qofr - Quad Output Fast Read diofr - Dual IO Fast Read qiofr - Quad IO Fast Read I have tested mostly of the instruction on real h/w. This entire implementation will change the current sf framework little bit but I thought these changes are worth to add. Request for all your comment, so-that I can move forward. Please let me know for any issue regarding this new implementation. Thanks, Jagan. Jagannadha Sutradharudu Teki (12): cmd_sf: Add wr_inst argument to 'sf write' command cmd_sf: Add rd_inst argument to 'sf read' command cmd_sf: Add wr_inst argument to 'sf update' command cmd_sf: Add rd_inst argument to 'sf update' command cmd_sf: Define a functions for parsing read and write instructions cmd_sf: Add QPP(Quad-input Page Program) write instruction support cmd_sf: Add ASR(Array Slow Read) read instruction support cmd_sf: Add DOFR(Dual Output Fast Read) read instruction support cmd_sf: Add QOFR(Quad Output Fast Read) read instruction support cmd_sf: Add DIOFR(Dual IO Fast Read) read instruction support cmd_sf: Add QIOFR(Quad IO Fast Read) read instruction support sf: Pass rd_qeb_req variable as 0 for status and config reg reads common/cmd_sf.c | 198 +++++++++++++++++++++++++++++----- drivers/mtd/spi/spi_flash.c | 40 +++++-- drivers/mtd/spi/spi_flash_internal.h | 10 +- include/spi_flash.h | 22 ++-- include/spi_flash_inst.h | 39 +++++++ 5 files changed, 257 insertions(+), 52 deletions(-) create mode 100644 include/spi_flash_inst.h

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[U-Boot] [RFC] Add Nitrogen6x support.
by Eric Nelson 09 Mar '13

09 Mar '13

I'd like to get some feedback on this patch set which adds support for our Nitrogen6X series of boards because this patch introduces some additional feature for i.MX6x processors specifically, but possibly other i.MX processors as well. To give a little background, we're supporting a variety of i.MX6 processors with out Nitrogen6X product, including the Dual-Lite and Solo processors. Some of this has been discussed on the mailing list, most recently here: http://lists.denx.de/pipermail/u-boot/2013-January/#144323 To give a little background, the i.MX6x architecture has three major variants: i.MX6 Quad and i.MX6 Dual i.MX6 Dual-Lite and i.MX6 Solo i.MX6 Solo Lite Because the first two are pin compatible, those variants are what we're supporting in this product line. Unfortunately, they have differing register locations, and also support different DDR clock rates (1066MHz on Quad/Dual and 800MHz on Dual-Lite/Solo). To simplify support for the two, we recently pushed patches adding support for the preprocessor to the 'imximage' utility and these have been merged. This allows us to define a single set of DCD data to configure portions of the device setup like this line from board/boundary/ddr-setup.cfg: DATA 4, IOM_DRAM_SDQS0, 0x00000030 The address of IOM_DRAM_SDQS0 depends on which processor variant is used. To resolve this, we've introduced header files arch/arm/include/asm/arch-mx6/mx6q-ddr.h and arch/arm/include/asm/arch-mx6/mx6dl-ddr.h The 'q' refers to Quad/Dual. The 'dl' refers to Dual-Lite/Solo. To make things simpler, we've added this header file, which includes one of the headers above based on whether we're compiling for MX6Q or MX6DL. arch/arm/include/asm/arch-mx6/mx6-ddr.h The net result seems to be fairly clean. We're able to express the various boards concisely in these files within board/boundary/nitrogen6x: board/boundary/nitrogen6x/nitrogen6dl2g.cfg board/boundary/nitrogen6x/nitrogen6dl.cfg board/boundary/nitrogen6x/nitrogen6q2g.cfg board/boundary/nitrogen6x/nitrogen6q.cfg board/boundary/nitrogen6x/nitrogen6s1g.cfg board/boundary/nitrogen6x/nitrogen6s.cfg By using the preprocessor, we were also able to separate common setup for clocks and DDR from the specific memory arrangements that differentiate some of our boards: clocks.cfg ddr-setup.cfg 1066mhz_4x128mx16.cfg 1066mhz_4x256mx16.cfg 800mhz_2x128mx16.cfg 800mhz_2x256mx16.cfg 800mhz_4x128mx16.cfg 800mhz_4x256mx16.cfg We're trying to keep the nomenclature consistent: 6x - refers to things that are independent of the variant used 6q - refers to the 6Quad/6Dual variant 6dl - refers to the 6Dual-Lite/6Solo Note that this differs from what's currently done in some other i.MX6 headers. For example, arch/arm/include/asm/arch-mx6/mx6x_pins.h defines the pad setting for UART2 using symbol MX6Q_PAD_EIM_D26__UART2_TXD while arch/arm/include/asm/arch-mx6/mx6dl_pins.h defines MX6DL_PAD_EIM_D26__UART2_TXD This necessitated a bit of preprocessor-fu in nitrogen6x.c where we create a common MX6PAD macro: #ifdef FOR_DL_SOLO #define MX6PAD(a) MX6DL_PAD_##a #else #define MX6PAD(a) MX6Q_PAD_##a #endif and use it later like this: MX6PAD(EIM_D26__UART2_TXD) It seems worthwhile to rename mx6x_pins.h to mx6q_pins.h and also change the pad declarations so that other boards can avoid the MX6PAD() macro. I also suggest that we add an intermediate mx6_pins.h or mx6x_pins.h file that includes the appropriate file based on the processor macro. There are a couple of other changes to common files that I'll break out before submitting this officially, but I'm hoping to get some feedback first. Eric Nelson (1): Add support for Boundary Devices Nitrogen6x boards MAINTAINERS | 8 + arch/arm/include/asm/arch-mx6/crm_regs.h | 12 + arch/arm/include/asm/arch-mx6/iomux.h | 5 + arch/arm/include/asm/arch-mx6/mx6-ddr.h | 73 ++ arch/arm/include/asm/arch-mx6/mx6dl-ddr.h | 59 ++ arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 3 + arch/arm/include/asm/arch-mx6/mx6q-ddr.h | 57 ++ board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg | 37 + board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg | 37 + board/boundary/nitrogen6x/6x_bootscript.txt | 58 ++ .../boundary/nitrogen6x/6x_bootscript_android.txt | 64 ++ .../nitrogen6x/6x_bootscript_android_recovery.txt | 64 ++ board/boundary/nitrogen6x/6x_upgrade.txt | 46 + board/boundary/nitrogen6x/800mhz_2x128mx16.cfg | 37 + board/boundary/nitrogen6x/800mhz_2x256mx16.cfg | 37 + board/boundary/nitrogen6x/800mhz_4x128mx16.cfg | 37 + board/boundary/nitrogen6x/800mhz_4x256mx16.cfg | 37 + board/boundary/nitrogen6x/Makefile | 41 + board/boundary/nitrogen6x/README | 93 ++ board/boundary/nitrogen6x/clocks.cfg | 31 + board/boundary/nitrogen6x/ddr-setup.cfg | 94 ++ board/boundary/nitrogen6x/nitrogen6dl.cfg | 46 + board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 46 + board/boundary/nitrogen6x/nitrogen6q.cfg | 46 + board/boundary/nitrogen6x/nitrogen6q2g.cfg | 46 + board/boundary/nitrogen6x/nitrogen6s.cfg | 46 + board/boundary/nitrogen6x/nitrogen6s1g.cfg | 46 + board/boundary/nitrogen6x/nitrogen6x.c | 901 ++++++++++++++++++++ boards.cfg | 6 + drivers/usb/host/ehci-mx6.c | 1 - include/configs/nitrogen6x.h | 284 ++++++ 31 files changed, 2397 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-mx6/mx6-ddr.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl-ddr.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6q-ddr.h create mode 100644 board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg create mode 100644 board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg create mode 100644 board/boundary/nitrogen6x/6x_bootscript.txt create mode 100644 board/boundary/nitrogen6x/6x_bootscript_android.txt create mode 100644 board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt create mode 100644 board/boundary/nitrogen6x/6x_upgrade.txt create mode 100644 board/boundary/nitrogen6x/800mhz_2x128mx16.cfg create mode 100644 board/boundary/nitrogen6x/800mhz_2x256mx16.cfg create mode 100644 board/boundary/nitrogen6x/800mhz_4x128mx16.cfg create mode 100644 board/boundary/nitrogen6x/800mhz_4x256mx16.cfg create mode 100644 board/boundary/nitrogen6x/Makefile create mode 100644 board/boundary/nitrogen6x/README create mode 100644 board/boundary/nitrogen6x/clocks.cfg create mode 100644 board/boundary/nitrogen6x/ddr-setup.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6dl.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6dl2g.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6q.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6q2g.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6s.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6s1g.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6x.c create mode 100644 include/configs/nitrogen6x.h -- 1.7.9.5

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[U-Boot] [PATCH 0/15] Enhance SPI/SPI flash probing, add support for Intel ICH controller
by Simon Glass 08 Mar '13

08 Mar '13

Adding new fields to struct spi_slave and struct spi_flash is painful, because most drivers don't zero the fields they don't use. Anyway it seems better to have the SPI/SPI flash infrastructure provide a simple way of doing this that all drivers can use. So the first part of this series adds spi_alloc_slave(), for SPI, and spi_flash_alloc() for SPI flash. Support is added for the Intel ICH SPI controller, possibly the oddest SPI controller in U-Boot. It is designed for use with SPI flash only, and has a number of high-level features which are dedicated to flash. As such it is a bit of a challenge to get it to behave just like a normal U-Boot SPI device. The ICH driver has two interesting features. Firstly it is impossible to read or write more than 64 bytes at a time! For SPI reading it is possible to hide this within the SPI driver. For SPI writing it unfortunately isn't, since the spi_flash layer has to send an unlock command and a new address for every write. It would be an egregious hack to try to fake this in the driver. So a new property is added to spi_flash to allow the maximum transfer size to be set. Secondly, the ICH SPI flash can be memory mapped. On a lot of x86 devices this improves performance significantly. For example, the standard driver gets maybe 12Mbps throughput from a 33Mbps dual interface, roughly 20% utilisation. With memory mapping, many platforms can achieve about 40Mbps. To implement memory mapping, a new property is provided in the device tree to set the memory map address, which varies by platform. Some x86 platforms will see a speed increase with memory mapping, some won't. The memory mapping feature only works for reading. When in use, the spi_flash layer bypasses the SPI driver completely, and just copies the flash data from the correct place in the memory map. Simon Glass (15): fdt: Use sed instead of cpp to pre-process the dtc fdt: Add fdtdec_get_addr_size() to read reg properties spi: Add function to allocate a new SPI slave spi: Use spi_alloc_slave() in each SPI driver sf: Add spi_flash_alloc() to create a new SPI flash struct sf: Use spi_flash_alloc() in each SPI flash driver x86: spi: Add Intel ICH driver spi: Add parameter for maximum write size sf: Respect maximum SPI write size x86: spi: Set maximum write size for ICH sf: Enable FDT-based configuration and memory mapping x86: Move PCI init before SPI init x86: Add FDT SPI node for link x86: Enable SPI flash support for coreboot x86: Enable time command for coreboot arch/x86/lib/board.c | 8 +- board/chromebook-x86/dts/link.dts | 11 + drivers/mtd/spi/atmel.c | 8 +- drivers/mtd/spi/eon.c | 8 +- drivers/mtd/spi/macronix.c | 8 +- drivers/mtd/spi/ramtron.c | 4 +- drivers/mtd/spi/spansion.c | 8 +- drivers/mtd/spi/spi_flash.c | 81 ++++- drivers/mtd/spi/sst.c | 8 +- drivers/mtd/spi/stmicro.c | 8 +- drivers/mtd/spi/winbond.c | 8 +- drivers/spi/Makefile | 4 + drivers/spi/altera_spi.c | 4 +- drivers/spi/andes_spi.c | 4 +- drivers/spi/armada100_spi.c | 4 +- drivers/spi/atmel_spi.c | 4 +- drivers/spi/bfin_spi.c | 4 +- drivers/spi/cf_qspi.c | 4 +- drivers/spi/cf_spi.c | 4 +- drivers/spi/davinci_spi.c | 4 +- drivers/spi/fsl_espi.c | 4 +- drivers/spi/ich.c | 752 +++++++++++++++++++++++++++++++++++++ drivers/spi/ich.h | 144 +++++++ drivers/spi/kirkwood_spi.c | 5 +- drivers/spi/mpc52xx_spi.c | 5 +- drivers/spi/mpc8xxx_spi.c | 5 +- drivers/spi/mxc_spi.c | 4 +- drivers/spi/mxs_spi.c | 4 +- drivers/spi/oc_tiny_spi.c | 5 +- drivers/spi/omap3_spi.c | 27 +- drivers/spi/sh_spi.c | 4 +- drivers/spi/soft_spi.c | 4 +- drivers/spi/spi.c | 39 ++ drivers/spi/tegra_spi.c | 4 +- drivers/spi/xilinx_spi.c | 4 +- dts/Makefile | 10 +- include/configs/coreboot.h | 13 +- include/fdtdec.h | 16 + include/spi.h | 44 +++ include/spi_flash.h | 39 ++ lib/fdtdec.c | 27 ++- 41 files changed, 1208 insertions(+), 147 deletions(-) create mode 100644 drivers/spi/ich.c create mode 100644 drivers/spi/ich.h create mode 100644 drivers/spi/spi.c -- 1.7.7.3

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