January 2013 - U-Boot

[U-Boot] [PATCH 1/2] EXYNOS5: Make all display related code dependent on CONFIG_LCD
by Ajay Kumar 10 Jan '13

10 Jan '13

u-boot compilation fails for smdk5250 when we deselect CONFIG_LCD from the main config file. This patch fixes it. Signed-off-by: Ajay Kumar <ajaykumar.rs(a)samsung.com> --- board/samsung/smdk5250/smdk5250.c | 2 ++ include/configs/exynos5250-dt.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 9c4bf9b..7a5f132 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -281,6 +281,7 @@ int board_early_init_f(void) } #endif +#ifdef CONFIG_LCD void cfg_lcd_gpio(void) { struct exynos5_gpio_part1 *gpio1 = @@ -374,3 +375,4 @@ void init_panel_info(vidinfo_t *vid) exynos_set_dp_platform_data(&dp_platform_data); } +#endif diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 07bca1d..298bae9 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -299,10 +299,12 @@ /* Display */ #define CONFIG_LCD +#ifdef CONFIG_LCD #define CONFIG_EXYNOS_FB #define CONFIG_EXYNOS_DP #define LCD_XRES 2560 #define LCD_YRES 1600 #define LCD_BPP LCD_COLOR16 +#endif #endif /* __CONFIG_H */ -- 1.8.0

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[U-Boot] [RFC 1/3] MIPS: bootm_qemu_mips.c: separate linux preparation code
by Gabor Juhos 10 Jan '13

10 Jan '13

Move the preparation code into a separate function. This is just a cosmetic change. The function will be moved into bootm.c by a subsequent change. Signed-off-by: Gabor Juhos <juhosg(a)openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)googlemail.com> --- This is compile tested only. I don't have suitable kernel images for mips,mipsel,mips64,mipsel64 systems to try it yet. -Gabor --- arch/mips/lib/bootm_qemu_mips.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/arch/mips/lib/bootm_qemu_mips.c b/arch/mips/lib/bootm_qemu_mips.c index 0815c9c..2350a54 100644 --- a/arch/mips/lib/bootm_qemu_mips.c +++ b/arch/mips/lib/bootm_qemu_mips.c @@ -29,22 +29,12 @@ DECLARE_GLOBAL_DATA_PTR; -int do_bootm_linux(int flag, int argc, char * const argv[], - bootm_headers_t *images) +static void boot_prep_linux_qemu(bootm_headers_t *images) { - void (*theKernel) (int, char **, char **, int *); char *bootargs = getenv("bootargs"); char *start; uint len; - /* find kernel entry point */ - theKernel = (void (*)(int, char **, char **, int *))images->ep; - - bootstage_mark(BOOTSTAGE_ID_RUN_OS); - - debug("## Transferring control to Linux (at address %08lx) ...\n", - (ulong) theKernel); - gd->bd->bi_boot_params = gd->bd->bi_memstart + (16 << 20) - 256; debug("%-12s= 0x%08lX\n", "boot_params", (ulong)gd->bd->bi_boot_params); @@ -67,6 +57,22 @@ int do_bootm_linux(int flag, int argc, char * const argv[], (uint) UNCACHED_SDRAM(images->rd_start), (uint) len); } +} + +int do_bootm_linux(int flag, int argc, char * const argv[], + bootm_headers_t *images) +{ + void (*theKernel) (int, char **, char **, int *); + + /* find kernel entry point */ + theKernel = (void (*)(int, char **, char **, int *))images->ep; + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + + debug("## Transferring control to Linux (at address %08lx) ...\n", + (ulong) theKernel); + + boot_prep_linux_qemu(images); /* we assume that the kernel is in place */ printf("\nStarting kernel ...\n\n"); -- 1.7.10

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[U-Boot] [PATCH] mx6qsabresd: Fix booting the kernel from SDHC3
by Fabio Estevam 10 Jan '13

10 Jan '13

commit 49ea0ff5 (mx6qsabresd: use on-board eMMC to store environment) broke booting a uImage from SDHC3. Adapt the default environment to use CONFIG_SYS_MMC_ENV_DEV as the correct mmc node for loading the kernel, since mmcdev should not be harcoded to zero. While at it, go back to using SDHC3 as default mmc, since we have Yocto images that generate an SD card containing U-boot,kernel and rootfs, so it is more convenient to keep using SDHC3 as it was originally. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- include/configs/mx6qsabre_common.h | 2 +- include/configs/mx6qsabresd.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index bd2fb10..5d03b3d 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -86,7 +86,7 @@ "console=" CONFIG_CONSOLE_DEV "\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "mmcdev=0\0" \ + "mmcdev=CONFIG_SYS_MMC_ENV_DEV\0" \ "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6qsabresd.h index a1d9285..ccb7751 100644 --- a/include/configs/mx6qsabresd.h +++ b/include/configs/mx6qsabresd.h @@ -27,7 +27,7 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 #if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_SYS_MMC_ENV_DEV 2 /* eMMC/uSDHC4 */ +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ #define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */ #endif -- 1.7.9.5

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[U-Boot] [PATCH] mx6qsabresd: Fix mmc boot by making USDHC3 be 'dev 0'
by Fabio Estevam 10 Jan '13

10 Jan '13

By default, we boot from USDHC3 on mx6qsabresd, so let it be mmc dev 0. Without this fix kernel cannot be retrieved from mmc with the default environment. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- board/freescale/mx6qsabresd/mx6qsabresd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 65c4a1a..fbcb6cd 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -134,8 +134,8 @@ static void setup_iomux_uart(void) #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[3] = { - {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, + {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, }; @@ -162,13 +162,13 @@ int board_mmc_init(bd_t *bis) for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { - case 0: + case 1: imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); gpio_direction_input(USDHC2_CD_GPIO); usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); break; - case 1: + case 0: imx_iomux_v3_setup_multiple_pads( usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); gpio_direction_input(USDHC3_CD_GPIO); -- 1.7.9.5

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[U-Boot] [PATCH 1/2] am33xx: add a pulldown macro to pinmux config
by Lars Poeschel 10 Jan '13

10 Jan '13

From: Lars Poeschel <poeschel(a)lemonage.de> Signed-off-by: Lars Poeschel <poeschel(a)lemonage.de> --- arch/arm/include/asm/arch-am33xx/mux.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-am33xx/mux.h b/arch/arm/include/asm/arch-am33xx/mux.h index aed6b00..460ac1c 100644 --- a/arch/arm/include/asm/arch-am33xx/mux.h +++ b/arch/arm/include/asm/arch-am33xx/mux.h @@ -25,7 +25,8 @@ /* PAD Control Fields */ #define SLEWCTRL (0x1 << 6) #define RXACTIVE (0x1 << 5) -#define PULLUP_EN (0x1 << 4) /* Pull UP Selection */ +#define PULLDOWN_EN (0x0 << 4) /* Pull Down Selection */ +#define PULLUP_EN (0x1 << 4) /* Pull Up Selection */ #define PULLUDEN (0x0 << 3) /* Pull up enabled */ #define PULLUDDIS (0x1 << 3) /* Pull up disabled */ #define MODE(val) val /* used for Readability */ -- 1.7.10.4

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[U-Boot] [PATCH 0/3 V4] EXYNOS5: MAX77686 add FDT support
by Rajeshwari Shinde 10 Jan '13

10 Jan '13

Add FDT support to PMIC MAX77686 chip. This patch set is based on top of: "[U-Boot] [PATCH 00/16 V2] SMDK5250: Add FDT support" link for same: "http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991" Changes in V2: - Changed chip address from 06 to 6. - Corrected indentation errors. Changes in V3: - Rebased on top of the latest implementation of PMIC Changes in V4: - Corrected PMIC register address Rajeshwari Shinde (3): EXYNOS5: FDT: Add compatible strings for PMIC EXYNOS5: Add device node for PMIC PMIC: MAX77686: Add FDT Support board/samsung/dts/exynos5250-smdk5250.dts | 7 +++++ drivers/power/pmic/pmic_max77686.c | 37 ++++++++++++++++++++++++++-- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 4 files changed, 43 insertions(+), 3 deletions(-) -- 1.7.4.4

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[U-Boot] [PATCH 1/4] cfi_flash: Add manufact_match helper function
by Stefan Roese 10 Jan '13

10 Jan '13

Consolidate manufacturer matching into the function manufact_match() and use it. Signed-off-by: Stefan Roese <sr(a)denx.de> --- drivers/mtd/cfi_flash.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index b2dfc53..d865c40 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1425,13 +1425,18 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) return flash_write_cfiword (info, wp, cword); } +static inline int manufact_match(flash_info_t *info, u32 manu) +{ + return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16); +} + /*----------------------------------------------------------------------- */ #ifdef CONFIG_SYS_FLASH_PROTECTION static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot) { - if (info->manufacturer_id == ((INTEL_MANUFACT & FLASH_VENDMASK) >> 16) + if (manufact_match(info, INTEL_MANUFACT) && info->device_id == NUMONYX_256MBIT) { /* * see errata called @@ -1488,8 +1493,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD: /* U-Boot only checks the first byte */ - if (info->manufacturer_id == - ((ATM_MANUFACT & FLASH_VENDMASK) >> 16)) { + if (manufact_match(info, ATM_MANUFACT)) { if (prot) { flash_unlock_seq (info, 0); flash_write_cmd (info, 0, @@ -1507,8 +1511,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) 0, ATM_CMD_UNLOCK_SECT); } } - if (info->manufacturer_id == - ((AMD_MANUFACT & FLASH_VENDMASK) >> 16)) { + if (manufact_match(info, AMD_MANUFACT)) { int flag = disable_interrupts(); int lock_flag; @@ -1738,8 +1741,7 @@ static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); #ifdef CONFIG_SYS_FLASH_PROTECTION - if (info->ext_addr && info->manufacturer_id == - ((AMD_MANUFACT & FLASH_VENDMASK) >> 16)) { + if (info->ext_addr && manufact_match(info, AMD_MANUFACT)) { ushort spus; /* read sector protect/unprotect scheme */ -- 1.8.0.1

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[U-Boot] [PATCH 1/1] mtd/cfi: add support for SST 4KB sector granularity
by Angelo Dureghello 10 Jan '13

10 Jan '13

Add support for SST 4KB sector granularity. Many recent SST flashes, i.e. SST39VF3201B and similar of this family are declared CFI-conformant from SST. They support CFI query, but implement 2 different sector sizes in the same memory: a 64KB sector (they call it "block", std AMD erase cmd=0x30), and a 4KB sector (they call it "sector", erase cmd=0x50). Also, CFI query on these chips, reading from address 0x2dh of cfi query struct, detects a number of secotrs for the 4KB granularity (flinfo shows it). For all other aspects, they are CFI compliant, so, as Linux do, i think it's a good idea to handle these chips in the CFI driver, with a fixup to allow 4KB granularity, as should be expected, instead of 64KB. Signed-off-by: Angelo Dureghello <sysamfw(a)gmail.com> Cc: Stefan Rose <sr(a)denx.de> --- drivers/mtd/cfi_flash.c | 25 ++++++++++++++++++++++++- include/flash.h | 1 + 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index b2dfc53..b46f1ca 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1128,7 +1128,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) AMD_CMD_ERASE_START); flash_unlock_seq (info, sect); flash_write_cmd (info, sect, 0, - AMD_CMD_ERASE_SECTOR); + info->cmd_erase_sector); break; #ifdef CONFIG_FLASH_CFI_LEGACY case CFI_CMDSET_AMD_LEGACY: @@ -1733,6 +1733,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) { info->cmd_reset = AMD_CMD_RESET; + info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR; cmdset_amd_read_jedec_ids(info); flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); @@ -2003,6 +2004,25 @@ static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) } } +static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry) +{ + /* + * SST, for many recent nor parallel flashes, says they are + * CFI-conformant. This is not true, since qry struct. + * reports a std. AMD command set (0x0002), while SST allows to + * erase two different sector sizes for the same memory. + * 64KB sector (SST call it block) needs 0x30 to be erased. + * 4KB sector (SST call it sector) needs 0x50 to be erased. + * Since CFI query detect the 4KB number of sectors, users expects + * a sector granularity of 4KB, and it is here set. + */ + if (info->device_id == 0x5D23 || /* SST39VF3201B */ + info->device_id == 0x5C23) { /* SST39VF3202B */ + /* set sector granularity to 4KB */ + info->cmd_erase_sector=0x50; + } +} + /* * The following code cannot be run from FLASH! * @@ -2081,6 +2101,9 @@ ulong flash_get_size (phys_addr_t base, int banknum) case 0x0020: flash_fixup_stm(info, &qry); break; + case 0x00bf: /* SST */ + flash_fixup_sst(info, &qry); + break; } debug ("manufacturer is %d\n", info->vendor); diff --git a/include/flash.h b/include/flash.h index a04ce90..0ba2d33 100644 --- a/include/flash.h +++ b/include/flash.h @@ -44,6 +44,7 @@ typedef struct { ulong buffer_write_tout; /* maximum buffer write timeout */ ushort vendor; /* the primary vendor id */ ushort cmd_reset; /* vendor specific reset command */ + uchar cmd_erase_sector; /* vendor specific erase sect. command */ ushort interface; /* used for x8/x16 adjustments */ ushort legacy_unlock; /* support Intel legacy (un)locking */ ushort manufacturer_id; /* manufacturer id */

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[U-Boot] [PATCH] powerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'.
by Vakul Garg 10 Jan '13

10 Jan '13

If property 'fsl,sec-era' is already present, it is updated. This property is required so that applications can ascertain which descriptor commands are supported on a particular CAAM version. Signed-off-by: Vakul Garg <vakul(a)freescale.com> Cc: Andy Fleming <afleming(a)gmail.com> --- arch/powerpc/cpu/mpc85xx/fdt.c | 8 +++ arch/powerpc/cpu/mpc8xxx/fdt.c | 78 ++++++++++++++++++++++++++++++++- arch/powerpc/include/asm/immap_85xx.h | 6 +++ 3 files changed, 91 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 5af2661..e7b5dfd 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -591,6 +591,14 @@ void ft_cpu_setup(void *blob, bd_t *bd) /* delete crypto node if not on an E-processor */ if (!IS_E_PROCESSOR(get_svr())) fdt_fixup_crypto_node(blob, 0); +#if CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC 4.x/5.x */ + else { + ccsr_sec_t *sec; + + sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; + fdt_fixup_crypto_node(blob, in_be32(&sec->secvid_ms)); + } +#endif fdt_fixup_ethernet(blob); diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 68db8e2..20cbb45 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -297,10 +297,86 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) fdt_strerror(err)); } #elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */ +static u8 caam_get_era(void) +{ + static const struct { + u16 ip_id; + u8 maj_rev; + u8 era; + } caam_eras[] = { + {0x0A10, 1, 1}, + {0x0A10, 2, 2}, + {0x0A12, 1, 3}, + {0x0A14, 1, 3}, + {0x0A14, 2, 4}, + {0x0A16, 1, 4}, + {0x0A10, 3, 4}, + {0x0A11, 1, 4}, + {0x0A18, 1, 4}, + {0x0A11, 2, 5}, + {0x0A12, 2, 5}, + {0x0A13, 1, 5}, + {0x0A1C, 1, 5} + }; + + ccsr_sec_t *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; + u32 secvid_ms = in_be32(&sec->secvid_ms); + u32 ccbvid = in_be32(&sec->ccbvid); + u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >> + SEC_SECVID_MS_IPID_SHIFT; + u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >> + SEC_SECVID_MS_MAJ_REV_SHIFT; + u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT; + + int i; + + if (era) /* This is '0' prior to CAAM ERA-6 */ + return era; + + for (i = 0; i < ARRAY_SIZE(caam_eras); i++) + if (caam_eras[i].ip_id == ip_id && + caam_eras[i].maj_rev == maj_rev) + return caam_eras[i].era; + + return 0; +} + +static void fdt_fixup_crypto_era(void *blob, u32 era) +{ + int err; + int crypto_node; + + crypto_node = fdt_path_offset(blob, "crypto"); + if (crypto_node < 0) { + printf("WARNING: Missing crypto node\n"); + return; + } + + err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era, + sizeof(era)); + if (err < 0) { + printf("ERROR: could not set fsl,sec-era property: %s\n", + fdt_strerror(err)); + } +} + void fdt_fixup_crypto_node(void *blob, int sec_rev) { - if (!sec_rev) + u8 era; + + if (!sec_rev) { fdt_del_node_and_alias(blob, "crypto"); + return; + } + + /* Add SEC ERA information in compatible */ + era = caam_get_era(); + if (era) { + fdt_fixup_crypto_era(blob, era); + } else { + printf("WARNING: Unable to get ERA for CAAM rev: %d\n", + sec_rev); + } } #endif diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 70608fe..6b2c05c 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2757,6 +2757,12 @@ typedef struct ccsr_sec { #define SEC_CHANUM_MS_JRNUM_SHIFT 28 #define SEC_CHANUM_MS_DECONUM_MASK 0x0f000000 #define SEC_CHANUM_MS_DECONUM_SHIFT 24 +#define SEC_SECVID_MS_IPID_MASK 0xffff0000 +#define SEC_SECVID_MS_IPID_SHIFT 16 +#define SEC_SECVID_MS_MAJ_REV_MASK 0x0000ff00 +#define SEC_SECVID_MS_MAJ_REV_SHIFT 8 +#define SEC_CCBVID_ERA_MASK 0xff000000 +#define SEC_CCBVID_ERA_SHIFT 24 #endif typedef struct ccsr_qman { -- 1.7.7

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[U-Boot] patches status
by Angelo Dureghello 10 Jan '13

10 Jan '13

Dear All, sorry if i ask, don't want to put any pressure. I am currently blocked to port a new board patch on the list, depending on two patches i posted in november: [U-Boot,1/1] m68k/lib: fix serial driver relocation http://patchwork.ozlabs.org/patch/201421/ [U-Boot,1/1] mtd/cfi: add support for SST 4KB sector granularity http://patchwork.ozlabs.org/patch/203086/ The first one is related tho serial routines erroneously running from flash. This is important for me to be accepted to proceed with the board patch, but the issues affects currently all coldfire boards. The second is less important, i can write my own flash.c, but would be nice to know if there is any chance it can eb accepted. Regards, Angelo Dureghello Dear All, sorry if i ask, don't want to put any pressure. I am currently blocked to port a new board patch on the list, depending on two patches i posted in november: [U-Boot,1/1] m68k/lib: fix serial driver relocation http://patchwork.ozlabs.org/patch/201421/ [U-Boot,1/1] mtd/cfi: add support for SST 4KB sector granularity http://patchwork.ozlabs.org/patch/203086/ The first one is related tho serial routines erroneously running from flash. This is important for me to be accepted to proceed with the board patch, but the issues affects currently all coldfire boards. The second is less important, i can write my own flash.c, but would be nice to know if there is any chance it can eb accepted. Regards, Angelo Dureghello

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