January 2013 - U-Boot

[U-Boot] [PATCH] PHY: micrel.c: add support for KSZ9031
by David Andrey 30 Jan '13

30 Jan '13

Add support for Micrel PHY KSZ9031 in phylib, including small rework for KSZ9021 to avoid code duplication Signed-off-by: David Andrey david.andrey(a)netmodule.com --- drivers/net/phy/micrel.c | 83 +++++++++++++++++++++++++++++++++++----------- 1 files changed, 63 insertions(+), 20 deletions(-) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 30f3264..a7d53a1 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -18,6 +18,7 @@ * * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming + * (C) 2012 NetModule AG, added KSZ9031 * */ #include <config.h> @@ -52,16 +53,49 @@ static struct phy_driver KS8721_driver = { }; #endif + +/** + * KSZ9021 - KSZ9031 common + */ + +#define MII_KSZ90xx_PHY_CTL 0x1f +#define MIIM_KSZ90xx_PHYCTL_1000 (1 << 6) +#define MIIM_KSZ90xx_PHYCTL_100 (1 << 5) +#define MIIM_KSZ90xx_PHYCTL_10 (1 << 4) +#define MIIM_KSZ90xx_PHYCTL_DUPLEX (1 << 3) + +/* Update speed and duplex state */ +static int ksz90xx_phy_state(struct phy_device *phydev) +{ + unsigned phy_ctl; + + phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ90xx_PHY_CTL); + + if (phy_ctl & MIIM_KSZ90xx_PHYCTL_DUPLEX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + if (phy_ctl & MIIM_KSZ90xx_PHYCTL_1000) + phydev->speed = SPEED_1000; + else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_100) + phydev->speed = SPEED_100; + else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_10) + phydev->speed = SPEED_10; + return 0; +} + + #ifdef CONFIG_PHY_MICREL_KSZ9021 -/* ksz9021 PHY Registers */ + +/* + * KSZ9031 + */ + +/* PHY Registers */ #define MII_KSZ9021_EXTENDED_CTRL 0x0b #define MII_KSZ9021_EXTENDED_DATAW 0x0c #define MII_KSZ9021_EXTENDED_DATAR 0x0d -#define MII_KSZ9021_PHY_CTL 0x1f -#define MIIM_KSZ9021_PHYCTL_1000 (1 << 6) -#define MIIM_KSZ9021_PHYCTL_100 (1 << 5) -#define MIIM_KSZ9021_PHYCTL_10 (1 << 4) -#define MIIM_KSZ9021_PHYCTL_DUPLEX (1 << 3) #define CTRL1000_PREFER_MASTER (1 << 10) #define CTRL1000_CONFIG_MASTER (1 << 11) @@ -108,21 +142,8 @@ static int ksz9021_config(struct phy_device *phydev) static int ksz9021_startup(struct phy_device *phydev) { - unsigned phy_ctl; genphy_update_link(phydev); - phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_PHY_CTL); - - if (phy_ctl & MIIM_KSZ9021_PHYCTL_DUPLEX) - phydev->duplex = DUPLEX_FULL; - else - phydev->duplex = DUPLEX_HALF; - - if (phy_ctl & MIIM_KSZ9021_PHYCTL_1000) - phydev->speed = SPEED_1000; - else if (phy_ctl & MIIM_KSZ9021_PHYCTL_100) - phydev->speed = SPEED_100; - else if (phy_ctl & MIIM_KSZ9021_PHYCTL_10) - phydev->speed = SPEED_10; + ksz90xx_phy_state(phydev); return 0; } @@ -137,6 +158,27 @@ static struct phy_driver ksz9021_driver = { }; #endif +/* + * KSZ9031 + */ +static int ksz9031_startup(struct phy_device *phydev) +{ + genphy_update_link(phydev); + ksz90xx_phy_state(phydev); + return 0; +} + +static struct phy_driver ksz9031_driver = { + .name = "Micrel ksz9031", + .uid = 0x221620, + .mask = 0xfffffe, + .features = PHY_GBIT_FEATURES, + .config = &genphy_config, + .startup = &ksz9031_startup, + .shutdown = &genphy_shutdown, +}; + + int phy_micrel_init(void) { phy_register(&KSZ804_driver); @@ -145,5 +187,6 @@ int phy_micrel_init(void) #else phy_register(&KS8721_driver); #endif + phy_register(&ksz9031_driver); return 0; } -- 1.7.4.1

1 0

[U-Boot] [PATCH V2 0/7] Add splash screen for CM-T35
by Nikita Kiryanov 30 Jan '13

30 Jan '13

This patchset adds splash screen support for CM-T35. It includes the ability to initialize the display subsystem either using predefines (selected via env variable "displaytype"), or user supplied configuration options, also stored in an environment variables and pointed to by displaytype. The splash image data is currently read from NAND. As a preparation for the above functionality this patchset adds: - new DSS #defines - an option for board-specific splash screen preparation, which can be invoked in lcd_logo() right before displaying the splash screen (typical use case: load the image data from non-memory mapped storage in time for it to be displayed). - struct panel_config is extended to support setting the gfx_format dynamically - protection from data aborts due to unaligned bmp headers is added to lcd_logo's splashscreen section (I'm also looking into refining this protection later on). Changes in V2: - GFXFORMAT_RGB16 now passed to omap3_dss_panel_config() in a new field of panel_cfg. Updated existing panel_config structs to set this field to the value that was originally hardcoded into omap3_dss_panel_config(). [Jeroen Hofstee] - Used LCD_BPP for vl_bpix. [Jeroen Hofstee] - Added a comment to explain the choice of GFXFORMAT_RGB16. [Jeroen Hofstee] - Added an address check (and fix) to the address of splashimage in order to avoid alignment problems with bmp header. A similar check appears in board_splash_screen_prepare() for cm_t35. [Albert ARIBAUD] - Do not manually set gfx burst size to GFXBURSTSIZE16, as it is apparently not necessary. GFXBURSTSIZE* #defines were kept in patch 1 anyway in the hope they will be useful for someone. Nikita Kiryanov (7): omap3: add useful dss defines omap3: allow dynamic selection of gfx_format lcd: prevent unaligned memory access when displaying splash screen lcd: add option for board specific splash screen preparation cm-t35: add support for dvi displays cm-t35: add support for user defined lcd parameters cm-t35: add support for loading splash image from NAND README | 8 + arch/arm/include/asm/arch-omap3/dss.h | 36 +++ board/cm_t35/Makefile | 1 + board/cm_t35/cm_t35.c | 68 ++++++ board/cm_t35/display.c | 426 +++++++++++++++++++++++++++++++++ board/htkw/mcx/mcx.c | 1 + board/teejet/mt_ventoux/mt_ventoux.c | 2 + board/ti/beagle/beagle.h | 6 +- common/lcd.c | 23 ++ drivers/video/omap3_dss.c | 2 +- include/configs/cm_t35.h | 11 + include/lcd.h | 1 + 12 files changed, 582 insertions(+), 3 deletions(-) create mode 100644 board/cm_t35/display.c -- 1.7.10.4

2 21

[U-Boot] Watchdog of OMAP3530 in u-boot
by gurucharanch＠uurmi.com 30 Jan '13

30 Jan '13

Hi Everyone, I'm using DEVKIT8000, and I need to implement watchdog reset in u-boot, I have gone through all the registers used for watchdog registers but I'm not getting watchdog handlers, please anyone guide me how to use handlers and how to initialise watchdog in the u-boot. Thanks & Regards, Guru Charan

1 0

[U-Boot] [PATCH] powerpc/corenet: Add workaround for ELBC multi-bit ECC error
by Shaohui Xie 30 Jan '13

30 Jan '13

NAND operations in condition like below will result ELBC internal multi-bit ECC error, DCFG will send this error to MPIC to report it as an error interrupt (Interrupt 0), which causes call trace in kernel, so software should disable the DCFG not to send the ELBC ECC error by setting bit 15 in the register at DCSRBASE + 0x0002_0520. This won't inhibit the reporting of LTESR[PAR]. This workaround is enabled on P2041/P3041/P50x0. steps to reproduce the issue: 1. power cycle the board 2. use following command to do NAND test: flashcp -v file-jffs2 /dev/mtdx The 'mtdx' should be a NAND partition, the file 'file-jffs2' should be page aligned. Signed-off-by: Shaohui Xie <Shaohui.Xie(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 ++++++++++ arch/powerpc/include/asm/config_mpc85xx.h | 4 ++++ 3 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index e5ecf5d..f26d608 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -227,6 +227,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 puts("Work-around for Erratum NMG_LBC103 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC + puts("Work-around for Erratum ELBC MULTIBIT ECC enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) puts("Work-around for Erratum NMG ETSEC129 enabled\n"); diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index d1155e8..5d6f996 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -564,6 +564,16 @@ skip_l2: } } #endif +#ifdef CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC + /* + * On P2041/P3041/P50x0, NAND operations will result internal multi-bit + * ECC error, which causes call trace in kernel, so software should + * disable the ECC error reported from eLBC by setting bit 15 in + * the register at DCSRBASE + 0x0002_0520. + */ +#define DCFG_ECC (CONFIG_SYS_DCSRBAR + 0x20520) + setbits_be32((void *)DCFG_ECC, 1 << (31 - 15)); +#endif #ifdef CONFIG_SYS_LBC_LCRR /* diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 0b9638b..8f8aea7 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -345,6 +345,7 @@ #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 #define CONFIG_SYS_FSL_ERRATUM_A004849 +#define CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC #elif defined(CONFIG_PPC_P3041) #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 @@ -377,6 +378,7 @@ #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 #define CONFIG_SYS_FSL_ERRATUM_A004849 +#define CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 @@ -451,6 +453,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000 #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 +#define CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC #elif defined(CONFIG_PPC_P5040) #define CONFIG_SYS_PPC64 @@ -480,6 +483,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004510 #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 +#define CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC #elif defined(CONFIG_BSC9131) #define CONFIG_MAX_CPUS 1 -- 1.6.4

3 2

[U-Boot] [PATCH V5 REPOST 2 1/7] ARM: bcm2835: add mailbox driver
by Stephen Warren 30 Jan '13

30 Jan '13

The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") and the ARM CPU. The ARM CPU is often thought of as the main CPU. However, the VideoCore actually controls the initial SoC boot, and hides much of the hardware behind a protocol. This protocol is transported using the SoC's mailbox hardware module. Here, we add a very simplistic driver for the mailbox module, and define a few structures for the property messages. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- v5: No change; merged patch series. v4: No change; rebased. v3: Re-license to GPL-v2 or later. v2: * Added documentation to mbox.h. * Implemented macros to set up headers and tags. * Implemented error-checking of response bits in bcm2835_mbox_call_prop(). * Reworked tag structs based on experience writing LCD driver. * Added a lot more video-related tag structs. * Added debug spew and error messages to mbox.c; useful when debugging LCD. * Removed __packed attributes from message structs. * Removed stale FIXME comments. --- arch/arm/cpu/arm1176/bcm2835/Makefile | 2 +- arch/arm/cpu/arm1176/bcm2835/mbox.c | 164 ++++++++++++ arch/arm/include/asm/arch-bcm2835/mbox.h | 407 ++++++++++++++++++++++++++++++ 3 files changed, 572 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm1176/bcm2835/mbox.c create mode 100644 arch/arm/include/asm/arch-bcm2835/mbox.h diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile index 95da6a8..135de42 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Makefile +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile @@ -17,7 +17,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS := init.o reset.o timer.o +COBJS := init.o reset.o timer.o mbox.o SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/arm1176/bcm2835/mbox.c b/arch/arm/cpu/arm1176/bcm2835/mbox.c new file mode 100644 index 0000000..fd65e33 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/mbox.c @@ -0,0 +1,164 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/mbox.h> + +#define TIMEOUT (100 * 1000) /* 100mS in uS */ + +int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) +{ + struct bcm2835_mbox_regs *regs = + (struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR; + ulong endtime = get_timer(0) + TIMEOUT; + u32 val; + + debug("time: %lu timeout: %lu\n", get_timer(0), endtime); + + if (send & BCM2835_CHAN_MASK) { + printf("mbox: Illegal mbox data 0x%08x\n", send); + return -1; + } + + /* Drain any stale responses */ + + for (;;) { + val = readl(&regs->status); + if (val & BCM2835_MBOX_STATUS_RD_EMPTY) + break; + if (get_timer(0) >= endtime) { + printf("mbox: Timeout draining stale responses\n"); + return -1; + } + val = readl(&regs->read); + } + + /* Wait for space to send */ + + for (;;) { + val = readl(&regs->status); + if (!(val & BCM2835_MBOX_STATUS_WR_FULL)) + break; + if (get_timer(0) >= endtime) { + printf("mbox: Timeout waiting for send space\n"); + return -1; + } + } + + /* Send the request */ + + val = BCM2835_MBOX_PACK(chan, send); + debug("mbox: TX raw: 0x%08x\n", val); + writel(val, &regs->write); + + /* Wait for the response */ + + for (;;) { + val = readl(&regs->status); + if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY)) + break; + if (get_timer(0) >= endtime) { + printf("mbox: Timeout waiting for response\n"); + return -1; + } + } + + /* Read the response */ + + val = readl(&regs->read); + debug("mbox: RX raw: 0x%08x\n", val); + + /* Validate the response */ + + if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) { + printf("mbox: Response channel mismatch\n"); + return -1; + } + + *recv = BCM2835_MBOX_UNPACK_DATA(val); + + return 0; +} + +#ifdef DEBUG +void dump_buf(struct bcm2835_mbox_hdr *buffer) +{ + u32 *p; + u32 words; + int i; + + p = (u32 *)buffer; + words = buffer->buf_size / 4; + for (i = 0; i < words; i++) + printf(" 0x%04x: 0x%08x\n", i * 4, p[i]); +} +#endif + +int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer) +{ + int ret; + u32 rbuffer; + struct bcm2835_mbox_tag_hdr *tag; + int tag_index; + +#ifdef DEBUG + printf("mbox: TX buffer\n"); + dump_buf(buffer); +#endif + + ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer); + if (ret) + return ret; + if (rbuffer != (u32)buffer) { + printf("mbox: Response buffer mismatch\n"); + return -1; + } + +#ifdef DEBUG + printf("mbox: RX buffer\n"); + dump_buf(buffer); +#endif + + /* Validate overall response status */ + + if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) { + printf("mbox: Header response code invalid\n"); + return -1; + } + + /* Validate each tag's response status */ + + tag = (void *)(buffer + 1); + tag_index = 0; + while (tag->tag) { + if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) { + printf("mbox: Tag %d missing val_len response bit\n", + tag_index); + return -1; + } + /* + * Clear the reponse bit so clients can just look right at the + * length field without extra processing + */ + tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE; + tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size); + tag_index++; + } + + return 0; +} diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h new file mode 100644 index 0000000..4752091 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -0,0 +1,407 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BCM2835_MBOX_H +#define _BCM2835_MBOX_H + +#include <linux/compiler.h> + +/* + * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") + * and the ARM CPU. The ARM CPU is often thought of as the main CPU. + * However, the VideoCore actually controls the initial SoC boot, and hides + * much of the hardware behind a protocol. This protocol is transported + * using the SoC's mailbox hardware module. + * + * The mailbox hardware supports passing 32-bit values back and forth. + * Presumably by software convention of the firmware, the bottom 4 bits of the + * value are used to indicate a logical channel, and the upper 28 bits are the + * actual payload. Various channels exist using these simple raw messages. See + * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an + * example, the messages on the power management channel are a bitmask of + * devices whose power should be enabled. + * + * The property mailbox channel passes messages that contain the (16-byte + * aligned) ARM physical address of a memory buffer. This buffer is passed to + * the VC for processing, is modified in-place by the VC, and the address then + * passed back to the ARM CPU as the response mailbox message to indicate + * request completion. The buffers have a generic and extensible format; each + * buffer contains a standard header, a list of "tags", and a terminating zero + * entry. Each tag contains an ID indicating its type, and length fields for + * generic parsing. With some limitations, an arbitrary set of tags may be + * combined together into a single message buffer. This file defines structs + * representing the header and many individual tag layouts and IDs. + */ + +/* Raw mailbox HW */ + +#define BCM2835_MBOX_PHYSADDR 0x2000b880 + +struct bcm2835_mbox_regs { + u32 read; + u32 rsvd0[5]; + u32 status; + u32 config; + u32 write; +}; + +#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000 +#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000 + +/* Lower 4-bits are channel ID */ +#define BCM2835_CHAN_MASK 0xf +#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \ + (chan & BCM2835_CHAN_MASK)) +#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK) +#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK)) + +/* Property mailbox buffer structures */ + +#define BCM2835_MBOX_PROP_CHAN 8 + +/* All message buffers must start with this header */ +struct bcm2835_mbox_hdr { + u32 buf_size; + u32 code; +}; + +#define BCM2835_MBOX_REQ_CODE 0 +#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000 + +#define BCM2835_MBOX_INIT_HDR(_m_) { \ + memset((_m_), 0, sizeof(*(_m_))); \ + (_m_)->hdr.buf_size = sizeof(*(_m_)); \ + (_m_)->hdr.code = 0; \ + (_m_)->end_tag = 0; \ + } + +/* + * A message buffer contains a list of tags. Each tag must also start with + * a standardized header. + */ +struct bcm2835_mbox_tag_hdr { + u32 tag; + u32 val_buf_size; + u32 val_len; +}; + +#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \ + (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ + (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ + (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \ + } + +#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \ + (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ + (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ + (_t_)->tag_hdr.val_len = 0; \ + } + +/* When responding, the VC sets this bit in val_len to indicate a response */ +#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000 + +/* + * Below we define the ID and struct for many possible tags. This header only + * defines individual tag structs, not entire message structs, since in + * general an arbitrary set of tags may be combined into a single message. + * Clients of the mbox API are expected to define their own overall message + * structures by combining the header, a set of tags, and a terminating + * entry. For example, + * + * struct msg { + * struct bcm2835_mbox_hdr hdr; + * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; + * ... perhaps other tags here ... + * u32 end_tag; + * }; + */ + +#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005 + +struct bcm2835_mbox_tag_get_arm_mem { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 mem_base; + u32 mem_size; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 + +struct bcm2835_mbox_tag_allocate_buffer { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 alignment; + } req; + struct { + u32 fb_address; + u32 fb_size; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001 + +struct bcm2835_mbox_tag_release_buffer { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002 + +struct bcm2835_mbox_tag_blank_screen { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + /* bit 0 means on, other bots reserved */ + u32 state; + } req; + struct { + u32 state; + } resp; + } body; +}; + +/* Physical means output signal */ +#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003 +#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003 +#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003 + +struct bcm2835_mbox_tag_physical_w_h { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 width; + u32 height; + } req; + struct { + u32 width; + u32 height; + } resp; + } body; +}; + +/* Virtual means display buffer */ +#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004 +#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004 +#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004 + +struct bcm2835_mbox_tag_virtual_w_h { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 width; + u32 height; + } req; + struct { + u32 width; + u32 height; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005 +#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005 +#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005 + +struct bcm2835_mbox_tag_depth { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 bpp; + } req; + struct { + u32 bpp; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006 +#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005 +#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006 + +#define BCM2835_MBOX_PIXEL_ORDER_BGR 0 +#define BCM2835_MBOX_PIXEL_ORDER_RGB 1 + +struct bcm2835_mbox_tag_pixel_order { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 order; + } req; + struct { + u32 order; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007 +#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007 +#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007 + +#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0 +#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1 +#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2 + +struct bcm2835_mbox_tag_alpha_mode { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 alpha; + } req; + struct { + u32 alpha; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008 + +struct bcm2835_mbox_tag_pitch { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 pitch; + } resp; + } body; +}; + +/* Offset of display window within buffer */ +#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009 +#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009 +#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009 + +struct bcm2835_mbox_tag_virtual_offset { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 x; + u32 y; + } req; + struct { + u32 x; + u32 y; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a +#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a +#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a + +struct bcm2835_mbox_tag_overscan { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 top; + u32 bottom; + u32 left; + u32 right; + } req; + struct { + u32 top; + u32 bottom; + u32 left; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b + +struct bcm2835_mbox_tag_get_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 data[1024]; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b + +struct bcm2835_mbox_tag_test_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 offset; + u32 num_entries; + u32 data[256]; + } req; + struct { + u32 is_invalid; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b + +struct bcm2835_mbox_tag_set_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 offset; + u32 num_entries; + u32 data[256]; + } req; + struct { + u32 is_invalid; + } resp; + } body; +}; + +/* + * Pass a raw u32 message to the VC, and receive a raw u32 back. + * + * Returns 0 for success, any other value for error. + */ +int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv); + +/* + * Pass a complete property-style buffer to the VC, and wait until it has + * been processed. + * + * This function expects a pointer to the mbox_hdr structure in an attempt + * to ensure some degree of type safety. However, some number of tags and + * a termination value are expected to immediately follow the header in + * memory, as required by the property protocol. + * + * Returns 0 for success, any other value for error. + */ +int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer); + +#endif -- 1.7.10.4

1 6

[U-Boot] Can I read env from RAM in uboot script?
by John Stile 30 Jan '13

30 Jan '13

Is it possible to have uboot read it's environment from a RAM address, rather than NAND? OR Can uboot's scripting support load variables from a RAM address? My NAND layout has redundant halves: 0 uboot ubootenv kernel fs 128 uboot ubootenv kernel fs 256 My firmware update strategy will update the non-booted side of NAND. It is easy to hack at91bootstrap, to load a uboots env area at some RAM address, just as it loads uboot at JUMP_ADDR, but how do I get uboot to use this preloaded uboot-env? Since uboot takes its environment area address at compile time, I wonder if uboot could be made to read it from a RAM address (written there by at91bootstrap), durring the env_relocate_spec()? So far I have traced: cpu/arm926ejs/start.S calls start_armboot() lib_arm/board.c start_armboot() calls env_relocate() ./common/env_common.c env_relocate() calls env_relocate_spec() My u-boot.map indicates my env_relocate_spec() comes from env_nand.o ./common/env_nand.c has env_relocate_spec() has ifdefs for ENV_IS_EMBEDDED, but my config is not. and CFG_ENV_IS_IN_NAND which I am currently configured for. So where is a good point of attack, or is there one?

4 9

[U-Boot] [PATCH v4 0/7] tegra: SPI drivers
by Allen Martin 30 Jan '13

30 Jan '13

This series updates the tegra20 SPI driver to add fdt support and adds a new tegra30 SPI driver. Testing was done on trimslice (tegra20) and cardhu (tegra30). Changes in v4: -Added support for fdt aliases to slink driver -Check "status" field of fdt node to make sure node is enabled Changes in v3: -Dropped some fdt patches from the series that were picked up in u-boot-tegra/next already -Removed SPI node from seaboard, added to trimslice -Incorporated feedback from Simon Glass and Stephen Warren to slink driver Changes in v2: -Added new patch to sort dts files prior to adding new nodes -Moved "max-spi-frequency" out to board dts files -Moved tegra20 SFLASH fdt changes out to separate patch -Added valid flag to slink driver controller structure Allen Martin (7): tegra20: fdt: add SPI SFLASH node tegra: spi: add fdt support to tegra SPI SFLASH driver tegra30: add SBC1 to periph id mapping table tegra30: fdt: add SPI SLINK nodes tegra: add addresses of SPI SLINK controllers tegra: add SPI SLINK driver tegra: cardhu: config: enable SPI arch/arm/cpu/tegra30-common/clock.c | 2 +- arch/arm/dts/tegra20.dtsi | 12 + arch/arm/dts/tegra30.dtsi | 72 ++++++ arch/arm/include/asm/arch-tegra/tegra.h | 6 + arch/arm/include/asm/arch-tegra/tegra_slink.h | 84 ++++++ board/compulab/dts/tegra20-trimslice.dts | 5 + board/nvidia/common/board.c | 3 +- board/nvidia/dts/tegra30-cardhu.dts | 5 + drivers/spi/Makefile | 1 + drivers/spi/tegra_slink.c | 343 +++++++++++++++++++++++++ drivers/spi/tegra_spi.c | 45 +++- include/configs/cardhu.h | 11 + include/fdtdec.h | 2 + lib/fdtdec.c | 2 + 14 files changed, 589 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-tegra/tegra_slink.h create mode 100644 drivers/spi/tegra_slink.c -- 1.7.10.4

2 9

[U-Boot] MX23 patches
by Marek Vasut 30 Jan '13

30 Jan '13

Hello, due to the recent influx of patches, I completely lost track of what is going on, what patches need review and what patches are already obsolete. Therefore, I'd like to ask you, Otavio, to proceed as follows: - I will discard all patches for mx23 currently in my mailbox - I'd like you to reset the versioning on all your patches and start with clean slate (from V1, as of this moment) - Repost all series you currently have, incl. those you already submitted with proper description in all patches and with a proper cover letter (git NNN -- cover-letter) - Wait at least one full day (24 hours) between re-sending a series, unless explicitly requested otherwise. - Always CC me, Fabio and Stefano on _all_ the patches in the series, not only selected ones. (you can add "Cc: Us Er <u(a)s.er>" in the patch description, this will let git send-email automatically handle the Cc) - Read [1], esp. the part about In-Reply-To please , apply this only when re- posting series. Do NOT do In-Reply-To for the re-post of the series after this restart, only if V2 is needed from now on. That is all. [1] http://www.denx.de/wiki/U-Boot/Patches#General_Patch_Submission_Rules Best regards, Marek Vasut

3 3

[U-Boot] [PULL] : Please pull u-boot-i2c
by Heiko Schocher 29 Jan '13

29 Jan '13

Hello Tom, please pull from u-boot-i2c: The following changes since commit 54b08efcf2f4ff532ce99c53f341a59c193331a5: README.mips: update known issues and TODOs (2013-01-16 10:52:08 +0100) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to 019be4af642cf59df0fa97082e5d9e290d26f997: Remove unused CONFIG_SYS_I2C_BUS[_SELECT] (2013-01-29 06:40:01 +0100) ---------------------------------------------------------------- Marek Vasut (1): i2c: mxs: Staticize the functions in the driver Michael Jones (1): Remove unused CONFIG_SYS_I2C_BUS[_SELECT] drivers/i2c/mxs_i2c.c | 8 ++++---- include/configs/am3517_crane.h | 2 -- include/configs/am3517_evm.h | 2 -- include/configs/cm_t35.h | 2 -- include/configs/devkit8000.h | 2 -- include/configs/dig297.h | 2 -- include/configs/igep00x0.h | 2 -- include/configs/mcx.h | 1 - include/configs/omap3_beagle.h | 2 -- include/configs/omap3_evm_common.h | 2 -- include/configs/omap3_logic.h | 2 -- include/configs/omap3_mvblx.h | 2 -- include/configs/omap3_pandora.h | 2 -- include/configs/omap3_sdp3430.h | 2 -- include/configs/omap3_zoom1.h | 2 -- include/configs/omap3_zoom2.h | 2 -- include/configs/omap4_common.h | 2 -- include/configs/tam3517-common.h | 2 -- include/configs/tricorder.h | 2 -- 19 Dateien geändert, 4 Zeilen hinzugefügt(+), 39 Zeilen entfernt(-) bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

4 4

[U-Boot] [GIT PULL] u-boot-mpc83xx: support for new SPL
by Kim Phillips 29 Jan '13

29 Jan '13

Hi Tom, Please pull: The following changes since commit 3a9d879f6f64585b819af728b53be0a05037fe0d: Prepare v2013.01 (2013-01-15 14:47:42 -0700) are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master for you to fetch changes up to a6187dccd813920524987792e49ef2feffb213e6: Merge remote-tracking branch 'mpc83xx/next' (2013-01-16 18:34:09 -0600) ---------------------------------------------------------------- Kim Phillips (1): Merge remote-tracking branch 'mpc83xx/next' Scott Wood (3): spl: Change PAD_TO to CONFIG_SPL_PAD_TO powerpc/mpc83xx: add support for new SPL powerpc/mpc83xx: convert MPC8313ERDB to new-SPL Makefile | 6 +- README | 10 ++ arch/powerpc/cpu/mpc83xx/Makefile | 16 +++ .../cpu/mpc83xx/{nand_init.c => spl_minimal.c} | 0 arch/powerpc/cpu/mpc83xx/start.S | 31 +++--- .../powerpc/cpu/mpc83xx/u-boot-spl.lds | 0 arch/powerpc/lib/Makefile | 3 +- board/ait/cam_enc_4xx/config.mk | 2 +- board/freescale/mpc8313erdb/mpc8313erdb.c | 10 +- boards.cfg | 4 +- include/configs/MPC8313ERDB.h | 43 +++++--- nand_spl/board/freescale/mpc8313erdb/Makefile | 108 --------------------- nand_spl/board/freescale/mpc8315erdb/Makefile | 6 +- nand_spl/board/sheldon/simpc8313/Makefile | 6 +- 14 files changed, 96 insertions(+), 149 deletions(-) rename arch/powerpc/cpu/mpc83xx/{nand_init.c => spl_minimal.c} (100%) rename nand_spl/board/freescale/mpc8313erdb/u-boot.lds => arch/powerpc/cpu/mpc83xx/u-boot-spl.lds (100%) delete mode 100644 nand_spl/board/freescale/mpc8313erdb/Makefile Thanks, Kim

2 1