September 2012 - U-Boot

[U-Boot] [PATCH 1/1] Add Marvell SDIO/MMC driver for Kirkwood SoC
by DrEagle 21 Sep '12

21 Sep '12

Signed-off-by: Gérald Kerma <uboot(a)doukki.net> Signed-off-by: Lior Amsalem <alior(a)marvell.com> --- drivers/mmc/Makefile | 1 + drivers/mmc/mrvl_mmc.c | 277 ++++++++++++++++++++++++++++++++++++++++++++++++ include/mrvl_mmc.h | 191 +++++++++++++++++++++++++++++++++ 3 files changed, 469 insertions(+) create mode 100644 drivers/mmc/mrvl_mmc.c create mode 100644 include/mrvl_mmc.h diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 2b96cdc..7f3b7c1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_GENERIC_MMC) += mmc.o COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o +COBJS-$(CONFIG_MRVL_MMC) += mrvl_mmc.o COBJS-$(CONFIG_MV_SDHCI) += mv_sdhci.o COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o diff --git a/drivers/mmc/mrvl_mmc.c b/drivers/mmc/mrvl_mmc.c new file mode 100644 index 0000000..8127961 --- /dev/null +++ b/drivers/mmc/mrvl_mmc.c @@ -0,0 +1,277 @@ +/* + * Driver for Marvell SDIO/MMC controller + * + * (C) Copyright 2012 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Lior Amsalem <alior(a)marvell.com> + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <part.h> +#include <mmc.h> + +#include <mrvl_mmc.h> +#define MRVL_MMC_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff)) + + +static int mrvl_mmc_setup_data(struct mmc_data *data) +{ + if (data->flags & MMC_DATA_READ) { + SDIO_REG_WRITE16(SDIO_SYS_ADDR_LOW,((ulong)(data->dest)) & 0xffff); + SDIO_REG_WRITE16(SDIO_SYS_ADDR_HI,(((ulong)data->dest) >> 16) & 0xffff); + } else { + SDIO_REG_WRITE16(SDIO_SYS_ADDR_LOW,((ulong)(data->src)) & 0xffff); + SDIO_REG_WRITE16(SDIO_SYS_ADDR_HI,(((ulong)data->src) >> 16) & 0xffff); + } + + SDIO_REG_WRITE16(SDIO_BLK_SIZE, data->blocksize); + SDIO_REG_WRITE16(SDIO_BLK_COUNT, data->blocks); + + return 0; +} + +static int mrvl_mmc_send_cmd (struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +{ + int timeout = 10; + ushort waittype = 0; + int err = 0 ; + ushort response[8], resp_indx = 0; + ushort resptype = 0; + ushort xfertype = 0; + +#ifdef DEBUG + printf("cmd [0x%x] resp_type[0x%x] arg[0x%x]\n", cmd->cmdidx, cmd->resp_type, cmd->cmdarg); +#endif + + /* clear status */ + SDIO_REG_WRITE16(SDIO_NOR_INTR_STATUS, 0xffff); + SDIO_REG_WRITE16(SDIO_ERR_INTR_STATUS, 0xffff); + + /* Checking if card is busy */ + while ((SDIO_REG_READ16(SDIO_PRESENT_STATE0) & CARD_BUSY)) { + if (timeout == 0) { + printf("MRVL MMC: card busy!\n"); + return -1; + } + timeout--; + udelay(1000); + } + + /* Set up for a data transfer if we have one */ + if (data) { + int err; + err = mrvl_mmc_setup_data(data); + if(err) + return err; + } + + /* Analyzing resptype/xfertype/waittype for the command */ + if (cmd->resp_type & MMC_RSP_BUSY) + resptype |= SDIO_CMD_RSP_48BUSY; + else if (cmd->resp_type & MMC_RSP_136) + resptype |= SDIO_CMD_RSP_136; + else if (cmd->resp_type & MMC_RSP_PRESENT) + resptype |= SDIO_CMD_RSP_48; + else + resptype |= SDIO_CMD_RSP_NONE; + + if (cmd->resp_type & MMC_RSP_CRC) + resptype |= SDIO_CMD_CHECK_CMDCRC; + + if (cmd->resp_type & MMC_RSP_OPCODE) + resptype |= SDIO_CMD_INDX_CHECK; + + if (cmd->resp_type & MMC_RSP_PRESENT) { + resptype |= SDIO_UNEXPECTED_RESP; + waittype |= SDIO_NOR_UNEXP_RSP; + } + + if (data) { + resptype |= SDIO_CMD_DATA_PRESENT | SDIO_CMD_CHECK_DATACRC16; + xfertype |= SDIO_XFER_MODE_HW_WR_DATA_EN; + if (data->flags & MMC_DATA_READ) { + xfertype |= SDIO_XFER_MODE_TO_HOST; + waittype = SDIO_NOR_DMA_INI; + } else + waittype |= SDIO_NOR_XFER_DONE; + } else { + waittype |= SDIO_NOR_CMD_DONE; + } + + /* Setting cmd arguments */ + SDIO_REG_WRITE16(SDIO_ARG_LOW, (ushort)(cmd->cmdarg & 0xffff)); + SDIO_REG_WRITE16(SDIO_ARG_HI, (ushort)(cmd->cmdarg >> 16) ); + + /* Setting Xfer mode */ + SDIO_REG_WRITE16(SDIO_XFER_MODE, xfertype); + + /* Sending command */ + SDIO_REG_WRITE16(SDIO_CMD, MRVL_MMC_MAKE_CMD(cmd->cmdidx, resptype)); + + /* Waiting for completion */ + timeout = 1000000; + + while (!((SDIO_REG_READ16(SDIO_NOR_INTR_STATUS)) & waittype)) { + udelay(1); + if (SDIO_REG_READ16(SDIO_NOR_INTR_STATUS) & SDIO_NOR_ERROR) { +#ifdef DEBUG + printf("mrvl_mmc_send_cmd: error! cmd : %d, err reg: %04x\n", cmd->cmdidx, SDIO_REG_READ16(SDIO_ERR_INTR_STATUS)); +#endif + if (SDIO_REG_READ16(SDIO_ERR_INTR_STATUS) & (SDIO_ERR_CMD_TIMEOUT | SDIO_ERR_DATA_TIMEOUT)) + return TIMEOUT; + return COMM_ERR; + } + timeout--; + if (timeout <= 0) { + printf("MRVL MMC: command timed out\n"); + return TIMEOUT; + } + } + + /* Handling response */ + for (resp_indx = 0 ; resp_indx < 8; resp_indx++) + response[resp_indx] = SDIO_REG_READ16(SDIO_RSP(resp_indx)); + + /* Copy the response to the response buffer */ + if (cmd->resp_type & MMC_RSP_PRESENT) { + cmd->response[0] = ((response[2] & 0x3f) << (8 - 8)) | + ((response[1] & 0xffff) << (14 - 8)) | + ((response[0] & 0x3ff) << (30 - 8)); + if (cmd->resp_type & MMC_RSP_136) { + cmd->response[3] = ((response[7] & 0x3fff) << 8) | + ((response[6] & 0x3ff) << 22); + cmd->response[2] = ((response[6] & 0xfc00) >> 10) | + ((response[5] & 0xffff) << 6) | + ((response[4] & 0x3ff) << 22); + cmd->response[1] = ((response[4] & 0xfc00) >> 10) | + ((response[3] & 0xffff) << 6) | + ((response[2] & 0x3ff) << 22); + cmd->response[0] = ((response[2] & 0xfc00) >> 10) | + ((response[1] & 0xffff) << 6) | + ((response[0] & 0x3ff) << 22); + } + } + +#ifdef DEBUG + printf("resp index[0x%x] ", response[0] >> 10); + printf("[0x%x] ", cmd->response[0]); + printf("[0x%x] ", cmd->response[1]); + printf("[0x%x] ", cmd->response[2]); + printf("[0x%x] ", cmd->response[3]); + printf("\n"); +#endif + + return 0; +} + +static void mrvl_mmc_set_clk(unsigned long clk) +{ + unsigned int m; + + m = MRVL_MMC_BASE_FAST_CLOCK/(2*clk) - 1; +#ifdef DEBUG + printf("mrvl_mmc_set_clk: dividor = 0x%x clock=%d\n", m, clk); +#endif + SDIO_REG_WRITE32(SDIO_CLK_DIV, m & 0x7ff); + udelay(10*1000); +} + +static void mrvl_mmc_set_bus(unsigned int bus) +{ + ushort reg; + +#ifdef DEBUG + printf("mrvl_mmc_set_bus: bus = 0x%d\n", bus); +#endif + reg = SDIO_REG_READ16(SDIO_HOST_CTRL); + reg &= ~(1 << 9); + switch (bus) { + case 4: + reg |= SDIO_HOST_CTRL_DATA_WIDTH_4_BITS; + break; + case 1: + default: + reg |= SDIO_HOST_CTRL_DATA_WIDTH_1_BIT; + } + SDIO_REG_WRITE16(SDIO_HOST_CTRL, reg); + udelay(10*1000); +} +static void mrvl_mmc_set_ios(struct mmc *mmc) +{ +#ifdef DEBUG + printf("bus[%d] clock[%d]\n", mmc->bus_width, mmc->clock); +#endif + mrvl_mmc_set_bus(mmc->bus_width); + mrvl_mmc_set_clk(mmc->clock); +} + +static int mrvl_mmc_init(struct mmc *mmc) +{ +#ifdef DEBUG + printf("mrvl_mmc_init\n"); +#endif + + /* Setting host parameters */ + SDIO_REG_WRITE16(SDIO_HOST_CTRL, + SDIO_HOST_CTRL_TMOUT(0xf) | + SDIO_HOST_CTRL_DATA_WIDTH_4_BITS | + SDIO_HOST_CTRL_BIG_ENDIAN | + SDIO_HOST_CTRL_PUSH_PULL_EN | + SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY ); + SDIO_REG_WRITE16(SDIO_CLK_CTRL, 0); + + /* enable status */ + SDIO_REG_WRITE16(SDIO_NOR_STATUS_EN, 0xffff); + SDIO_REG_WRITE16(SDIO_ERR_STATUS_EN, 0xffff); + + /* disable interrupts */ + SDIO_REG_WRITE16(SDIO_NOR_INTR_EN, 0); + SDIO_REG_WRITE16(SDIO_ERR_INTR_EN, 0); + + /* SW reset */ + SDIO_REG_WRITE16(SDIO_SW_RESET,0x100); + udelay(10000); + return 0; +} + +int mrvl_mmc_initialize(bd_t *bis) +{ + struct mmc *mmc = NULL; + + mmc = malloc(sizeof(struct mmc)); + if (!mmc) + return -1; + + sprintf(mmc->name, "MRVL_MMC"); + mmc->send_cmd = mrvl_mmc_send_cmd; + mmc->set_ios = mrvl_mmc_set_ios; + mmc->init = mrvl_mmc_init; + + mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_HS; + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + mmc->f_max = MRVL_MMC_CLOCKRATE_MAX; + mmc->f_min = MRVL_MMC_CLOCKRATE_MIN; + mmc->block_dev.part_type = PART_TYPE_DOS; + + mmc_register(mmc); + + return 0; +} diff --git a/include/mrvl_mmc.h b/include/mrvl_mmc.h new file mode 100644 index 0000000..db3a15a --- /dev/null +++ b/include/mrvl_mmc.h @@ -0,0 +1,191 @@ +/* + * (C) Copyright 2012 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Lior Amsalem <alior(a)marvell.com> + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __MRVL_MMC_H__ +#define __MRVL_MMC_H__ + +/* General definitions */ +#define P(x) (CONFIG_SYS_MMC_BASE + (x)) +#define SDIO_REG_WRITE32(addr,val) (*(volatile unsigned long*)(P(addr)) = val) +#define SDIO_REG_WRITE16(addr,val) (*(volatile unsigned short*)(P(addr)) = val) +#define SDIO_REG_READ16(addr) (*(volatile unsigned short*)(P(addr))) +#define SDIO_REG_READ32(addr) (*(volatile unsigned long*)(P(addr))) + +//#define MVSDMMC_DMA_SIZE 65536 +//#define MVSDMMC_CMD_TIMEOUT 2 /* 100 usec*/ + +/* The base MMC clock rate */ +#define MRVL_MMC_CLOCKRATE_MIN 250000 +#define MRVL_MMC_CLOCKRATE_MAX 50000000 +#define MRVL_MMC_BASE_FAST_CLOCK 200000000//100000000 + +/* SDIO register */ +#define SDIO_SYS_ADDR_LOW 0x000 +#define SDIO_SYS_ADDR_HI 0x004 +#define SDIO_BLK_SIZE 0x008 +#define SDIO_BLK_COUNT 0x00c +#define SDIO_ARG_LOW 0x010 +#define SDIO_ARG_HI 0x014 +#define SDIO_XFER_MODE 0x018 +#define SDIO_CMD 0x01c +#define SDIO_RSP(i) (0x020 + ((i)<<2)) +#define SDIO_RSP0 0x020 +#define SDIO_RSP1 0x024 +#define SDIO_RSP2 0x028 +#define SDIO_RSP3 0x02c +#define SDIO_RSP4 0x030 +#define SDIO_RSP5 0x034 +#define SDIO_RSP6 0x038 +#define SDIO_RSP7 0x03c +#define SDIO_BUF_DATA_PORT 0x040 +#define SDIO_RSVED 0x044 +#define SDIO_PRESENT_STATE0 0x048 +#define SDIO_PRESENT_STATE1 0x04c +#define SDIO_HOST_CTRL 0x050 +#define SDIO_BLK_GAP_CTRL 0x054 +#define SDIO_CLK_CTRL 0x058 +#define SDIO_SW_RESET 0x05c +#define SDIO_NOR_INTR_STATUS 0x060 +#define SDIO_ERR_INTR_STATUS 0x064 +#define SDIO_NOR_STATUS_EN 0x068 +#define SDIO_ERR_STATUS_EN 0x06c +#define SDIO_NOR_INTR_EN 0x070 +#define SDIO_ERR_INTR_EN 0x074 +#define SDIO_AUTOCMD12_ERR_STATUS 0x078 +#define SDIO_CURR_BYTE_LEFT 0x07c +#define SDIO_CURR_BLK_LEFT 0x080 +#define SDIO_AUTOCMD12_ARG_LOW 0x084 +#define SDIO_AUTOCMD12_ARG_HI 0x088 +#define SDIO_AUTOCMD12_INDEX 0x08c +#define SDIO_AUTO_RSP(i) (0x090 + ((i)<<2)) +#define SDIO_AUTO_RSP0 0x090 +#define SDIO_AUTO_RSP1 0x094 +#define SDIO_AUTO_RSP2 0x098 +#define SDIO_CLK_DIV 0x128 + +#define WINDOW_CTRL(i) (0x108 + ((i) << 3)) +#define WINDOW_BASE(i) (0x10c + ((i) << 3)) + +/* SDIO_PRESENT_STATE */ +#define CARD_BUSY (1 << 1) +#define CMD_INHIBIT (1 << 0) +#define CMD_TXACTIVE (1 << 8) +#define CMD_RXACTIVE (1 << 9) +#define CMD_AUTOCMD12ACTIVE (1 << 14) +#define CMD_BUS_BUSY (CMD_AUTOCMD12ACTIVE | \ + CMD_RXACTIVE | \ + CMD_TXACTIVE | \ + CMD_INHIBIT | \ + CARD_BUSY) + +/* SDIO_CMD */ +#define SDIO_CMD_RSP_NONE (0 << 0) +#define SDIO_CMD_RSP_136 (1 << 0) +#define SDIO_CMD_RSP_48 (2 << 0) +#define SDIO_CMD_RSP_48BUSY (3 << 0) +#define SDIO_CMD_CHECK_DATACRC16 (1 << 2) +#define SDIO_CMD_CHECK_CMDCRC (1 << 3) +#define SDIO_CMD_INDX_CHECK (1 << 4) +#define SDIO_CMD_DATA_PRESENT (1 << 5) +#define SDIO_UNEXPECTED_RESP (1 << 7) + +/* SDIO_XFER_MODE */ +#define SDIO_XFER_MODE_STOP_CLK (1 << 5) +#define SDIO_XFER_MODE_HW_WR_DATA_EN (1 << 1) +#define SDIO_XFER_MODE_AUTO_CMD12 (1 << 2) +#define SDIO_XFER_MODE_INT_CHK_EN (1 << 3) +#define SDIO_XFER_MODE_TO_HOST (1 << 4) +#define SDIO_XFER_MODE_DMA (0 << 6) + +/* SDIO_HOST_CTRL */ +#define SDIO_HOST_CTRL_PUSH_PULL_EN (1 << 0) +#define SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY (0 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY (1 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_MMC (3 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_MASK (3 << 1) +#define SDIO_HOST_CTRL_BIG_ENDIAN (1 << 3) +#define SDIO_HOST_CTRL_LSB_FIRST (1 << 4) +#define SDIO_HOST_CTRL_ID_MODE_LOW_FREQ (1 << 5) +#define SDIO_HOST_CTRL_HALF_SPEED (1 << 6) +#define SDIO_HOST_CTRL_DATA_WIDTH_1_BIT (0 << 9) +#define SDIO_HOST_CTRL_DATA_WIDTH_4_BITS (1 << 9) +#define SDIO_HOST_CTRL_HI_SPEED_EN (1 << 10) +#define SDIO_HOST_CTRL_TMOUT_MASK (0xf << 11) +#define SDIO_HOST_CTRL_TMOUT_MAX (0xf << 11) +#define SDIO_HOST_CTRL_TMOUT(x) ((x) << 11) +#define SDIO_HOST_CTRL_TMOUT_EN (1 << 15) +#define SDIO_HOST_CTRL_DFAULT_OPEN_DRAIN (SDIO_HOST_CTRL_TMOUT(x)(0xf)) +#define SDIO_HOST_CTRL_DFAULT_PUSH_PULL (SDIO_HOST_CTRL_TMOUT(x)(0xf) | SDIO_HOST_CTRL_PUSH_PULL_EN) + +/* NOR status bits */ +#define SDIO_NOR_ERROR (1 << 15) +#define SDIO_NOR_UNEXP_RSP (1 << 14) +#define SDIO_NOR_AUTOCMD12_DONE (1 << 13) +#define SDIO_NOR_SUSPEND_ON (1 << 12) +#define SDIO_NOR_LMB_FF_8W_AVAIL (1 << 11) +#define SDIO_NOR_LMB_FF_8W_FILLED (1 << 10) +#define SDIO_NOR_READ_WAIT_ON (1 << 9) +#define SDIO_NOR_CARD_INT (1 << 8) +#define SDIO_NOR_READ_READY (1 << 5) +#define SDIO_NOR_WRITE_READY (1 << 4) +#define SDIO_NOR_DMA_INI (1 << 3) +#define SDIO_NOR_BLK_GAP_EVT (1 << 2) +#define SDIO_NOR_XFER_DONE (1 << 1) +#define SDIO_NOR_CMD_DONE (1 << 0) + +/* ERR status bits */ +#define SDIO_ERR_CRC_STATUS (1 << 14) +#define SDIO_ERR_CRC_STARTBIT (1 << 13) +#define SDIO_ERR_CRC_ENDBIT (1 << 12) +#define SDIO_ERR_RESP_TBIT (1 << 11) +#define SDIO_ERR_SIZE (1 << 10) +#define SDIO_ERR_CMD_STARTBIT (1 << 9) +#define SDIO_ERR_AUTOCMD12 (1 << 8) +#define SDIO_ERR_DATA_ENDBIT (1 << 6) +#define SDIO_ERR_DATA_CRC (1 << 5) +#define SDIO_ERR_DATA_TIMEOUT (1 << 4) +#define SDIO_ERR_CMD_INDEX (1 << 3) +#define SDIO_ERR_CMD_ENDBIT (1 << 2) +#define SDIO_ERR_CMD_CRC (1 << 1) +#define SDIO_ERR_CMD_TIMEOUT (1 << 0) +#define SDIO_POLL_MASK 0xffff /* enable all for polling */ + +/* MMC commands */ +#define MMC_BLOCK_SIZE 512 +#define MMC_CMD_RESET 0 +#define MMC_CMD_SEND_OP_COND 1 +#define MMC_CMD_ALL_SEND_CID 2 +#define MMC_CMD_SET_RCA 3 +#define MMC_CMD_SELECT_CARD 7 +#define MMC_CMD_SEND_CSD 9 +#define MMC_CMD_SEND_CID 10 +#define MMC_CMD_SEND_STATUS 13 +#define MMC_CMD_SET_BLOCKLEN 16 +#define MMC_CMD_READ_BLOCK 17 +#define MMC_CMD_RD_BLK_MULTI 18 +#define MMC_CMD_WRITE_BLOCK 24 +#define MMC_MAX_BLOCK_SIZE 512 + +#endif /* __MRVL_MMC_H__ */ + +int mrvl_mmc_initialize(bd_t *bis); -- 1.7.10.4

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[U-Boot] [PATCH 0/1] Add Marvell SDIO/MMC driver for Kirkwood SoC
by DrEagle 21 Sep '12

21 Sep '12

This patch add a generic MMC driver for Marvell Kirkwood SoC drEagle (1): Add Marvell SDIO/MMC driver for Kirkwood SoC drivers/mmc/Makefile | 1 + drivers/mmc/mrvl_mmc.c | 277 ++++++++++++++++++++++++++++++++++++++++++++++++ include/mrvl_mmc.h | 191 +++++++++++++++++++++++++++++++++ 3 files changed, 469 insertions(+) create mode 100644 drivers/mmc/mrvl_mmc.c create mode 100644 include/mrvl_mmc.h -- 1.7.10.4

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[U-Boot] [PATCH 3/3] mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmd
by Jaehoon Chung 21 Sep '12

21 Sep '12

From: Tushar Behera <tushar.behera(a)linaro.org> MMC host controller requires a delay between every sdhci_send_cmd() execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay of 1000us was provided after every mmc_send_cmd() call. Adding a quirk in current sdhci driver to replicate the behaviour. Without this delay, MMC initialization on Origen board fails with following error messages. Timeout for status update! mmc fail to send stop cmd Signed-off-by: Tushar Behera <tushar.behera(a)linaro.org> Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/s5p_sdhci.c | 3 ++- drivers/mmc/sdhci.c | 3 +++ include/sdhci.h | 1 + 3 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index b978236..dc49d37 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -83,7 +83,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width) host->ioaddr = (void *)regbase; host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | - SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR; + SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR | + SDHCI_QUIRK_WAIT_SEND_CMD; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; host->version = sdhci_readw(host, SDHCI_HOST_VERSION); diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 15b4686..7845f87 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -240,6 +240,9 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, if (!ret && data) ret = sdhci_transfer_data(host, data, start_addr); + if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD) + udelay(1000); + stat = sdhci_readl(host, SDHCI_INT_STATUS); sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); if (!ret) { diff --git a/include/sdhci.h b/include/sdhci.h index c0345ed..c44793d 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -224,6 +224,7 @@ #define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3) #define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) #define SDHCI_QUIRK_NO_CD (1 << 5) +#define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6) /* to make gcc happy */ struct sdhci_host; -- 1.7.4.1

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[U-Boot] [PATCH] ARM: tegra: use standard variables to define load addresses
by Stephen Warren 21 Sep '12

21 Sep '12

From: Stephen Warren <swarren(a)nvidia.com> Currently, Tegra's default environment uses non-standard variables to define where boot scripts should load the kernel, FDT, and initrd. This change both changes the variable names to match those described in U-Boot's README, and shuffles their values around a little so that the values make a little more sense; see comments in the patch for rationale behind the values chosen. Note that this patch does remove the old non-standard variable "fdt_load" from the default environment, so this patch requires people to change their boot scripts. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- include/configs/tegra-common-post.h | 31 ++++++++++++++++++++++++++++--- 1 files changed, 28 insertions(+), 3 deletions(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 1e7aea9..048ecbb 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -95,8 +95,6 @@ #endif #define BOOTCMDS_COMMON \ - "scriptaddr=0x400000\0" \ - \ "rootpart=1\0" \ \ "script_boot=" \ @@ -140,9 +138,36 @@ #endif +/* + * Memory layout for where various images get loaded by boot scripts: + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for + * the compressed kernel to be up to 16M too. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for the FDT/DTB to be up to 1M, which is hopefully plenty. + */ +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=0x10000000\0" \ + "kernel_addr_r=0x01000000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" \ + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ - "fdt_load=0x01000000\0" \ + MEM_LAYOUT_ENV_SETTINGS \ BOOTCMDS_COMMON /* overrides for SPL build here */ -- 1.7.0.4

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[U-Boot] [GIT PULL] Pull request: u-boot-imx
by Stefano Babic 21 Sep '12

21 Sep '12

Hi Albert, please pull from u-boot-imx, thanks. The following changes since commit a9f1a4893364ddbb8b7942cded91d4c17c4f5948: lsxl: support power switch (2012-09-03 17:48:51 +0530) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to 1d9b033269263a69f7402f508c17b242fc7fea43: mx35pdk: README: Remove NAND references (2012-09-17 13:17:17 +0200) ---------------------------------------------------------------- Ashok Kumar Reddy (2): ima3-mx53:Rename CONFIG_PRIME => CONFIG_ETHPRME, remove mx6qsabrelite:Use IMX_GPIO_NR Macro Benoît Thébaudeau (8): mx35: Fix decode_pll mx35: Add definitions for clock gate values mx35: Fix clock dividers mx25: Define default SoC input clock frequencies mx35: Define default SoC input clock frequencies mx35 timer: Switch to 32-kHz source Fix mx31_decode_pll mx31: Define default SoC input clock frequencies Fabio Estevam (3): mx28evk: Convert to mxs_adjust_memory_params() mx28evk: Add USB Ethernet support mx35pdk: README: Remove NAND references Marek Vasut (7): M28: Fix the use of gpmi-nand in mtdparts MX28: Cleanup mxsboot within make mrproper MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDS SCSPS1: Enable caches MX28: SPI: Fix the DMA DCache race condition MX28: SPI: Fix the DMA chaining MX28: MMC: Avoid DMA DCache race condition Matt Sealey (1): efikamx: refine USB support Otavio Salvador (3): MX28: mx28evk: Align SSP clock speed MX28: mx28evk: Enable SPI DMA mx28evk: extend default environment Stefano Babic (3): MX: set a common place to share code for Freescale i.MX MX35: mx35pdk: add support for MMC MX6: drop binary constants from iomux header Makefile | 8 +- arch/arm/cpu/arm1136/mx31/generic.c | 12 +- arch/arm/cpu/arm1136/mx31/timer.c | 16 +-- arch/arm/cpu/arm1136/mx35/generic.c | 90 ++++++-------- arch/arm/cpu/arm1136/mx35/timer.c | 46 +++++--- arch/arm/cpu/arm926ejs/mx25/generic.c | 2 +- arch/arm/cpu/arm926ejs/mx25/timer.c | 16 +-- arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 8 +- arch/arm/{cpu/armv7 => }/imx-common/Makefile | 4 +- arch/arm/{cpu/armv7 => }/imx-common/cmd_bmode.c | 0 arch/arm/{cpu/armv7 => }/imx-common/cpu.c | 0 .../imx-common/i2c.c => imx-common/i2c-mxv7.c} | 0 arch/arm/{cpu/armv7 => }/imx-common/iomux-v3.c | 0 arch/arm/{cpu/armv7 => }/imx-common/speed.c | 0 arch/arm/{cpu/armv7 => }/imx-common/timer.c | 0 arch/arm/include/asm/arch-mx25/clock.h | 14 +++ arch/arm/include/asm/arch-mx31/clock.h | 14 +++ arch/arm/include/asm/arch-mx35/clock.h | 14 +++ arch/arm/include/asm/arch-mx35/crm_regs.h | 48 +++----- arch/arm/include/asm/arch-mx6/iomux.h | 124 ++++++++++---------- board/freescale/mx28evk/iomux.c | 2 +- board/freescale/mx28evk/mx28evk.c | 4 +- board/freescale/mx35pdk/README | 78 +----------- board/freescale/mx35pdk/mx35pdk.c | 25 ++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 24 ++-- board/genesi/mx51_efikamx/Makefile | 6 +- board/genesi/mx51_efikamx/efikamx-usb.c | 12 ++ board/genesi/mx51_efikamx/efikamx.c | 3 - drivers/mmc/mxsmmc.c | 4 + drivers/spi/mxs_spi.c | 58 +++++---- include/configs/flea3.h | 1 - include/configs/ima3-mx53.h | 3 +- include/configs/imx31_litekit.h | 1 - include/configs/imx31_phycore.h | 1 - include/configs/m28evk.h | 4 +- include/configs/mx25pdk.h | 1 - include/configs/mx28evk.h | 86 ++++++++++++-- include/configs/mx31ads.h | 2 - include/configs/mx31pdk.h | 2 - include/configs/mx35pdk.h | 18 ++- include/configs/qong.h | 2 - include/configs/sc_sps_1.h | 2 - include/configs/tt01.h | 2 - include/configs/zmx25.h | 1 - 44 files changed, 409 insertions(+), 349 deletions(-) rename arch/arm/{cpu/armv7 => }/imx-common/Makefile (94%) rename arch/arm/{cpu/armv7 => }/imx-common/cmd_bmode.c (100%) rename arch/arm/{cpu/armv7 => }/imx-common/cpu.c (100%) rename arch/arm/{cpu/armv7/imx-common/i2c.c => imx-common/i2c-mxv7.c} (100%) rename arch/arm/{cpu/armv7 => }/imx-common/iomux-v3.c (100%) rename arch/arm/{cpu/armv7 => }/imx-common/speed.c (100%) rename arch/arm/{cpu/armv7 => }/imx-common/timer.c (100%) -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[U-Boot] Please pull u-boot-tegra/master into ARM/master
by Tom Warren 21 Sep '12

21 Sep '12

Albert, Please pull u-boot-tegra/master into ARM/master. ./MAKEALL -a arm is clean except for yaffs and ohci-hcd errors that were present before. Thanks! The following changes since commit 057df193b40d31799d41d43bc832a972f658bfe4: Albert ARIBAUD (1): Merge remote-tracking branch 'u-boot-ti/master' into m are available in the git repository at: git://git.denx.de/u-boot-tegra master Jim Lin (1): tegra: nand: Add Tegra NAND driver Lucas Stach (1): tegra20: usb: rework set_host_mode Simon Glass (5): nand: Try to align the default buffers tegra: Add NAND support to funcmux tegra: fdt: Add NAND controller binding and definitions tegra: fdt: Add NAND definitions to fdt tegra: Enable NAND on Seaboard Stephen Warren (6): tegra: enable NAND on Harmony mmc: detect boot sectors using EXT_CSD_BOOT_MULT too env_mmc: allow environment to be in an eMMC partition tegra: put eMMC environment into the boot sectors ARM: tegra: remove redundant mkdirs from board Makefiles ARM: tegra: fix Ventana standalone build Thierry Reding (2): cmd_nand: dump: Align data and OOB buffers tegra: Enable NAND on TEC Tom Warren (2): Tegra: Change Tegra20 to Tegra in common code, prep for T30 NAND: MXS: include common.h first so cache.h is included in correct order arch/arm/cpu/arm720t/tegra20/cpu.c | 8 +- arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c | 2 +- arch/arm/cpu/armv7/tegra20/usb.c | 37 +- arch/arm/cpu/tegra20-common/Makefile | 2 +- arch/arm/cpu/tegra20-common/ap20.c | 6 +- arch/arm/cpu/tegra20-common/board.c | 14 +- arch/arm/cpu/tegra20-common/funcmux.c | 7 + arch/arm/cpu/tegra20-common/warmboot.c | 14 +- arch/arm/cpu/tegra20-common/warmboot_avp.c | 2 +- arch/arm/dts/tegra20.dtsi | 7 + arch/arm/include/asm/arch-tegra20/ap20.h | 3 - arch/arm/include/asm/arch-tegra20/funcmux.h | 3 + arch/arm/include/asm/arch-tegra20/mmc.h | 8 +- arch/arm/include/asm/arch-tegra20/sys_proto.h | 4 +- arch/arm/include/asm/arch-tegra20/tegra20.h | 13 +- .../arm/include/asm/arch-tegra20}/tegra_mmc.h | 12 +- arch/arm/include/asm/arch-tegra20/tegra_spi.h | 2 +- arch/arm/include/asm/arch-tegra20/timer.h | 4 +- board/avionic-design/common/tamonten.c | 2 +- board/avionic-design/dts/tegra20-tec.dts | 11 + board/compal/paz00/paz00.c | 4 +- board/compulab/trimslice/trimslice.c | 4 +- board/nvidia/common/board.c | 8 +- board/nvidia/dts/tegra20-harmony.dts | 10 + board/nvidia/dts/tegra20-seaboard.dts | 10 + board/nvidia/harmony/Makefile | 4 - board/nvidia/harmony/harmony.c | 4 +- board/nvidia/seaboard/Makefile | 4 - board/nvidia/seaboard/seaboard.c | 4 +- board/nvidia/ventana/Makefile | 4 +- board/nvidia/whistler/Makefile | 4 - board/nvidia/whistler/whistler.c | 4 +- common/cmd_nand.c | 4 +- common/env_mmc.c | 64 ++- .../nand/nvidia,tegra20-nand.txt | 53 + drivers/gpio/tegra_gpio.c | 8 +- drivers/i2c/tegra_i2c.c | 12 +- drivers/input/Makefile | 2 +- drivers/mmc/mmc.c | 3 +- drivers/mmc/tegra_mmc.c | 34 +- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/mxs_nand.c | 2 +- drivers/mtd/nand/nand_base.c | 3 +- drivers/mtd/nand/tegra_nand.c | 1026 ++++++++++++++++++++ drivers/mtd/nand/tegra_nand.h | 257 +++++ drivers/spi/tegra_spi.c | 6 +- include/configs/harmony.h | 19 +- include/configs/medcom.h | 6 +- include/configs/paz00.h | 9 +- include/configs/plutux.h | 6 +- include/configs/seaboard.h | 30 +- include/configs/tec.h | 18 +- .../{tegra20-common-post.h => tegra-common-post.h} | 12 +- include/configs/tegra20-common.h | 14 +- include/configs/trimslice.h | 8 +- include/configs/ventana.h | 9 +- include/configs/whistler.h | 11 +- include/fdtdec.h | 1 + include/linux/mtd/nand.h | 7 +- include/mmc.h | 1 + lib/fdtdec.c | 1 + 61 files changed, 1655 insertions(+), 197 deletions(-) rename {drivers/mmc => arch/arm/include/asm/arch-tegra20}/tegra_mmc.h (96%) create mode 100644 doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt create mode 100644 drivers/mtd/nand/tegra_nand.c create mode 100644 drivers/mtd/nand/tegra_nand.h rename include/configs/{tegra20-common-post.h => tegra-common-post.h} (96%)

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[U-Boot] Request for Kirkwood new Marvell MMC Driver mainline
by DrEagle 20 Sep '12

20 Sep '12

I have a patch for the support of a generic MMC driver for kirkwood Soc. I want to make some few more fix to have sheevaplugs been updated also. Here is the complete changelog of my patch : - Add Marvell SDIO/MMC driver for Kirkwood SoC - Add SDIO/MMC support for Sheevaplug board - Fix env address for Sheevaplug board - Fix mtdparts for Sheevaplug board - Fix mtdids for Sheevaplug board - Add default mtdparts for Sheevaplug board - Add default mtdids for Sheevaplug board - Add SATA support for Sheevaplug board Is there any guide to help for making cumulative patch, and for using git diff to make some local branch ? I need, I suppose, to make patch for each subject and segment my diff into few proposal ? - MMC Driver - MMC support - Fix env ... Is there any guide for proposing patch to be mainline supported into uboot ? Thanks in advance for the tips, Amicalement,

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[U-Boot] [PATCH v6 0/4] OMAP: SPL networking support
by Ilya Yanok 20 Sep '12

20 Sep '12

These series provides support for networking in SPL. In this version some effort is done to minimize the resulting SPL size and now Net-only SPL is <50KB in size. So theoretically it can be used on boards with enough SRAM space like AM3517. But real testing was done only on AM335x. Changes in v3: - use BOOTP in SPL regardless of CONFIG_CMD_DHCP - add support for setting different VCI in SPL - set Vendor Class Identifier for SPL Changes in v4: - used strlen instead of sizeof - moved vci_strlen var inside macro - fix compilation of SPL's libcommon with CONFIG_HUSH_PARSER and CONFIG_BOOTD defined - rename spl_eth.c to spl_net.c - set ethact variable if device name is passed - SPL_BOARD_INIT is not needed anymore Changes in v5: - set up guards in cmd_nvedit.c more carefully - now we don't need command.c and only need main.c for show_boot_progress() so defined it to be noop and remove both files from SPL sources - SPL guards in command.c and main.c are no longer needed - add some guards in env_common.c - qsort.c is no longer needed - add guard to hashtable.c to save some space - undefine unneeded CONFIG_CMD_* while building SPL to save space Changes in v6: - fix typo in patch name - remove some unneeded changes introduced by earlier versions - switch clauses and use ifdef instead of ifndef - create new header config_uncmd_spl.h which undefines CONFIG_CMD_* options unneeded in SPL and include it last from config.h - remove explicit undefs from net/net.c and net/bootp.c Ilya Yanok (4): net/bootp: add VCI support for BOOTP also OMAP: spl: call timer_init() from SPL OMAP: networking support for SPL am335x_evm: enable networking in SPL arch/arm/cpu/armv7/omap-common/Makefile | 3 ++ arch/arm/cpu/armv7/omap-common/spl.c | 11 +++++++ arch/arm/cpu/armv7/omap-common/spl_net.c | 52 ++++++++++++++++++++++++++++++ arch/arm/include/asm/omap_common.h | 4 +++ common/Makefile | 4 +++ common/cmd_nvedit.c | 8 +++++ common/env_common.c | 7 ++-- include/bootstage.h | 6 +++- include/config_uncmd_spl.h | 24 ++++++++++++++ include/configs/am335x_evm.h | 5 ++- lib/Makefile | 9 ++++-- lib/hashtable.c | 2 ++ lib/vsprintf.c | 2 +- mkconfig | 1 + net/bootp.c | 27 ++++++++++++---- net/tftp.c | 4 +++ spl/Makefile | 3 ++ 17 files changed, 159 insertions(+), 13 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap-common/spl_net.c create mode 100644 include/config_uncmd_spl.h -- 1.7.9.5

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[U-Boot] [PATCH] ARM: tegra: define CONFIG_SYS_BOOTMAPSZ
by Stephen Warren 20 Sep '12

20 Sep '12

From: Stephen Warren <swarren(a)nvidia.com> This define indicates the size of the memory region where it is safe to place data passed to the Linux kernel (ATAGs, DTB, initrd). The value needs to be: a) Less than or equal to RAM size. b) Small enough that the area is not within the kernel's highmem region, since the kernel cannot access ATAGs/DTB/initrd from highmem. c) Large enough to hold the kernel+DTB+initrd. 256M seems large enough for (c) in most circumstances, and small enough to satisfy (a) and (b) across any possible Tegra board. Note that the user can override this value via environment variable "bootm_mapsize" if needed. The advantage of defining BOOTMAPSZ is that we no longer need to define variable fdt_high in the default environment. Previously, we defined this to prevent the DTB from being relocated to the very end of RAM, which on most Tegra systems is within highmem, and hence which would cause boot failures. A user can still define this variable themselves if they want the FDT to be either left in-place wherever loaded, or copied to some other specific location. Similarly, there should no longer be a strict requirement for the user to define initrd_high if using an initrd. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- include/configs/tegra-common-post.h | 1 - include/configs/tegra20-common.h | 2 ++ 2 files changed, 2 insertions(+), 1 deletions(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index dda46c6..1e7aea9 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -143,7 +143,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ "fdt_load=0x01000000\0" \ - "fdt_high=01100000\0" \ BOOTCMDS_COMMON /* overrides for SPL build here */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 1492f2a..4c03922 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -177,6 +177,8 @@ #define CONFIG_SYS_TEXT_BASE 0x0010c000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ + #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ -- 1.7.0.4

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[U-Boot] [PATCH] ext4: cache-align buffers so the invalidation works
by Stephen Warren 20 Sep '12

20 Sep '12

From: Stephen Warren <swarren(a)nvidia.com> DMA buffer cache invalidation requires that buffers have cache-aligned buffer locations and sizes. Use memalign() and ALLOC_CACHE_ALIGN_BUFFER() to ensure this. On Tegra at least, without this fix, the following fail commands fail in u-boot-master/ext4, but succeeded at the branch's branch point in u-boot/master. With this fix, the commands work again: ext2ls mmc 0:1 / ext2load mmc 0:1 /boot/zImage Cc: Uma Shankar <uma.shankar(a)samsung.com> Cc: Manjunatha C Achar <a.manjunatha(a)samsung.com> Cc: Iqbal Shareef <iqbal.ams(a)samsung.com> Cc: Hakgoo Lee <goodguy.lee(a)samsung.com> Cc: Wolfgang Denk <wd(a)denx.de> Cc: Tom Rini <trini(a)ti.com> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- This patch is for branch u-boot/ext4. fs/ext4/dev.c | 4 ++-- fs/ext4/ext4_common.c | 2 +- fs/ext4/ext4_common.h | 7 ++++++- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c index fb62f24..9e85228 100644 --- a/fs/ext4/dev.c +++ b/fs/ext4/dev.c @@ -62,7 +62,7 @@ int ext4fs_set_blk_dev(block_dev_desc_t *rbdd, int part) int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf) { - char sec_buf[SECTOR_SIZE]; + ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, SECTOR_SIZE); unsigned block_len; /* Check partition boundaries */ @@ -107,7 +107,7 @@ int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf) block_len = byte_len & ~(SECTOR_SIZE - 1); if (block_len == 0) { - u8 p[SECTOR_SIZE]; + ALLOC_CACHE_ALIGN_BUFFER(u8, p, SECTOR_SIZE); block_len = SECTOR_SIZE; ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc->dev, diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 083e45e..3deffd5 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -71,7 +71,7 @@ void put_ext4(uint64_t off, void *buf, uint32_t size) uint64_t startblock; uint64_t remainder; unsigned char *temp_ptr = NULL; - unsigned char sec_buf[SECTOR_SIZE]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, sec_buf, SECTOR_SIZE); struct ext_filesystem *fs = get_fs(); startblock = off / (uint64_t)SECTOR_SIZE; diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h index 801b8b8..0af625d 100644 --- a/fs/ext4/ext4_common.h +++ b/fs/ext4/ext4_common.h @@ -55,7 +55,12 @@ #define SUPERBLOCK_SIZE 1024 #define F_FILE 1 -#define zalloc(size) calloc(1, size) +static inline void *zalloc(size_t size) +{ + void *p = memalign(ARCH_DMA_MINALIGN, size); + memset(p, 0, size); + return p; +} extern unsigned long part_offset; int ext4fs_read_inode(struct ext2_data *data, int ino, -- 1.7.0.4

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