July 2012 - U-Boot

[U-Boot] [PATCH 1/3] fdt: Add board specific dts inclusion
by Stephan Linz 10 Jul '12

10 Jul '12

Some architectures, for example Microblaze, doesn't need a splitted device tree because every Microblaze hw design is different. The individuell Microblaze device tree will be auto generated by FPGA design tools and could be used directly with dtc. The auto generated dts for Microblaze can not processed by CPP. Unfortunately that is the default procedure in U-Boot to merge a splitted device tree (substitution of ARCH_CPU_DTS). Microblaze will never use the ARCH_CPU_DTS substitution and we introduce the new board specific substitution variable BOARD_DTS that points into vendor/board/dts subdir with the file name of CONFIG_DEFAULT_DEVICE_TREE. The common dts file in vendor/dts subdir (defined by CONFIG_DEFAULT_DEVICE_TREE) contain a single include line that can processed by CPP: /include/ BOARD_DTS Signed-off-by: Stephan Linz <linz(a)li-pro.net> --- dts/Makefile | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/dts/Makefile b/dts/Makefile index 914e479..b1f47a1 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -36,7 +36,8 @@ $(error Your architecture does not have device tree support enabled. \ Please define CONFIG_ARCH_DEVICE_TREE)) # We preprocess the device tree file provide a useful define -DTS_CPPFLAGS := -DARCH_CPU_DTS=\"$(SRCTREE)/arch/$(ARCH)/dts/$(CONFIG_ARCH_DEVICE_TREE).dtsi\" +DTS_CPPFLAGS := -DARCH_CPU_DTS=\"$(SRCTREE)/arch/$(ARCH)/dts/$(CONFIG_ARCH_DEVICE_TREE).dtsi\" \ + -DBOARD_DTS=\"$(SRCTREE)/board/$(VENDOR)/$(BOARD)/dts/$(DEVICE_TREE).dts\" all: $(obj).depend $(LIB) -- 1.7.0.4

3 8

[U-Boot] [PATCH v2] Consolidate bootcount code into drivers/bootcount
by Stefan Roese 10 Jul '12

10 Jul '12

This patch moves all bootcount implementations into a common directory: drivers/bootcount. The generic bootcount driver is now usable not only by powerpc platforms, but others as well. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Valentin Longchamp <valentin.longchamp(a)keymile.com> Cc: Christian Riesch <christian.riesch(a)omicron.at> Cc: Manfred Rudigier <manfred.rudigier(a)omicron.at> Cc: Mike Frysinger <vapier(a)gentoo.org> Cc: Rob Herring <rob.herring(a)calxeda.com> Cc: Reinhard Meyer <reinhard.meyer(a)emk-elektronik.de> --- v2: - Added CONFIG_BOOTCOUNT_LE to bootcount_davinci.c and enabled it in calimain.h to select little-endian accessors. Makefile | 3 + arch/arm/cpu/arm926ejs/at91/cpu.c | 26 ------- arch/arm/cpu/armv7/highbank/Makefile | 2 +- arch/arm/cpu/armv7/highbank/bootcount.c | 36 ---------- arch/arm/cpu/ixp/cpu.c | 22 ------ arch/powerpc/lib/Makefile | 1 - board/enbw/enbw_cmc/enbw_cmc.c | 29 -------- board/keymile/km_arm/km_arm.c | 51 -------------- board/omicron/calimain/calimain.c | 29 -------- drivers/bootcount/Makefile | 47 +++++++++++++ .../powerpc/lib => drivers/bootcount}/bootcount.c | 10 ++- drivers/bootcount/bootcount_at91.c | 43 ++++++++++++ .../bootcount/bootcount_blackfin.c | 0 drivers/bootcount/bootcount_davinci.c | 72 ++++++++++++++++++++ drivers/bootcount/bootcount_ram.c | 72 ++++++++++++++++++++ include/configs/calimain.h | 1 + include/configs/km/km_arm.h | 2 + 17 files changed, 248 insertions(+), 198 deletions(-) delete mode 100644 arch/arm/cpu/armv7/highbank/bootcount.c create mode 100644 drivers/bootcount/Makefile rename {arch/powerpc/lib => drivers/bootcount}/bootcount.c (92%) create mode 100644 drivers/bootcount/bootcount_at91.c rename arch/blackfin/cpu/bootcount.c => drivers/bootcount/bootcount_blackfin.c (100%) create mode 100644 drivers/bootcount/bootcount_davinci.c create mode 100644 drivers/bootcount/bootcount_ram.c diff --git a/Makefile b/Makefile index 659e8f2..8fd51b8 100644 --- a/Makefile +++ b/Makefile @@ -249,6 +249,9 @@ LIBS += net/libnet.o LIBS += disk/libdisk.o LIBS += drivers/bios_emulator/libatibiosemu.o LIBS += drivers/block/libblock.o +ifeq ($(CONFIG_BOOTCOUNT_LIMIT),y) +LIBS += drivers/bootcount/libbootcount.o +endif LIBS += drivers/dma/libdma.o LIBS += drivers/fpga/libfpga.o LIBS += drivers/gpio/libgpio.o diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c b/arch/arm/cpu/arm926ejs/at91/cpu.c index c47fb31..5cf4fad 100644 --- a/arch/arm/cpu/arm926ejs/at91/cpu.c +++ b/arch/arm/cpu/arm926ejs/at91/cpu.c @@ -71,29 +71,3 @@ int print_cpuinfo(void) return 0; } #endif - -#ifdef CONFIG_BOOTCOUNT_LIMIT -/* - * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register. - * This is done so we need to use only one of the four GPBR registers. - */ -void bootcount_store (ulong a) -{ - at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; - - writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), - &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); -} - -ulong bootcount_load (void) -{ - at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; - - ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); - if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) - return 0; - else - return val & 0x0000ffff; -} - -#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/arch/arm/cpu/armv7/highbank/Makefile b/arch/arm/cpu/armv7/highbank/Makefile index 917c3a3..76faeb0 100644 --- a/arch/arm/cpu/armv7/highbank/Makefile +++ b/arch/arm/cpu/armv7/highbank/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -COBJS := timer.o bootcount.o +COBJS := timer.o SOBJS := SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/arch/arm/cpu/armv7/highbank/bootcount.c b/arch/arm/cpu/armv7/highbank/bootcount.c deleted file mode 100644 index 9ca0656..0000000 --- a/arch/arm/cpu/armv7/highbank/bootcount.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright 2011 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <common.h> -#include <asm/io.h> - -#ifdef CONFIG_BOOTCOUNT_LIMIT -void bootcount_store(ulong a) -{ - writel((BOOTCOUNT_MAGIC & 0xffff0000) | a, CONFIG_SYS_BOOTCOUNT_ADDR); -} - -ulong bootcount_load(void) -{ - u32 tmp = readl(CONFIG_SYS_BOOTCOUNT_ADDR); - - if ((tmp & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) - return 0; - else - return tmp & 0x0000ffff; -} -#endif diff --git a/arch/arm/cpu/ixp/cpu.c b/arch/arm/cpu/ixp/cpu.c index 942845d..f1864d6 100644 --- a/arch/arm/cpu/ixp/cpu.c +++ b/arch/arm/cpu/ixp/cpu.c @@ -107,28 +107,6 @@ void pci_init(void) } */ -#ifdef CONFIG_BOOTCOUNT_LIMIT - -void bootcount_store (ulong a) -{ - volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR); - - save_addr[0] = a; - save_addr[1] = BOOTCOUNT_MAGIC; -} - -ulong bootcount_load (void) -{ - volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR); - - if (save_addr[1] != BOOTCOUNT_MAGIC) - return 0; - else - return save_addr[0]; -} - -#endif /* CONFIG_BOOTCOUNT_LIMIT */ - int cpu_eth_init(bd_t *bis) { #ifdef CONFIG_IXP4XX_NPE diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index cdd62a2..965f9ea 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -46,7 +46,6 @@ SOBJS-y += reloc.o COBJS-$(CONFIG_BAT_RW) += bat_rw.o COBJS-y += board.o COBJS-y += bootm.o -COBJS-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount.o COBJS-y += cache.o COBJS-y += extable.o COBJS-y += interrupts.o diff --git a/board/enbw/enbw_cmc/enbw_cmc.c b/board/enbw/enbw_cmc/enbw_cmc.c index 6c0d931..3616df0 100644 --- a/board/enbw/enbw_cmc/enbw_cmc.c +++ b/board/enbw/enbw_cmc/enbw_cmc.c @@ -517,35 +517,6 @@ void arch_memory_failure_handle(void) } #endif -#if defined(CONFIG_BOOTCOUNT_LIMIT) -void bootcount_store(ulong a) -{ - struct davinci_rtc *reg = - (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; - - /* - * write RTC kick register to enable write - * for RTC Scratch registers. Scratch0 and 1 are - * used for bootcount values. - */ - writel(RTC_KICK0R_WE, &reg->kick0r); - writel(RTC_KICK1R_WE, &reg->kick1r); - out_be32(&reg->scratch0, a); - out_be32(&reg->scratch1, BOOTCOUNT_MAGIC); -} - -ulong bootcount_load(void) -{ - struct davinci_rtc *reg = - (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; - - if (in_be32(&reg->scratch1) != BOOTCOUNT_MAGIC) - return 0; - else - return in_be32(&reg->scratch0); -} -#endif - void board_gpio_init(void) { struct davinci_gpio *gpio = davinci_gpio_bank01; diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 9e9940c..667edbc 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -404,57 +404,6 @@ int hush_init_var(void) } #endif -#if defined(CONFIG_BOOTCOUNT_LIMIT) -const ulong patterns[] = { 0x00000000, - 0xFFFFFFFF, - 0xFF00FF00, - 0x0F0F0F0F, - 0xF0F0F0F0}; -const ulong NBR_OF_PATTERNS = sizeof(patterns)/sizeof(*patterns); -const ulong OFFS_PATTERN = 3; -const ulong REPEAT_PATTERN = 1000; - -void bootcount_store(ulong a) -{ - ulong *save_addr; - ulong size = 0; - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - size += gd->bd->bi_dram[i].size; - save_addr = (ulong *)(size - BOOTCOUNT_ADDR); - writel(a, save_addr); - writel(BOOTCOUNT_MAGIC, &save_addr[1]); - - for (i = 0; i < REPEAT_PATTERN; i++) - writel(patterns[i % NBR_OF_PATTERNS], - &save_addr[i+OFFS_PATTERN]); - -} - -ulong bootcount_load(void) -{ - ulong *save_addr; - ulong size = 0; - ulong counter = 0; - int i, tmp; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - size += gd->bd->bi_dram[i].size; - save_addr = (ulong *)(size - BOOTCOUNT_ADDR); - - counter = readl(&save_addr[0]); - - /* Is the counter reliable, check in the big pattern for bit errors */ - for (i = 0; (i < REPEAT_PATTERN) && (counter != 0); i++) { - tmp = readl(&save_addr[i+OFFS_PATTERN]); - if (tmp != patterns[i % NBR_OF_PATTERNS]) - counter = 0; - } - return counter; -} -#endif - #if defined(CONFIG_SOFT_I2C) void set_sda(int state) { diff --git a/board/omicron/calimain/calimain.c b/board/omicron/calimain/calimain.c index 54415ce..1060a1f 100644 --- a/board/omicron/calimain/calimain.c +++ b/board/omicron/calimain/calimain.c @@ -157,32 +157,3 @@ void hw_watchdog_reset(void) davinci_hw_watchdog_reset(); } #endif - -#if defined(CONFIG_BOOTCOUNT_LIMIT) -void bootcount_store(ulong a) -{ - struct davinci_rtc *reg = - (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; - - /* - * write RTC kick register to enable write - * for RTC Scratch registers. Scratch0 and 1 are - * used for bootcount values. - */ - writel(RTC_KICK0R_WE, &reg->kick0r); - writel(RTC_KICK1R_WE, &reg->kick1r); - writel(a, &reg->scratch0); - writel(BOOTCOUNT_MAGIC, &reg->scratch1); -} - -ulong bootcount_load(void) -{ - struct davinci_rtc *reg = - (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; - - if (readl(&reg->scratch1) != BOOTCOUNT_MAGIC) - return 0; - else - return readl(&reg->scratch0); -} -#endif diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile new file mode 100644 index 0000000..3d5ec13 --- /dev/null +++ b/drivers/bootcount/Makefile @@ -0,0 +1,47 @@ +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libbootcount.o + +COBJS-y += bootcount.o +COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o +COBJS-$(CONFIG_BFIN_CPU) += bootcount_blackfin.o +COBJS-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o +COBJS-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################## diff --git a/arch/powerpc/lib/bootcount.c b/drivers/bootcount/bootcount.c similarity index 92% rename from arch/powerpc/lib/bootcount.c rename to drivers/bootcount/bootcount.c index f9ce539..5d22a28 100644 --- a/arch/powerpc/lib/bootcount.c +++ b/drivers/bootcount/bootcount.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010 + * (C) Copyright 2010-2012 * Stefan Roese, DENX Software Engineering, sr(a)denx.de. * * See file CREDITS for list of people who contributed to this @@ -22,6 +22,7 @@ */ #include <common.h> +#include <linux/compiler.h> #include <asm/io.h> /* @@ -65,7 +66,9 @@ #endif /* !defined(CONFIG_SYS_BOOTCOUNT_ADDR) */ -void bootcount_store(ulong a) +/* Now implement the generic default functions */ +#if defined(CONFIG_SYS_BOOTCOUNT_ADDR) +__weak void bootcount_store(ulong a) { void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR; @@ -77,7 +80,7 @@ void bootcount_store(ulong a) #endif } -ulong bootcount_load(void) +__weak ulong bootcount_load(void) { void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR; @@ -95,3 +98,4 @@ ulong bootcount_load(void) return in_be32(reg); #endif } +#endif diff --git a/drivers/bootcount/bootcount_at91.c b/drivers/bootcount/bootcount_at91.c new file mode 100644 index 0000000..7cfe14d --- /dev/null +++ b/drivers/bootcount/bootcount_at91.c @@ -0,0 +1,43 @@ +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/at91_gpbr.h> + +/* + * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register. + * This is done so we need to use only one of the four GPBR registers. + */ +void bootcount_store(ulong a) +{ + at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; + + writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), + &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); +} + +ulong bootcount_load(void) +{ + at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; + + ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); + if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) + return 0; + else + return val & 0x0000ffff; +} diff --git a/arch/blackfin/cpu/bootcount.c b/drivers/bootcount/bootcount_blackfin.c similarity index 100% rename from arch/blackfin/cpu/bootcount.c rename to drivers/bootcount/bootcount_blackfin.c diff --git a/drivers/bootcount/bootcount_davinci.c b/drivers/bootcount/bootcount_davinci.c new file mode 100644 index 0000000..e0471f1 --- /dev/null +++ b/drivers/bootcount/bootcount_davinci.c @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2011 + * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/da850_lowlevel.h> +#include <asm/arch/davinci_misc.h> + +#ifdef CONFIG_BOOTCOUNT_LE +static inline void bc_out32(volatile u32 *addr, u32 data) +{ + out_le32(addr, data); +} + +static inline u32 bc_in32(volatile u32 *addr) +{ + return in_le32(addr); +} +#else +static inline void bc_out32(volatile u32 *addr, u32 data) +{ + out_be32(addr, data); +} + +static inline u32 bc_in32(volatile u32 *addr) +{ + return in_be32(addr); +} +#endif + +void bootcount_store(ulong a) +{ + struct davinci_rtc *reg = + (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; + + /* + * write RTC kick register to enable write + * for RTC Scratch registers. Scratch0 and 1 are + * used for bootcount values. + */ + writel(RTC_KICK0R_WE, &reg->kick0r); + writel(RTC_KICK1R_WE, &reg->kick1r); + bc_out32(&reg->scratch0, a); + bc_out32(&reg->scratch1, BOOTCOUNT_MAGIC); +} + +ulong bootcount_load(void) +{ + struct davinci_rtc *reg = + (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; + + if (bc_in32(&reg->scratch1) != BOOTCOUNT_MAGIC) + return 0; + else + return bc_in32(&reg->scratch0); +} diff --git a/drivers/bootcount/bootcount_ram.c b/drivers/bootcount/bootcount_ram.c new file mode 100644 index 0000000..8655af7 --- /dev/null +++ b/drivers/bootcount/bootcount_ram.c @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2010 + * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +const ulong patterns[] = { 0x00000000, + 0xFFFFFFFF, + 0xFF00FF00, + 0x0F0F0F0F, + 0xF0F0F0F0}; +const ulong NBR_OF_PATTERNS = sizeof(patterns) / sizeof(*patterns); +const ulong OFFS_PATTERN = 3; +const ulong REPEAT_PATTERN = 1000; + +void bootcount_store(ulong a) +{ + ulong *save_addr; + ulong size = 0; + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + size += gd->bd->bi_dram[i].size; + save_addr = (ulong *)(size - BOOTCOUNT_ADDR); + writel(a, save_addr); + writel(BOOTCOUNT_MAGIC, &save_addr[1]); + + for (i = 0; i < REPEAT_PATTERN; i++) + writel(patterns[i % NBR_OF_PATTERNS], + &save_addr[i + OFFS_PATTERN]); + +} + +ulong bootcount_load(void) +{ + ulong *save_addr; + ulong size = 0; + ulong counter = 0; + int i, tmp; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + size += gd->bd->bi_dram[i].size; + save_addr = (ulong *)(size - BOOTCOUNT_ADDR); + + counter = readl(&save_addr[0]); + + /* Is the counter reliable, check in the big pattern for bit errors */ + for (i = 0; (i < REPEAT_PATTERN) && (counter != 0); i++) { + tmp = readl(&save_addr[i + OFFS_PATTERN]); + if (tmp != patterns[i % NBR_OF_PATTERNS]) + counter = 0; + } + return counter; +} diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 6b68f10..f2815f9 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -354,6 +354,7 @@ #define CONFIG_SYS_INIT_SP_ADDR (0x8001ff00) #define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_BOOTCOUNT_LE /* Use little-endian accessors */ #define CONFIG_SYS_BOOTCOUNT_ADDR DAVINCI_RTC_BASE #ifndef __ASSEMBLY__ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index c73a10c..229745a 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -274,6 +274,8 @@ int get_scl(void); #define CONFIG_KM_RESERVED_PRAM 0x801000 /* address for the bootcount (taken from end of RAM) */ #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) +/* Use generic bootcount RAM driver */ +#define CONFIG_BOOTCOUNT_RAM /* enable POST tests */ #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) -- 1.7.10.4

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[U-Boot] Pull request: u-boot-arm/master
by Albert ARIBAUD 10 Jul '12

10 Jul '12

Hi Wolfgang, Please consider applying this branch before -rc1. The following changes since commit 18277f7057c8e9b895aa4f8590969a57c4bce888: Revert "arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0" (2012-07-09 09:19:00 +0200) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to 63905f1616fc2f827e986d8e82a5a2b69f4a0e6a: tegra: define fdt_load/fdt_high variables (2012-07-09 22:44:34 +0200) ---------------------------------------------------------------- Jim Lin (1): tegra: usb: Fix device enumeration problem of USB1 Lucas Stach (2): tegra: add ULPI on USB2 funcmux entry tegra: usb: fix wrong error check Peter Meerwald (1): beagle: add eeprom expansion board info for bct brettl4 Stephen Warren (10): Add env vars describing U-Boot target board tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG tegra: add enterrcm command tegra: bootcmd enhancements tegra: bootcmd: start USB only when needed tegra: add GMC/GMD funcmux entry for SFLASH tegra: add pin_mux_spi() board initialization function tegra: trimslice: set up serial flash pinmux tegra: enable bootz command tegra: define fdt_load/fdt_high variables Thierry Reding (7): tegra: Rework Tamonten support tegra: medcom: Add device tree support tegra: plutux: Add device tree support tegra: Allow boards to perform early GPIO setup tegra: Implement gpio_early_init() on Tamonten tegra: Use SD write-protect GPIO on Tamonten tegra: Add Tamonten Evaluation Carrier support Tom Warren (1): tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches MAINTAINERS | 1 + README | 14 ++++ arch/arm/cpu/armv7/tegra2/Makefile | 1 + arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c | 65 +++++++++++++++++++ arch/arm/cpu/armv7/tegra2/funcmux.c | 23 ++++++- arch/arm/cpu/armv7/tegra2/usb.c | 2 +- arch/arm/include/asm/arch-tegra2/funcmux.h | 6 ++ arch/arm/include/asm/arch-tegra2/tegra2.h | 1 + board/avionic-design/common/tamonten.c | 65 ++++++------------- board/avionic-design/common/tamonten.h | 32 ---------- board/avionic-design/dts/tegra2-medcom.dts | 58 +++++++++++++++++ board/avionic-design/dts/tegra2-plutux.dts | 58 +++++++++++++++++ board/avionic-design/dts/tegra2-tec.dts | 58 +++++++++++++++++ board/avionic-design/medcom/Makefile | 6 +- board/avionic-design/medcom/medcom.c | 45 ------------- board/avionic-design/plutux/Makefile | 6 +- board/avionic-design/plutux/plutux.c | 45 ------------- board/avionic-design/tec/Makefile | 50 +++++++++++++++ board/compal/paz00/paz00.c | 4 +- board/compulab/trimslice/trimslice.c | 7 +- board/nvidia/common/board.c | 16 ++++- board/nvidia/common/board.h | 1 + board/ti/beagle/beagle.c | 8 ++- boards.cfg | 1 + common/env_common.c | 11 ++++ common/env_embedded.c | 11 ++++ drivers/usb/host/ehci-tegra.c | 18 +++++- include/configs/medcom.h | 21 +++++- include/configs/plutux.h | 21 +++++- include/configs/tec.h | 82 ++++++++++++++++++++++++ include/configs/tegra2-common-post.h | 96 ++++++++++++++++++---------- include/configs/tegra2-common.h | 3 + mkconfig | 8 +++ 33 files changed, 628 insertions(+), 216 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c delete mode 100644 board/avionic-design/common/tamonten.h create mode 100644 board/avionic-design/dts/tegra2-medcom.dts create mode 100644 board/avionic-design/dts/tegra2-plutux.dts create mode 100644 board/avionic-design/dts/tegra2-tec.dts delete mode 100644 board/avionic-design/medcom/medcom.c delete mode 100644 board/avionic-design/plutux/plutux.c create mode 100644 board/avionic-design/tec/Makefile create mode 100644 include/configs/tec.h Amicalement, -- Albert.

2 1

[U-Boot] [PATCH] EXYNOS: Fix USB compiler warning
by Rajeshwari Shinde 10 Jul '12

10 Jul '12

Fixed the compiler warning message. Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> --- arch/arm/cpu/armv7/exynos/system.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c index cc6ee03..4426611 100644 --- a/arch/arm/cpu/armv7/exynos/system.c +++ b/arch/arm/cpu/armv7/exynos/system.c @@ -29,7 +29,6 @@ static void exynos5_set_usbhost_mode(unsigned int mode) { struct exynos5_sysreg *sysreg = (struct exynos5_sysreg *)samsung_get_base_sysreg(); - unsigned int phy_cfg; /* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */ if (mode == USB20_PHY_CFG_HOST_LINK_EN) { -- 1.7.4.4

5 4

[U-Boot] [PATCH 1/2] tools, config.mk: add binutils-version
by Allen Martin 10 Jul '12

10 Jul '12

Modeled after gcc-version, add function to get binutils version. Signed-off-by: Allen Martin <amartin(a)nvidia.com> --- config.mk | 1 + tools/binutils-version.sh | 20 ++++++++++++++++++++ 2 files changed, 21 insertions(+) create mode 100755 tools/binutils-version.sh diff --git a/config.mk b/config.mk index c239f23..fa5e626 100644 --- a/config.mk +++ b/config.mk @@ -128,6 +128,7 @@ endif # cc-version # Usage gcc-ver := $(call cc-version) cc-version = $(shell $(SHELL) $(SRCTREE)/tools/gcc-version.sh $(CC)) +binutils-version = $(shell $(SHELL) $(SRCTREE)/tools/binutils-version.sh $(AS)) # # Include the make variables (CC, etc...) diff --git a/tools/binutils-version.sh b/tools/binutils-version.sh new file mode 100755 index 0000000..d4d9eb4 --- /dev/null +++ b/tools/binutils-version.sh @@ -0,0 +1,20 @@ +#!/bin/sh +# +# binutils-version [-p] gas-command +# +# Prints the binutils version of `gas-command' in a canonical 4-digit form +# such as `0222' for binutils 2.22 +# + +gas="$*" + +if [ ${#gas} -eq 0 ]; then + echo "Error: No assembler specified." + printf "Usage:\n\t$0 <gas-command>\n" + exit 1 +fi + +MAJOR=$($gas --version | head -1 | awk '{print $NF}' | cut -d . -f 1) +MINOR=$($gas --version | head -1 | awk '{print $NF}' | cut -d . -f 2) + +printf "%02d%02d\\n" $MAJOR $MINOR -- 1.7.9.5

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[U-Boot] [PULL] u-boot-usb/master
by Marek Vasut 10 Jul '12

10 Jul '12

Hello, This has been in the usb tree for a while, but I'm hesitant to ask you for scheduling it into current release. On the other hand, I don't think this will cause any breakage. The following changes since commit 58e22f8a15adec39d24d060180d76a4cbe86a04b: fdt: send all dtc output to stderr (2012-07-09 09:05:24 +0200) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to a4dae631bfa848d8a0d1933583ed7e2f6a96cab3: CONFIG: EXYNOS5: USB: Enable USB 2.0 on smdk5250 (2012-07-09 18:27:55 +0200) ---------------------------------------------------------------- Rajeshwari Shinde (7): USB: EXYNOS: Incorporate EHCI review comments EXYNOS5: Fix system register structure EXYNOS5: Add structure for PMU registers USB: EXYNOS: Set USB 2.0 HOST Link mode EXYNOS: Add power Enable/Disable for USB-EHCI EXYNOS5: USB: Fix incorrect USB base addresses CONFIG: EXYNOS5: USB: Enable USB 2.0 on smdk5250 arch/arm/cpu/armv7/exynos/power.c | 22 +++ arch/arm/cpu/armv7/exynos/system.c | 22 +++ arch/arm/include/asm/arch-exynos/cpu.h | 7 +- arch/arm/include/asm/arch-exynos/{ehci-s5p.h => ehci.h} | 10 +- arch/arm/include/asm/arch-exynos/power.h | 626 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 4 + drivers/usb/host/Makefile | 2 +- drivers/usb/host/{ehci-s5p.c => ehci-exynos.c} | 26 ++- include/configs/smdk5250.h | 6 + 9 files changed, 708 insertions(+), 17 deletions(-) rename arch/arm/include/asm/arch-exynos/{ehci-s5p.h => ehci.h} (90%) rename drivers/usb/host/{ehci-s5p.c => ehci-exynos.c} (79%) Best regards, Marek Vasut

2 2

[U-Boot] [PATCH 1/1] igep0020: set OMAP MUX mcspi1_cs2 pin to GPIO 176 mode
by Javier Martinez Canillas 10 Jul '12

10 Jul '12

According to the IGEPv2 Rev.C data-sheet the LAN9221i pin 14 (IRQ) is connected to the OMAP3730 mcspi1_cs2 pin. Since this omap mux pin acts as an IRQ line, it has to be configured as an input GPIO. IGEPv2 platform code sets the smsc911x_cfg->gpio_irq to GPIO 176 but since the mux pin default mode is MODE7 (safe_mode) the driver fails when trying to register the IRQ: [ 1.994598] smsc911x: Driver version 2008-10-21 [ 3.704162] irq 272: nobody cared (try booting with the "irqpoll" option) [ 3.711364] [<c001a114>] (unwind_backtrace+0x0/0xf0) from [<c009a0d4>] (__report_bad_irq+0x20/0xbc) [ 3.720916] [<c009a0d4>] (__report_bad_irq+0x20/0xbc) from [<c009a41c>] (note_interrupt+0x1d8/0x238) [ 3.730560] [<c009a41c>] (note_interrupt+0x1d8/0x238) from [<c0098234>] (handle_irq_event_percpu+0xc0/0x260) [ 3.740936] [<c0098234>] (handle_irq_event_percpu+0xc0/0x260) from [<c0098410>] (handle_irq_event+0x3c/0x5c) [ 3.751312] [<c0098410>] (handle_irq_event+0x3c/0x5c) from [<c009abe0>] (handle_level_irq+0xac/0x10c) [ 3.761047] [<c009abe0>] (handle_level_irq+0xac/0x10c) from [<c0097a34>] (generic_handle_irq+0x30/0x48) [ 3.770935] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4) [ 3.780944] [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4) from [<c0097a34>] (generic_handle_irq+0x30/0x48) [ 3.790954] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c0013e18>] (handle_IRQ+0x4c/0xac) [ 3.800231] [<c0013e18>] (handle_IRQ+0x4c/0xac) from [<c000858c>] (omap3_intc_handle_irq+0x60/0x74) [ 3.809783] [<c000858c>] (omap3_intc_handle_irq+0x60/0x74) from [<c04979e4>] (__irq_svc+0x44/0x60) [ 3.819213] Exception stack(0xee42fde0 to 0xee42fe28) [ 3.824554] fde0: 00000001 00000001 00000000 00000000 60000013 c06cce14 c06cce14 00000110 [ 3.833190] fe00: 00000000 c06ccdf4 60000013 ee41d000 fb058064 ee42fe28 c0089e08 c04976b4 [ 3.841796] fe20: 20000013 ffffffff [ 3.845489] [<c04979e4>] (__irq_svc+0x44/0x60) from [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44) [ 3.855499] [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0099744>] (__setup_irq+0x1b8/0x3f0) [ 3.865875] [<c0099744>] (__setup_irq+0x1b8/0x3f0) from [<c0099a34>] (request_threaded_irq+0xb8/0x140) [ 3.875701] [<c0099a34>] (request_threaded_irq+0xb8/0x140) from [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4) [ 3.886260] [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4) from [<c02e9bcc>] (platform_drv_probe+0x18/0x1c) [ 3.896545] [<c02e9bcc>] (platform_drv_probe+0x18/0x1c) from [<c02e89b8>] (driver_probe_device+0x90/0x210) [ 3.906707] [<c02e89b8>] (driver_probe_device+0x90/0x210) from [<c02e8bcc>] (__driver_attach+0x94/0x98) [ 3.916625] [<c02e8bcc>] (__driver_attach+0x94/0x98) from [<c02e7298>] (bus_for_each_dev+0x50/0x7c) [ 3.926177] [<c02e7298>] (bus_for_each_dev+0x50/0x7c) from [<c02e81d4>] (bus_add_driver+0x184/0x248) [ 3.935821] [<c02e81d4>] (bus_add_driver+0x184/0x248) from [<c02e909c>] (driver_register+0x78/0x12c) [ 3.945465] [<c02e909c>] (driver_register+0x78/0x12c) from [<c0008648>] (do_one_initcall+0x34/0x178) [ 3.955108] [<c0008648>] (do_one_initcall+0x34/0x178) from [<c066e8f4>] (kernel_init+0xfc/0x1c0) [ 3.964385] [<c066e8f4>] (kernel_init+0xfc/0x1c0) from [<c00140b0>] (kernel_thread_exit+0x0/0x8) [ 3.973632] handlers: [ 3.976043] [<c034e2cc>] smsc911x_irqhandler [ 3.980560] Disabling IRQ #272 Signed-off-by: Javier Martinez Canillas <javier(a)dowhile0.org> --- board/isee/igep0020/igep0020.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h index 3d6e15f..eb1aa30 100644 --- a/board/isee/igep0020/igep0020.h +++ b/board/isee/igep0020/igep0020.h @@ -143,5 +143,6 @@ static void setup_net_chip(void); MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\ MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /* GPIO_176-ETH IRQ */ #endif -- 1.7.7.6

3 3

[U-Boot] S3c64xx: Switch all I/O to use readl/writel function
by Zhong Hongbo 10 Jul '12

10 Jul '12

This serial patch intent to: 1. Switch all I/O to use readl/writel function 2. Change nand_spl to use SPL framework 3. S3C64XX serial includes s3c6400 and s3c6410, Here seprate cpu and board file to support to board's of s3c6410. I test this patch on my s3c6410 development board. the log as following: U-Boot 2012.04.01-10905-g9fa0c77 (Jul 07 2012 - 15:50:57) for SMDK6400 CPU: S3C64XX@532MHz Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz (ASYNC Mode) Board: DMATEK6410 DRAM: 128 MiB WARNING: Caches not enabled NAND: 128 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: dm9000 Hit any key to stop autoboot: 0 DMATEK6410 #

2 16

[U-Boot] [PATCH] Add support for DS1388.
by Kenth Eriksson 10 Jul '12

10 Jul '12

Support for DS1388 is added by extending the DS1337 driver. DS1388 is similar to DS1337. The time registers are offset by 1 (due to support for hundreds of seconds), and there is no century bit. The configuration and trickle charge registers are also different. Tested on hardware with Freescale P2010 and DS1388. Signed-off-by: Kenth Eriksson <kenth.eriksson(a)transmode.com> --- drivers/rtc/Makefile | 1 + drivers/rtc/ds1337.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 0 deletions(-) diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index faf4fcd..c3831b1 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_RTC_DS1306) += ds1306.o COBJS-$(CONFIG_RTC_DS1307) += ds1307.o COBJS-$(CONFIG_RTC_DS1338) += ds1307.o COBJS-$(CONFIG_RTC_DS1337) += ds1337.o +COBJS-$(CONFIG_RTC_DS1388) += ds1337.o COBJS-$(CONFIG_RTC_DS1374) += ds1374.o COBJS-$(CONFIG_RTC_DS1556) += ds1556.o COBJS-$(CONFIG_RTC_DS164x) += ds164x.o diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index 5bb9f94..4c98732 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -37,6 +37,7 @@ /* * RTC register addresses */ +#if defined CONFIG_RTC_DS1337 #define RTC_SEC_REG_ADDR 0x0 #define RTC_MIN_REG_ADDR 0x1 #define RTC_HR_REG_ADDR 0x2 @@ -47,6 +48,18 @@ #define RTC_CTL_REG_ADDR 0x0e #define RTC_STAT_REG_ADDR 0x0f #define RTC_TC_REG_ADDR 0x10 +#elif defined CONFIG_RTC_DS1388 +#define RTC_SEC_REG_ADDR 0x1 +#define RTC_MIN_REG_ADDR 0x2 +#define RTC_HR_REG_ADDR 0x3 +#define RTC_DAY_REG_ADDR 0x4 +#define RTC_DATE_REG_ADDR 0x5 +#define RTC_MON_REG_ADDR 0x6 +#define RTC_YR_REG_ADDR 0x7 +#define RTC_CTL_REG_ADDR 0x0c +#define RTC_STAT_REG_ADDR 0x0b +#define RTC_TC_REG_ADDR 0x0a +#endif /* * RTC control register bits @@ -87,6 +100,11 @@ int rtc_get (struct rtc_time *tmp) mon_cent = rtc_read (RTC_MON_REG_ADDR); year = rtc_read (RTC_YR_REG_ADDR); + /* No century bit, assume year 2000 */ +#ifdef CONFIG_RTC_DS1388 + mon_cent |= 0x80; +#endif + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", year, mon_cent, mday, wday, hour, min, sec, control, status); @@ -151,6 +169,7 @@ int rtc_set (struct rtc_time *tmp) * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn * off the OSC output. */ + #ifdef CONFIG_SYS_RTC_DS1337_NOOSC #define RTC_DS1337_RESET_VAL \ (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) @@ -159,10 +178,17 @@ int rtc_set (struct rtc_time *tmp) #endif void rtc_reset (void) { +#ifdef CONFIG_SYS_RTC_DS1337 rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL); +#elif defined CONFIG_SYS_RTC_DS1388 + rtc_write(RTC_CTL_REG_ADDR, 0x0); /* hw default */ +#endif #ifdef CONFIG_SYS_DS1339_TCR_VAL rtc_write (RTC_TC_REG_ADDR, CONFIG_SYS_DS1339_TCR_VAL); #endif +#ifdef CONFIG_SYS_DS1388_TCR_VAL + rtc_write(RTC_TC_REG_ADDR, CONFIG_SYS_DS1388_TCR_VAL); +#endif } -- 1.7.3.4

2 1

[U-Boot] pull request for u-boot-tegra/master
by Tom Warren 09 Jul '12

09 Jul '12

Albert, Please pull u-boot-tegra/master into ARM master. Thanks! The following changes since commit 58e22f8a15adec39d24d060180d76a4cbe86a04b: Stephen Warren (1): fdt: send all dtc output to stderr are available in the git repository at: git://git.denx.de/u-boot-tegra master Jim Lin (1): tegra: usb: Fix device enumeration problem of USB1 Lucas Stach (2): tegra: add ULPI on USB2 funcmux entry tegra: usb: fix wrong error check Stephen Warren (10): Add env vars describing U-Boot target board tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG tegra: add enterrcm command tegra: bootcmd enhancements tegra: bootcmd: start USB only when needed tegra: add GMC/GMD funcmux entry for SFLASH tegra: add pin_mux_spi() board initialization function tegra: trimslice: set up serial flash pinmux tegra: enable bootz command tegra: define fdt_load/fdt_high variables Thierry Reding (7): tegra: Rework Tamonten support tegra: medcom: Add device tree support tegra: plutux: Add device tree support tegra: Allow boards to perform early GPIO setup tegra: Implement gpio_early_init() on Tamonten tegra: Use SD write-protect GPIO on Tamonten tegra: Add Tamonten Evaluation Carrier support Tom Warren (1): tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches MAINTAINERS | 1 + README | 14 ++++ arch/arm/cpu/armv7/tegra2/Makefile | 1 + arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c | 65 +++++++++++++++++++ arch/arm/cpu/armv7/tegra2/funcmux.c | 23 ++++++- arch/arm/cpu/armv7/tegra2/usb.c | 2 +- arch/arm/include/asm/arch-tegra2/funcmux.h | 6 ++ arch/arm/include/asm/arch-tegra2/tegra2.h | 1 + board/avionic-design/common/tamonten.c | 65 ++++++------------- board/avionic-design/common/tamonten.h | 32 --------- board/avionic-design/dts/tegra2-medcom.dts | 58 +++++++++++++++++ board/avionic-design/dts/tegra2-plutux.dts | 58 +++++++++++++++++ board/avionic-design/dts/tegra2-tec.dts | 58 +++++++++++++++++ board/avionic-design/medcom/Makefile | 6 +- board/avionic-design/medcom/medcom.c | 45 ------------- board/avionic-design/plutux/Makefile | 6 +- board/avionic-design/plutux/plutux.c | 45 ------------- board/avionic-design/tec/Makefile | 50 ++++++++++++++ board/compal/paz00/paz00.c | 4 +- board/compulab/trimslice/trimslice.c | 7 ++- board/nvidia/common/board.c | 16 ++++- board/nvidia/common/board.h | 1 + boards.cfg | 1 + common/env_common.c | 11 +++ common/env_embedded.c | 11 +++ drivers/usb/host/ehci-tegra.c | 18 +++++- include/configs/medcom.h | 21 ++++++- include/configs/plutux.h | 21 ++++++- include/configs/tec.h | 82 ++++++++++++++++++++++++ include/configs/tegra2-common-post.h | 96 ++++++++++++++++++--------- include/configs/tegra2-common.h | 3 + mkconfig | 8 ++ 32 files changed, 622 insertions(+), 214 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c delete mode 100644 board/avionic-design/common/tamonten.h create mode 100644 board/avionic-design/dts/tegra2-medcom.dts create mode 100644 board/avionic-design/dts/tegra2-plutux.dts create mode 100644 board/avionic-design/dts/tegra2-tec.dts delete mode 100644 board/avionic-design/medcom/medcom.c delete mode 100644 board/avionic-design/plutux/plutux.c create mode 100644 board/avionic-design/tec/Makefile create mode 100644 include/configs/tec.h

2 1