July 2012 - U-Boot

[U-Boot] [PATCH] net: bootp: fix build
by Benoît Thébaudeau 19 Jul '12

19 Jul '12

Fix NetSetState function name used with CONFIG_BOOTP_MAY_FAIL. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau(a)advansee.com> Cc: Joe Hershberger <joe.hershberger(a)gmail.com> --- .../net/bootp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git u-boot-66714b1.orig/net/bootp.c u-boot-66714b1/net/bootp.c index 87e30ab..c9b8349 100644 --- u-boot-66714b1.orig/net/bootp.c +++ u-boot-66714b1/net/bootp.c @@ -330,7 +330,7 @@ BootpTimeout(void) if (BootpTry >= TIMEOUT_COUNT) { #ifdef CONFIG_BOOTP_MAY_FAIL puts("\nRetry count exceeded\n"); - NetSetState(NETLOOP_FAIL); + net_set_state(NETLOOP_FAIL); #else puts("\nRetry count exceeded; starting again\n"); NetStartAgain();

2 1

[U-Boot] [PATCH] net: link_local: fix build
by Benoît Thébaudeau 19 Jul '12

19 Jul '12

Fix comment within comment build error. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau(a)advansee.com> Cc: Joe Hershberger <joe.hershberger(a)gmail.com> --- .../net/link_local.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git u-boot-66714b1.orig/net/link_local.c u-boot-66714b1/net/link_local.c index 8e7665f..d52f13a 100644 --- u-boot-66714b1.orig/net/link_local.c +++ u-boot-66714b1/net/link_local.c @@ -225,8 +225,8 @@ void link_local_receive_arp(struct arp_hdr *arp, int len) timeout_ms = diff | 1; /* never 0 */ } } -/* - * XXX Don't bother with ethernet link just yet +#if 0 + /* XXX Don't bother with ethernet link just yet */ if ((fds[0].revents & POLLIN) == 0) { if (fds[0].revents & POLLERR) { /* @@ -240,7 +240,7 @@ void link_local_receive_arp(struct arp_hdr *arp, int len) } continue; } -*/ +#endif debug_cond(DEBUG_INT_STATE, "%s recv arp type=%d, op=%d,\n", eth_get_name(), ntohs(arp->ar_pro),

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[U-Boot] (no subject)
by Gigin Jose 19 Jul '12

19 Jul '12

http://blog.eduangelis.com.br/wp-content/plugins/zefeeldfego/work.php?shinn…

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[U-Boot] [PATCH 1/3] ARM: lib: Remove CONFIG_ARCH_CPU_INIT dependency
by Fabio Estevam 19 Jul '12

19 Jul '12

Create a weak-aliased arch_cpu_init, so that we can get rid of CONFIG_ARCH_CPU_INIT and always call arch_cpu_init. This way we do not need to define CONFIG_ARCH_CPU_INIT in every board file, since arch_cpu_init() is supposed to handle common CPU level code. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/lib/board.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 500e216..6463db5 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -224,10 +224,16 @@ void __dram_init_banksize(void) void dram_init_banksize(void) __attribute__((weak, alias("__dram_init_banksize"))); +int __arch_cpu_init(void) +{ + return 0; +} +int arch_cpu_init(void) + __attribute__((weak, alias("__arch_cpu_init"))); + init_fnc_t *init_sequence[] = { -#if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ -#endif + #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, #endif -- 1.7.1

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[U-Boot] [PATCH] video: cfb_console: flush dcache for frame buffer in DRAM
by Anatolij Gustschin 19 Jul '12

19 Jul '12

Data cache flushing is required for frame buffer in RAM to fix the distorted console text output. Currently this text distortion is observed with cfb on beageboard and N900 when running with data cache enabled. Reported-by: Pali Rohár <pali.rohar(a)gmail.com> Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- drivers/video/cfb_console.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-) diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 904caf7..dd7ccb7 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -360,6 +360,8 @@ void console_cursor(int state); extern void video_get_info_str(int line_number, char *info); #endif +DECLARE_GLOBAL_DATA_PTR; + /* Locals */ static GraphicDevice *pGD; /* Pointer to Graphic array */ @@ -377,6 +379,8 @@ static int console_row; /* cursor row */ static u32 eorx, fgx, bgx; /* color pats */ +static int cfb_do_flush_cache; + static const int video_font_draw_table8[] = { 0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff, @@ -553,6 +557,8 @@ static void video_drawchars(int xx, int yy, unsigned char *s, int count) SWAP32((video_font_draw_table32 [bits & 15][3] & eorx) ^ bgx); } + if (cfb_do_flush_cache) + flush_cache((ulong)dest0, 32); dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; s++; } @@ -621,6 +627,8 @@ static void video_invertchar(int xx, int yy) for (x = firstx; x < lastx; x++) { u8 *dest = (u8 *)(video_fb_address) + x + y; *dest = ~*dest; + if (cfb_do_flush_cache) + flush_cache((ulong)dest, 4); } } } @@ -717,6 +725,8 @@ static void console_scrollup(void) #else memsetl(CONSOLE_ROW_LAST, CONSOLE_ROW_SIZE >> 2, CONSOLE_BG_COL); #endif + if (cfb_do_flush_cache) + flush_cache((ulong)CONSOLE_ROW_FIRST, CONSOLE_SIZE); } static void console_back(void) @@ -1651,6 +1661,29 @@ static void *video_logo(void) } #endif +static int cfb_fb_is_in_dram(void) +{ + bd_t *bd = gd->bd; + ulong start, end; + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { +#if defined(CONFIG_ARM) || defined(CONFIG_AVR32) || defined(COFNIG_NDS32) || \ +defined(CONFIG_SANDBOX) || defined(CONFIG_X86) + start = bd->bi_dram[i].start; + end = bd->bi_dram[i].start + bd->bi_dram[i].size - 1; +#else + start = bd->bi_memstart; + end = bd->bi_memsize; +#endif + + if ((ulong)video_fb_address >= start && + (ulong)video_fb_address < end) + return 1; + } + return 0; +} + static int video_init(void) { unsigned char color8; @@ -1664,6 +1697,8 @@ static int video_init(void) video_init_hw_cursor(VIDEO_FONT_WIDTH, VIDEO_FONT_HEIGHT); #endif + cfb_do_flush_cache = cfb_fb_is_in_dram() && dcache_status(); + /* Init drawing pats */ switch (VIDEO_DATA_FORMAT) { case GDF__8BIT_INDEX: -- 1.7.1

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[U-Boot] [PATCH u-boot-arm/next v3 2/2] OMAP3: igep00x0: add SPL support for IGEP-based boards
by Javier Martinez Canillas 19 Jul '12

19 Jul '12

This patch adds SPL support for IGEP-based boards. Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory. Signed-off-by: Javier Martinez Canillas <javier(a)dowhile0.org> --- Changes since v1: - Set NAND memory 200 Mhz timings when possible as suggested by Thomas Petazzoni Changes since v2: - Add Numonyx 200MHz timings as suggested by Enric Balletbo i Serra arch/arm/include/asm/arch-omap3/mem.h | 29 +++++++++++++++ board/isee/igep0020/config.mk | 33 ----------------- board/isee/igep0020/igep0020.c | 42 +++++++++++++++++++++- board/isee/igep0030/config.mk | 33 ----------------- board/isee/igep0030/igep0030.c | 42 +++++++++++++++++++++- include/configs/igep00x0.h | 65 +++++++++++++++++++++++++++++++++ 6 files changed, 176 insertions(+), 68 deletions(-) delete mode 100644 board/isee/igep0020/config.mk delete mode 100644 board/isee/igep0030/config.mk diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index 9f6992a..12dcf4e 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -294,6 +294,35 @@ enum { #define NUMONYX_RASWIDTH_165 15 #define NUMONYX_V_MCFG_165(size) MCFG((size), NUMONYX_RASWIDTH_165) +/* NUMONYX part of IGEP v2 (200MHz optimized) 5 ns */ +#define NUMONYX_TDAL_200 6 /* Twr/Tck + Trp/tck */ + /* 15/5 + 15/5 = 3 + 3 -> 6 */ +#define NUMONYX_TDPL_200 3 /* 15/5 = 3 -> 3 (Twr) */ +#define NUMONYX_TRRD_200 2 /* 10/5 = 2 */ +#define NUMONYX_TRCD_200 4 /* 16.2/5 = 3.24 -> 4 */ +#define NUMONYX_TRP_200 3 /* 15/5 = 3 */ +#define NUMONYX_TRAS_200 8 /* 40/5 = 8 */ +#define NUMONYX_TRC_200 11 /* 55/5 = 11 */ +#define NUMONYX_TRFC_200 28 /* 140/5 = 28 */ + +#define NUMONYX_V_ACTIMA_200 \ + ACTIM_CTRLA(NUMONYX_TRFC_200, NUMONYX_TRC_200, \ + NUMONYX_TRAS_200, NUMONYX_TRP_200, \ + NUMONYX_TRCD_200, NUMONYX_TRRD_200, \ + NUMONYX_TDPL_200, NUMONYX_TDAL_200) + +#define NUMONYX_TWTR_200 2 +#define NUMONYX_TCKE_200 2 +#define NUMONYX_TXP_200 3 +#define NUMONYX_XSR_200 40 + +#define NUMONYX_V_ACTIMB_200 \ + ACTIM_CTRLB(NUMONYX_TWTR_200, NUMONYX_TCKE_200, \ + NUMONYX_TXP_200, NUMONYX_XSR_200) + +#define NUMONYX_RASWIDTH_200 15 +#define NUMONYX_V_MCFG_200(size) MCFG((size), NUMONYX_RASWIDTH_200) + /* * GPMC settings - * Definitions is as per the following format diff --git a/board/isee/igep0020/config.mk b/board/isee/igep0020/config.mk deleted file mode 100644 index 7964621..0000000 --- a/board/isee/igep0020/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2009 -# ISEE 2007 SL, <www.iseebcn.com> -# -# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c index 971e31b..a4d099a 100644 --- a/board/isee/igep0020/igep0020.c +++ b/board/isee/igep0020/igep0020.c @@ -58,6 +58,46 @@ int board_init(void) return 0; } +#ifdef CONFIG_SPL_BUILD +/* + * Routine: omap_rev_string + * Description: For SPL builds output board rev + */ +void omap_rev_string(void) +{ +} + +/* + * Routine: get_board_mem_timings + * Description: If we use SPL then there is no x-loader nor config header + * so we have to setup the DDR timings ourself on both banks. + */ +void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, + u32 *mr) +{ + *mr = MICRON_V_MR_165; +#ifdef CONFIG_BOOT_NAND + *mcfg = MICRON_V_MCFG_200(512 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; +#else + if (get_cpu_family() == CPU_OMAP34XX) { + *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_165; + *ctrlb = NUMONYX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + + } else { + *mcfg = NUMONYX_V_MCFG_200(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_200; + *ctrlb = NUMONYX_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } +#endif +} +#endif + /* * Routine: setup_net_chip * Description: Setting up the configuration GPMC registers specific to the @@ -91,7 +131,7 @@ static void setup_net_chip(void) } #endif -#ifdef CONFIG_GENERIC_MMC +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { omap_mmc_init(0, 0, 0); diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk deleted file mode 100644 index 059a878..0000000 --- a/board/isee/igep0030/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2009 -# ISEE 2007 SL, <www.iseebcn.com> -# -# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/isee/igep0030/igep0030.c b/board/isee/igep0030/igep0030.c index 653c1b5..4f8b645 100644 --- a/board/isee/igep0030/igep0030.c +++ b/board/isee/igep0030/igep0030.c @@ -45,7 +45,47 @@ int board_init(void) return 0; } -#ifdef CONFIG_GENERIC_MMC +#ifdef CONFIG_SPL_BUILD +/* + * Routine: omap_rev_string + * Description: For SPL builds output board rev + */ +void omap_rev_string(void) +{ +} + +/* + * Routine: get_board_mem_timings + * Description: If we use SPL then there is no x-loader nor config header + * so we have to setup the DDR timings ourself on both banks. + */ +void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, + u32 *mr) +{ + *mr = MICRON_V_MR_165; +#ifdef CONFIG_BOOT_NAND + *mcfg = MICRON_V_MCFG_200(512 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; +#else + if (get_cpu_family() == CPU_OMAP34XX) { + *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_165; + *ctrlb = NUMONYX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + + } else { + *mcfg = NUMONYX_V_MCFG_200(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_200; + *ctrlb = NUMONYX_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } +#endif +} +#endif + +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { omap_mmc_init(0, 0, 0); diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index d8e87c3..91e5de6 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -287,6 +287,11 @@ #define CONFIG_SMC911X_BASE 0x2C000000 #endif /* (CONFIG_CMD_NET) */ +/* + * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader + * and older u-boot.bin with the new U-Boot SPL. + */ +#define CONFIG_SYS_TEXT_BASE 0x80008000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 @@ -294,4 +299,64 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +/* SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x40200800 +#define CONFIG_SPL_MAX_SIZE (54 * 1024) +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +/* move malloc and bss high to prevent clashing with the main image */ +#define CONFIG_SYS_SPL_MALLOC_START 0x87000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 +#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ + +/* MMC boot config */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#ifdef CONFIG_BOOT_ONENAND +#define CONFIG_SPL_ONENAND_SUPPORT + +/* OneNAND boot config */ +#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 +#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 +#define CONFIG_SPL_ONENAND_LOAD_SIZE \ + (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) + +#endif + +#ifdef CONFIG_BOOT_NAND +#define CONFIG_SPL_NAND_SUPPORT + +/* NAND boot config */ +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ + 10, 11, 12, 13} +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#endif + #endif /* __IGEP00X0_H */ -- 1.7.7.6

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[U-Boot] [PATCH u-boot-arm/next v2 2/2] OMAP3: igep00x0: add SPL support for IGEP-based boards
by Javier Martinez Canillas 19 Jul '12

19 Jul '12

This patch adds SPL support for IGEP-based boards. Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory. Signed-off-by: Javier Martinez Canillas <javier(a)dowhile0.org> --- Changes since v1: - Set NAND memory 200 Mhz timings when possible as suggested by Thomas Petazzoni board/isee/igep0020/config.mk | 33 -------------------- board/isee/igep0020/igep0020.c | 42 +++++++++++++++++++++++++- board/isee/igep0030/config.mk | 33 -------------------- board/isee/igep0030/igep0030.c | 42 +++++++++++++++++++++++++- include/configs/igep00x0.h | 65 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 147 insertions(+), 68 deletions(-) delete mode 100644 board/isee/igep0020/config.mk delete mode 100644 board/isee/igep0030/config.mk diff --git a/board/isee/igep0020/config.mk b/board/isee/igep0020/config.mk deleted file mode 100644 index 7964621..0000000 --- a/board/isee/igep0020/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2009 -# ISEE 2007 SL, <www.iseebcn.com> -# -# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c index 971e31b..a4d099a 100644 --- a/board/isee/igep0020/igep0020.c +++ b/board/isee/igep0020/igep0020.c @@ -58,6 +58,46 @@ int board_init(void) return 0; } +#ifdef CONFIG_SPL_BUILD +/* + * Routine: omap_rev_string + * Description: For SPL builds output board rev + */ +void omap_rev_string(void) +{ +} + +/* + * Routine: get_board_mem_timings + * Description: If we use SPL then there is no x-loader nor config header + * so we have to setup the DDR timings ourself on both banks. + */ +void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, + u32 *mr) +{ + *mr = MICRON_V_MR_165; +#ifdef CONFIG_BOOT_NAND + *mcfg = MICRON_V_MCFG_200(512 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; +#else + if (get_cpu_family() == CPU_OMAP34XX) { + *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_165; + *ctrlb = NUMONYX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + + } else { + *mcfg = NUMONYX_V_MCFG_200(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_200; + *ctrlb = NUMONYX_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } +#endif +} +#endif + /* * Routine: setup_net_chip * Description: Setting up the configuration GPMC registers specific to the @@ -91,7 +131,7 @@ static void setup_net_chip(void) } #endif -#ifdef CONFIG_GENERIC_MMC +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { omap_mmc_init(0, 0, 0); diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk deleted file mode 100644 index 059a878..0000000 --- a/board/isee/igep0030/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2009 -# ISEE 2007 SL, <www.iseebcn.com> -# -# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/isee/igep0030/igep0030.c b/board/isee/igep0030/igep0030.c index 653c1b5..4f8b645 100644 --- a/board/isee/igep0030/igep0030.c +++ b/board/isee/igep0030/igep0030.c @@ -45,7 +45,47 @@ int board_init(void) return 0; } -#ifdef CONFIG_GENERIC_MMC +#ifdef CONFIG_SPL_BUILD +/* + * Routine: omap_rev_string + * Description: For SPL builds output board rev + */ +void omap_rev_string(void) +{ +} + +/* + * Routine: get_board_mem_timings + * Description: If we use SPL then there is no x-loader nor config header + * so we have to setup the DDR timings ourself on both banks. + */ +void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, + u32 *mr) +{ + *mr = MICRON_V_MR_165; +#ifdef CONFIG_BOOT_NAND + *mcfg = MICRON_V_MCFG_200(512 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; +#else + if (get_cpu_family() == CPU_OMAP34XX) { + *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_165; + *ctrlb = NUMONYX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + + } else { + *mcfg = NUMONYX_V_MCFG_200(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_200; + *ctrlb = NUMONYX_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } +#endif +} +#endif + +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { omap_mmc_init(0, 0, 0); diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index d8e87c3..91e5de6 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -287,6 +287,11 @@ #define CONFIG_SMC911X_BASE 0x2C000000 #endif /* (CONFIG_CMD_NET) */ +/* + * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader + * and older u-boot.bin with the new U-Boot SPL. + */ +#define CONFIG_SYS_TEXT_BASE 0x80008000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 @@ -294,4 +299,64 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +/* SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x40200800 +#define CONFIG_SPL_MAX_SIZE (54 * 1024) +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +/* move malloc and bss high to prevent clashing with the main image */ +#define CONFIG_SYS_SPL_MALLOC_START 0x87000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 +#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ + +/* MMC boot config */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#ifdef CONFIG_BOOT_ONENAND +#define CONFIG_SPL_ONENAND_SUPPORT + +/* OneNAND boot config */ +#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 +#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 +#define CONFIG_SPL_ONENAND_LOAD_SIZE \ + (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) + +#endif + +#ifdef CONFIG_BOOT_NAND +#define CONFIG_SPL_NAND_SUPPORT + +/* NAND boot config */ +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ + 10, 11, 12, 13} +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#endif + #endif /* __IGEP00X0_H */ -- 1.7.7.6

2 2

[U-Boot] cross compile suceeds but not usable
by kqt4at5v＠gmail.com 19 Jul '12

19 Jul '12

I downloaded the latest u-boot snapshot on 20120717, installed Sourcery CodeBench, set the CROSS_COMPILE variable, and compiled. There were no errors. When I try to load with kwboot it fails. If I build the same u-boot source on the target, Guruplug, with Debian Wheezy installed I get a usable u-boot.kwb. [rray@grumpy2 u-boot_new_for_guruplug]$ arm-none-linux-gnueabi-gcc -v Using built-in specs. COLLECT_GCC=arm-none-linux-gnueabi-gcc COLLECT_LTO_WRAPPER=/backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../libexec/gcc/arm-none-linux-gnueabi/4.6.3/lto-wrapper Target: arm-none-linux-gnueabi Configured with: /scratch/nsidwell/arm/linux/src/gcc-4.6-2012.03/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-linux-gnueabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-arch=armv5te --with-gnu-as --with-gnu-ld --with-specs='%{save-temps: -fverbose-asm} %{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-funwind-tables} -D__CS_SOURCERYGXX_MAJ__=2012 -D__CS_SOURCERYGXX_MIN__=3 -D__CS_SOURCERYGXX_REV__=57 %{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared --enable-lto --enable-symvers=gnu --enable-__cxa_atexit --with-pkgversion='Sourcery CodeBench Lite 2012.03-57' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc --with-build-sysroot=/scratch/nsidwell/arm/linux/install/arm-none-linux-gnueabi/libc --with-gmp=/scratch/nsidwell/arm/linux/obj/host-libs-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/nsidwell/arm/linux/obj/host-libs-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr --with-mpc=/scratch/nsidwell/arm/linux/obj/host-libs-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/nsidwell/arm/linux/obj/host-libs-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/nsidwell/arm/linux/obj/host-libs-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr --with-libelf=/scratch/nsidwell/arm/linux/obj/host-libs-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/nsidwell/arm/linux/install/arm-none-linux-gnueabi/bin --with-build-time-tools=/scratch/nsidwell/arm/linux/install/arm-none-linux-gnueabi/bin Thread model: posix gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-57) [rray@grumpy2 u-boot_new_for_guruplug]$ CROSS_COMPILE=arm-none-linux-gnueabi- [rray@grumpy2 u-boot_new_for_guruplug]$ export CROSS_COMPILE [rray@grumpy2 u-boot_new_for_guruplug]$ make mrproper [rray@grumpy2 u-boot_new_for_guruplug]$ make guruplug_config Configuring for guruplug board... [rray@grumpy2 u-boot_new_for_guruplug]$ make u-boot.kwb Generating include/autoconf.mk Generating include/autoconf.mk.dep arm-none-linux-gnueabi-gcc -DDO_DEPS_ONLY \ -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x00600000 -I/backup_2/u-boot_new_for_guruplug/include -fno-builtin -ffreestanding -nostdinc -isystem /backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../lib/gcc/arm-none-linux-gnueabi/4.6.3/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -march=armv5te -Wall -Wstrict-prototypes -fno-stack-protector -Wno-format-nonliteral -Wno-format-security -fstack-usage \ -o lib/asm-offsets.s lib/asm-offsets.c -c -S Generating include/generated/generic-asm-offsets.h tools/scripts/make-asm-offsets lib/asm-offsets.s include/generated/generic-asm-offsets.h if [ -f arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.c ];then \ arm-none-linux-gnueabi-gcc -DDO_DEPS_ONLY \ -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x00600000 -I/backup_2/u-boot_new_for_guruplug/include -fno-builtin -ffreestanding -nostdinc -isystem /backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../lib/gcc/arm-none-linux-gnueabi/4.6.3/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -march=armv5te -Wall -Wstrict-prototypes -fno-stack-protector -Wno-format-nonliteral -Wno-format-security -fstack-usage \ -o arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.c -c -S; \ else \ touch arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s; \ fi Generating include/generated/asm-offsets.h tools/scripts/make-asm-offsets arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s include/generated/asm-offsets.h for dir in tools examples/standalone examples/api arch/arm/cpu/arm926ejs ; do \ make -C $dir _depend ; done make[1]: Entering directory `/backup_2/u-boot_new_for_guruplug/tools' cat /dev/null >.depend make[1]: Leaving directory `/backup_2/u-boot_new_for_guruplug/tools' make[1]: Entering directory `/backup_2/u-boot_new_for_guruplug/tools' make[1]: Nothing to be done for `_depend'. make[1]: Leaving directory `/backup_2/u-boot_new_for_guruplug/tools' make[1]: Entering directory `/backup_2/u-boot_new_for_guruplug/examples/standalone' arm-none-linux-gnueabi-gcc -M -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x00600000 -I/backup_2/u-boot_new_for_guruplug/include -fno-builtin -ffreestanding -nostdinc -isystem /backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../lib/gcc/arm-none-linux-gnueabi/4.6.3/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -march=armv5te -I.. -MQ hello_world.o hello_world.c >.depend.hello_world arm-none-linux-gnueabi-gcc -M -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x00600000 -I/backup_2/u-boot_new_for_guruplug/include -fno-builtin -ffreestanding -nostdinc -isystem /backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../lib/gcc/arm-none-linux-gnueabi/4.6.3/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -march=armv5te -I.. -MQ stubs.o stubs.c >.depend.stubs cat /dev/null .depend.hello_world .depend.stubs >.depend ... make[1]: Leaving directory `/backup_2/u-boot_new_for_guruplug/board/Marvell/guruplug' make -C /backup_2/u-boot_new_for_guruplug/arch/arm/cpu/ u-boot.lds make[1]: Entering directory `/backup_2/u-boot_new_for_guruplug/arch/arm/cpu' make[1]: Nothing to be done for `u-boot.lds'. make[1]: Leaving directory `/backup_2/u-boot_new_for_guruplug/arch/arm/cpu' arm-none-linux-gnueabi-gcc -E -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x00600000 -I/backup_2/u-boot_new_for_guruplug/include -fno-builtin -ffreestanding -nostdinc -isystem /backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../lib/gcc/arm-none-linux-gnueabi/4.6.3/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -march=armv5te -include /backup_2/u-boot_new_for_guruplug/include/u-boot/u-boot.lds.h -DCPUDIR=arch/arm/cpu/arm926ejs -ansi -D__ASSEMBLY__ -P - </backup_2/u-boot_new_for_guruplug/arch/arm/cpu/u-boot.lds >u-boot.lds UNDEF_SYM=`arm-none-linux-gnueabi-objdump -x board/Marvell/guruplug/libguruplug.o api/libapi.o arch/arm/cpu/arm926ejs/kirkwood/libkirkwood.o arch/arm/cpu/arm926ejs/libarm926ejs.o arch/arm/lib/libarm.o common/libcommon.o disk/libdisk.o drivers/bios_emulator/libatibiosemu.o drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.o drivers/usb/gadget/libusb_gadget.o drivers/usb/host/libusb_host.o drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o drivers/usb/ulpi/libusb_ulpi.o drivers/video/libvideo.o drivers/watchdog/libwatchdog.o fs/cramfs/libcramfs.o fs/ext2/libext2fs.o fs/fat/libfat.o fs/fdos/libfdos.o fs/jffs2/libjffs2.o fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o fs/yaffs2/libyaffs2.o lib/libfdt/libfdt.o lib/libgeneric.o lib/lzma/liblzma.o lib/lzo/liblzo.o lib/zlib/libz.o net/libnet.o post/libpost.o | sed -n -e 's/.*$__u_boot_cmd_.*$/-u\1/p'|sort|uniq`; cd /backup_2/u-boot_new_for_guruplug && arm-none-linux-gnueabi-ld -pie -T u-boot.lds -Bstatic -Ttext 0x00600000 $UNDEF_SYM arch/arm/cpu/arm926ejs/start.o --start-group api/libapi.o arch/arm/cpu/arm926ejs/kirkwood/libkirkwood.o arch/arm/cpu/arm926ejs/libarm926ejs.o arch/arm/lib/libarm.o common/libcommon.o disk/libdisk.o drivers/bios_emulator/libatibiosemu.o drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.o drivers/usb/gadget/libusb_gadget.o drivers/usb/host/libusb_host.o drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o drivers/usb/ulpi/libusb_ulpi.o drivers/video/libvideo.o drivers/watchdog/libwatchdog.o fs/cramfs/libcramfs.o fs/ext2/libext2fs.o fs/fat/libfat.o fs/fdos/libfdos.o fs/jffs2/libjffs2.o fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o fs/yaffs2/libyaffs2.o lib/libfdt/libfdt.o lib/libgeneric.o lib/lzma/liblzma.o lib/lzo/liblzo.o lib/zlib/libz.o net/libnet.o post/libpost.o board/Marvell/guruplug/libguruplug.o --end-group /backup_2/u-boot_new_for_guruplug/arch/arm/lib/eabi_compat.o -L /backup_2/work/arm/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin/../lib/gcc/arm-none-linux-gnueabi/4.6.3 -lgcc -Map u-boot.map -o u-boot arm-none-linux-gnueabi-objcopy --gap-fill=0xff -O binary u-boot u-boot.bin tools/mkimage -n "/backup_2/u-boot_new_for_guruplug/"board/Marvell/guruplug"/kwbimage.cfg" -T kwbimage \ -a 0x00600000 -e 0x00600000 -d u-boot.bin u-boot.kwb Preparing kirkwood boot image to boot from nand Nand ECC mode = default Nand page size = 0x800 Image Type: Kirkwood Boot from NAND Flash Image Data Size: 233356 Bytes = 227.89 kB = 0.22 MB Load Address: 00600000 Entry Point: 00600000 [rray@grumpy2 u-boot_new_for_guruplug]$ tools/kwboot -t -B 115200 -b u-boot.kwb /dev/ttyUSB1 Sending boot message. Please reboot the target.../ Sending boot image... xmodem: Bad message Thanks Richard

1 0

[U-Boot] [PATCH] Added watchdog support for davinchi_dm365evm
by Stijn Souffriau 19 Jul '12

19 Jul '12

--- board/davinci/dm365evm/dm365evm.c | 68 ++++++++++++++++++++++++++++++++++++ include/configs/davinci_dm365evm.h | 11 ++++++ 2 files changed, 79 insertions(+), 0 deletions(-) diff --git a/board/davinci/dm365evm/dm365evm.c b/board/davinci/dm365evm/dm365evm.c index ac54106..fb05019 100644 --- a/board/davinci/dm365evm/dm365evm.c +++ b/board/davinci/dm365evm/dm365evm.c @@ -150,3 +150,71 @@ int board_mmc_init(bd_t *bis) return err; } #endif + +#ifdef CONFIG_HW_WATCHDOG +static struct davinci_timer * const wdttimer = + (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE; + +/* WDTCR bit definitions */ +#define WDEN (1 << 14) +#define WDFLAG (1 << 15) +#define WDKEY_SEQ0 (0xa5c6 << 16) +#define WDKEY_SEQ1 (0xda7e << 16) + +/* TCR bit definitions */ +#define ENAMODE12_DISABLED (0 << 6) +#define ENAMODE12_ONESHOT (1 << 6) +#define ENAMODE12_PERIODIC (2 << 6) + +/* TGCR bit definitions */ +#define TIM12RS_UNRESET (1 << 0) +#define TIM34RS_UNRESET (1 << 1) +#define TIMMODE_64BIT_WDOG (2 << 2) + +static void _hw_watchdog_enable(void) +{ + u32 timer_margin; + ulong wdt_freq; + + /* disable, internal clock source */ + writel(0x0, &wdttimer->tcr); + /* reset timer, set mode to 64-bit watchdog, and unreset */ + writel(0x0, &wdttimer->tgcr); + writel(TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET, &wdttimer->tgcr); + /* clear counter regs */ + writel(0x0, &wdttimer->tim12); + writel(0x0, &wdttimer->tim34); + + /* set timeout period */ + wdt_freq = CONFIG_SYS_HZ_CLOCK; + printf("Setting watchdog period to %llu ticks == %is * %luHz\n",((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq), CONFIG_SYS_WDT_PERIOD_SECONDS, wdt_freq); + timer_margin = (((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq) & 0xffffffff); + writel(timer_margin, &wdttimer->prd12); + timer_margin = (((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq) >> 32); + writel(timer_margin, &wdttimer->prd34); + + /* enable run continuously */ + writel(ENAMODE12_PERIODIC, &wdttimer->tcr); + + /* put watchdog in pre-active state */ + writel(WDKEY_SEQ0 | WDEN, &wdttimer->wdtcr); + /* put watchdog in active state */ + writel(WDKEY_SEQ1 | WDEN, &wdttimer->wdtcr); +} + +void hw_watchdog_reset(void) +{ + writel(WDKEY_SEQ0, &wdttimer->wdtcr); + writel(WDKEY_SEQ1, &wdttimer->wdtcr); +} + +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_HW_WATCHDOG + _hw_watchdog_enable(); +#endif + return 0; +} + diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index a75bce6..04173b9 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -245,4 +245,15 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_MISC_INIT_R + +// Hardware watchdog config +#ifdef CONFIG_HW_WATCHDOG +#define CONFIG_SYS_WDTTIMERBASE 0x01C21C00 +#define CONFIG_SYS_WDT_PERIOD_SECONDS 60 +// These two are insignificant but required to build arch/arm/cpu/arm926ejs/davinci/timer.c +#define CONFIG_SYS_WDT_PERIOD_LOW 0 +#define CONFIG_SYS_WDT_PERIOD_HIGH 0 +#endif + #endif /* __CONFIG_H */ -- 1.7.0.4

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[U-Boot] i.MX dcache issues
by Benoît Thébaudeau 19 Jul '12

19 Jul '12

Hi all, Has anyone tested i.MX25 or i.MX35 with dcache on? I'm working with U-Boot 2012.04.01 on several custom platforms using these processors. With dcache off, everything works fine, but slowly. With dcache on, it's much faster (e.g. mtest), but it's impossible to read files through the eSDHC, and U-Boot hangs if trying to ping using the FEC. Shouldn't mtest disable dcache automatically, then set it back to its original state once finished? Otherwise, some of its tests to the memory may actually test the dcache rather than the memory chips connections. dcache seems to be enabled for mx35pdk, but disabled for spear3, so I'm wondering if it has been thoroughly tested on mx35pdk. I have added traces to arch/arm/lib/cache-cp15.c to check that the MMU is properly initialized with the appropriate addresses, and it is. Defining CONFIG_SYS_CACHELINE_SIZE to 32 in the board file, which sets ARCH_DMA_MINALIGN to 32 instead of 64 does not worsen things (as expected with 32-byte cache lines). Defining CONFIG_MMC_BOUNCE_BUFFER and/or setting the no_snoop option of the eSDHC driver does not change anything. Defining DEBUG in mmc.c shows that the 1st mmc_send_cmd following the retry_scr label uses a cacheline-unaligned size that gets caught by the buffer bouncing mechanism that reallocs it for nothing since scr has already been allocated with a cacheline-aligned size. The requested transfer length is left unchanged by bouncing, but it seems normal for MMC commands, and it should not be an issue as long as allocated sizes are aligned. Also, the mmc read commands to free RAM regions seem to work fine, so I'm wondering if this issue is not caused only by stack-allocated buffers. I'm not sure the data ending up in the buffers is random when there is an issue: the pattern f783 appears very often at the position of the expected 55aa DOS partition marker. Shouldn't the MMC/eSDHC drivers flush/invalidate the dcache ranges that they use for DMA operations? Not doing so would explain why stack-allocated buffers are more affected than buffers in unused RAM areas. As to the FEC, dcache issues with DMA seem to have been taken care of, so I'll add traces to the FEC driver to see if there is any cacheline-unaligned buffer passed in. These issues could also be related to L2 on i.MX35, but I don't see any code enabling it. BTW, why isn't there an enable_caches function in arch/arm/cpu/arm926ejs/cache.c or arch/arm/cpu/arm926ejs/cpu.c, just like in arch/arm/cpu/arm1136/cpu.c, so that dcache can be enabled by default if CONFIG_SYS_DCACHE_OFF isn't defined? Regards, Benoît

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