July 2012 - U-Boot

[U-Boot] Pull request: u-boot-nios/master
by thomas 18 Jul '12

18 Jul '12

The following changes since commit 61ddce07f8b96c5df7d00466b4da9edaecb0eff1: sandbox: Use the new run_command() (2012-04-23 22:53:54 +0200) are available in the git repository at: git://git.denx.de/u-boot-nios.git master Thomas Chou (1): nios2: move gd and bd into BSS arch/nios2/lib/board.c | 12 +++++------- include/configs/nios2-generic.h | 12 ++++-------- 2 files changed, 9 insertions(+), 15 deletions(-)

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[U-Boot] Please pull u-boot-mmc.git
by Andy Fleming 18 Jul '12

18 Jul '12

Merge branch 'master' of git://git.denx.de/u-boot-i2c (2012-07-12 08:17:29 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-mmc.git master Eric Nelson (1): i.MX: fsl_esdhc: allow use with cache enabled. Jaehoon Chung (1): mmc: remove the hard setting for tran_speed Jerry Huang (2): SD/MMC: check the card status during erase operation FSL/eSDHC: enable the clock to detect the SD card Łukasz Majewski (1): mmc:fix Call mmc_init() when executing mmc_get_dev() drivers/mmc/fsl_esdhc.c | 20 +++++++++++++++++++- drivers/mmc/mmc.c | 23 ++++++++++++++++------- 2 files changed, 35 insertions(+), 8 deletions(-)

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[U-Boot] [PATCH] mx6: Make pad name macro consistent with the datasheet
by Ashok 18 Jul '12

18 Jul '12

Use the same name as defined in the datasheet. DSP_CLK -> DISP_CLK Signed-off-by: Ashok Kumar Reddy Kourla <ashokkourla2000(a)gmail.com> --- arch/arm/include/asm/arch-mx6/mx6x_pins.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h index afaa068..377d97f 100644 --- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h @@ -530,8 +530,8 @@ enum { MX6Q_PAD_EIM_BCLK__IPU1_DI1_PIN16 = IOMUX_PAD(0x046C, 0x0158, 1, 0x0000, 0, 0), MX6Q_PAD_EIM_BCLK__GPIO_6_31 = IOMUX_PAD(0x046C, 0x0158, 5, 0x0000, 0, 0), MX6Q_PAD_EIM_BCLK__TPSMP_HDATA_31 = IOMUX_PAD(0x046C, 0x0158, 6, 0x0000, 0, 0), - MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DSP_CLK = IOMUX_PAD(0x0470, 0x015C, 0, 0x0000, 0, 0), - MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DSP_CLK = IOMUX_PAD(0x0470, 0x015C, 1, 0x0000, 0, 0), + MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK = IOMUX_PAD(0x0470, 0x015C, 0, 0x0000, 0, 0), + MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK = IOMUX_PAD(0x0470, 0x015C, 1, 0x0000, 0, 0), MX6Q_PAD_DI0_DISP_CLK__MIPI_CR_DPY_OT28 = IOMUX_PAD(0x0470, 0x015C, 3, 0x0000, 0, 0), MX6Q_PAD_DI0_DISP_CLK__SDMA_DBG_CR_STA0 = IOMUX_PAD(0x0470, 0x015C, 4, 0x0000, 0, 0), MX6Q_PAD_DI0_DISP_CLK__GPIO_4_16 = IOMUX_PAD(0x0470, 0x015C, 5, 0x0000, 0, 0), -- 1.7.0.4

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[U-Boot] [PATCH 0/7] tegra20: enable thumb
by Allen Martin 17 Jul '12

17 Jul '12

This patch series enables thumb compile for tegra SPL and u-boot. It is not ready for review yet as it still contains a few hacks, but I'm posting it in case anyone finds it useful. This reduces the size of the combined SPL/u-boot by about 20%. I havent' measured if there's any change in boot time. This patch series depends on v6 of the SPL patch series. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-thumb-v1 [PATCH 1/7] tegra20: remove inline assembly for u32 cast [PATCH 2/7] HACK: rearrange link order for thumb [PATCH 3/7] tegra20: enable thumb build [PATCH 4/7] arm: add _thumb1_case_uqi to libgcc [PATCH 5/7] arm: add thumb compatible return instructions [PATCH 6/7] arm: use thumb compatible return in arm720t [PATCH 7/7] arm: change arm720t to armv4t Makefile | 8 +++--- arch/arm/cpu/arm720t/config.mk | 2 +- arch/arm/cpu/arm720t/start.S | 2 +- arch/arm/cpu/arm720t/tegra20/config.mk | 7 +++++ arch/arm/cpu/tegra20-common/warmboot_avp.c | 9 +----- arch/arm/lib/Makefile | 1 + arch/arm/lib/_thumb1_case_uqi.S | 41 ++++++++++++++++++++++++++++ arch/arm/lib/_udivsi3.S | 6 ++-- include/configs/tegra20-common.h | 1 + 9 files changed, 60 insertions(+), 17 deletions(-) -- nvpublic

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[U-Boot] [PATCH v2] i.MX28: use a clear name for DDR2 initialization
by Otavio Salvador 17 Jul '12

17 Jul '12

The mx28 prefix has been added to the initialization data and function so it is clear by which SoC it is used as i.MX233 will have a specific one. While on that, we also change it to static. Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- Changes in v2: - use static for the allocation of memory initialization matrix arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index e17a4d7..cca1316 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -31,7 +31,7 @@ #include "mx28_init.h" -uint32_t dram_vals[] = { +static uint32_t mx28_dram_vals[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -88,14 +88,14 @@ void __mx28_adjust_memory_params(uint32_t *dram_vals) void mx28_adjust_memory_params(uint32_t *dram_vals) __attribute__((weak, alias("__mx28_adjust_memory_params"))); -void init_m28_200mhz_ddr2(void) +void init_mx28_200mhz_ddr2(void) { int i; - mx28_adjust_memory_params(dram_vals); + mx28_adjust_memory_params(mx28_dram_vals); - for (i = 0; i < ARRAY_SIZE(dram_vals); i++) - writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); + for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++) + writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i)); } void mx28_mem_init_clock(void) @@ -230,7 +230,7 @@ void mx28_mem_init(void) /* Clear START bit from DRAM_CTL16 */ clrbits_le32(MXS_DRAM_BASE + 0x40, 1); - init_m28_200mhz_ddr2(); + init_mx28_200mhz_ddr2(); /* Clear SREFRESH bit from DRAM_CTL17 */ clrbits_le32(MXS_DRAM_BASE + 0x44, 1); -- 1.7.10.4

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[U-Boot] [RFC PATCH 0/2] i.MX28 SoC pending patches
by Otavio Salvador 17 Jul '12

17 Jul '12

Those patches are waiting in my tree for some time and are part of my work i.MX233 support. Am trying to send small parts that are ready for merging and that do not depends on i.MX233 SoC to work. Otavio Salvador (2): i.MX28: Check if we are using a valid VBUS when initializing power i.MX28: use a clear name for DDR2 initialization arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 12 ++++++------ arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 21 ++++++++++++++------- 2 files changed, 20 insertions(+), 13 deletions(-) -- 1.7.10.4

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[U-Boot] USB enumeration problem on iMX53 hardware
by Gérald Germain 17 Jul '12

17 Jul '12

Dear all, I am working on adding support for Host USB on iMX53smd platform. The work is based on iMX53loco code which already support Host USB. Everything is working as it is supposed to. Different flash usb key are correctly enumerated and detected (and correctly manage by usb_storage module). Even usb to serial converters are correctly enumerated. But I have a problem with a 3G modem which is not correctly enumerated. In fact the enumeration does not detect anything as if no device was connected. But when linux is booted on the platform, this 3G modem is correctly enumerated by linux kernel. I added usb debug traces in u-boot. The traces show "Port 4 Status 101 Change 1" response to usb_control_msg call after the call to usb_hub_power_on when the usb flash key is used. When I use the 3G modem device, the response is Port 4 Status 100 Change 0 after the usb_hub_power_on. So it seems that the usb hub do not detect the 3G modem device (the flag USB_PORT_STAT_C_CONNECTION is correctly set in the response when using flash usb key but not set when I use the 3G modem). Again, the enumeration process for the 3G modem work correctly with the linux kernel, so I could reasonably think that there is not hardware problem on usb hub and 3G modem usb key. Does one of you has already encountered a similar problem and/or has an idea of what could cause this ? Gérald

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[U-Boot] [PATCH v3] i.MX28: extend print_cpuinfo() to use chip information
by Otavio Salvador 17 Jul '12

17 Jul '12

The information now is gathered from HW_DIGCTL_CHIPID register and includes the chip modem and revision on the output. Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- Changes in v2: - use ?? for unidentified revision and cpu type - use numeric revisions Changes in v3: - drop mx23 data as it will be posted in a later patch - fix info order (first rev, then clock) arch/arm/cpu/arm926ejs/mx28/mx28.c | 38 ++++++++++++++++++++++++-- arch/arm/include/asm/arch-mx28/regs-digctl.h | 4 +++ 2 files changed, 40 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index ff25772..cf7a50f 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -188,13 +188,47 @@ int arch_cpu_init(void) } #if defined(CONFIG_DISPLAY_CPUINFO) +static const char *get_cpu_type(void) +{ + struct mx28_digctl_regs *digctl_regs = + (struct mx28_digctl_regs *)MXS_DIGCTL_BASE; + + switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) { + case HW_DIGCTL_CHIPID_MX28: + return "28"; + default: + return "??"; + } +} + +static const char *get_cpu_rev(void) +{ + struct mx28_digctl_regs *digctl_regs = + (struct mx28_digctl_regs *)MXS_DIGCTL_BASE; + uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x000000FF; + + switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) { + case HW_DIGCTL_CHIPID_MX28: + switch (rev) { + case 0x1: + return "1.2"; + default: + return "??"; + } + default: + return "??"; + } +} + int print_cpuinfo(void) { struct mx28_spl_data *data = (struct mx28_spl_data *) ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); - printf("Freescale i.MX28 family at %d MHz\n", - mxc_get_clock(MXC_ARM_CLK) / 1000000); + printf("CPU: Freescale i.MX%s rev%s at %d MHz\n", + get_cpu_type(), + get_cpu_rev(), + mxc_get_clock(MXC_ARM_CLK) / 1000000); printf("BOOT: %s\n", mx28_boot_modes[data->boot_mode_idx].mode); return 0; } diff --git a/arch/arm/include/asm/arch-mx28/regs-digctl.h b/arch/arm/include/asm/arch-mx28/regs-digctl.h index 9a63594..247da6e 100644 --- a/arch/arm/include/asm/arch-mx28/regs-digctl.h +++ b/arch/arm/include/asm/arch-mx28/regs-digctl.h @@ -152,4 +152,8 @@ struct mx28_digctl_regs { }; #endif +/* Product code identification */ +#define HW_DIGCTL_CHIPID_MASK (0xffff << 16) +#define HW_DIGCTL_CHIPID_MX28 (0x2800 << 16) + #endif /* __MX28_REGS_DIGCTL_H__ */ -- 1.7.10.4

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Re: [U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory
by Tom Rini 17 Jul '12

17 Jul '12

On 07/16/2012 12:43 AM, Enric Balletbò i Serra wrote: [snip] > I would like to investigateif we can do this using runtime detection > instead of a separate config option. Give me some days. The runtime > detection can be done reading the sysboot configuration for example. I > think it's possible, do you think would be possible ? Until we have the device model and the ability to see at run-time if we have say NAND or OneNAND (or neither!) we can't because we have to build-time define where the environment will be found. -- Tom

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[U-Boot] [PATCH] video: support exynos fimd driver for various exynos series
by Donghwa Lee 17 Jul '12

17 Jul '12

This patch supports exynos fimd driver for various exynos series different from existing it supports only exynos4 chip. Signed-off-by: Donghwa Lee <dh09.lee(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- arch/arm/include/asm/arch-exynos/fb.h | 15 +++++- drivers/video/exynos_fimd.c | 85 ++++++++++++++++++++------------- 2 files changed, 66 insertions(+), 34 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/fb.h b/arch/arm/include/asm/arch-exynos/fb.h index b10b0da..b56ab55 100644 --- a/arch/arm/include/asm/arch-exynos/fb.h +++ b/arch/arm/include/asm/arch-exynos/fb.h @@ -23,7 +23,7 @@ #define __ASM_ARM_ARCH_FB_H_ #ifndef __ASSEMBLY__ -struct exynos4_fb { +struct exynos_fb { unsigned int vidcon0; unsigned int vidcon1; unsigned int vidcon2; @@ -154,6 +154,9 @@ struct exynos4_fb { }; #endif +/* LCD IF register offset */ +#define EXYNOS_LCD_IF_BASE_OFFSET (0x20000) + /* * Register offsets */ @@ -253,6 +256,10 @@ struct exynos4_fb { /* VIDTCON2 */ #define EXYNOS_VIDTCON2_LINEVAL(x) (((x) & 0x7ff) << 11) #define EXYNOS_VIDTCON2_HOZVAL(x) (((x) & 0x7ff) << 0) +#define EXYNOS_VIDTCON2_LINEVAL_E(x) ((((x) & 0x800) \ + >> 11) << 23) +#define EXYNOS_VIDTCON2_HOZVAL_E(x) ((((x) & 0x800) \ + >> 11) << 22) /* Window 0~4 Control - WINCONx */ #define EXYNOS_WINCON_DATAPATH_DMA (0 << 22) @@ -330,6 +337,8 @@ struct exynos4_fb { #define EXYNOS_VIDOSD_TOP_Y(x) (((x) & 0x7ff) << 0) #define EXYNOS_VIDOSD_RIGHT_X(x) (((x) & 0x7ff) << 11) #define EXYNOS_VIDOSD_BOTTOM_Y(x) (((x) & 0x7ff) << 0) +#define EXYNOS_VIDOSD_RIGHT_X_E(x) (((x) & 0x1) << 23) +#define EXYNOS_VIDOSD_BOTTOM_Y_E(x) (((x) & 0x1) << 22) /* VIDOSD0C, VIDOSDxD */ #define EXYNOS_VIDOSD_SIZE(x) (((x) & 0xffffff) << 0) @@ -354,6 +363,10 @@ struct exynos4_fb { /* Buffer Size */ #define EXYNOS_VIDADDR_OFFSIZE(x) (((x) & 0x1fff) << 13) #define EXYNOS_VIDADDR_PAGEWIDTH(x) (((x) & 0x1fff) << 0) +#define EXYNOS_VIDADDR_OFFSIZE_E(x) ((((x) & 0x2000) \ + >> 13) << 27) +#define EXYNOS_VIDADDR_PAGEWIDTH_E(x) ((((x) & 0x2000) \ + >> 13) << 26) /* WIN Color Map */ #define EXYNOS_WINMAP_COLOR(x) ((x) & 0xffffff) diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c index f07568a..f8eac9d 100644 --- a/drivers/video/exynos_fimd.c +++ b/drivers/video/exynos_fimd.c @@ -41,8 +41,8 @@ void exynos_fimd_lcd_init_mem(u_long screen_base, u_long fb_size, static void exynos_fimd_set_dualrgb(unsigned int enabled) { - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); unsigned int cfg = 0; if (enabled) { @@ -60,8 +60,8 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled) static void exynos_fimd_set_par(unsigned int win_id) { unsigned int cfg = 0; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); /* set window control */ cfg = readl((unsigned int)&fimd_ctrl->wincon0 + @@ -93,7 +93,10 @@ static void exynos_fimd_set_par(unsigned int win_id) EXYNOS_VIDOSD(win_id)); cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) | - EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1); + EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) | + EXYNOS_VIDOSD_RIGHT_X_E(1) | + EXYNOS_VIDOSD_BOTTOM_Y_E(0); + writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b + EXYNOS_VIDOSD(win_id)); @@ -106,8 +109,8 @@ static void exynos_fimd_set_par(unsigned int win_id) static void exynos_fimd_set_buffer_address(unsigned int win_id) { unsigned long start_addr, end_addr; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); start_addr = (unsigned long)lcd_base_addr; end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) * @@ -124,8 +127,8 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid) unsigned int cfg = 0, div = 0, remainder, remainder_div; unsigned long pixel_clock; unsigned long long src_clock; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); if (pvid->dual_lcd_enabled) { pixel_clock = pvid->vl_freq * @@ -153,9 +156,6 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid) cfg |= (EXYNOS_VIDCON0_CLKSEL_SCLK | EXYNOS_VIDCON0_CLKVALUP_ALWAYS | EXYNOS_VIDCON0_VCLKEN_NORMAL | EXYNOS_VIDCON0_CLKDIR_DIVIDED); - if (pixel_clock > MAX_CLOCK) - pixel_clock = MAX_CLOCK; - src_clock = (unsigned long long) get_lcd_clk(); /* get quotient and remainder. */ @@ -180,8 +180,8 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid) void exynos_set_trigger(void) { unsigned int cfg = 0; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); cfg = readl(&fimd_ctrl->trigcon); @@ -194,8 +194,8 @@ int exynos_is_i80_frame_done(void) { unsigned int cfg = 0; int status; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); cfg = readl(&fimd_ctrl->trigcon); @@ -209,8 +209,8 @@ int exynos_is_i80_frame_done(void) static void exynos_fimd_lcd_on(void) { unsigned int cfg = 0; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); /* display on */ cfg = readl(&fimd_ctrl->vidcon0); @@ -221,8 +221,8 @@ static void exynos_fimd_lcd_on(void) static void exynos_fimd_window_on(unsigned int win_id) { unsigned int cfg = 0; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); /* enable window */ cfg = readl((unsigned int)&fimd_ctrl->wincon0 + @@ -239,8 +239,8 @@ static void exynos_fimd_window_on(unsigned int win_id) void exynos_fimd_lcd_off(void) { unsigned int cfg = 0; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); cfg = readl(&fimd_ctrl->vidcon0); cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE); @@ -250,8 +250,8 @@ void exynos_fimd_lcd_off(void) void exynos_fimd_window_off(unsigned int win_id) { unsigned int cfg = 0; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); cfg = readl((unsigned int)&fimd_ctrl->wincon0 + EXYNOS_WINCON(win_id)); @@ -264,11 +264,22 @@ void exynos_fimd_window_off(unsigned int win_id) writel(cfg, &fimd_ctrl->winshmap); } +static unsigned int exynos_fimd_get_base_offset(void) +{ + if (cpu_is_exynos5()) + return EXYNOS_LCD_IF_BASE_OFFSET; + else + return 0x0; +} + void exynos_fimd_lcd_init(vidinfo_t *vid) { unsigned int cfg = 0, rgb_mode; - struct exynos4_fb *fimd_ctrl = - (struct exynos4_fb *)samsung_get_base_fimd(); + unsigned int offset; + struct exynos_fb *fimd_ctrl = + (struct exynos_fb *)samsung_get_base_fimd(); + + offset = exynos_fimd_get_base_offset(); /* store panel info to global variable */ pvid = vid; @@ -297,25 +308,27 @@ void exynos_fimd_lcd_init(vidinfo_t *vid) if (!pvid->vl_dp) cfg |= EXYNOS_VIDCON1_IVDEN_INVERT; - writel(cfg, &fimd_ctrl->vidcon1); + writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset); /* set timing */ cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1); cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1); cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1); - writel(cfg, &fimd_ctrl->vidtcon0); + writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset); cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1); cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1); cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1); - writel(cfg, &fimd_ctrl->vidtcon1); + writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset); /* set lcd size */ - cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1); - cfg |= EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1); + cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) | + EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) | + EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) | + EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1); - writel(cfg, &fimd_ctrl->vidtcon2); + writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset); } /* set display mode */ @@ -331,7 +344,13 @@ void exynos_fimd_lcd_init(vidinfo_t *vid) exynos_fimd_set_buffer_address(pvid->win_id); /* set buffer size */ - cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * NBITS(pvid->vl_bpix) / 8); + cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * + NBITS(pvid->vl_bpix) / 8) | + EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col * + NBITS(pvid->vl_bpix) / 8) | + EXYNOS_VIDADDR_OFFSIZE(0) | + EXYNOS_VIDADDR_OFFSIZE_E(0); + writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 + EXYNOS_BUFFER_SIZE(pvid->win_id)); -- 1.7.4.1

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