July 2012 - U-Boot

[U-Boot] [PATCH 0/8] i.MX25: Miscellaneus fixes
by Timo Ketola 13 Aug '12

13 Aug '12

These are the fixes I needed to do to get my board going. [PATCH 1/8] i.MX25: add mxc_get_clock infrastructure SD-controller (fsl_esdhc.c) needs a clock frequency in gd->sdhc_clk. I tried to follow the idea of other architectures. [PATCH 2/8] i.MX: Add target flashable to offset 0 Helps flashing with openocd [PATCH 4/8] i.MX25: Has a GPIO4 too GPIO4 is used in our board [PATCH 5/8] MXC FEC: Resolve speed before configuring gasket Without this 10BaseT doesn't work First and second OOB bytes are used for bad block indication USB controller in the i.MX25 has PORTSC register like the controller in i.MX31 BTW, I can't understand what is the meaning of writing into &ehci->control. I can't find such a register from reference manuals of i.MX25, 28 nor 31. [PATCH 3/8] Build: Ignore build tree and IDE control file [PATCH 6/8] i.MX25: Add Exertus EXE4026 board Maybe these does not belong into this series but I didn't know how to exclude them from this series.

8 109

[U-Boot] [PATCH 1/5] pxa255: Add UDC registers definitions
by Łukasz Dałek 11 Aug '12

11 Aug '12

This patch starts series of patches adding support for USB support on PXA255 chips. Signed-off-by: Łukasz Dałek <luk0104(a)gmail.com> --- arch/arm/include/asm/arch-pxa/pxa-regs.h | 247 ++++++++++++++++++++++++++++++ 1 files changed, 247 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h index b81b42c..114e9a2 100644 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h @@ -2498,6 +2498,253 @@ typedef void (*ExcpHndlr) (void) ; #endif /* CONFIG_CPU_PXA27X */ +#if defined(CONFIG_CPU_PXA25X) + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UDCCR *((volatile u32 *)0x40600000) +#else +# define UDCCR 0x40600000 +#endif + +#define UDCCR_UDE (1 << 0) +#define UDCCR_UDA (1 << 1) +#define UDCCR_RSM (1 << 2) +#define UDCCR_RESIR (1 << 3) +#define UDCCR_SUSIR (1 << 4) +#define UDCCR_SRM (1 << 5) +#define UDCCR_RSTIR (1 << 6) +#define UDCCR_REM (1 << 7) + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UDCCFR *((volatile u32 *)0x40600008) +#else +# define UDCCFR 0x40600008 +#endif + +#define UDCCFR_AREN (1 << 7) +#define UDCCFR_ACM (1 << 2) +#define UDCCFR_MB1 (0xff & ~(UDCCFR_AREN | UDCCFR_ACM)) + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UICR0 *((volatile u32 *)0x40600050) +#else +# define UICR0 0x40600050 +#endif + +#define UICR0_MASK 0xf +#define UICR0_IM0 (1 << 0) + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UICR1 *((volatile u32 *)0x40600054) +#else +# define UICR1 0x40600054 +#endif + +#define UICR1_MASK 0xf + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define USIR0 *((volatile u32 *)0x40600058) +#else +# define USIR0 0x40600058 +#endif + +#define USIR0_MASK 0xf +#define USIR0_IR0 (1 << 0) +#define USIR0_IR1 (1 << 1) +#define USIR0_IR2 (1 << 2) +#define USIR0_IR3 (1 << 3) +#define USIR0_IR4 (1 << 4) +#define USIR0_IR5 (1 << 5) +#define USIR0_IR6 (1 << 6) +#define USIR0_IR7 (1 << 7) + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define USIR1 *((volatile u32 *)0x4060005c) +#else +# define USIR1 0x4060005c +#endif + +#define USIR1_MASK 0xf +#define USIR1_IR8 (1 << 0) +#define USIR1_IR9 (1 << 1) +#define USIR1_IR10 (1 << 2) +#define USIR1_IR11 (1 << 3) +#define USIR1_IR12 (1 << 4) +#define USIR1_IR13 (1 << 5) +#define USIR1_IR14 (1 << 6) +#define USIR1_IR15 (1 << 7) + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UDCCS0 *((volatile u32 *)0x40600010) +# define UDCCS1 *((volatile u32 *)0x40600014) +# define UDCCS2 *((volatile u32 *)0x40600018) +# define UDCCS3 *((volatile u32 *)0x4060001c) +# define UDCCS4 *((volatile u32 *)0x40600020) +# define UDCCS5 *((volatile u32 *)0x40600024) +# define UDCCS6 *((volatile u32 *)0x40600028) +# define UDCCS7 *((volatile u32 *)0x4060002c) +# define UDCCS8 *((volatile u32 *)0x40600030) +# define UDCCS9 *((volatile u32 *)0x40600034) +# define UDCCS10 *((volatile u32 *)0x40600038) +# define UDCCS11 *((volatile u32 *)0x4060003c) +# define UDCCS12 *((volatile u32 *)0x40600040) +# define UDCCS13 *((volatile u32 *)0x40600044) +# define UDCCS14 *((volatile u32 *)0x40600048) +# define UDCCS15 *((volatile u32 *)0x4060004c) +#else +# define UDCCS(x) (0x40600010 + 4 * (x)) +# define UDCCS0 UDCCS(0) +#endif + +/* Control endpoint 0 */ +#define UDCCS_CTRL_OPR (1 << 0) +#define UDCCS_CTRL_IPR (1 << 1) +#define UDCCS_CTRL_FTF (1 << 2) +#define UDCCS_CTRL_DRWF (1 << 3) +#define UDCCS_CTRL_SST (1 << 4) +#define UDCCS_CTRL_FST (1 << 5) +#define UDCCS_CTRL_RNE (1 << 6) +#define UDCCS_CTRL_SA (1 << 7) + +/* Linux compat */ +#define UDCCS0_SA UDCCS_CTRL_SA +#define UDCCS0_RNE UDCCS_CTRL_RNE +#define UDCCS0_FST UDCCS_CTRL_FST +#define UDCCS0_SST UDCCS_CTRL_SST +#define UDCCS0_DRWF UDCCS_CTRL_DRWF +#define UDCCS0_FTF UDCCS_CTRL_FTF +#define UDCCS0_IPR UDCCS_CTRL_IPR +#define UDCCS0_OPR UDCCS_CTRL_OPR + +/* Bulk IN endpoint 1/6/11 */ +#define UDCCS_BULK_IN_TSP (1 << 7) +#define UDCCS_BULK_IN_FST (1 << 5) +#define UDCCS_BULK_IN_SST (1 << 4) +#define UDCCS_BULK_IN_TUR (1 << 3) +#define UDCCS_BULK_IN_FTF (1 << 2) +#define UDCCS_BULK_IN_TPC (1 << 1) +#define UDCCS_BULK_IN_TFS (1 << 0) + +/* Linux compat */ +#define UDCCS_BI_TFS UDCCS_BULK_IN_TFS +#define UDCCS_BI_TPC UDCCS_BULK_IN_TPC +#define UDCCS_BI_FTF UDCCS_BULK_IN_FTF +#define UDCCS_BI_TUR UDCCS_BULK_IN_TUR +#define UDCCS_BI_SST UDCCS_BULK_IN_SST +#define UDCCS_BI_FST UDCCS_BULK_IN_FST +#define UDCCS_BI_TSP UDCCS_BULK_IN_TSP + +/* Bulk OUT endpoint 2/7/12 */ +#define UDCCS_BULK_OUT_RSP (1 << 7) +#define UDCCS_BULK_OUT_RNE (1 << 6) +#define UDCCS_BULK_OUT_FST (1 << 5) +#define UDCCS_BULK_OUT_SST (1 << 4) +#define UDCCS_BULK_OUT_DME (1 << 3) +#define UDCCS_BULK_OUT_RPC (1 << 1) +#define UDCCS_BULK_OUT_RFS (1 << 0) + +/* Linux compat */ +#define UDCCS_BO_RSP UDCCS_BULK_OUT_RSP +#define UDCCS_BO_RNE UDCCS_BULK_OUT_RNE +#define UDCCS_BO_FST UDCCS_BULK_OUT_FST +#define UDCCS_BO_SST UDCCS_BULK_OUT_SST +#define UDCCS_BO_DME UDCCS_BULK_OUT_DME +#define UDCCS_BO_RPC UDCCS_BULK_OUT_RPC +#define UDCCS_BO_RFS UDCCS_BULK_OUT_RFS + +/* Isochronous IN endpoint 3/8/13 */ +#define UDCCS_ISO_IN_TSP (1 << 7) +#define UDCCS_ISO_IN_TUR (1 << 3) +#define UDCCS_ISO_IN_FTF (1 << 2) +#define UDCCS_ISO_IN_TPC (1 << 1) +#define UDCCS_ISO_IN_TFS (1 << 0) + +/* Isochronous OUT endpoint 4/9/14 */ +#define UDCCS_ISO_OUT_RSP (1 << 7) +#define UDCCS_ISO_OUT_RNE (1 << 6) +#define UDCCS_ISO_OUT_DME (1 << 3) +#define UDCCS_ISO_OUT_ROF (1 << 2) +#define UDCCS_ISO_OUT_RPC (1 << 1) +#define UDCCS_ISO_OUT_RFS (1 << 0) + +/* Linux compat */ +#define UDCCS_IO_RSP UDCCS_ISO_OUT_RSP +#define UDCCS_IO_RNE UDCCS_ISO_OUT_RNE +#define UDCCS_IO_DME UDCCS_ISO_OUT_DME +#define UDCCS_IO_ROF UDCCS_ISO_OUT_ROF +#define UDCCS_IO_RPC UDCCS_ISO_OUT_RPC +#define UDCCS_IO_RFS UDCCS_ISO_OUT_RFS + +/* Interrupt IN endpoint 5/10/15 */ +#define UDCCS_INT_TSP (1 << 7) +#define UDCCS_INT_FST (1 << 5) +#define UDCCS_INT_SST (1 << 4) +#define UDCCS_INT_TUR (1 << 3) +#define UDCCS_INT_FTF (1 << 2) +#define UDCCS_INT_TPC (1 << 1) +#define UDCCS_INT_TFS (1 << 0) + +/* Byte count registers */ +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UBCR2 *((volatile u32 *)0x40600068) +# define UBCR4 *((volatile u32 *)0x4060006c) +# define UBCR7 *((volatile u32 *)0x40600070) +# define UBCR9 *((volatile u32 *)0x40600074) +# define UBCR12 *((volatile u32 *)0x40600078) +# define UBCR14 *((volatile u32 *)0x4060007c) +#else +# define UBCR2 0x40600068 +# define UBCR4 0x4060006c +# define UBCR7 0x40600070 +# define UBCR9 0x40600074 +# define UBCR12 0x40600078 +# define UBCR14 0x4060007c +#endif + +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UDDR0 *((volatile u32 *)0x40600080) +# define UDDR1 *((volatile u32 *)0x40600100) +# define UDDR2 *((volatile u32 *)0x40600180) +# define UDDR3 *((volatile u32 *)0x40600200) +# define UDDR4 *((volatile u32 *)0x40600400) +# define UDDR5 *((volatile u32 *)0x406000A0) +# define UDDR6 *((volatile u32 *)0x40600600) +# define UDDR7 *((volatile u32 *)0x40600680) +# define UDDR8 *((volatile u32 *)0x40600700) +# define UDDR9 *((volatile u32 *)0x40600900) +# define UDDR10 *((volatile u32 *)0x406000C0) +# define UDDR11 *((volatile u32 *)0x40600B00) +# define UDDR12 *((volatile u32 *)0x40600B80) +# define UDDR13 *((volatile u32 *)0x40600C00) +# define UDDR14 *((volatile u32 *)0x40600E00) +# define UDDR15 *((volatile u32 *)0x406000E0) +#else +# define UDDR0 0x40600080 +# define UDDR1 0x40600100 +# define UDDR2 0x40600180 +# define UDDR3 0x40600200 +# define UDDR4 0x40600400 +# define UDDR5 0x406000A0 +# define UDDR6 0x40600600 +# define UDDR7 0x40600680 +# define UDDR8 0x40600700 +# define UDDR9 0x40600900 +# define UDDR10 0x406000C0 +# define UDDR11 0x40600B00 +# define UDDR12 0x40600B80 +# define UDDR13 0x40600C00 +# define UDDR14 0x40600E00 +# define UDDR15 0x406000E0 +#endif + +/* Linux compat */ +#ifdef CONFIG_PXA25X_UDC_LINUX +# define UFNRH *((volatile u32 *)0x40600060) +# define UFNRL *((volatile u32 *)0x40600064) +#endif + +#endif /* CONFIG_CPU_PXA25X */ + /* LCD registers */ #define LCCR4 0x44000010 /* LCD Controller Control Register 4 */ #define LCCR5 0x44000014 /* LCD Controller Control Register 5 */ -- 1.7.3.4

3 3

[U-Boot] [PATCH v4] tx25: Use generic gpio_* calls
by Vikram Narayanan 11 Aug '12

11 Aug '12

Instead of manipulating gpio registers directly, use the calls from the gpio library. Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Acked-by: Stefano Babic <sbabic(a)denx.de> Cc: John Rigby <jcrigby(a)gmail.com> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes from v3: Use gpio_set_value instead of gpio_direction_output (Ahh. Missed it again!!. Very bad) Changes from v2: Swap the place of the change log and commit message. Changes from v1: Used appropriate gpio_* lib calls. board/karo/tx25/tx25.c | 25 +++++++++---------------- 1 files changed, 9 insertions(+), 16 deletions(-) diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c index 2a29943..07fd98d 100644 --- a/board/karo/tx25/tx25.c +++ b/board/karo/tx25/tx25.c @@ -34,14 +34,13 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_FEC_MXC +#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) +#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) void tx25_fec_init(void) { struct iomuxc_mux_ctl *muxctl; struct iomuxc_pad_ctl *padctl; - u32 val; u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5); - struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE; - struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE; u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode; debug("tx25_fec_init\n"); @@ -66,18 +65,15 @@ void tx25_fec_init(void) writel(0x0, &padctl->pad_d11); /* drop PHY power and assert reset (low) */ - val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9)); - writel(val, &gpio4->gpio_dr); - val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9); - writel(val, &gpio4->gpio_dir); + gpio_direction_output(GPIO_FEC_RESET_B, 0); + gpio_direction_output(GPIO_FEC_ENABLE_B, 0); mdelay(5); debug("resetting phy\n"); /* turn on PHY power leaving reset asserted */ - val = readl(&gpio4->gpio_dr) | 1 << 9; - writel(val, &gpio4->gpio_dr); + gpio_set_value(GPIO_FEC_ENABLE_B, 1); mdelay(10); @@ -107,19 +103,16 @@ void tx25_fec_init(void) /* * set each to 1 and make each an output */ - val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12); - writel(val, &gpio3->gpio_dr); - val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12); - writel(val, &gpio3->gpio_dir); + gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 10), 1); + gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 11), 1); + gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 12), 1); mdelay(22); /* this value came from RedBoot */ /* * deassert PHY reset */ - val = readl(&gpio4->gpio_dr) | 1 << 7; - writel(val, &gpio4->gpio_dr); - writel(val, &gpio4->gpio_dr); + gpio_set_value(GPIO_FEC_RESET_B, 1); mdelay(5); -- 1.7.4.1

4 3

[U-Boot] [PATCH] dts/Makefile: Turn off system-/gcc-specific predefined macros
by Horst Kronstorfer 10 Aug '12

10 Aug '12

Add '-undef' to DTS_CPPFLAGS to avoid unwanted expansion of dts content that matches system-specific or gcc-specific predefined macros. Example: A number of PowerPC related *.dts files in the kernel define a property named 'linux,network-index' which (w/o '-undef') is expanded to '1,network-index' by the preprocessor because of '#define linux 1.' With '-undef' in place only the standard predefined macros are visible: $ gcc -dM -E -undef - </dev/null #define __STDC_HOSTED__ 1 #define __STDC__ 1 Signed-off-by: Horst Kronstorfer <hkronsto(a)frequentis.com> --- dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dts/Makefile b/dts/Makefile index 402dfe1..3c6bc18 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -36,7 +36,7 @@ $(error Your architecture does not have device tree support enabled. \ Please define CONFIG_ARCH_DEVICE_TREE)) # We preprocess the device tree file provide a useful define -DTS_CPPFLAGS := -DARCH_CPU_DTS=\"$(SRCTREE)/arch/$(ARCH)/dts/$(CONFIG_ARCH_DEVICE_TREE).dtsi\" +DTS_CPPFLAGS := -undef -DARCH_CPU_DTS=\"$(SRCTREE)/arch/$(ARCH)/dts/$(CONFIG_ARCH_DEVICE_TREE).dtsi\" all: $(obj).depend $(LIB) -- 1.7.11.2

4 10

[U-Boot] [PATCH] Add support for DS1388.
by Kenth Eriksson 10 Aug '12

10 Aug '12

Support for DS1388 is added by extending the DS1337 driver. DS1388 is similar to DS1337. The time registers are offset by 1 (due to support for hundreds of seconds), and there is no century bit. The configuration and trickle charge registers are also different. Tested on hardware with Freescale P2010 and DS1388. Signed-off-by: Kenth Eriksson <kenth.eriksson(a)transmode.com> --- drivers/rtc/Makefile | 1 + drivers/rtc/ds1337.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 0 deletions(-) diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index faf4fcd..9cfdbf9 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_RTC_DS1307) += ds1307.o COBJS-$(CONFIG_RTC_DS1338) += ds1307.o COBJS-$(CONFIG_RTC_DS1337) += ds1337.o COBJS-$(CONFIG_RTC_DS1374) += ds1374.o +COBJS-$(CONFIG_RTC_DS1388) += ds1337.o COBJS-$(CONFIG_RTC_DS1556) += ds1556.o COBJS-$(CONFIG_RTC_DS164x) += ds164x.o COBJS-$(CONFIG_RTC_DS174x) += ds174x.o diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index 5bb9f94..4c98732 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -37,6 +37,7 @@ /* * RTC register addresses */ +#if defined CONFIG_RTC_DS1337 #define RTC_SEC_REG_ADDR 0x0 #define RTC_MIN_REG_ADDR 0x1 #define RTC_HR_REG_ADDR 0x2 @@ -47,6 +48,18 @@ #define RTC_CTL_REG_ADDR 0x0e #define RTC_STAT_REG_ADDR 0x0f #define RTC_TC_REG_ADDR 0x10 +#elif defined CONFIG_RTC_DS1388 +#define RTC_SEC_REG_ADDR 0x1 +#define RTC_MIN_REG_ADDR 0x2 +#define RTC_HR_REG_ADDR 0x3 +#define RTC_DAY_REG_ADDR 0x4 +#define RTC_DATE_REG_ADDR 0x5 +#define RTC_MON_REG_ADDR 0x6 +#define RTC_YR_REG_ADDR 0x7 +#define RTC_CTL_REG_ADDR 0x0c +#define RTC_STAT_REG_ADDR 0x0b +#define RTC_TC_REG_ADDR 0x0a +#endif /* * RTC control register bits @@ -87,6 +100,11 @@ int rtc_get (struct rtc_time *tmp) mon_cent = rtc_read (RTC_MON_REG_ADDR); year = rtc_read (RTC_YR_REG_ADDR); + /* No century bit, assume year 2000 */ +#ifdef CONFIG_RTC_DS1388 + mon_cent |= 0x80; +#endif + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", year, mon_cent, mday, wday, hour, min, sec, control, status); @@ -151,6 +169,7 @@ int rtc_set (struct rtc_time *tmp) * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn * off the OSC output. */ + #ifdef CONFIG_SYS_RTC_DS1337_NOOSC #define RTC_DS1337_RESET_VAL \ (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) @@ -159,10 +178,17 @@ int rtc_set (struct rtc_time *tmp) #endif void rtc_reset (void) { +#ifdef CONFIG_SYS_RTC_DS1337 rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL); +#elif defined CONFIG_SYS_RTC_DS1388 + rtc_write(RTC_CTL_REG_ADDR, 0x0); /* hw default */ +#endif #ifdef CONFIG_SYS_DS1339_TCR_VAL rtc_write (RTC_TC_REG_ADDR, CONFIG_SYS_DS1339_TCR_VAL); #endif +#ifdef CONFIG_SYS_DS1388_TCR_VAL + rtc_write(RTC_TC_REG_ADDR, CONFIG_SYS_DS1388_TCR_VAL); +#endif } -- 1.7.3.4

2 1

[U-Boot] [PATCH v3 4/4] c6x: Add support c6745-som board
by Dmitry Bondar 10 Aug '12

10 Aug '12

Add support board c6745-som (http://inmys.ru/?_=/products/som_c6745) with C6745 cpu. Signed-off-by: Dmitry Bondar <bond(a)inmys.ru> Cc: Tom Rini <trini(a)ti.com> --- MAINTAINERS | 3 + board/inmys/c6745-som/Makefile | 27 ++++ board/inmys/c6745-som/c6745-som.c | 246 +++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/c6745-som-inmys.h | 294 +++++++++++++++++++++++++++++++++++++ 5 files changed, 571 insertions(+), 0 deletions(-) create mode 100644 board/inmys/c6745-som/Makefile create mode 100644 board/inmys/c6745-som/c6745-som.c create mode 100644 include/configs/c6745-som-inmys.h diff --git a/MAINTAINERS b/MAINTAINERS index e55893b..710f3df 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -62,6 +62,9 @@ Jerry Van Baren <gerald.vanbaren(a)smiths-aerospace.com> sacsng MPC8260 +Dmitry Bondar <bond(a)inmys.ru> + c6745-som c674x + Oliver Brown <obrown(a)adventnetworks.com> gw8260 MPC8260 diff --git a/board/inmys/c6745-som/Makefile b/board/inmys/c6745-som/Makefile new file mode 100644 index 0000000..9a91ed2 --- /dev/null +++ b/board/inmys/c6745-som/Makefile @@ -0,0 +1,27 @@ +# (C) Copyright 2012 Dmitry Bondar <bond(a)inmys.ru> +# +# This file is released under the terms of GPL v2 and any later version. +# See the file COPYING in the root directory of the source tree for details. + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-$(CONFIG_MACH_INMYS_C6745_SOM) += c6745-som.o + +COBJS := $(COBJS-y) + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/inmys/c6745-som/c6745-som.c b/board/inmys/c6745-som/c6745-som.c new file mode 100644 index 0000000..d71ac2b --- /dev/null +++ b/board/inmys/c6745-som/c6745-som.c @@ -0,0 +1,246 @@ +/* + * (C) Copyright 2012 Dmitry Bondar <bond(a)inmys.ru> + * From da830. Original Notices follow: + * + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson(a)gefanuc.com> + * + * Base on code from TI. Original Notices follow: + * + * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ + * + * Modified for DA8xx EVM. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <net.h> +#include <netdev.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emif_defs.h> +#include <asm/arch/emac_defs.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) + +/* SPI0 pin muxer settings */ +static const struct pinmux_config spi0_pins[] = { + { pinmux(7), 1, 3 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(7), 1, 6 }, + { pinmux(7), 1, 7 } +}; + +/* EMIF-A bus pins for 8-bit NAND support on CS3 */ +static const struct pinmux_config emifa_nand_pins[] = { + { pinmux(13), 1, 6 }, + { pinmux(13), 1, 7 }, + { pinmux(14), 1, 0 }, + { pinmux(14), 1, 1 }, + { pinmux(14), 1, 2 }, + { pinmux(14), 1, 3 }, + { pinmux(14), 1, 4 }, + { pinmux(14), 1, 5 }, + { pinmux(15), 1, 7 }, + { pinmux(16), 1, 0 }, + { pinmux(18), 1, 1 }, + { pinmux(18), 1, 4 }, + { pinmux(18), 1, 5 }, +}; + +/* EMAC PHY interface pins */ +static const struct pinmux_config emac_pins[] = { + { pinmux(9), 0, 5 }, + { pinmux(10), 2, 1 }, + { pinmux(10), 2, 2 }, + { pinmux(10), 2, 3 }, + { pinmux(10), 2, 4 }, + { pinmux(10), 2, 5 }, + { pinmux(10), 2, 6 }, + { pinmux(10), 2, 7 }, + { pinmux(11), 2, 0 }, + { pinmux(11), 2, 1 }, +}; + +/* UART pin muxer settings */ +static const struct pinmux_config uart_pins[] = { + { pinmux(8), 2, 7 }, + { pinmux(9), 2, 0 } +}; + +/* I2C pin muxer settings */ +static const struct pinmux_config i2c_pins[] = { + { pinmux(8), 2, 3 }, + { pinmux(8), 2, 4 } +}; + +/* USB0_DRVVBUS pin muxer settings */ +static const struct pinmux_config usb_pins[] = { + { pinmux(9), 1, 1 } +}; + +static const struct pinmux_resource pinmuxes[] = { +#ifdef CONFIG_SPI_FLASH + PINMUX_ITEM(spi0_pins), +#endif + PINMUX_ITEM(uart_pins), + PINMUX_ITEM(i2c_pins), +#ifdef CONFIG_USB_DA8XX + PINMUX_ITEM(usb_pins), +#endif +#ifdef CONFIG_USE_NAND + PINMUX_ITEM(emifa_nand_pins), +#endif +#if defined(CONFIG_DRIVER_TI_EMAC) + PINMUX_ITEM(emac_pins), +#endif +}; + +static const struct lpsc_resource lpsc[] = { + { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ + { DAVINCI_LPSC_SPI0 }, /* Serial Flash */ + { DAVINCI_LPSC_EMAC }, /* image download */ + { DAVINCI_LPSC_UART2 }, /* console */ + { DAVINCI_LPSC_GPIO }, +}; + +int board_early_init_f(void) +{ +#ifndef CONFIG_USE_IRQ + irq_init(); +#endif + +#ifdef CONFIG_NAND_DAVINCI + /* EMIFA 100MHz clock select */ + writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2, + &davinci_syscfg_regs->cfgchip3); + /* NAND CS setup */ + writel((DAVINCI_ABCR_WSETUP(0) | + DAVINCI_ABCR_WSTROBE(2) | + DAVINCI_ABCR_WHOLD(0) | + DAVINCI_ABCR_RSETUP(0) | + DAVINCI_ABCR_RSTROBE(2) | + DAVINCI_ABCR_RHOLD(0) | + DAVINCI_ABCR_TA(2) | + DAVINCI_ABCR_ASIZE_8BIT), + &davinci_emif_regs->ab2cr); +#endif + + /* arch number of the board */ + /*gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;*/ + gd->bd->bi_arch_number = 0; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) + return 1; + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&davinci_syscfg_regs->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART2), + &davinci_syscfg_regs->suspsrc); + +#if 1 + /* configure pinmux settings */ + if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) + return 1; +#endif + /* + * If we boot over UART, Terminal doesn't display characters + * Reset the values set by Boot ROM + */ +#if 1 + { + int j; + for (j = 0; j < 15; j++) + REG(DAVINCI_UART2_BASE + (j*4)) = 0; + } + REG(DAVINCI_UART2_BASE + 0x30) = 1 | (1 << 13) | (1 << 14); +#endif + /* enable the console UART */ + writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | + DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart2_ctrl_regs->pwremu_mgmt); + + return 0; +} + +int board_init() +{ + return 0; +} + + +#if defined(CONFIG_DRIVER_TI_EMAC) + +#define PHY_SW_I2C_ADDR 0x57 /* Address of PHY on i2c bus */ + +/* + * Initializes on-board ethernet controllers. + */ +int board_eth_init(bd_t *bis) +{ + u_int8_t mac_addr[6]; + struct eth_device *dev; + + /* Read Ethernet MAC address from EEPROM */ + if (dvevm_read_mac_address(mac_addr)) + /* set address env if not already set */ + davinci_sync_env_enetaddr(mac_addr); + + /* read the address back from env */ + if (!eth_getenv_enetaddr("ethaddr", mac_addr)) + return -1; + + /* finally, initialise the driver */ + if (!davinci_emac_initialize()) { + printf("Error: Ethernet init failed!\n"); + return -1; + } + + dev = eth_get_dev(); + + /* provide the resulting addr to the driver */ + memcpy(dev->enetaddr, mac_addr, 6); + dev->write_hwaddr(dev); + + return 0; +} +#endif /* CONFIG_DRIVER_TI_EMAC */ + diff --git a/boards.cfg b/boards.cfg index a723f67..7acbfd1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -302,6 +302,7 @@ ip04 blackfin blackfin pr1 blackfin blackfin tcm-bf518 blackfin blackfin tcm-bf537 blackfin blackfin +c6745-som-inmys c6x c674x c6745-som inmys davinci c6745-som-inmys M52277EVB m68k mcf5227x m52277evb freescale - M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000 M52277EVB_stmicro m68k mcf5227x m52277evb freescale - M52277EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x43E00000 M5235EVB m68k mcf523x m5235evb freescale - M5235EVB:SYS_TEXT_BASE=0xFFE00000 diff --git a/include/configs/c6745-som-inmys.h b/include/configs/c6745-som-inmys.h new file mode 100644 index 0000000..7c8d567 --- /dev/null +++ b/include/configs/c6745-som-inmys.h @@ -0,0 +1,294 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* Based on da830evm.h +*/ +#define TMPVAL 0 + +/* + * Board + */ +#define CONFIG_USE_NAND +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_CMD_GPIO +#define CONFIG_DA8XX_GPIO +/*#define CONFIG_DISPLAY_CPUINFO*/ +#define CONFIG_SKIP_LOWLEVEL_INIT + +#if 0 +#define CONFIG_USE_SPIFLASH +#endif + +/* + * SoC Configuration + */ +#define CONFIG_MACH_INMYS_C6745_SOM +#define CONFIG_C6X /* */ +#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) +#define CONFIG_SYS_OSCIN_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0xc1f80000 +#define CONFIG_BOARD_EARLY_INIT_F + + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) +#define CONFIG_SYS_SDRAM_SIZE (32*1024*1024) +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Memory organisation: + * + * RAM start --------------------------- + * | ... | + * --------------------------- + * | Stack | + * --------------------------- + * | Global data | + * --------------------------- + * | Environment | + * --------------------------- + * | Monitor | + * RAM end --------------------------- + */ +/* We're running in RAM */ +#define CONFIG_MONITOR_IS_IN_RAM +#define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - \ + CONFIG_SYS_MONITOR_LEN) + +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MONITOR_BASE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_ADDR CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_INIT_SP_OFFSET \ + - CONFIG_STACKSIZE \ + - CONFIG_SYS_MALLOC_LEN) + +/* + * Serial Driver info + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#if 1 +/* + * I2C Configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CONFIG_SYS_I2C_SPEED 25000 /* 100Kbps won't work, H/W bug */ +#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ + + +#define CONFIG_CMD_I2C + +#define CONFIG_CMD_DATE +#define CONFIG_RTC_PCF8563 +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 + +#define CONFIG_CMD_EEPROM +/* EEPROM configuration */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_SIZE 256 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 + +#endif + +/* + * Network & Ethernet Configuration + */ +#ifdef CONFIG_DRIVER_TI_EMAC +#define CONFIG_EMAC_MDIO_PHY_NUM 1 +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#endif + + +/* + * Flash & Environment + */ +#undef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CONFIG_ENV_OFFSET 0 +#define CONFIG_ENV_SIZE (128*1024) +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_SYS_NAND_PAGE_2K +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +#define CONFIG_SYS_CLE_MASK 0x10 +#define CONFIG_SYS_ALE_MASK 0x8 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 + +#if 1 +/* + * USB configuration + */ +#define CONFIG_USB_DA8XX /* Platform hookup to MUSB controller */ +#define CONFIG_MUSB_HCD + +#endif + +/* + * U-Boot general configuration + */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#undef CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "c6745-som > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND "" +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING + +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR + +#ifndef CONFIG_DRIVER_TI_EMAC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#endif + +#ifdef CONFIG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#endif + +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_SAVEENV +#endif + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_ENV +#endif + +#ifdef CONFIG_USB_DA8XX + +#ifdef CONFIG_MUSB_HCD /* include support for usb host */ +#define CONFIG_CMD_USB /* include support for usb cmd */ + +#define CONFIG_USB_STORAGE /* MSC class support */ +#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */ +#define CONFIG_CMD_FAT /* inclue support for FAT/storage */ +#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */ + +#ifdef CONFIG_USB_KEYBOARD /* HID class support */ +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_PREBOOT "usb start" +#endif /* CONFIG_USB_KEYBOARD */ + +#endif /* CONFIG_MUSB_HCD */ + +#ifdef CONFIG_MUSB_UDC +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "InMys" +#define CONFIG_USBD_PRODUCT_NAME "c6745-som" +#endif /* CONFIG_MUSB_UDC */ + +#endif /* CONFIG_USB_DA8XX */ + +#ifdef CONFIG_MTD_PARTITIONS +#define MTDIDS_DEFAULT "nand0=davinci_nand.1" +#define PART_BOOT "512k(bootloader)ro," +#define PART_PARAMS "512k(params)ro," +#define PART_KERNEL "4m(kernel)," +#define PART_REST "-(filesystem)" +#define MTDPARTS_DEFAULT \ + "mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST +#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ + +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_BOOTD +#undef CONFIG_RESET_TO_RETRY + +#define CONFIG_STANDALONE_LOAD_ADDR 0xc1f80000 + +#endif /* __CONFIG_H */ -- 1.7.2.5

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[U-Boot] [PATCH] tools: add kwboot binary to .gitignore file
by Luka Perkov 10 Aug '12

10 Aug '12

Signed-off-by: Luka Perkov <uboot(a)lukaperkov.net> --- tools/.gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/.gitignore b/tools/.gitignore index e4d2c2f..a8bd819 100644 --- a/tools/.gitignore +++ b/tools/.gitignore @@ -2,6 +2,7 @@ /envcrc /gen_eth_addr /img2srec +/kwboot /mkenvimage /mkimage /mpc86x_clk

4 3

[U-Boot] [PATCH v2] fdt: Include arch specific gpio.h instead of asm-generic/gpio.h
by Michal Simek 10 Aug '12

10 Aug '12

Include arch specific gpio.h instead of asm-generic/gpio.h because several architectures (Microblaze, Blackfin, Nios2, OpenRISC) define gpio functions in header file. asm-generic/gpio.h can be included in arch specific gpio.h (For example: ARM) Signed-off-by: Michal Simek <monstr(a)monstr.eu> CC: Simon Glass <sjg(a)chromium.org> --- v2: Use only arch specific gpio.h Remove commentary --- lib/fdtdec.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index cc09e06..af17ac1 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -24,8 +24,7 @@ #include <libfdt.h> #include <fdtdec.h> -/* we need the generic GPIO interface here */ -#include <asm-generic/gpio.h> +#include <asm/gpio.h> DECLARE_GLOBAL_DATA_PTR; -- 1.7.0.4

4 4

[U-Boot] [PATCH] net: Improve the speed of netconsole
by Joe Hershberger 10 Aug '12

10 Aug '12

Previously u-boot would initialize the network interface for every network operation and then shut it down again. This makes sense for most operations where the network in not known to be needed soon after the operation is complete. In the case of netconsole, it will use the network for every interaction with the shell or every printf. This means that the network is being reinitialized very often. On many devices, this intialization is very slow. This patch checks for consecutive netconsole actions and leaves the ethernet hardware initialized between them. It will still behave the same old way for all other network operations and any time another network operation happens between netconsole operations. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Stefano Babic <sbabic(a)denx.de> --- doc/README.NetConsole | 3 +++ drivers/net/netconsole.c | 26 ++++++++++++++++++++++---- include/net.h | 6 ++++++ net/eth.c | 14 ++++++++++++++ net/net.c | 44 +++++++++++++++++++++++++++++++++++++++----- 5 files changed, 84 insertions(+), 9 deletions(-) diff --git a/doc/README.NetConsole b/doc/README.NetConsole index c8bcb90..7a20bf5 100644 --- a/doc/README.NetConsole +++ b/doc/README.NetConsole @@ -6,6 +6,9 @@ serial and network input/output devices by adjusting the 'stdin' and set either of these variables to "nc". Input and output can be switched independently. +CONFIG_NETCONSOLE_PERSIST_ETH - Don't reinitialize the Ethernet driver + between consecutive calls to netconsole. + We use an environment variable 'ncip' to set the IP address and the port of the destination. The format is <ip_addr>:<port>. If <port> is omitted, the value of 6666 is used. If the env var doesn't exist, the diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c index 14243b8..0218302 100644 --- a/drivers/net/netconsole.c +++ b/drivers/net/netconsole.c @@ -131,8 +131,17 @@ static void nc_send_packet(const char *buf, int len) } if (eth->state != ETH_STATE_ACTIVE) { - if (eth_init(gd->bd) < 0) - return; +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + if (net_loop_last_protocol != NETCONS) { +#endif + if (eth_init(gd->bd) < 0) + return; +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + net_loop_last_protocol = NETCONS; + } else { + eth_init_state_only(gd->bd); + } +#endif inited = 1; } pkt = (uchar *)NetTxPacket + NetEthHdrSize() + IP_UDP_HDR_SIZE; @@ -141,8 +150,17 @@ static void nc_send_packet(const char *buf, int len) ip = nc_ip; NetSendUDPPacket(ether, ip, nc_port, nc_port, len); - if (inited) - eth_halt(); + if (inited) { +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + if (net_loop_last_protocol != NETCONS) { +#endif + eth_halt(); +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + } else { + eth_halt_state_only(); + } +#endif + } } static int nc_start(void) diff --git a/include/net.h b/include/net.h index 6d2d6cd..0b75e10 100644 --- a/include/net.h +++ b/include/net.h @@ -151,6 +151,12 @@ extern int eth_rx(void); /* Check for received packets */ extern void eth_halt(void); /* stop SCC */ extern char *eth_get_name(void); /* get name of current device */ +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH +extern int eth_init_state_only(bd_t *bis); /* Set active state */ +extern void eth_halt_state_only(void); /* Set passive state */ +extern enum proto_t net_loop_last_protocol; +#endif + /* * Set the hardware address for an ethernet interface based on 'eth%daddr' * environment variable (or just 'ethaddr' if eth_number is 0). diff --git a/net/eth.c b/net/eth.c index d526264..54841b9 100644 --- a/net/eth.c +++ b/net/eth.c @@ -436,6 +436,20 @@ void eth_halt(void) eth_current->state = ETH_STATE_PASSIVE; } +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH +int eth_init_state_only(bd_t *bis) +{ + eth_current->state = ETH_STATE_ACTIVE; + + return 0; +} + +void eth_halt_state_only(void) +{ + eth_current->state = ETH_STATE_PASSIVE; +} +#endif + int eth_send(void *packet, int length) { if (!eth_current) diff --git a/net/net.c b/net/net.c index 9de7d92..184c182 100644 --- a/net/net.c +++ b/net/net.c @@ -180,6 +180,14 @@ IPaddr_t NetNtpServerIP; int NetTimeOffset; #endif +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH +/* + * Start with a default last protocol. + * We are only interested in NETCONS or not. + */ +enum proto_t net_loop_last_protocol = BOOTP; +#endif + uchar PktBuf[(PKTBUFSRX+1) * PKTSIZE_ALIGN + PKTALIGN]; /* Receive packet */ @@ -314,12 +322,20 @@ int NetLoop(enum proto_t protocol) bootstage_mark_name(BOOTSTAGE_ID_ETH_START, "eth_start"); net_init(); - eth_halt(); - eth_set_current(); - if (eth_init(bd) < 0) { +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + if (protocol != NETCONS || net_loop_last_protocol != NETCONS) { +#endif eth_halt(); - return -1; + eth_set_current(); + if (eth_init(bd) < 0) { + eth_halt(); + return -1; + } +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + } else { + eth_init_state_only(bd); } +#endif restart: memcpy(NetOurEther, eth_get_dev()->enetaddr, 6); @@ -461,6 +477,10 @@ restart: net_cleanup_loop(); eth_halt(); +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + /* Invalidate the last protocol */ + net_loop_last_protocol = BOOTP; +#endif puts("\nAbort\n"); /* include a debug print as well incase the debug messages are directed to stderr */ @@ -518,13 +538,27 @@ restart: sprintf(buf, "%lX", (unsigned long)load_addr); setenv("fileaddr", buf); } - eth_halt(); +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + if (protocol != NETCONS) { +#endif + eth_halt(); +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + } else { + eth_halt_state_only(); + } + /* Remember what the last protocol was */ + net_loop_last_protocol = protocol; +#endif ret = NetBootFileXferSize; debug_cond(DEBUG_INT_STATE, "--- NetLoop Success!\n"); goto done; case NETLOOP_FAIL: net_cleanup_loop(); +#ifdef CONFIG_NETCONSOLE_PERSIST_ETH + /* Invalidate the last protocol */ + net_loop_last_protocol = BOOTP; +#endif debug_cond(DEBUG_INT_STATE, "--- NetLoop Fail!\n"); goto done; -- 1.6.0.2

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[U-Boot] [PATCH 0/2] zfs: Add filesystem ZFS support
by Jorgen Lundman 10 Aug '12

10 Aug '12

ZFS filesystem support from GRUB. Adding 'zfsload' and 'zfsls' commands for ZFS filesystem support. ZFS pool notation syntax is in the format '/POOLNAME/@/directory/directory/file', also explained in help output. Initial revision given to GRUB is found: http://src.opensolaris.org/source/xref/onnv/onnv-gate/usr/src/grub/grub-0.9… Using "either version 2 of the License, or (at your option) any later version." Jorgen Lundman (2): ZFS header files zfs: Add ZFS filesystem support Makefile | 2 +- common/Makefile | 1 + common/cmd_zfs.c | 244 +++++ fs/Makefile | 1 + fs/{ => zfs}/Makefile | 43 +- fs/zfs/dev.c | 139 +++ fs/zfs/zfs.c | 2414 ++++++++++++++++++++++++++++++++++++++++++ fs/zfs/zfs_fletcher.c | 84 ++ fs/zfs/zfs_lzjb.c | 94 ++ fs/zfs/zfs_sha256.c | 145 +++ include/config_cmd_all.h | 1 + include/zfs/dmu.h | 119 +++ include/zfs/dmu_objset.h | 43 + include/zfs/dnode.h | 80 ++ include/zfs/dsl_dataset.h | 52 + include/zfs/dsl_dir.h | 48 + include/zfs/sa_impl.h | 34 + include/zfs/spa.h | 311 ++++++ include/zfs/uberblock_impl.h | 57 + include/zfs/vdev_impl.h | 69 ++ include/zfs/zap_impl.h | 112 ++ include/zfs/zap_leaf.h | 103 ++ include/zfs/zfs.h | 122 +++ include/zfs/zfs_acl.h | 55 + include/zfs/zfs_znode.h | 70 ++ include/zfs/zil.h | 56 + include/zfs/zio.h | 92 ++ include/zfs/zio_checksum.h | 49 + include/zfs_common.h | 94 ++ 29 files changed, 4718 insertions(+), 16 deletions(-) create mode 100644 common/cmd_zfs.c copy fs/{ => zfs}/Makefile (52%) create mode 100644 fs/zfs/dev.c create mode 100644 fs/zfs/zfs.c create mode 100644 fs/zfs/zfs_fletcher.c create mode 100644 fs/zfs/zfs_lzjb.c create mode 100644 fs/zfs/zfs_sha256.c create mode 100644 include/zfs/dmu.h create mode 100644 include/zfs/dmu_objset.h create mode 100644 include/zfs/dnode.h create mode 100644 include/zfs/dsl_dataset.h create mode 100644 include/zfs/dsl_dir.h create mode 100644 include/zfs/sa_impl.h create mode 100644 include/zfs/spa.h create mode 100644 include/zfs/uberblock_impl.h create mode 100644 include/zfs/vdev_impl.h create mode 100644 include/zfs/zap_impl.h create mode 100644 include/zfs/zap_leaf.h create mode 100644 include/zfs/zfs.h create mode 100644 include/zfs/zfs_acl.h create mode 100644 include/zfs/zfs_znode.h create mode 100644 include/zfs/zil.h create mode 100644 include/zfs/zio.h create mode 100644 include/zfs/zio_checksum.h create mode 100644 include/zfs_common.h

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