U-Boot
Threads by month
- ----- 2025 -----
- May
- April
- March
- February
- January
- ----- 2024 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2023 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2022 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2021 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2020 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2019 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2018 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2017 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2016 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2015 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2014 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2013 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2012 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2011 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2010 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2009 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2008 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2007 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2006 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2005 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2004 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2003 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2002 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2001 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2000 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
June 2012
- 142 participants
- 444 discussions
Re: [U-Boot] [PATCH 1/1] USB: EHCI: Initialize multiple USB controllers at once
by Wolfgang Denk 31 Jul '12
by Wolfgang Denk 31 Jul '12
31 Jul '12
Dear Jim Lin,
sending the very same message eight (8!) times doesnot make it a bit
more convincing - on contrary.
In message <4B9C9637D5087840A465BDCB251780E9E2D6EDA3F5(a)HKMAIL02.nvidia.com> you wrote:
>
> > U-Boot is not multi-tasking, so you can always access only a single
> > USB device at a time ayway. And it is a decoumented design principle
> > that U-Boot must not initialize any devices it does not use itself.
> >
> > So why?
> Because of this complaint and request for devices under different controllers
> to be working at same time.
You make another claim here, but don't explain how this is supposed to
work or whay the exact use case would be where this was needed.
U-Boot will not be able to access multiple devices at the same time,
so why would it be necessary to enable these? It should be sufficient
to enable the controller that is responsible for the single device
that is currently being used.
> "One particularly annoying consequence of this is when you use the Seaboard
> configuration on Springbank.
> Seaboard selects Tegra's USB3 as "usb 0" device, which is the one you can use,
> in order not to conflict with the flashing USB port USB1.
> However, Springbank only exposes USB1 since USB3 is used internally for the
> USB keyboard/mouse. As such, you cannot use the USB port on Springbank under
> U-Boot at the moment.
> "
I have to admit that I cannot make any sense from this statement. The
only thing I understand is that you are trying to use a configuration
for one hardware (Seaboard) on another, incompatible hardware
(Springbank).
The simple answer to this problem is: don't do that, then.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de
Ordnung ist die Lust der Vernunft,
aber Unordnung die Wonne der Phantasie - Paul Claudel
4
8
[U-Boot] [PATCH 1/2 v2] SDHC/MMC: fix the wrong infomation after change SD card
by Chang-Ming.Huang＠freescale.com 30 Jul '12
by Chang-Ming.Huang＠freescale.com 30 Jul '12
30 Jul '12
From: Jerry Huang <Chang-Ming.Huang(a)freescale.com>
When first inserting the SD card to slot, the command "mmcinfo" can
display the card information correctly.
But, then removing the SD card or inserting another SD card to slot,
the command "mmcinfo" can't display the information correctly.
when we use command "mmcinfo" every time, the driver must initialize the
SD card again, instead of assuming the card has been initialized.
Therefore remove the detect codes from mmc_init function.
And add the codes to check the mmc_init, only when mmc_init return
the right value, driver will print the information.
Below is the error log (SD card removed):
=> mmcinfo
MMC: no card present
Device: FSL_SDHC
Manufacturer ID: 3
OEM: 5344
Name: SD02G
Tran Speed: 25000000
Rd Block Len: 512
SD version 2.0
High Capacity: No
Capacity: 1.8 GiB
Bus Width: 4-bit
Signed-off-by: Jerry Huang <Chang-Ming.Huang(a)freescale.com>
CC: Andy Fleming <afleming(a)gmail.com>
CC: Marek Vasut <marex(a)denx.de>
---
changes for v2:
- keep the member has_init
- only remove the detect code
common/cmd_mmc.c | 5 ++---
drivers/mmc/mmc.c | 3 ---
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 750509d..e73ce03 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -131,9 +131,8 @@ int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
mmc = find_mmc_device(curr_device);
if (mmc) {
- mmc_init(mmc);
-
- print_mmcinfo(mmc);
+ if (!mmc_init(mmc))
+ print_mmcinfo(mmc);
return 0;
} else {
printf("no mmc device at slot %x\n", curr_device);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f92b662..af644bb 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1323,9 +1323,6 @@ int mmc_init(struct mmc *mmc)
return NO_CARD_ERR;
}
- if (mmc->has_init)
- return 0;
-
err = mmc->init(mmc);
if (err)
--
1.7.5.4
5
11
[U-Boot] [PATCH] doc: cleanup - move board READMEs into respective board directories
by Wolfgang Denk 29 Jul '12
by Wolfgang Denk 29 Jul '12
29 Jul '12
Also drop a few files referring to no longer / not yet supported
boards.
Signed-off-by: Wolfgang Denk <wd(a)denx.de>
Cc: Prafulla Wadaskar <prafulla(a)marvell.com>
Cc: Stefan Roese <sr(a)denx.de>
Cc: Kim Phillips <kim.phillips(a)freescale.com>
Cc: Andy Fleming <afleming(a)gmail.com>
Cc: Jason Jin <jason.jin(a)freescale.com>
Cc: Stefano Babic <sbabic(a)denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck(a)googlemail.com>
---
.../AndesTech/adp-ag101/README | 0
doc/README.db64360 => board/Marvell/db64360/README | 0
doc/README.db64460 => board/Marvell/db64460/README | 0
doc/README.RPXClassic => board/RPXClassic/README | 0
doc/README.RPXlite => board/RPXlite/README | 0
{doc => board/RPXlite}/README.PlanetCore | 0
doc/README.alaska8220 => board/alaska/README | 0
doc/README.bamboo => board/amcc/bamboo/README | 0
doc/README.ebony => board/amcc/ebony/README | 0
{doc => board/amcc/ocotea}/README.ocotea | 0
.../amcc/ocotea}/README.ocotea-PIBS-to-U-Boot | 0
.../armltd/integrator/README | 0
doc/README.cmi => board/cmi/README | 0
doc/README.COBRA5272 => board/cobra5272/README | 0
{doc => board/davinci/da8xxevm}/README.hawkboard | 0
doc/README.dnp5370 => board/dnp5370/README | 0
doc/README.evb64260 => board/evb64260/README | 0
{doc => board/evb64260}/README.EVB-64260-750CX | 0
doc/README.fads => board/fads/README | 0
.../freescale/m52277evb/README | 0
.../freescale/m5253evbe/README | 0
.../freescale/m53017evb/README | 0
.../freescale/m5373evb/README | 0
.../freescale/m54455evb/README | 0
.../freescale/m547xevb/README | 0
.../freescale/mpc7448hpc2/README | 0
.../freescale/mpc8313erdb/README | 0
.../freescale/mpc8315erdb/README | 0
.../freescale/mpc8323erdb/README | 0
.../freescale/mpc832xemds/README | 0
.../freescale/mpc8349itx/README | 0
.../freescale/mpc8360emds/README | 0
.../freescale/mpc837xemds/README | 0
.../freescale/mpc837xerdb/README | 0
.../freescale/mpc8536ds/README | 0
.../freescale/mpc8544ds/README | 0
.../freescale/mpc8569mds/README | 0
.../freescale/mpc8572ds/README | 0
.../freescale/mpc8610hpcd/README | 0
.../freescale/mpc8641hpcn/README | 0
.../freescale/mx35pdk/README | 0
.../freescale/mx6qsabrelite/README | 0
.../freescale/p1022ds/README | 0
.../freescale/p1023rds/README | 0
.../freescale/p1_p2_rdb/README | 0
.../freescale/p1_p2_rdb_pc/README | 0
.../freescale/p2041rdb/README | 0
.../freescale/p3060qds/README | 0
doc/README.IceCube => board/icecube/README | 0
{doc => board/icecube}/README.Lite5200B_low_power | 0
doc/README.INCA-IP => board/incaip/README | 0
doc/README.IPHASE4539 => board/iphase4539/README | 0
{doc => board/keymile/km83xx}/README.kmeter1 | 0
doc/README.korat => board/korat/README | 0
.../matrix_vision/mergerbox/README | 0
{doc => board/matrix_vision/mvbc_p}/README.mvbc_p | 0
{doc => board/matrix_vision/mvblm7}/README.mvblm7 | 0
{doc => board/matrix_vision/mvsmr}/README.mvsmr | 0
doc/README.MBX => board/mbx8xx/README | 0
doc/README.PIP405 => board/mpl/pip405/README | 0
.../phytec/pcm030/README | 0
board/qemu-mips/README | 167 ++++++++
{doc => board/renesas/sh7757lcr}/README.sh7757lcr | 0
{doc => board/renesas/sh7785lcr}/README.sh7785lcr | 0
{doc => board/sandbox/sandbox}/README.sandbox | 0
board/sandpoint/README | 398 ++++++++++++++++++++
doc/README.sbc8349 => board/sbc8349/README | 0
doc/README.sbc8548 => board/sbc8548/README | 0
doc/README.SBC8560 => board/sbc8560/README | 0
doc/README.sbc8641d => board/sbc8641d/README | 0
{doc => board/sheldon/simpc8313}/README.simpc8313 | 0
{doc => board/st/nhk8815}/README.nhk8815 | 0
{doc => board/stx/stxxtc}/README.stxxtc | 0
{doc => board/ti/omap730p2}/README.omap730p2 | 0
doc/README.timll => board/timll/devkit8000/README | 0
doc/README.TQM8260 => board/tqc/tqm8260/README | 0
.../xes/xpedite1000/README | 0
doc/README.zeus => board/zeus/README | 0
doc/README.OXC | 24 --
doc/README.Sandpoint8240 | 394 -------------------
doc/README.amigaone | 12 -
doc/README.p4080ds | 32 --
doc/README.qemu_mips | 164 --------
83 files changed, 565 insertions(+), 626 deletions(-)
rename doc/README.ag101 => board/AndesTech/adp-ag101/README (100%)
rename doc/README.db64360 => board/Marvell/db64360/README (100%)
rename doc/README.db64460 => board/Marvell/db64460/README (100%)
rename doc/README.RPXClassic => board/RPXClassic/README (100%)
rename doc/README.RPXlite => board/RPXlite/README (100%)
rename {doc => board/RPXlite}/README.PlanetCore (100%)
rename doc/README.alaska8220 => board/alaska/README (100%)
rename doc/README.bamboo => board/amcc/bamboo/README (100%)
rename doc/README.ebony => board/amcc/ebony/README (100%)
rename {doc => board/amcc/ocotea}/README.ocotea (100%)
rename {doc => board/amcc/ocotea}/README.ocotea-PIBS-to-U-Boot (100%)
rename doc/README-integrator => board/armltd/integrator/README (100%)
rename doc/README.cmi => board/cmi/README (100%)
rename doc/README.COBRA5272 => board/cobra5272/README (100%)
rename {doc => board/davinci/da8xxevm}/README.hawkboard (100%)
rename doc/README.dnp5370 => board/dnp5370/README (100%)
rename doc/README.evb64260 => board/evb64260/README (100%)
rename {doc => board/evb64260}/README.EVB-64260-750CX (100%)
rename doc/README.fads => board/fads/README (100%)
rename doc/README.m52277evb => board/freescale/m52277evb/README (100%)
rename doc/README.m5253evbe => board/freescale/m5253evbe/README (100%)
rename doc/README.m53017evb => board/freescale/m53017evb/README (100%)
rename doc/README.m5373evb => board/freescale/m5373evb/README (100%)
rename doc/README.m54455evb => board/freescale/m54455evb/README (100%)
rename doc/README.m5475evb => board/freescale/m547xevb/README (100%)
rename doc/README.mpc7448hpc2 => board/freescale/mpc7448hpc2/README (100%)
rename doc/README.mpc8313erdb => board/freescale/mpc8313erdb/README (100%)
rename doc/README.mpc8315erdb => board/freescale/mpc8315erdb/README (100%)
rename doc/README.mpc8323erdb => board/freescale/mpc8323erdb/README (100%)
rename doc/README.mpc832xemds => board/freescale/mpc832xemds/README (100%)
rename doc/README.mpc8349itx => board/freescale/mpc8349itx/README (100%)
rename doc/README.mpc8360emds => board/freescale/mpc8360emds/README (100%)
rename doc/README.mpc837xemds => board/freescale/mpc837xemds/README (100%)
rename doc/README.mpc837xerdb => board/freescale/mpc837xerdb/README (100%)
rename doc/README.mpc8536ds => board/freescale/mpc8536ds/README (100%)
rename doc/README.mpc8544ds => board/freescale/mpc8544ds/README (100%)
rename doc/README.mpc8569mds => board/freescale/mpc8569mds/README (100%)
rename doc/README.mpc8572ds => board/freescale/mpc8572ds/README (100%)
rename doc/README.mpc8610hpcd => board/freescale/mpc8610hpcd/README (100%)
rename doc/README.mpc8641hpcn => board/freescale/mpc8641hpcn/README (100%)
rename doc/README.mx35pdk => board/freescale/mx35pdk/README (100%)
rename doc/README.mx6qsabrelite => board/freescale/mx6qsabrelite/README (100%)
rename doc/README.p1022ds => board/freescale/p1022ds/README (100%)
rename doc/README.p1023rds => board/freescale/p1023rds/README (100%)
rename doc/README.p2020rdb => board/freescale/p1_p2_rdb/README (100%)
rename doc/README.p1_p2_rdb_pc => board/freescale/p1_p2_rdb_pc/README (100%)
rename doc/README.p2041rdb => board/freescale/p2041rdb/README (100%)
rename doc/README.p3060qds => board/freescale/p3060qds/README (100%)
rename doc/README.IceCube => board/icecube/README (100%)
rename {doc => board/icecube}/README.Lite5200B_low_power (100%)
rename doc/README.INCA-IP => board/incaip/README (100%)
rename doc/README.IPHASE4539 => board/iphase4539/README (100%)
rename {doc => board/keymile/km83xx}/README.kmeter1 (100%)
rename doc/README.korat => board/korat/README (100%)
rename doc/README.mergerbox => board/matrix_vision/mergerbox/README (100%)
rename {doc => board/matrix_vision/mvbc_p}/README.mvbc_p (100%)
rename {doc => board/matrix_vision/mvblm7}/README.mvblm7 (100%)
rename {doc => board/matrix_vision/mvsmr}/README.mvsmr (100%)
rename doc/README.MBX => board/mbx8xx/README (100%)
rename doc/README.PIP405 => board/mpl/pip405/README (100%)
rename doc/README.phytec.pcm030 => board/phytec/pcm030/README (100%)
rename {doc => board/renesas/sh7757lcr}/README.sh7757lcr (100%)
rename {doc => board/renesas/sh7785lcr}/README.sh7785lcr (100%)
rename {doc => board/sandbox/sandbox}/README.sandbox (100%)
rename doc/README.sbc8349 => board/sbc8349/README (100%)
rename doc/README.sbc8548 => board/sbc8548/README (100%)
rename doc/README.SBC8560 => board/sbc8560/README (100%)
rename doc/README.sbc8641d => board/sbc8641d/README (100%)
rename {doc => board/sheldon/simpc8313}/README.simpc8313 (100%)
rename {doc => board/st/nhk8815}/README.nhk8815 (100%)
rename {doc => board/stx/stxxtc}/README.stxxtc (100%)
rename {doc => board/ti/omap730p2}/README.omap730p2 (100%)
rename doc/README.timll => board/timll/devkit8000/README (100%)
rename doc/README.TQM8260 => board/tqc/tqm8260/README (100%)
rename doc/README.xpedite1k => board/xes/xpedite1000/README (100%)
rename doc/README.zeus => board/zeus/README (100%)
delete mode 100644 doc/README.OXC
delete mode 100644 doc/README.Sandpoint8240
delete mode 100644 doc/README.amigaone
delete mode 100644 doc/README.p4080ds
delete mode 100644 doc/README.qemu_mips
diff --git a/doc/README.ag101 b/board/AndesTech/adp-ag101/README
similarity index 100%
rename from doc/README.ag101
rename to board/AndesTech/adp-ag101/README
diff --git a/doc/README.db64360 b/board/Marvell/db64360/README
similarity index 100%
rename from doc/README.db64360
rename to board/Marvell/db64360/README
diff --git a/doc/README.db64460 b/board/Marvell/db64460/README
similarity index 100%
rename from doc/README.db64460
rename to board/Marvell/db64460/README
diff --git a/doc/README.RPXClassic b/board/RPXClassic/README
similarity index 100%
rename from doc/README.RPXClassic
rename to board/RPXClassic/README
diff --git a/doc/README.RPXlite b/board/RPXlite/README
similarity index 100%
rename from doc/README.RPXlite
rename to board/RPXlite/README
diff --git a/doc/README.PlanetCore b/board/RPXlite/README.PlanetCore
similarity index 100%
rename from doc/README.PlanetCore
rename to board/RPXlite/README.PlanetCore
diff --git a/doc/README.alaska8220 b/board/alaska/README
similarity index 100%
rename from doc/README.alaska8220
rename to board/alaska/README
diff --git a/doc/README.bamboo b/board/amcc/bamboo/README
similarity index 100%
rename from doc/README.bamboo
rename to board/amcc/bamboo/README
diff --git a/doc/README.ebony b/board/amcc/ebony/README
similarity index 100%
rename from doc/README.ebony
rename to board/amcc/ebony/README
diff --git a/doc/README.ocotea b/board/amcc/ocotea/README.ocotea
similarity index 100%
rename from doc/README.ocotea
rename to board/amcc/ocotea/README.ocotea
diff --git a/doc/README.ocotea-PIBS-to-U-Boot b/board/amcc/ocotea/README.ocotea-PIBS-to-U-Boot
similarity index 100%
rename from doc/README.ocotea-PIBS-to-U-Boot
rename to board/amcc/ocotea/README.ocotea-PIBS-to-U-Boot
diff --git a/doc/README-integrator b/board/armltd/integrator/README
similarity index 100%
rename from doc/README-integrator
rename to board/armltd/integrator/README
diff --git a/doc/README.cmi b/board/cmi/README
similarity index 100%
rename from doc/README.cmi
rename to board/cmi/README
diff --git a/doc/README.COBRA5272 b/board/cobra5272/README
similarity index 100%
rename from doc/README.COBRA5272
rename to board/cobra5272/README
diff --git a/doc/README.hawkboard b/board/davinci/da8xxevm/README.hawkboard
similarity index 100%
rename from doc/README.hawkboard
rename to board/davinci/da8xxevm/README.hawkboard
diff --git a/doc/README.dnp5370 b/board/dnp5370/README
similarity index 100%
rename from doc/README.dnp5370
rename to board/dnp5370/README
diff --git a/doc/README.evb64260 b/board/evb64260/README
similarity index 100%
rename from doc/README.evb64260
rename to board/evb64260/README
diff --git a/doc/README.EVB-64260-750CX b/board/evb64260/README.EVB-64260-750CX
similarity index 100%
rename from doc/README.EVB-64260-750CX
rename to board/evb64260/README.EVB-64260-750CX
diff --git a/doc/README.fads b/board/fads/README
similarity index 100%
rename from doc/README.fads
rename to board/fads/README
diff --git a/doc/README.m52277evb b/board/freescale/m52277evb/README
similarity index 100%
rename from doc/README.m52277evb
rename to board/freescale/m52277evb/README
diff --git a/doc/README.m5253evbe b/board/freescale/m5253evbe/README
similarity index 100%
rename from doc/README.m5253evbe
rename to board/freescale/m5253evbe/README
diff --git a/doc/README.m53017evb b/board/freescale/m53017evb/README
similarity index 100%
rename from doc/README.m53017evb
rename to board/freescale/m53017evb/README
diff --git a/doc/README.m5373evb b/board/freescale/m5373evb/README
similarity index 100%
rename from doc/README.m5373evb
rename to board/freescale/m5373evb/README
diff --git a/doc/README.m54455evb b/board/freescale/m54455evb/README
similarity index 100%
rename from doc/README.m54455evb
rename to board/freescale/m54455evb/README
diff --git a/doc/README.m5475evb b/board/freescale/m547xevb/README
similarity index 100%
rename from doc/README.m5475evb
rename to board/freescale/m547xevb/README
diff --git a/doc/README.mpc7448hpc2 b/board/freescale/mpc7448hpc2/README
similarity index 100%
rename from doc/README.mpc7448hpc2
rename to board/freescale/mpc7448hpc2/README
diff --git a/doc/README.mpc8313erdb b/board/freescale/mpc8313erdb/README
similarity index 100%
rename from doc/README.mpc8313erdb
rename to board/freescale/mpc8313erdb/README
diff --git a/doc/README.mpc8315erdb b/board/freescale/mpc8315erdb/README
similarity index 100%
rename from doc/README.mpc8315erdb
rename to board/freescale/mpc8315erdb/README
diff --git a/doc/README.mpc8323erdb b/board/freescale/mpc8323erdb/README
similarity index 100%
rename from doc/README.mpc8323erdb
rename to board/freescale/mpc8323erdb/README
diff --git a/doc/README.mpc832xemds b/board/freescale/mpc832xemds/README
similarity index 100%
rename from doc/README.mpc832xemds
rename to board/freescale/mpc832xemds/README
diff --git a/doc/README.mpc8349itx b/board/freescale/mpc8349itx/README
similarity index 100%
rename from doc/README.mpc8349itx
rename to board/freescale/mpc8349itx/README
diff --git a/doc/README.mpc8360emds b/board/freescale/mpc8360emds/README
similarity index 100%
rename from doc/README.mpc8360emds
rename to board/freescale/mpc8360emds/README
diff --git a/doc/README.mpc837xemds b/board/freescale/mpc837xemds/README
similarity index 100%
rename from doc/README.mpc837xemds
rename to board/freescale/mpc837xemds/README
diff --git a/doc/README.mpc837xerdb b/board/freescale/mpc837xerdb/README
similarity index 100%
rename from doc/README.mpc837xerdb
rename to board/freescale/mpc837xerdb/README
diff --git a/doc/README.mpc8536ds b/board/freescale/mpc8536ds/README
similarity index 100%
rename from doc/README.mpc8536ds
rename to board/freescale/mpc8536ds/README
diff --git a/doc/README.mpc8544ds b/board/freescale/mpc8544ds/README
similarity index 100%
rename from doc/README.mpc8544ds
rename to board/freescale/mpc8544ds/README
diff --git a/doc/README.mpc8569mds b/board/freescale/mpc8569mds/README
similarity index 100%
rename from doc/README.mpc8569mds
rename to board/freescale/mpc8569mds/README
diff --git a/doc/README.mpc8572ds b/board/freescale/mpc8572ds/README
similarity index 100%
rename from doc/README.mpc8572ds
rename to board/freescale/mpc8572ds/README
diff --git a/doc/README.mpc8610hpcd b/board/freescale/mpc8610hpcd/README
similarity index 100%
rename from doc/README.mpc8610hpcd
rename to board/freescale/mpc8610hpcd/README
diff --git a/doc/README.mpc8641hpcn b/board/freescale/mpc8641hpcn/README
similarity index 100%
rename from doc/README.mpc8641hpcn
rename to board/freescale/mpc8641hpcn/README
diff --git a/doc/README.mx35pdk b/board/freescale/mx35pdk/README
similarity index 100%
rename from doc/README.mx35pdk
rename to board/freescale/mx35pdk/README
diff --git a/doc/README.mx6qsabrelite b/board/freescale/mx6qsabrelite/README
similarity index 100%
rename from doc/README.mx6qsabrelite
rename to board/freescale/mx6qsabrelite/README
diff --git a/doc/README.p1022ds b/board/freescale/p1022ds/README
similarity index 100%
rename from doc/README.p1022ds
rename to board/freescale/p1022ds/README
diff --git a/doc/README.p1023rds b/board/freescale/p1023rds/README
similarity index 100%
rename from doc/README.p1023rds
rename to board/freescale/p1023rds/README
diff --git a/doc/README.p2020rdb b/board/freescale/p1_p2_rdb/README
similarity index 100%
rename from doc/README.p2020rdb
rename to board/freescale/p1_p2_rdb/README
diff --git a/doc/README.p1_p2_rdb_pc b/board/freescale/p1_p2_rdb_pc/README
similarity index 100%
rename from doc/README.p1_p2_rdb_pc
rename to board/freescale/p1_p2_rdb_pc/README
diff --git a/doc/README.p2041rdb b/board/freescale/p2041rdb/README
similarity index 100%
rename from doc/README.p2041rdb
rename to board/freescale/p2041rdb/README
diff --git a/doc/README.p3060qds b/board/freescale/p3060qds/README
similarity index 100%
rename from doc/README.p3060qds
rename to board/freescale/p3060qds/README
diff --git a/doc/README.IceCube b/board/icecube/README
similarity index 100%
rename from doc/README.IceCube
rename to board/icecube/README
diff --git a/doc/README.Lite5200B_low_power b/board/icecube/README.Lite5200B_low_power
similarity index 100%
rename from doc/README.Lite5200B_low_power
rename to board/icecube/README.Lite5200B_low_power
diff --git a/doc/README.INCA-IP b/board/incaip/README
similarity index 100%
rename from doc/README.INCA-IP
rename to board/incaip/README
diff --git a/doc/README.IPHASE4539 b/board/iphase4539/README
similarity index 100%
rename from doc/README.IPHASE4539
rename to board/iphase4539/README
diff --git a/doc/README.kmeter1 b/board/keymile/km83xx/README.kmeter1
similarity index 100%
rename from doc/README.kmeter1
rename to board/keymile/km83xx/README.kmeter1
diff --git a/doc/README.korat b/board/korat/README
similarity index 100%
rename from doc/README.korat
rename to board/korat/README
diff --git a/doc/README.mergerbox b/board/matrix_vision/mergerbox/README
similarity index 100%
rename from doc/README.mergerbox
rename to board/matrix_vision/mergerbox/README
diff --git a/doc/README.mvbc_p b/board/matrix_vision/mvbc_p/README.mvbc_p
similarity index 100%
rename from doc/README.mvbc_p
rename to board/matrix_vision/mvbc_p/README.mvbc_p
diff --git a/doc/README.mvblm7 b/board/matrix_vision/mvblm7/README.mvblm7
similarity index 100%
rename from doc/README.mvblm7
rename to board/matrix_vision/mvblm7/README.mvblm7
diff --git a/doc/README.mvsmr b/board/matrix_vision/mvsmr/README.mvsmr
similarity index 100%
rename from doc/README.mvsmr
rename to board/matrix_vision/mvsmr/README.mvsmr
diff --git a/doc/README.MBX b/board/mbx8xx/README
similarity index 100%
rename from doc/README.MBX
rename to board/mbx8xx/README
diff --git a/doc/README.PIP405 b/board/mpl/pip405/README
similarity index 100%
rename from doc/README.PIP405
rename to board/mpl/pip405/README
diff --git a/doc/README.phytec.pcm030 b/board/phytec/pcm030/README
similarity index 100%
rename from doc/README.phytec.pcm030
rename to board/phytec/pcm030/README
diff --git a/board/qemu-mips/README b/board/qemu-mips/README
index 565241b..9fd97e1 100644
--- a/board/qemu-mips/README
+++ b/board/qemu-mips/README
@@ -13,3 +13,170 @@ Derived from au1x00 with a lot of things cut out.
Supports emulated flash (patch Jean-Christophe PLAGNIOL-VILLARD) with
recent qemu versions. When using emulated flash, launch with
-pflash <filename> and erase mips_bios.bin.
+
+
+
+Notes for the Qemu MIPS port
+----------------------------
+
+I) Example usage:
+
+# ln -s u-boot.bin mips_bios.bin
+start it:
+qemu-system-mips -L . /dev/null -nographic
+
+or
+
+if you use a qemu version after commit 4224
+
+create image:
+# dd of=flash bs=1k count=4k if=/dev/zero
+# dd of=flash bs=1k conv=notrunc if=u-boot.bin
+start it:
+# qemu-system-mips -M mips -pflash flash -monitor null -nographic
+
+2) Download kernel + initrd
+
+On ftp://ftp.denx.de/pub/contrib/Jean-Christophe_Plagniol-Villard/qemu_mips/
+you can downland
+
+#config to build the kernel
+qemu_mips_defconfig
+#patch to fix mips interrupt init on 2.6.24.y kernel
+qemu_mips_kernel.patch
+initrd.gz
+vmlinux
+vmlinux.bin
+System.map
+
+4) Generate uImage
+
+# tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage
+
+5) Copy uImage to Flash
+# dd if=uImage bs=1k conv=notrunc seek=224 of=flash
+
+6) Generate Ide Disk
+
+# dd of=ide bs=1k cout=100k if=/dev/zero
+
+# sfdisk -C 261 -d ide
+# partition table of ide
+unit: sectors
+
+ ide1 : start= 63, size= 32067, Id=83
+ ide2 : start= 32130, size= 32130, Id=83
+ ide3 : start= 64260, size= 4128705, Id=83
+ ide4 : start= 0, size= 0, Id= 0
+
+7) Copy to ide
+
+# dd if=uImage bs=512 conv=notrunc seek=63 of=ide
+
+8) Generate ext2 on part 2 on Copy uImage and initrd.gz
+
+# Attached as loop device ide offset = 32130 * 512
+# losetup -o 16450560 -f ide
+# Format as ext2 ( arg2 : nb blocks)
+# mke2fs /dev/loop0 16065
+# losetup -d /dev/loop0
+# Mount and copy uImage and initrd.gz to it
+# mount -o loop,offset=16450560 -t ext2 ide /mnt
+# mkdir /mnt/boot
+# cp {initrd.gz,uImage} /mnt/boot/
+# Umount it
+# umount /mnt
+
+9) Set Environment
+
+setenv rd_start 0x80800000
+setenv rd_size 2663940
+setenv kernel BFC38000
+setenv oad_addr 80500000
+setenv load_addr2 80F00000
+setenv kernel_flash BFC38000
+setenv load_addr_hello 80200000
+setenv bootargs 'root=/dev/ram0 init=/bin/sh'
+setenv load_rd_ext2 'ide res; ext2load ide 0:2 ${rd_start} /boot/initrd.gz'
+setenv load_rd_tftp 'tftp ${rd_start} /initrd.gz'
+setenv load_kernel_hda 'ide res; diskboot ${load_addr} 0:2'
+setenv load_kernel_ext2 'ide res; ext2load ide 0:2 ${load_addr} /boot/uImage'
+setenv load_kernel_tftp 'tftp ${load_addr} /qemu_mips/uImage'
+setenv boot_ext2_ext2 'run load_rd_ext2; run load_kernel_ext2; run addmisc; bootm ${load_addr}'
+setenv boot_ext2_flash 'run load_rd_ext2; run addmisc; bootm ${kernel_flash}'
+setenv boot_ext2_hda 'run load_rd_ext2; run load_kernel_hda; run addmisc; bootm ${load_addr}'
+setenv boot_ext2_tftp 'run load_rd_ext2; run load_kernel_tftp; run addmisc; bootm ${load_addr}'
+setenv boot_tftp_hda 'run load_rd_tftp; run load_kernel_hda; run addmisc; bootm ${load_addr}'
+setenv boot_tftp_ext2 'run load_rd_tftp; run load_kernel_ext2; run addmisc; bootm ${load_addr}'
+setenv boot_tftp_flash 'run load_rd_tftp; run addmisc; bootm ${kernel_flash}'
+setenv boot_tftp_tftp 'run load_rd_tftp; run load_kernel_tftp; run addmisc; bootm ${load_addr}'
+setenv load_hello_tftp 'tftp ${load_addr_hello} /examples/hello_world.bin'
+setenv go_tftp 'run load_hello_tftp; go ${load_addr_hello}'
+setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}'
+setenv bootcmd 'run boot_tftp_flash'
+
+10) Now you can boot from flash, ide, ide+ext2 and tfp
+
+# qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
+
+II) How to debug U-Boot
+
+In order to debug U-Boot you need to start qemu with gdb server support (-s)
+and waiting the connection to start the CPU (-S)
+
+# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
+
+in an other console you start gdb
+
+1) Debugging of U-Boot Before Relocation
+
+Before relocation, the addresses in the ELF file can be used without any problems
+by connecting to the gdb server localhost:1234
+
+# mipsel-unknown-linux-gnu-gdb u-boot
+GNU gdb 6.6
+Copyright (C) 2006 Free Software Foundation, Inc.
+GDB is free software, covered by the GNU General Public License, and you are
+welcome to change it and/or distribute copies of it under certain conditions.
+Type "show copying" to see the conditions.
+There is absolutely no warranty for GDB. Type "show warranty" for details.
+This GDB was configured as "--host=i486-linux-gnu --target=mipsel-unknown-linux-gnu"...
+(gdb) target remote localhost:1234
+Remote debugging using localhost:1234
+_start () at start.S:64
+64 RVECENT(reset,0) /* U-boot entry point */
+Current language: auto; currently asm
+(gdb) b board.c:289
+Breakpoint 1 at 0xbfc00cc8: file board.c, line 289.
+(gdb) c
+Continuing.
+
+Breakpoint 1, board_init_f (bootflag=<value optimized out>) at board.c:290
+290 relocate_code (addr_sp, id, addr);
+Current language: auto; currently c
+(gdb) p/x addr
+$1 = 0x87fa0000
+
+2) Debugging of U-Boot After Relocation
+
+For debugging U-Boot after relocation we need to know the address to which
+U-Boot relocates itself to 0x87fa0000 by default.
+And replace the symbol table to this offset.
+
+(gdb) symbol-file
+Discard symbol table from `/private/u-boot-arm/u-boot'? (y or n) y
+Error in re-setting breakpoint 1:
+No symbol table is loaded. Use the "file" command.
+No symbol file now.
+(gdb) add-symbol-file u-boot 0x87fa0000
+add symbol table from file "u-boot" at
+ .text_addr = 0x87fa0000
+(y or n) y
+Reading symbols from /private/u-boot-arm/u-boot...done.
+Breakpoint 1 at 0x87fa0cc8: file board.c, line 289.
+(gdb) c
+Continuing.
+
+Program received signal SIGINT, Interrupt.
+0xffffffff87fa0de4 in udelay (usec=<value optimized out>) at time.c:78
+78 while ((tmo - read_c0_count()) < 0x7fffffff)
diff --git a/doc/README.sh7757lcr b/board/renesas/sh7757lcr/README.sh7757lcr
similarity index 100%
rename from doc/README.sh7757lcr
rename to board/renesas/sh7757lcr/README.sh7757lcr
diff --git a/doc/README.sh7785lcr b/board/renesas/sh7785lcr/README.sh7785lcr
similarity index 100%
rename from doc/README.sh7785lcr
rename to board/renesas/sh7785lcr/README.sh7785lcr
diff --git a/doc/README.sandbox b/board/sandbox/sandbox/README.sandbox
similarity index 100%
rename from doc/README.sandbox
rename to board/sandbox/sandbox/README.sandbox
diff --git a/board/sandpoint/README b/board/sandpoint/README
index 9e48168..a2e0831 100644
--- a/board/sandpoint/README
+++ b/board/sandpoint/README
@@ -13,3 +13,401 @@ seem to maintain it any more. I can be reached by mail as
tkoeller(a)gmx.net.
Thomas Koeller
+
+
+
+
+The port was tested on a Sandpoint 8240 X3 board, with U-Boot
+installed in the flash memory of the CPU card. Please use the
+following DIP switch settings:
+
+Motherboard:
+
+SW1.1: on SW1.2: on SW1.3: on SW1.4: on
+SW1.5: on SW1.6: on SW1.7: on SW1.8: on
+
+SW2.1: on SW2.2: on SW2.3: on SW2.4: on
+SW2.5: on SW2.6: on SW2.7: on SW2.8: on
+
+
+CPU Card:
+
+SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on
+SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF
+
+SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF
+SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on
+
+
+The followind detailed description of installation and initial steps
+with U-Boot and QNX was provided by Jim Sandoz <sandoz(a)lucent.com>:
+
+
+Directions for installing U-Boot on Sandpoint+Unity8240
+using the Abatron BDI2000 BDM/JTAG debugger ...
+
+Background and Reference info:
+http://u-boot.sourceforge.net/
+http://www.abatron.ch/
+http://www.abatron.ch/BDI/bdihw.html
+http://www.abatron.ch/DataSheets/BDI2000.pdf
+http://www.abatron.ch/Manuals/ManGdbCOP-2000C.pdf
+http://e-www.motorola.com/collateral/SPX3UM.pdf
+http://e-www.motorola.com/collateral/UNITYX4CONFIG.pdf
+
+
+Connection Diagram:
+ ===========
+ === ===== |----- |
+| | <---------------> | | | | |
+|PC | rs232 | BDI |=============[] | |
+| | |2000 | BDM probe | | |
+| | <---------------> | | |----- |
+ === ethernet ===== | |
+ | |
+ ===========
+ Sandpoint X3 with
+ Unity 8240 proc
+
+
+PART 1)
+ DIP Switch Settings:
+
+Sandpoint X3 8240 processor board DIP switch settings, with
+U-Boot to be installed in the flash memory of the CPU card:
+
+Motorola Sandpoint X3 Motherboard:
+SW1.1: on SW1.2: on SW1.3: on SW1.4: on
+SW1.5: on SW1.6: on SW1.7: on SW1.8: on
+SW2.1: on SW2.2: on SW2.3: on SW2.4: on
+SW2.5: on SW2.6: on SW2.7: on SW2.8: on
+
+Motorola Unity 8240 CPU Card:
+SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on
+SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF
+SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF
+SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on
+
+
+PART 2)
+ Connect the BDI2000 Cable to the Sandpoint/Unity 8240:
+
+BDM Pin 1 on the Unity 8240 processor board is towards the
+PCI PMC connectors, or away from the socketed SDRAM, i.e.:
+
+ ====================
+ | ---------------- |
+ | | SDRAM | |
+ | | | |
+ | ---------------- |
+ | |~| |
+ | |B| ++++++ |
+ | |D| + uP + |
+ | |M| +8240+ |
+ | ~ 1 ++++++ |
+ | |
+ | |
+ | |
+ | PMC conn ====== |
+ | ===== ====== |
+ | |
+ ====================
+
+
+PART 3)
+ Setting up the BDI2000, and preparing for TCP/IP network comms:
+
+Connect the BDI2000 to the PC using the supplied serial cable.
+Download the BDI2000 software and install it using setup.exe.
+
+[Note: of course you can also use the Linux command line tool
+"bdisetup" to configure your BDI2000 - the sources are included on
+the floppy disk that comes with your BDI2000. Just in case you don't
+have any Windows PC's - like me :-) -- wd ]
+
+Power up the BDI2000; then follow directions to assign the IP
+address and related network information. Note that U-Boot
+will be loaded to the Sandpoint via tftp. You need to either
+use the Abatron-provided tftp application or provide a tftp
+server (e.g. Linux/Solaris/*BSD) somewhere on your network.
+Once the IP address etc are assigned via the RS232 port,
+further communication with the BDI2000 will happen via the
+ethernet connection.
+
+PART 4)
+ Making a TCP/IP network connection to the Abatron BDI2000:
+
+Telnet to the Abatron BDI2000. Assuming that all of the
+networking info was loaded via RS232 correctly, you will see
+the following (scrolling):
+
+- TARGET: waiting for target Vcc
+- TARGET: waiting for target Vcc
+
+
+PART 5)
+ Power up the target Sandpoint:
+If the BDM connections are correct, the following will now appear:
+
+- TARGET: waiting for target Vcc
+- TARGET: waiting for target Vcc
+- TARGET: processing power-up delay
+- TARGET: processing user reset request
+- BDI asserts HRESET
+- Reset JTAG controller passed
+- Bypass check: 0x55 => 0xAA
+- Bypass check: 0x55 => 0xAA
+- JTAG exists check passed
+- Target PVR is 0x00810101
+- COP status is 0x01
+- Check running state passed
+- BDI scans COP freeze command
+- BDI removes HRESET
+- COP status is 0x05
+- Check stopped state passed
+- Check LSRL length passed
+- BDI sets breakpoint at 0xFFF00100
+- BDI resumes program execution
+- Waiting for target stop passed
+- TARGET: Target PVR is 0x00810101
+- TARGET: reseting target passed
+- TARGET: processing target startup ....
+- TARGET: processing target startup passed
+BDI>
+
+
+PART 6)
+ Erase the current contents of the flash memory:
+
+BDI>era 0xFFF00000
+ Erasing flash at 0xfff00000
+ Erasing flash passed
+BDI>era 0xFFF04000
+ Erasing flash at 0xfff04000
+ Erasing flash passed
+BDI>era 0xFFF06000
+ Erasing flash at 0xfff06000
+ Erasing flash passed
+BDI>era 0xFFF08000
+ Erasing flash at 0xfff08000
+ Erasing flash passed
+BDI>era 0xFFF10000
+ Erasing flash at 0xfff10000
+ Erasing flash passed
+BDI>era 0xFFF20000
+ Erasing flash at 0xfff20000
+ Erasing flash passed
+
+
+PART 7)
+ Program the flash memory with the U-Boot image:
+
+BDI>prog 0xFFF00000 u-boot.bin bin
+ Programming u-boot.bin , please wait ....
+ Programming flash passed
+
+
+PART 8)
+ Connect PC to Sandpoint:
+Using a crossover serial cable, attach the PC serial port to the
+Sandpoint's COM1. Set communications parameters to 8N1 / 9600 baud.
+
+
+PART 9)
+ Reset the Unity and begin U-Boot execution:
+
+BDI>reset
+- TARGET: processing user reset request
+- TARGET: Target PVR is 0x00810101
+- TARGET: reseting target passed
+- TARGET: processing target init list ....
+- TARGET: processing target init list passed
+
+BDI>go
+
+Now see output from U-Boot running, sent via serial port:
+
+U-Boot 1.1.4 (Jan 23 2002 - 18:29:19)
+
+CPU: MPC8240 Revision 1.1 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: Sandpoint 8240 Unity
+DRAM: 64 MB
+FLASH: 2 MB
+PCI: scanning bus0 ...
+ bus dev fn venID devID class rev MBAR0 MBAR1 IPIN ILINE
+ 00 00 00 1057 0003 060000 13 00000008 00000000 01 00
+ 00 0b 00 10ad 0565 060100 10 00000000 00000000 00 00
+ 00 0f 00 8086 1229 020000 08 80000000 80000001 01 00
+In: serial
+Out: serial
+Err: serial
+=>
+
+
+PART 10)
+ Set and save any required environmental variables, examples of some:
+
+=> setenv ethaddr 00:03:47:97:D0:79
+=> setenv bootfile your_qnx_image_here
+=> setenv hostname sandpointX
+=> setenv netmask 255.255.255.0
+=> setenv ipaddr 192.168.0.11
+=> setenv serverip 192.168.0.10
+=> setenv gatewayip=192.168.0.1
+=> saveenv
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=>
+
+**** Example environment: ****
+
+=> printenv
+baudrate=9600
+bootfile=telemetry
+hostname=sp1
+ethaddr=00:03:47:97:E4:6B
+load=tftp 100000 u-boot.bin
+update=protect off all;era FFF00000 FFF3FFFF;cp.b 100000 FFF00000 ${filesize};saveenv
+filesize=1f304
+gatewayip=145.17.228.1
+netmask=255.255.255.0
+ipaddr=145.17.228.42
+serverip=145.17.242.46
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 332/8188 bytes
+=>
+
+here's some text useful stuff for cut-n-paste:
+setenv hostname sandpoint1
+setenv netmask 255.255.255.0
+setenv ipaddr 145.17.228.81
+setenv serverip 145.17.242.46
+setenv gatewayip 145.17.228.1
+saveenv
+
+PART 11)
+ Test U-Boot by tftp'ing new U-Boot, overwriting current:
+
+=> protect off all
+Un-Protect Flash Bank # 1
+=> tftp 100000 u-boot.bin
+eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
+ARP broadcast 1
+TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
+ gateway 145.17.228.1
+Filename 'u-boot.bin'.
+Load address: 0x100000
+Loading: #########################
+done
+Bytes transferred = 127628 (1f28c hex)
+=> era all
+Erase Flash Bank # 1
+ done
+Erase Flash Bank # 2 - missing
+=> cp.b 0x100000 FFF00000 1f28c
+Copy to Flash... done
+=> saveenv
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=> reset
+
+You can put these commands into some environment variables;
+
+=> setenv load tftp 100000 u-boot.bin
+=> setenv update protect off all\;era FFF00000 FFF3FFFF\;cp.b 100000 FFF00000 \${filesize}\;saveenv
+=> saveenv
+
+Then you just have to type "run load" then "run update"
+
+=> run load
+eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
+ARP broadcast 1
+TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
+ gateway 145.17.228.1
+Filename 'u-boot.bin'.
+Load address: 0x100000
+Loading: #########################
+done
+Bytes transferred = 127748 (1f304 hex)
+=> run update
+Un-Protect Flash Bank # 1
+Un-Protect Flash Bank # 2
+Erase Flash from 0xfff00000 to 0xfff3ffff
+ done
+Erased 7 sectors
+Copy to Flash... done
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=>
+
+
+PART 12)
+ Load OS image (ELF format) via U-Boot using tftp
+
+
+=> tftp 800000 sandpoint-simple.elf
+eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
+ARP broadcast 1
+TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
+ gateway 145.17.228.1
+Filename 'sandpoint-simple.elf'.
+Load address: 0x800000
+Loading: #################################################################
+ #################################################################
+ #################################################################
+ ########################
+done
+Bytes transferred = 1120284 (11181c hex)
+==>
+
+PART 13)
+ Begin OS image execution: (note that unless you have the
+serial parameters of your OS image set to 9600 (i.e. same as
+the U-Boot binary) you will get garbage here until you change
+the serial communications speed.
+
+=> bootelf 800000
+Loading @ 0x001f0100 (1120028 bytes)
+## Starting application at 0x001f1d28 ...
+Replace init_hwinfo() with a board specific version
+
+Loading QNX6....
+
+Header size=0x0000009c, Total Size=0x000005c0, #Cpu=1, Type=1
+<...loader and kernel messages snipped...>
+
+Welcome to Neutrino on the Sandpoint
+#
+
+
+other information:
+
+CVS Retrieval Notes:
+
+U-Boot's SourceForge CVS repository can be checked out
+through anonymous (pserver) CVS with the following
+instruction set. The module you wish to check out must
+be specified as the modulename. When prompted for a
+password for anonymous, simply press the Enter key.
+
+cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
+
+cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
diff --git a/doc/README.sbc8349 b/board/sbc8349/README
similarity index 100%
rename from doc/README.sbc8349
rename to board/sbc8349/README
diff --git a/doc/README.sbc8548 b/board/sbc8548/README
similarity index 100%
rename from doc/README.sbc8548
rename to board/sbc8548/README
diff --git a/doc/README.SBC8560 b/board/sbc8560/README
similarity index 100%
rename from doc/README.SBC8560
rename to board/sbc8560/README
diff --git a/doc/README.sbc8641d b/board/sbc8641d/README
similarity index 100%
rename from doc/README.sbc8641d
rename to board/sbc8641d/README
diff --git a/doc/README.simpc8313 b/board/sheldon/simpc8313/README.simpc8313
similarity index 100%
rename from doc/README.simpc8313
rename to board/sheldon/simpc8313/README.simpc8313
diff --git a/doc/README.nhk8815 b/board/st/nhk8815/README.nhk8815
similarity index 100%
rename from doc/README.nhk8815
rename to board/st/nhk8815/README.nhk8815
diff --git a/doc/README.stxxtc b/board/stx/stxxtc/README.stxxtc
similarity index 100%
rename from doc/README.stxxtc
rename to board/stx/stxxtc/README.stxxtc
diff --git a/doc/README.omap730p2 b/board/ti/omap730p2/README.omap730p2
similarity index 100%
rename from doc/README.omap730p2
rename to board/ti/omap730p2/README.omap730p2
diff --git a/doc/README.timll b/board/timll/devkit8000/README
similarity index 100%
rename from doc/README.timll
rename to board/timll/devkit8000/README
diff --git a/doc/README.TQM8260 b/board/tqc/tqm8260/README
similarity index 100%
rename from doc/README.TQM8260
rename to board/tqc/tqm8260/README
diff --git a/doc/README.xpedite1k b/board/xes/xpedite1000/README
similarity index 100%
rename from doc/README.xpedite1k
rename to board/xes/xpedite1000/README
diff --git a/doc/README.zeus b/board/zeus/README
similarity index 100%
rename from doc/README.zeus
rename to board/zeus/README
diff --git a/doc/README.OXC b/doc/README.OXC
deleted file mode 100644
index c5db5f8..0000000
--- a/doc/README.OXC
+++ /dev/null
@@ -1,24 +0,0 @@
-This document contains different information about the port
-of U-Boot for the OXC board designed by Lucent Technologies,
-Inc.
-
-1. Showing activity
-
-U-Boot for the OXC board can show its current status using
-the Active LED. This feature is configured by the following
-options:
-
-CONFIG_SHOW_ACTIVITY
-
- When this option is on, the Active LED is blinking fast
-when U-Boot runs in the idle loop (i.e. waits for user
-commands from serial console) and blinking slow when it
-downloads an image over network. When U-Boot loads an image
-over serial line the Active LED does not blink and its state
-is random (i.e. either constant on or constant off).
-
-CONFIG_SHOW_BOOT_PROGRESS
-
- When this option is on, U-Boot switches the Active LED
-off before booting an image and switches it on if booting
-failed due to some reasons.
diff --git a/doc/README.Sandpoint8240 b/doc/README.Sandpoint8240
deleted file mode 100644
index fa846dc..0000000
--- a/doc/README.Sandpoint8240
+++ /dev/null
@@ -1,394 +0,0 @@
-The port was tested on a Sandpoint 8240 X3 board, with U-Boot
-installed in the flash memory of the CPU card. Please use the
-following DIP switch settings:
-
-Motherboard:
-
-SW1.1: on SW1.2: on SW1.3: on SW1.4: on
-SW1.5: on SW1.6: on SW1.7: on SW1.8: on
-
-SW2.1: on SW2.2: on SW2.3: on SW2.4: on
-SW2.5: on SW2.6: on SW2.7: on SW2.8: on
-
-
-CPU Card:
-
-SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on
-SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF
-
-SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF
-SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on
-
-
-The followind detailed description of installation and initial steps
-with U-Boot and QNX was provided by Jim Sandoz <sandoz(a)lucent.com>:
-
-
-Directions for installing U-Boot on Sandpoint+Unity8240
-using the Abatron BDI2000 BDM/JTAG debugger ...
-
-Background and Reference info:
-http://u-boot.sourceforge.net/
-http://www.abatron.ch/
-http://www.abatron.ch/BDI/bdihw.html
-http://www.abatron.ch/DataSheets/BDI2000.pdf
-http://www.abatron.ch/Manuals/ManGdbCOP-2000C.pdf
-http://e-www.motorola.com/collateral/SPX3UM.pdf
-http://e-www.motorola.com/collateral/UNITYX4CONFIG.pdf
-
-
-Connection Diagram:
- ===========
- === ===== |----- |
-| | <---------------> | | | | |
-|PC | rs232 | BDI |=============[] | |
-| | |2000 | BDM probe | | |
-| | <---------------> | | |----- |
- === ethernet ===== | |
- | |
- ===========
- Sandpoint X3 with
- Unity 8240 proc
-
-
-PART 1)
- DIP Switch Settings:
-
-Sandpoint X3 8240 processor board DIP switch settings, with
-U-Boot to be installed in the flash memory of the CPU card:
-
-Motorola Sandpoint X3 Motherboard:
-SW1.1: on SW1.2: on SW1.3: on SW1.4: on
-SW1.5: on SW1.6: on SW1.7: on SW1.8: on
-SW2.1: on SW2.2: on SW2.3: on SW2.4: on
-SW2.5: on SW2.6: on SW2.7: on SW2.8: on
-
-Motorola Unity 8240 CPU Card:
-SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on
-SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF
-SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF
-SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on
-
-
-PART 2)
- Connect the BDI2000 Cable to the Sandpoint/Unity 8240:
-
-BDM Pin 1 on the Unity 8240 processor board is towards the
-PCI PMC connectors, or away from the socketed SDRAM, i.e.:
-
- ====================
- | ---------------- |
- | | SDRAM | |
- | | | |
- | ---------------- |
- | |~| |
- | |B| ++++++ |
- | |D| + uP + |
- | |M| +8240+ |
- | ~ 1 ++++++ |
- | |
- | |
- | |
- | PMC conn ====== |
- | ===== ====== |
- | |
- ====================
-
-
-PART 3)
- Setting up the BDI2000, and preparing for TCP/IP network comms:
-
-Connect the BDI2000 to the PC using the supplied serial cable.
-Download the BDI2000 software and install it using setup.exe.
-
-[Note: of course you can also use the Linux command line tool
-"bdisetup" to configure your BDI2000 - the sources are included on
-the floppy disk that comes with your BDI2000. Just in case you don't
-have any Windows PC's - like me :-) -- wd ]
-
-Power up the BDI2000; then follow directions to assign the IP
-address and related network information. Note that U-Boot
-will be loaded to the Sandpoint via tftp. You need to either
-use the Abatron-provided tftp application or provide a tftp
-server (e.g. Linux/Solaris/*BSD) somewhere on your network.
-Once the IP address etc are assigned via the RS232 port,
-further communication with the BDI2000 will happen via the
-ethernet connection.
-
-PART 4)
- Making a TCP/IP network connection to the Abatron BDI2000:
-
-Telnet to the Abatron BDI2000. Assuming that all of the
-networking info was loaded via RS232 correctly, you will see
-the following (scrolling):
-
-- TARGET: waiting for target Vcc
-- TARGET: waiting for target Vcc
-
-
-PART 5)
- Power up the target Sandpoint:
-If the BDM connections are correct, the following will now appear:
-
-- TARGET: waiting for target Vcc
-- TARGET: waiting for target Vcc
-- TARGET: processing power-up delay
-- TARGET: processing user reset request
-- BDI asserts HRESET
-- Reset JTAG controller passed
-- Bypass check: 0x55 => 0xAA
-- Bypass check: 0x55 => 0xAA
-- JTAG exists check passed
-- Target PVR is 0x00810101
-- COP status is 0x01
-- Check running state passed
-- BDI scans COP freeze command
-- BDI removes HRESET
-- COP status is 0x05
-- Check stopped state passed
-- Check LSRL length passed
-- BDI sets breakpoint at 0xFFF00100
-- BDI resumes program execution
-- Waiting for target stop passed
-- TARGET: Target PVR is 0x00810101
-- TARGET: reseting target passed
-- TARGET: processing target startup ....
-- TARGET: processing target startup passed
-BDI>
-
-
-PART 6)
- Erase the current contents of the flash memory:
-
-BDI>era 0xFFF00000
- Erasing flash at 0xfff00000
- Erasing flash passed
-BDI>era 0xFFF04000
- Erasing flash at 0xfff04000
- Erasing flash passed
-BDI>era 0xFFF06000
- Erasing flash at 0xfff06000
- Erasing flash passed
-BDI>era 0xFFF08000
- Erasing flash at 0xfff08000
- Erasing flash passed
-BDI>era 0xFFF10000
- Erasing flash at 0xfff10000
- Erasing flash passed
-BDI>era 0xFFF20000
- Erasing flash at 0xfff20000
- Erasing flash passed
-
-
-PART 7)
- Program the flash memory with the U-Boot image:
-
-BDI>prog 0xFFF00000 u-boot.bin bin
- Programming u-boot.bin , please wait ....
- Programming flash passed
-
-
-PART 8)
- Connect PC to Sandpoint:
-Using a crossover serial cable, attach the PC serial port to the
-Sandpoint's COM1. Set communications parameters to 8N1 / 9600 baud.
-
-
-PART 9)
- Reset the Unity and begin U-Boot execution:
-
-BDI>reset
-- TARGET: processing user reset request
-- TARGET: Target PVR is 0x00810101
-- TARGET: reseting target passed
-- TARGET: processing target init list ....
-- TARGET: processing target init list passed
-
-BDI>go
-
-Now see output from U-Boot running, sent via serial port:
-
-U-Boot 1.1.4 (Jan 23 2002 - 18:29:19)
-
-CPU: MPC8240 Revision 1.1 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: Sandpoint 8240 Unity
-DRAM: 64 MB
-FLASH: 2 MB
-PCI: scanning bus0 ...
- bus dev fn venID devID class rev MBAR0 MBAR1 IPIN ILINE
- 00 00 00 1057 0003 060000 13 00000008 00000000 01 00
- 00 0b 00 10ad 0565 060100 10 00000000 00000000 00 00
- 00 0f 00 8086 1229 020000 08 80000000 80000001 01 00
-In: serial
-Out: serial
-Err: serial
-=>
-
-
-PART 10)
- Set and save any required environmental variables, examples of some:
-
-=> setenv ethaddr 00:03:47:97:D0:79
-=> setenv bootfile your_qnx_image_here
-=> setenv hostname sandpointX
-=> setenv netmask 255.255.255.0
-=> setenv ipaddr 192.168.0.11
-=> setenv serverip 192.168.0.10
-=> setenv gatewayip=192.168.0.1
-=> saveenv
-Saving Environment to Flash...
-Un-Protected 1 sectors
-Erasing Flash...
- done
-Erased 1 sectors
-Writing to Flash... done
-Protected 1 sectors
-=>
-
-**** Example environment: ****
-
-=> printenv
-baudrate=9600
-bootfile=telemetry
-hostname=sp1
-ethaddr=00:03:47:97:E4:6B
-load=tftp 100000 u-boot.bin
-update=protect off all;era FFF00000 FFF3FFFF;cp.b 100000 FFF00000 ${filesize};saveenv
-filesize=1f304
-gatewayip=145.17.228.1
-netmask=255.255.255.0
-ipaddr=145.17.228.42
-serverip=145.17.242.46
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 332/8188 bytes
-=>
-
-here's some text useful stuff for cut-n-paste:
-setenv hostname sandpoint1
-setenv netmask 255.255.255.0
-setenv ipaddr 145.17.228.81
-setenv serverip 145.17.242.46
-setenv gatewayip 145.17.228.1
-saveenv
-
-PART 11)
- Test U-Boot by tftp'ing new U-Boot, overwriting current:
-
-=> protect off all
-Un-Protect Flash Bank # 1
-=> tftp 100000 u-boot.bin
-eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
-ARP broadcast 1
-TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
- gateway 145.17.228.1
-Filename 'u-boot.bin'.
-Load address: 0x100000
-Loading: #########################
-done
-Bytes transferred = 127628 (1f28c hex)
-=> era all
-Erase Flash Bank # 1
- done
-Erase Flash Bank # 2 - missing
-=> cp.b 0x100000 FFF00000 1f28c
-Copy to Flash... done
-=> saveenv
-Saving Environment to Flash...
-Un-Protected 1 sectors
-Erasing Flash...
- done
-Erased 1 sectors
-Writing to Flash... done
-Protected 1 sectors
-=> reset
-
-You can put these commands into some environment variables;
-
-=> setenv load tftp 100000 u-boot.bin
-=> setenv update protect off all\;era FFF00000 FFF3FFFF\;cp.b 100000 FFF00000 \${filesize}\;saveenv
-=> saveenv
-
-Then you just have to type "run load" then "run update"
-
-=> run load
-eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
-ARP broadcast 1
-TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
- gateway 145.17.228.1
-Filename 'u-boot.bin'.
-Load address: 0x100000
-Loading: #########################
-done
-Bytes transferred = 127748 (1f304 hex)
-=> run update
-Un-Protect Flash Bank # 1
-Un-Protect Flash Bank # 2
-Erase Flash from 0xfff00000 to 0xfff3ffff
- done
-Erased 7 sectors
-Copy to Flash... done
-Saving Environment to Flash...
-Un-Protected 1 sectors
-Erasing Flash...
- done
-Erased 1 sectors
-Writing to Flash... done
-Protected 1 sectors
-=>
-
-
-PART 12)
- Load OS image (ELF format) via U-Boot using tftp
-
-
-=> tftp 800000 sandpoint-simple.elf
-eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0)
-ARP broadcast 1
-TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through
- gateway 145.17.228.1
-Filename 'sandpoint-simple.elf'.
-Load address: 0x800000
-Loading: #################################################################
- #################################################################
- #################################################################
- ########################
-done
-Bytes transferred = 1120284 (11181c hex)
-==>
-
-PART 13)
- Begin OS image execution: (note that unless you have the
-serial parameters of your OS image set to 9600 (i.e. same as
-the U-Boot binary) you will get garbage here until you change
-the serial communications speed.
-
-=> bootelf 800000
-Loading @ 0x001f0100 (1120028 bytes)
-## Starting application at 0x001f1d28 ...
-Replace init_hwinfo() with a board specific version
-
-Loading QNX6....
-
-Header size=0x0000009c, Total Size=0x000005c0, #Cpu=1, Type=1
-<...loader and kernel messages snipped...>
-
-Welcome to Neutrino on the Sandpoint
-#
-
-
-other information:
-
-CVS Retrieval Notes:
-
-U-Boot's SourceForge CVS repository can be checked out
-through anonymous (pserver) CVS with the following
-instruction set. The module you wish to check out must
-be specified as the modulename. When prompted for a
-password for anonymous, simply press the Enter key.
-
-cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
-
-cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
diff --git a/doc/README.amigaone b/doc/README.amigaone
deleted file mode 100644
index 9975977..0000000
--- a/doc/README.amigaone
+++ /dev/null
@@ -1,12 +0,0 @@
-AmigaOne U-Boot and the SciTech emulator
-
-The directory board/MAI/bios_emulator contains the source code
-of the SciTech x86 emulator. This emulator is normally available
-under a BSD license. However, SciTech kindly gave us permission
-to use their emulator in PPCBoot for the AmigaOne. It's available
-in this form only under GPL.
-
-Thanks to Kendall Bennett and the rest of the team at SciTech.
-See http://www.scitechsoft.com for their web site
-
-The GPL license can be found at http://www.gnu.org/licenses/gpl.html
diff --git a/doc/README.p4080ds b/doc/README.p4080ds
deleted file mode 100644
index 3ed59a8..0000000
--- a/doc/README.p4080ds
+++ /dev/null
@@ -1,32 +0,0 @@
-Overview
---------
-The P4080DS is a Freescale reference board that hosts the eight-core P4080 SOC.
-
-SerDes hwconfig configuration
------------------------------
-The P4080 RCW includes three sets of bits the specify which SerDes lanes
-should be powered down: SRDS_LPD_B1 (for bank one), SRDS_LPD_B2 (for bank two),
-and SRDS_LPD_B3 (for bank three). Each of these contains four bits, one for
-each lane in the bank. SerDes Erratum SERDES8 requires that SRDS_LPD_B2 and
-SRDS_LPD_B3 be set to 0b1111. This forces banks two and three to be powered
-down at reset.
-
-To re-enable these banks in U-Boot, two hwconfig are available:
-"fsl_srds_lpd_b2" and "fsl_srds_lpd_b3". The value passed via fsl_srds_lpd_b2
-is written into SRDS_LPD_B2, and the value passed via fsl_srds_lpd_b3 is into
-SRDS_LPD_B3. Each bit represents one of each bank, and a value of '1'
-indicates that the lane should be powered down.
-
-For example, to indicate that both SerDes banks 2 and 3 are powered down, add
-the following to hwconfig:
-
- serdes:fsl_srds_lpd_b2=0xf,fsl_srds_lpd_b3=0xf
-
-The "0xf" is a mask that corresponds to the 4 lanes A-D. The most significant
-bit corresponds to lane A. To indicate that just lane A of bank 3 is to be
-powered down, use:
-
- serdes:fsl_srds_lpd_b3=8
-
-These options should be specified only if U-Boot does not automatically power
-on the correct lanes.
diff --git a/doc/README.qemu_mips b/doc/README.qemu_mips
deleted file mode 100644
index e6a3855..0000000
--- a/doc/README.qemu_mips
+++ /dev/null
@@ -1,164 +0,0 @@
-
-Notes for the Qemu MIPS port
-
-I) Example usage:
-
-# ln -s u-boot.bin mips_bios.bin
-start it:
-qemu-system-mips -L . /dev/null -nographic
-
-or
-
-if you use a qemu version after commit 4224
-
-create image:
-# dd of=flash bs=1k count=4k if=/dev/zero
-# dd of=flash bs=1k conv=notrunc if=u-boot.bin
-start it:
-# qemu-system-mips -M mips -pflash flash -monitor null -nographic
-
-2) Download kernel + initrd
-
-On ftp://ftp.denx.de/pub/contrib/Jean-Christophe_Plagniol-Villard/qemu_mips/
-you can downland
-
-#config to build the kernel
-qemu_mips_defconfig
-#patch to fix mips interrupt init on 2.6.24.y kernel
-qemu_mips_kernel.patch
-initrd.gz
-vmlinux
-vmlinux.bin
-System.map
-
-4) Generate uImage
-
-# tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage
-
-5) Copy uImage to Flash
-# dd if=uImage bs=1k conv=notrunc seek=224 of=flash
-
-6) Generate Ide Disk
-
-# dd of=ide bs=1k cout=100k if=/dev/zero
-
-# sfdisk -C 261 -d ide
-# partition table of ide
-unit: sectors
-
- ide1 : start= 63, size= 32067, Id=83
- ide2 : start= 32130, size= 32130, Id=83
- ide3 : start= 64260, size= 4128705, Id=83
- ide4 : start= 0, size= 0, Id= 0
-
-7) Copy to ide
-
-# dd if=uImage bs=512 conv=notrunc seek=63 of=ide
-
-8) Generate ext2 on part 2 on Copy uImage and initrd.gz
-
-# Attached as loop device ide offset = 32130 * 512
-# losetup -o 16450560 -f ide
-# Format as ext2 ( arg2 : nb blocks)
-# mke2fs /dev/loop0 16065
-# losetup -d /dev/loop0
-# Mount and copy uImage and initrd.gz to it
-# mount -o loop,offset=16450560 -t ext2 ide /mnt
-# mkdir /mnt/boot
-# cp {initrd.gz,uImage} /mnt/boot/
-# Umount it
-# umount /mnt
-
-9) Set Environment
-
-setenv rd_start 0x80800000
-setenv rd_size 2663940
-setenv kernel BFC38000
-setenv oad_addr 80500000
-setenv load_addr2 80F00000
-setenv kernel_flash BFC38000
-setenv load_addr_hello 80200000
-setenv bootargs 'root=/dev/ram0 init=/bin/sh'
-setenv load_rd_ext2 'ide res; ext2load ide 0:2 ${rd_start} /boot/initrd.gz'
-setenv load_rd_tftp 'tftp ${rd_start} /initrd.gz'
-setenv load_kernel_hda 'ide res; diskboot ${load_addr} 0:2'
-setenv load_kernel_ext2 'ide res; ext2load ide 0:2 ${load_addr} /boot/uImage'
-setenv load_kernel_tftp 'tftp ${load_addr} /qemu_mips/uImage'
-setenv boot_ext2_ext2 'run load_rd_ext2; run load_kernel_ext2; run addmisc; bootm ${load_addr}'
-setenv boot_ext2_flash 'run load_rd_ext2; run addmisc; bootm ${kernel_flash}'
-setenv boot_ext2_hda 'run load_rd_ext2; run load_kernel_hda; run addmisc; bootm ${load_addr}'
-setenv boot_ext2_tftp 'run load_rd_ext2; run load_kernel_tftp; run addmisc; bootm ${load_addr}'
-setenv boot_tftp_hda 'run load_rd_tftp; run load_kernel_hda; run addmisc; bootm ${load_addr}'
-setenv boot_tftp_ext2 'run load_rd_tftp; run load_kernel_ext2; run addmisc; bootm ${load_addr}'
-setenv boot_tftp_flash 'run load_rd_tftp; run addmisc; bootm ${kernel_flash}'
-setenv boot_tftp_tftp 'run load_rd_tftp; run load_kernel_tftp; run addmisc; bootm ${load_addr}'
-setenv load_hello_tftp 'tftp ${load_addr_hello} /examples/hello_world.bin'
-setenv go_tftp 'run load_hello_tftp; go ${load_addr_hello}'
-setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}'
-setenv bootcmd 'run boot_tftp_flash'
-
-10) Now you can boot from flash, ide, ide+ext2 and tfp
-
-# qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
-
-II) How to debug U-Boot
-
-In order to debug U-Boot you need to start qemu with gdb server support (-s)
-and waiting the connection to start the CPU (-S)
-
-# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
-
-in an other console you start gdb
-
-1) Debugging of U-Boot Before Relocation
-
-Before relocation, the addresses in the ELF file can be used without any problems
-by connecting to the gdb server localhost:1234
-
-# mipsel-unknown-linux-gnu-gdb u-boot
-GNU gdb 6.6
-Copyright (C) 2006 Free Software Foundation, Inc.
-GDB is free software, covered by the GNU General Public License, and you are
-welcome to change it and/or distribute copies of it under certain conditions.
-Type "show copying" to see the conditions.
-There is absolutely no warranty for GDB. Type "show warranty" for details.
-This GDB was configured as "--host=i486-linux-gnu --target=mipsel-unknown-linux-gnu"...
-(gdb) target remote localhost:1234
-Remote debugging using localhost:1234
-_start () at start.S:64
-64 RVECENT(reset,0) /* U-boot entry point */
-Current language: auto; currently asm
-(gdb) b board.c:289
-Breakpoint 1 at 0xbfc00cc8: file board.c, line 289.
-(gdb) c
-Continuing.
-
-Breakpoint 1, board_init_f (bootflag=<value optimized out>) at board.c:290
-290 relocate_code (addr_sp, id, addr);
-Current language: auto; currently c
-(gdb) p/x addr
-$1 = 0x87fa0000
-
-2) Debugging of U-Boot After Relocation
-
-For debugging U-Boot after relocation we need to know the address to which
-U-Boot relocates itself to 0x87fa0000 by default.
-And replace the symbol table to this offset.
-
-(gdb) symbol-file
-Discard symbol table from `/private/u-boot-arm/u-boot'? (y or n) y
-Error in re-setting breakpoint 1:
-No symbol table is loaded. Use the "file" command.
-No symbol file now.
-(gdb) add-symbol-file u-boot 0x87fa0000
-add symbol table from file "u-boot" at
- .text_addr = 0x87fa0000
-(y or n) y
-Reading symbols from /private/u-boot-arm/u-boot...done.
-Breakpoint 1 at 0x87fa0cc8: file board.c, line 289.
-(gdb) c
-Continuing.
-
-Program received signal SIGINT, Interrupt.
-0xffffffff87fa0de4 in udelay (usec=<value optimized out>) at time.c:78
-78 while ((tmo - read_c0_count()) < 0x7fffffff)
--
1.7.7.6
4
4
27 Jul '12
Hi,
(my configuration is MPC8270 on a Interface Concept board plines VMEb)
I'm facing a problem relating to my ETH FCC interface (FCC2)
It appears during a TFTPBOOT command that configuration informations are not the expecting one.
Basically, I'm facing timeout in my serial terminal and several "Rx errors" with value 0xC10
My first interpretation is that RX buffer descriptor is not valid.
During my analysis, I have detected some elements.
RXPTR and TXPTR are assigned with regular RAM values (area folling the reserved RAM for uboot usage) instead of DPRAM.
that rtx value is volatile, appearing in the GOT table with a famous predefined value following uboot ram reserved area.
that rtx is not constrained to be implemented in a specific DPRAM area.
My questions are:
Is it mandatory to force FCC / RXPTR/TXPTR to use DPRAM?
How to force RXPTR/TXPTR in DPRAM area?
NOTA: ping is working, a single sentence is appearing ( alive or not alive, no information on packets)
NOTA2: u-boot version is 2011.12
Regards
2
1
These are some improvements that were stuck in my tree for a while, time to
expunge them, please consider applying.
Tested on:
* DENX M28EVK v2.0
* DENX M28EVK v1.1
* Mysterious board #1 ...
* Unnamed board #2 ...
Marek Vasut (13):
FEC: Abstract out register setup
M28EVK: Implement support for new board V2.0
M28EVK: Add SD update command
i.MX28: Improve passing of data from SPL to U-Boot
i.MX28: Implement boot pads sampling and reporting
i.MX28: Add LCDIF register definitions
i.MX28: Shut down the LCD controller before reset
i.MX28: Add LRADC register definitions
i.MX28: Add LRADC init to i.MX28 SPL
i.MX28: Reorder battery status functions in SPL
i.MX28: Add battery boot components to SPL
i.MX28: Check if WP detection is implemented at all
i.MX28: Avoid redefining serial_put[cs]()
arch/arm/cpu/arm926ejs/mx28/Makefile | 2 +-
arch/arm/cpu/arm926ejs/mx28/mx28.c | 29 +-
arch/arm/cpu/arm926ejs/mx28/mx28_init.h | 4 +
arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 57 ++++
arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++++++
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 10 +-
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 224 ++++++++++-----
arch/arm/include/asm/arch-mx28/imx-regs.h | 2 +
arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 ++++++++++++++
arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 ++++++++++++++++++++++++++
arch/arm/include/asm/arch-mx28/sys_proto.h | 30 ++
board/denx/m28evk/m28evk.c | 20 +-
board/denx/m28evk/spl_boot.c | 8 +-
drivers/mmc/mxsmmc.c | 3 +-
drivers/net/fec_mxc.c | 84 +++---
include/configs/m28evk.h | 10 +
include/configs/mx28evk.h | 1 +
17 files changed, 1043 insertions(+), 139 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c
create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h
create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h
Cc: Detlev Zundel <dzu(a)denx.de>
Cc: Fabio Estevam <fabio.estevam(a)freescale.com>
Cc: Stefano Babic <sbabic(a)denx.de>
Cc: Wolfgang Denk <wd(a)denx.de>
--
1.7.10
3
23
24 Jul '12
SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's
GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757,
the driver handles the GETHER.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com>
---
drivers/net/sh_eth.h | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 13003ec..3703c55 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -282,8 +282,13 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xfee00000
#elif defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_SH_ETHER_USE_GETHER)
+#define SH_ETH_TYPE_GETHER
+#define BASE_IO_ADDR 0xfee00000
+#else
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xfef00000
+#endif
#elif defined(CONFIG_CPU_SH7724)
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xA4600000
@@ -331,7 +336,11 @@ enum DMAC_T_BIT {
/* GECMR */
enum GECMR_BIT {
+#if defined(CONFIG_CPU_SH7757)
+ GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,
+#else
GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00,
+#endif
};
/* EDRRR*/
--
1.7.1
3
2
[U-Boot] [PATCH 3/4] net: sh_eth: modify the definitions of regsiter
by Shimoda, Yoshihiro 24 Jul '12
by Shimoda, Yoshihiro 24 Jul '12
24 Jul '12
The previous code had many similar definitions in each CPU.
This patch borrows from the sh_eth driver of Linux kernel.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com>
---
drivers/net/sh_eth.c | 108 ++++++++---------
drivers/net/sh_eth.h | 331 +++++++++++++++++++++++++++++++-------------------
2 files changed, 258 insertions(+), 181 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 262762d..7b429e8 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -76,8 +76,8 @@ int sh_eth_send(struct eth_device *dev, void *packet, int len)
port_info->tx_desc_cur->td0 = TD_TACT | TD_TFP;
/* Restart the transmitter if disabled */
- if (!(inl(EDTRR(port)) & EDTRR_TRNS))
- outl(EDTRR_TRNS, EDTRR(port));
+ if (!(sh_eth_read(eth, EDTRR) & EDTRR_TRNS))
+ sh_eth_write(eth, EDTRR_TRNS, EDTRR);
/* Wait until packet is transmitted */
timeout = TIMEOUT_CNT;
@@ -129,25 +129,24 @@ int sh_eth_recv(struct eth_device *dev)
}
/* Restart the receiver if disabled */
- if (!(inl(EDRRR(port)) & EDRRR_R))
- outl(EDRRR_R, EDRRR(port));
+ if (!(sh_eth_read(eth, EDRRR) & EDRRR_R))
+ sh_eth_write(eth, EDRRR_R, EDRRR);
return len;
}
static int sh_eth_reset(struct sh_eth_dev *eth)
{
- int port = eth->port;
#if defined(SH_ETH_TYPE_GETHER)
int ret = 0, i;
/* Start e-dmac transmitter and receiver */
- outl(EDSR_ENALL, EDSR(port));
+ sh_eth_write(eth, EDSR_ENALL, EDSR);
/* Perform a software reset and wait for it to complete */
- outl(EDMR_SRST, EDMR(port));
+ sh_eth_write(eth, EDMR_SRST, EDMR);
for (i = 0; i < TIMEOUT_CNT ; i++) {
- if (!(inl(EDMR(port)) & EDMR_SRST))
+ if (!(sh_eth_read(eth, EDMR) & EDMR_SRST))
break;
udelay(1000);
}
@@ -159,9 +158,9 @@ static int sh_eth_reset(struct sh_eth_dev *eth)
return ret;
#else
- outl(inl(EDMR(port)) | EDMR_SRST, EDMR(port));
+ sh_eth_write(eth, sh_eth_read(eth, EDMR) | EDMR_SRST, EDMR);
udelay(3000);
- outl(inl(EDMR(port)) & ~EDMR_SRST, EDMR(port));
+ sh_eth_write(eth, sh_eth_read(eth, EDMR) & ~EDMR_SRST, EDMR);
return 0;
#endif
@@ -207,11 +206,11 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the tx descriptor list. Must use physical
addresses */
- outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDLAR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
- outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
- outl(0x01, TDFFR(port));/* Last discriptor bit */
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDFAR);
+ sh_eth_write(eth, ADDR_TO_PHY(cur_tx_desc), TDFXR);
+ sh_eth_write(eth, 0x01, TDFFR);/* Last discriptor bit */
#endif
err:
@@ -275,11 +274,11 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
cur_rx_desc->rd0 |= RD_RDLE;
/* Point the controller to the rx descriptor list */
- outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDLAR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
- outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
- outl(RDFFR_RDLF, RDFFR(port));
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDFAR);
+ sh_eth_write(eth, ADDR_TO_PHY(cur_rx_desc), RDFXR);
+ sh_eth_write(eth, RDFFR_RDLF, RDFFR);
#endif
return ret;
@@ -364,38 +363,39 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
struct phy_device *phy;
/* Configure e-dmac registers */
- outl((inl(EDMR(port)) & ~EMDR_DESC_R) | EDMR_EL, EDMR(port));
- outl(0, EESIPR(port));
- outl(0, TRSCER(port));
- outl(0, TFTR(port));
- outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port));
- outl(RMCR_RST, RMCR(port));
+ sh_eth_write(eth, (sh_eth_read(eth, EDMR) & ~EMDR_DESC_R) | EDMR_EL,
+ EDMR);
+ sh_eth_write(eth, 0, EESIPR);
+ sh_eth_write(eth, 0, TRSCER);
+ sh_eth_write(eth, 0, TFTR);
+ sh_eth_write(eth, (FIFO_SIZE_T | FIFO_SIZE_R), FDR);
+ sh_eth_write(eth, RMCR_RST, RMCR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(0, RPADIR(port));
+ sh_eth_write(eth, 0, RPADIR);
#endif
- outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
+ sh_eth_write(eth, (FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR);
/* Configure e-mac registers */
- outl(0, ECSIPR(port));
+ sh_eth_write(eth, 0, ECSIPR);
/* Set Mac address */
val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
dev->enetaddr[2] << 8 | dev->enetaddr[3];
- outl(val, MAHR(port));
+ sh_eth_write(eth, val, MAHR);
val = dev->enetaddr[4] << 8 | dev->enetaddr[5];
- outl(val, MALR(port));
+ sh_eth_write(eth, val, MALR);
- outl(RFLR_RFL_MIN, RFLR(port));
+ sh_eth_write(eth, RFLR_RFL_MIN, RFLR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(0, PIPR(port));
- outl(APR_AP, APR(port));
- outl(MPR_MP, MPR(port));
- outl(TPAUSER_TPAUSE, TPAUSER(port));
+ sh_eth_write(eth, 0, PIPR);
+ sh_eth_write(eth, APR_AP, APR);
+ sh_eth_write(eth, MPR_MP, MPR);
+ sh_eth_write(eth, TPAUSER_TPAUSE, TPAUSER);
#endif
#if defined(CONFIG_CPU_SH7734)
- outl(CONFIG_SH_ETHER_SH7734_MII, RMII_MII(port));
+ sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);
#endif
/* Configure phy */
ret = sh_eth_phy_config(eth);
@@ -412,34 +412,35 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
if (phy->speed == 100) {
printf(SHETHER_NAME ": 100Base/");
#if defined(SH_ETH_TYPE_GETHER)
- outl(GECMR_100B, GECMR(port));
+ sh_eth_write(eth, GECMR_100B, GECMR);
#elif defined(CONFIG_CPU_SH7757)
- outl(1, RTRATE(port));
+ sh_eth_write(eth, 1, RTRATE);
#elif defined(CONFIG_CPU_SH7724)
val = ECMR_RTM;
#endif
} else if (phy->speed == 10) {
printf(SHETHER_NAME ": 10Base/");
#if defined(SH_ETH_TYPE_GETHER)
- outl(GECMR_10B, GECMR(port));
+ sh_eth_write(eth, GECMR_10B, GECMR);
#elif defined(CONFIG_CPU_SH7757)
- outl(0, RTRATE(port));
+ sh_eth_write(eth, 0, RTRATE);
#endif
}
#if defined(SH_ETH_TYPE_GETHER)
else if (phy->speed == 1000) {
printf(SHETHER_NAME ": 1000Base/");
- outl(GECMR_1000B, GECMR(port));
+ sh_eth_write(eth, GECMR_1000B, GECMR);
}
#endif
/* Check if full duplex mode is supported by the phy */
if (phy->duplex) {
printf("Full\n");
- outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port));
+ sh_eth_write(eth, val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM),
+ ECMR);
} else {
printf("Half\n");
- outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port));
+ sh_eth_write(eth, val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR);
}
return ret;
@@ -454,12 +455,12 @@ static void sh_eth_start(struct sh_eth_dev *eth)
* Enable the e-dmac receiver only. The transmitter will be enabled when
* we have something to transmit
*/
- outl(EDRRR_R, EDRRR(eth->port));
+ sh_eth_write(eth, EDRRR_R, EDRRR);
}
static void sh_eth_stop(struct sh_eth_dev *eth)
{
- outl(~EDRRR_R, EDRRR(eth->port));
+ sh_eth_write(eth, ~EDRRR_R, EDRRR);
}
int sh_eth_init(struct eth_device *dev, bd_t *bd)
@@ -563,9 +564,8 @@ static int sh_eth_bb_init(struct bb_miiphy_bus *bus)
static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
{
struct sh_eth_dev *eth = bus->priv;
- int port = eth->port;
- outl(inl(PIR(port)) | PIR_MMD, PIR(port));
+ sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MMD, PIR);
return 0;
}
@@ -573,9 +573,8 @@ static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
{
struct sh_eth_dev *eth = bus->priv;
- int port = eth->port;
- outl(inl(PIR(port)) & ~PIR_MMD, PIR(port));
+ sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MMD, PIR);
return 0;
}
@@ -583,12 +582,11 @@ static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
{
struct sh_eth_dev *eth = bus->priv;
- int port = eth->port;
if (v)
- outl(inl(PIR(port)) | PIR_MDO, PIR(port));
+ sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MDO, PIR);
else
- outl(inl(PIR(port)) & ~PIR_MDO, PIR(port));
+ sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MDO, PIR);
return 0;
}
@@ -596,9 +594,8 @@ static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
{
struct sh_eth_dev *eth = bus->priv;
- int port = eth->port;
- *v = (inl(PIR(port)) & PIR_MDI) >> 3;
+ *v = (sh_eth_read(eth, PIR) & PIR_MDI) >> 3;
return 0;
}
@@ -606,12 +603,11 @@ static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
{
struct sh_eth_dev *eth = bus->priv;
- int port = eth->port;
if (v)
- outl(inl(PIR(port)) | PIR_MDC, PIR(port));
+ sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MDC, PIR);
else
- outl(inl(PIR(port)) & ~PIR_MDC, PIR(port));
+ sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MDC, PIR);
return 0;
}
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 401ef69..13003ec 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -97,140 +97,196 @@ struct sh_eth_dev {
struct sh_eth_info port_info[MAX_PORT_NUM];
};
+/* from linux/drivers/net/ethernet/renesas/sh_eth.h */
+enum {
+ /* E-DMAC registers */
+ EDSR = 0,
+ EDMR,
+ EDTRR,
+ EDRRR,
+ EESR,
+ EESIPR,
+ TDLAR,
+ TDFAR,
+ TDFXR,
+ TDFFR,
+ RDLAR,
+ RDFAR,
+ RDFXR,
+ RDFFR,
+ TRSCER,
+ RMFCR,
+ TFTR,
+ FDR,
+ RMCR,
+ EDOCR,
+ TFUCR,
+ RFOCR,
+ FCFTR,
+ RPADIR,
+ TRIMD,
+ RBWAR,
+ TBRAR,
+
+ /* Ether registers */
+ ECMR,
+ ECSR,
+ ECSIPR,
+ PIR,
+ PSR,
+ RDMLR,
+ PIPR,
+ RFLR,
+ IPGR,
+ APR,
+ MPR,
+ PFTCR,
+ PFRCR,
+ RFCR,
+ RFCF,
+ TPAUSER,
+ TPAUSECR,
+ BCFR,
+ BCFRR,
+ GECMR,
+ BCULR,
+ MAHR,
+ MALR,
+ TROCR,
+ CDCR,
+ LCCR,
+ CNDCR,
+ CEFCR,
+ FRECR,
+ TSFRCR,
+ TLFRCR,
+ CERCR,
+ CEECR,
+ MAFCR,
+ RTRATE,
+ CSMR,
+ RMII_MII,
+
+ /* This value must be written at last. */
+ SH_ETH_MAX_REGISTER_OFFSET,
+};
+
+static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = {
+ [EDSR] = 0x0000,
+ [EDMR] = 0x0400,
+ [EDTRR] = 0x0408,
+ [EDRRR] = 0x0410,
+ [EESR] = 0x0428,
+ [EESIPR] = 0x0430,
+ [TDLAR] = 0x0010,
+ [TDFAR] = 0x0014,
+ [TDFXR] = 0x0018,
+ [TDFFR] = 0x001c,
+ [RDLAR] = 0x0030,
+ [RDFAR] = 0x0034,
+ [RDFXR] = 0x0038,
+ [RDFFR] = 0x003c,
+ [TRSCER] = 0x0438,
+ [RMFCR] = 0x0440,
+ [TFTR] = 0x0448,
+ [FDR] = 0x0450,
+ [RMCR] = 0x0458,
+ [RPADIR] = 0x0460,
+ [FCFTR] = 0x0468,
+ [CSMR] = 0x04E4,
+
+ [ECMR] = 0x0500,
+ [ECSR] = 0x0510,
+ [ECSIPR] = 0x0518,
+ [PIR] = 0x0520,
+ [PSR] = 0x0528,
+ [PIPR] = 0x052c,
+ [RFLR] = 0x0508,
+ [APR] = 0x0554,
+ [MPR] = 0x0558,
+ [PFTCR] = 0x055c,
+ [PFRCR] = 0x0560,
+ [TPAUSER] = 0x0564,
+ [GECMR] = 0x05b0,
+ [BCULR] = 0x05b4,
+ [MAHR] = 0x05c0,
+ [MALR] = 0x05c8,
+ [TROCR] = 0x0700,
+ [CDCR] = 0x0708,
+ [LCCR] = 0x0710,
+ [CEFCR] = 0x0740,
+ [FRECR] = 0x0748,
+ [TSFRCR] = 0x0750,
+ [TLFRCR] = 0x0758,
+ [RFCR] = 0x0760,
+ [CERCR] = 0x0768,
+ [CEECR] = 0x0770,
+ [MAFCR] = 0x0778,
+ [RMII_MII] = 0x0790,
+};
+
+static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
+ [ECMR] = 0x0100,
+ [RFLR] = 0x0108,
+ [ECSR] = 0x0110,
+ [ECSIPR] = 0x0118,
+ [PIR] = 0x0120,
+ [PSR] = 0x0128,
+ [RDMLR] = 0x0140,
+ [IPGR] = 0x0150,
+ [APR] = 0x0154,
+ [MPR] = 0x0158,
+ [TPAUSER] = 0x0164,
+ [RFCF] = 0x0160,
+ [TPAUSECR] = 0x0168,
+ [BCFRR] = 0x016c,
+ [MAHR] = 0x01c0,
+ [MALR] = 0x01c8,
+ [TROCR] = 0x01d0,
+ [CDCR] = 0x01d4,
+ [LCCR] = 0x01d8,
+ [CNDCR] = 0x01dc,
+ [CEFCR] = 0x01e4,
+ [FRECR] = 0x01e8,
+ [TSFRCR] = 0x01ec,
+ [TLFRCR] = 0x01f0,
+ [RFCR] = 0x01f4,
+ [MAFCR] = 0x01f8,
+ [RTRATE] = 0x01fc,
+
+ [EDMR] = 0x0000,
+ [EDTRR] = 0x0008,
+ [EDRRR] = 0x0010,
+ [TDLAR] = 0x0018,
+ [RDLAR] = 0x0020,
+ [EESR] = 0x0028,
+ [EESIPR] = 0x0030,
+ [TRSCER] = 0x0038,
+ [RMFCR] = 0x0040,
+ [TFTR] = 0x0048,
+ [FDR] = 0x0050,
+ [RMCR] = 0x0058,
+ [TFUCR] = 0x0064,
+ [RFOCR] = 0x0068,
+ [FCFTR] = 0x0070,
+ [RPADIR] = 0x0078,
+ [TRIMD] = 0x007c,
+ [RBWAR] = 0x00c8,
+ [RDFAR] = 0x00cc,
+ [TBRAR] = 0x00d4,
+ [TDFAR] = 0x00d8,
+};
+
/* Register Address */
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xfee00000
-
-#define EDSR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0000)
-
-#define TDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0010)
-#define TDFAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0014)
-#define TDFXR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0018)
-#define TDFFR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x001c)
-
-#define RDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0030)
-#define RDFAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0034)
-#define RDFXR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0038)
-#define RDFFR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x003c)
-
-#define EDMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0400)
-#define EDTRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0408)
-#define EDRRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0410)
-#define EESR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0428)
-#define EESIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0430)
-#define TRSCER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0438)
-#define TFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0448)
-#define FDR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0450)
-#define RMCR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0458)
-#define RPADIR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0460)
-#define FCFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0468)
-#define ECMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0500)
-#define RFLR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0508)
-#define ECSIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0518)
-#define PIR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0520)
-#define PIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x052c)
-#define APR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0554)
-#define MPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0558)
-#define TPAUSER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0564)
-#define GECMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05b0)
-#define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c8)
-#define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c0)
-
#elif defined(CONFIG_CPU_SH7757)
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xfef00000
-
-#define TDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0018)
-#define RDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0020)
-
-#define EDMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0000)
-#define EDTRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0008)
-#define EDRRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0010)
-#define EESR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0028)
-#define EESIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0030)
-#define TRSCER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0038)
-#define TFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0048)
-#define FDR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0050)
-#define RMCR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0058)
-#define FCFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0070)
-#define ECMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0100)
-#define RFLR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0108)
-#define ECSIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0118)
-#define PIR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0120)
-#define APR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0154)
-#define MPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0158)
-#define TPAUSER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0164)
-#define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c0)
-#define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c8)
-#define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc)
-
#elif defined(CONFIG_CPU_SH7724)
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xA4600000
-
-#define TDLAR(port) (BASE_IO_ADDR + 0x0018)
-#define RDLAR(port) (BASE_IO_ADDR + 0x0020)
-
-#define EDMR(port) (BASE_IO_ADDR + 0x0000)
-#define EDTRR(port) (BASE_IO_ADDR + 0x0008)
-#define EDRRR(port) (BASE_IO_ADDR + 0x0010)
-#define EESR(port) (BASE_IO_ADDR + 0x0028)
-#define EESIPR(port) (BASE_IO_ADDR + 0x0030)
-#define TRSCER(port) (BASE_IO_ADDR + 0x0038)
-#define TFTR(port) (BASE_IO_ADDR + 0x0048)
-#define FDR(port) (BASE_IO_ADDR + 0x0050)
-#define RMCR(port) (BASE_IO_ADDR + 0x0058)
-#define FCFTR(port) (BASE_IO_ADDR + 0x0070)
-#define ECMR(port) (BASE_IO_ADDR + 0x0100)
-#define RFLR(port) (BASE_IO_ADDR + 0x0108)
-#define ECSIPR(port) (BASE_IO_ADDR + 0x0118)
-#define PIR(port) (BASE_IO_ADDR + 0x0120)
-#define APR(port) (BASE_IO_ADDR + 0x0154)
-#define MPR(port) (BASE_IO_ADDR + 0x0158)
-#define TPAUSER(port) (BASE_IO_ADDR + 0x0164)
-#define MAHR(port) (BASE_IO_ADDR + 0x01c0)
-#define MALR(port) (BASE_IO_ADDR + 0x01c8)
-
-#elif defined(CONFIG_CPU_SH7734)
-#define SH_ETH_TYPE_GETHER
-#define BASE_IO_ADDR 0xFEE00000
-
-#define EDSR(port) (BASE_IO_ADDR)
-
-#define TDLAR(port) (BASE_IO_ADDR + 0x0010)
-#define TDFAR(port) (BASE_IO_ADDR + 0x0014)
-#define TDFXR(port) (BASE_IO_ADDR + 0x0018)
-#define TDFFR(port) (BASE_IO_ADDR + 0x001c)
-#define RDLAR(port) (BASE_IO_ADDR + 0x0030)
-#define RDFAR(port) (BASE_IO_ADDR + 0x0034)
-#define RDFXR(port) (BASE_IO_ADDR + 0x0038)
-#define RDFFR(port) (BASE_IO_ADDR + 0x003c)
-
-#define EDMR(port) (BASE_IO_ADDR + 0x0400)
-#define EDTRR(port) (BASE_IO_ADDR + 0x0408)
-#define EDRRR(port) (BASE_IO_ADDR + 0x0410)
-#define EESR(port) (BASE_IO_ADDR + 0x0428)
-#define EESIPR(port) (BASE_IO_ADDR + 0x0430)
-#define TRSCER(port) (BASE_IO_ADDR + 0x0438)
-#define TFTR(port) (BASE_IO_ADDR + 0x0448)
-#define FDR(port) (BASE_IO_ADDR + 0x0450)
-#define RMCR(port) (BASE_IO_ADDR + 0x0458)
-#define RPADIR(port) (BASE_IO_ADDR + 0x0460)
-#define FCFTR(port) (BASE_IO_ADDR + 0x0468)
-#define ECMR(port) (BASE_IO_ADDR + 0x0500)
-#define RFLR(port) (BASE_IO_ADDR + 0x0508)
-#define ECSIPR(port) (BASE_IO_ADDR + 0x0518)
-#define PIR(port) (BASE_IO_ADDR + 0x0520)
-#define PIPR(port) (BASE_IO_ADDR + 0x052c)
-#define APR(port) (BASE_IO_ADDR + 0x0554)
-#define MPR(port) (BASE_IO_ADDR + 0x0558)
-#define TPAUSER(port) (BASE_IO_ADDR + 0x0564)
-#define GECMR(port) (BASE_IO_ADDR + 0x05b0)
-#define MAHR(port) (BASE_IO_ADDR + 0x05C0)
-#define MALR(port) (BASE_IO_ADDR + 0x05C8)
-#define RMII_MII(port) (BASE_IO_ADDR + 0x0790)
-
#endif
/*
@@ -506,3 +562,28 @@ enum RPADIR_BIT {
enum FIFO_SIZE_BIT {
FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007,
};
+
+static inline unsigned long sh_eth_reg_addr(struct sh_eth_dev *eth,
+ int enum_index)
+{
+#if defined(SH_ETH_TYPE_GETHER)
+ const u16 *reg_offset = sh_eth_offset_gigabit;
+#elif defined(SH_ETH_TYPE_ETHER)
+ const u16 *reg_offset = sh_eth_offset_fast_sh4;
+#else
+#error
+#endif
+ return BASE_IO_ADDR + reg_offset[enum_index] + 0x800 * eth->port;
+}
+
+static inline void sh_eth_write(struct sh_eth_dev *eth, unsigned long data,
+ int enum_index)
+{
+ outl(data, sh_eth_reg_addr(eth, enum_index));
+}
+
+static inline unsigned long sh_eth_read(struct sh_eth_dev *eth,
+ int enum_index)
+{
+ return inl(sh_eth_reg_addr(eth, enum_index));
+}
--
1.7.1
3
2
24 Jul '12
At the moment, the driver supports the following CPUs:
- GETHER (Gigabit Ethernet) : SH7763, SH7734
- ETHER (Fast Ethernet) : SH7724, SH7757
And the driver had the following "#if":
#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
- Those are for GETHER
#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
- This is for ETHER
So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and
SH_ETH_TYPE_ETHER. And then, the patch modifies the above "#if".
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com>
---
drivers/net/sh_eth.c | 22 +++++++++-------------
drivers/net/sh_eth.h | 43 +++++++++++++++++++++++--------------------
2 files changed, 32 insertions(+), 33 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 1825059..262762d 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -1,5 +1,5 @@
/*
- * sh_eth.c - Driver for Renesas SH7763's ethernet controler.
+ * sh_eth.c - Driver for Renesas ethernet controler.
*
* Copyright (C) 2008, 2011 Renesas Solutions Corp.
* Copyright (c) 2008, 2011 Nobuhiro Iwamatsu
@@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev)
static int sh_eth_reset(struct sh_eth_dev *eth)
{
int port = eth->port;
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
int ret = 0, i;
/* Start e-dmac transmitter and receiver */
@@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the tx descriptor list. Must use physical
addresses */
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
outl(0x01, TDFFR(port));/* Last discriptor bit */
@@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the rx descriptor list */
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
outl(RDFFR_RDLF, RDFFR(port));
@@ -370,7 +370,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(0, TFTR(port));
outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port));
outl(RMCR_RST, RMCR(port));
-#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
+#if defined(SH_ETH_TYPE_GETHER)
outl(0, RPADIR(port));
#endif
outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
@@ -387,14 +387,10 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(val, MALR(port));
outl(RFLR_RFL_MIN, RFLR(port));
-#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
+#if defined(SH_ETH_TYPE_GETHER)
outl(0, PIPR(port));
-#endif
-#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
-#endif
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
#endif
@@ -415,7 +411,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
/* Set the transfer speed */
if (phy->speed == 100) {
printf(SHETHER_NAME ": 100Base/");
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(GECMR_100B, GECMR(port));
#elif defined(CONFIG_CPU_SH7757)
outl(1, RTRATE(port));
@@ -424,13 +420,13 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
#endif
} else if (phy->speed == 10) {
printf(SHETHER_NAME ": 10Base/");
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(GECMR_10B, GECMR(port));
#elif defined(CONFIG_CPU_SH7757)
outl(0, RTRATE(port));
#endif
}
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
else if (phy->speed == 1000) {
printf(SHETHER_NAME ": 1000Base/");
outl(GECMR_1000B, GECMR(port));
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 5276be3..401ef69 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -99,6 +99,7 @@ struct sh_eth_dev {
/* Register Address */
#ifdef CONFIG_CPU_SH7763
+#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xfee00000
#define EDSR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0000)
@@ -137,6 +138,7 @@ struct sh_eth_dev {
#define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c0)
#elif defined(CONFIG_CPU_SH7757)
+#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xfef00000
#define TDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0018)
@@ -164,6 +166,7 @@ struct sh_eth_dev {
#define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc)
#elif defined(CONFIG_CPU_SH7724)
+#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xA4600000
#define TDLAR(port) (BASE_IO_ADDR + 0x0018)
@@ -190,6 +193,7 @@ struct sh_eth_dev {
#define MALR(port) (BASE_IO_ADDR + 0x01c8)
#elif defined(CONFIG_CPU_SH7734)
+#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xFEE00000
#define EDSR(port) (BASE_IO_ADDR)
@@ -233,7 +237,7 @@ struct sh_eth_dev {
* Register's bits
* Copy from Linux driver source code
*/
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
/* EDSR */
enum EDSR_BIT {
EDSR_ENT = 0x01, EDSR_ENR = 0x02,
@@ -244,15 +248,15 @@ enum EDSR_BIT {
/* EDMR */
enum DMAC_M_BIT {
EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
EDMR_SRST = 0x03, /* Receive/Send reset */
EMDR_DESC_R = 0x30, /* Descriptor reserve size */
EDMR_EL = 0x40, /* Litte endian */
-#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7724)
+#elif defined(SH_ETH_TYPE_ETHER)
EDMR_SRST = 0x01,
EMDR_DESC_R = 0x30, /* Descriptor reserve size */
EDMR_EL = 0x40, /* Litte endian */
-#else /* CONFIG_CPU_SH7763 */
+#else
EDMR_SRST = 0x01,
#endif
};
@@ -262,7 +266,7 @@ enum DMAC_M_BIT {
/* EDTRR */
enum DMAC_T_BIT {
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
EDTRR_TRNS = 0x03,
#else
EDTRR_TRNS = 0x01,
@@ -302,7 +306,7 @@ enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, };
/* EESR */
enum EESR_BIT {
-#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
+#if defined(SH_ETH_TYPE_ETHER)
EESR_TWB = 0x40000000,
#else
EESR_TWB = 0xC0000000,
@@ -312,14 +316,14 @@ enum EESR_BIT {
#endif
EESR_TABT = 0x04000000,
EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000,
-#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
+#if defined(SH_ETH_TYPE_ETHER)
EESR_ADE = 0x00800000,
#endif
EESR_ECI = 0x00400000,
EESR_FTC = 0x00200000, EESR_TDE = 0x00100000,
EESR_TFE = 0x00080000, EESR_FRC = 0x00040000,
EESR_RDE = 0x00020000, EESR_RFE = 0x00010000,
-#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
+#if defined(SH_ETH_TYPE_ETHER)
EESR_CND = 0x00000800,
#endif
EESR_DLC = 0x00000400,
@@ -331,7 +335,7 @@ enum EESR_BIT {
};
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
# define TX_CHECK (EESR_TC1 | EESR_FTC)
# define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \
| EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI)
@@ -391,8 +395,7 @@ enum FCFTR_BIT {
/* Transfer descriptor bit */
enum TD_STS_BIT {
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \
- || defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_ETHER)
TD_TACT = 0x80000000,
#else
TD_TACT = 0x7fffffff,
@@ -408,7 +411,7 @@ enum TD_STS_BIT {
enum RECV_RST_BIT { RMCR_RST = 0x01, };
/* ECMR */
enum FELIC_MODE_BIT {
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
ECMR_TRCCM=0x04000000, ECMR_RCSC= 0x00800000, ECMR_DPAD= 0x00200000,
ECMR_RZPF = 0x00100000,
#endif
@@ -423,10 +426,10 @@ enum FELIC_MODE_BIT {
};
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
#define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \
ECMR_TXF | ECMR_MCT)
-#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
+#elif defined(SH_ETH_TYPE_ETHER)
#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
#else
#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
@@ -434,14 +437,14 @@ enum FELIC_MODE_BIT {
/* ECSR */
enum ECSR_STATUS_BIT {
-#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
+#if defined(SH_ETH_TYPE_ETHER)
ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10,
#endif
ECSR_LCHNG = 0x04,
ECSR_MPD = 0x02, ECSR_ICD = 0x01,
};
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
# define ECSR_INIT (ECSR_ICD | ECSIPR_MPDIP)
#else
# define ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | \
@@ -450,10 +453,10 @@ enum ECSR_STATUS_BIT {
/* ECSIPR */
enum ECSIPR_STATUS_MASK_BIT {
-#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
+#if defined(SH_ETH_TYPE_ETHER)
ECSIPR_BRCRXIP = 0x20,
ECSIPR_PSRTOIP = 0x10,
-#elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#elif defined(SH_ETY_TYPE_GETHER)
ECSIPR_PSRTOIP = 0x10,
ECSIPR_PHYIP = 0x08,
#endif
@@ -462,7 +465,7 @@ enum ECSIPR_STATUS_MASK_BIT {
ECSIPR_ICDIP = 0x01,
};
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
# define ECSIPR_INIT (ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP)
#else
# define ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | \
@@ -493,7 +496,7 @@ enum RPADIR_BIT {
RPADIR_PADR = 0x0003f,
};
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
# define RPADIR_INIT (0x00)
#else
# define RPADIR_INIT (RPADIR_PADS1)
--
1.7.1
3
2
24 Jul '12
The SH7757's ETHER can work using the SH7724's setting. So, the patch
modifies it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com>
---
drivers/net/sh_eth.c | 9 +--------
drivers/net/sh_eth.h | 14 ++------------
2 files changed, 3 insertions(+), 20 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index bb57e4d..1825059 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
/* Configure e-mac registers */
-#if defined(CONFIG_CPU_SH7757)
- outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP |
- ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port));
-#else
outl(0, ECSIPR(port));
-#endif
/* Set Mac address */
val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
@@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
outl(0, PIPR(port));
#endif
-#if !defined(CONFIG_CPU_SH7724)
+#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
#endif
#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
-#elif defined(CONFIG_CPU_SH7757)
- outl(TPAUSER_UNLIMITED, TPAUSER(port));
#endif
#if defined(CONFIG_CPU_SH7734)
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 50f4b69..5276be3 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -319,7 +319,7 @@ enum EESR_BIT {
EESR_FTC = 0x00200000, EESR_TDE = 0x00100000,
EESR_TFE = 0x00080000, EESR_FRC = 0x00040000,
EESR_RDE = 0x00020000, EESR_RFE = 0x00010000,
-#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
EESR_CND = 0x00000800,
#endif
EESR_DLC = 0x00000400,
@@ -426,9 +426,7 @@ enum FELIC_MODE_BIT {
#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
#define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \
ECMR_TXF | ECMR_MCT)
-#elif CONFIG_CPU_SH7757
-#define ECMR_CHG_DM (ECMR_ZPF)
-#elif CONFIG_CPU_SH7724
+#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
#else
#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
@@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT {
/* APR */
enum APR_BIT {
-#ifdef CONFIG_CPU_SH7757
- APR_AP = 0x00000001,
-#else
APR_AP = 0x00000004,
-#endif
};
/* MPR */
enum MPR_BIT {
-#ifdef CONFIG_CPU_SH7757
- MPR_MP = 0x00000001,
-#else
MPR_MP = 0x00000006,
-#endif
};
/* TRSCER */
--
1.7.1
3
5
[U-Boot] [PATCH 0/17] tegra: Add display driver and LCD support for Seaboard
by Simon Glass 24 Jul '12
by Simon Glass 24 Jul '12
24 Jul '12
This series adds support for the Tegra2x's display peripheral. This
supports the LCD display on Seaboard and we use this to enable console
output in U-Boot on the LCD.
Configuration is via the device tree. Proposed bindings are included
in this series.
To improve performance two optimisations are offered:
1. The LCD frame buffer is cached, with the cache being flushed after
each call puts(). This dramatically increases performance (around 10x).
This requires a few additions to the ARM cache support.
2. The console supports scrolling in steps of more than 1 line. This
speeds up scrolling output considerably, particularly commands like
'printenv' which display a lot of output. This requires a new CONFIG
and a change to the console_scrollup() function.
Mayuresh Kulkarni (1):
tegra: Enable display/lcd support on Seaboard
Simon Glass (15):
fdt: Add function to look up a phandle's register address
fdt: Add header guard to fdtdec.h
fdt: Correct GPIO name access in fdtdec
tegra: Add display support to funcmux
tegra: fdt: Add LCD definitions for Tegra
tegra: Add support for PWFM
tegra: Add LCD driver
tegra: Add LCD support to Nvidia boards
arm: Add control over cachability of memory regions
lcd: Add CONFIG_ALIGN_LCD_TO_SECTION to align lcd for MMU
lcd: Add support for flushing LCD fb from dcache after update
tegra: Align LCD frame buffer to section boundary
tegra: Support control of cache settings for LCD
tegra: fdt: Add LCD definitions for Seaboard
lcd: Add CONSOLE_SCROLL_LINES option to speed console
Wei Ni (1):
tegra: Add SOC support for display/lcd
README | 16 +
arch/arm/cpu/armv7/cache_v7.c | 11 +
arch/arm/cpu/armv7/tegra2/Makefile | 1 +
arch/arm/cpu/armv7/tegra2/display.c | 271 +++++++++++
arch/arm/cpu/armv7/tegra2/funcmux.c | 39 ++
arch/arm/cpu/armv7/tegra2/pwfm.c | 40 ++
arch/arm/dts/tegra20.dtsi | 25 +
arch/arm/include/asm/arch-tegra2/dc.h | 544 +++++++++++++++++++++++
arch/arm/include/asm/arch-tegra2/display.h | 133 ++++++
arch/arm/include/asm/arch-tegra2/pwfm.h | 54 +++
arch/arm/include/asm/system.h | 30 ++
arch/arm/lib/cache-cp15.c | 62 +++-
board/nvidia/common/board.c | 21 +-
board/nvidia/dts/tegra2-seaboard.dts | 21 +
common/cmd_echo.c | 3 +-
common/lcd.c | 85 +++-
doc/device-tree-bindings/video/nvidia-video.txt | 92 ++++
drivers/video/Makefile | 1 +
drivers/video/tegra.c | 388 ++++++++++++++++
include/configs/seaboard.h | 12 +-
include/configs/tegra2-common.h | 1 +
include/fdtdec.h | 17 +
include/lcd.h | 11 +
lib/fdtdec.c | 15 +-
24 files changed, 1862 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/cpu/armv7/tegra2/display.c
create mode 100644 arch/arm/cpu/armv7/tegra2/pwfm.c
create mode 100644 arch/arm/include/asm/arch-tegra2/dc.h
create mode 100644 arch/arm/include/asm/arch-tegra2/display.h
create mode 100644 arch/arm/include/asm/arch-tegra2/pwfm.h
create mode 100644 doc/device-tree-bindings/video/nvidia-video.txt
create mode 100644 drivers/video/tegra.c
--
1.7.7.3
6
33