May 2012 - U-Boot

[U-Boot] Changing DRAM Size on Lite5200B
by George Rubin 21 May '12

21 May '12

Hey, I'm trying to find the option to change the DRAM size recognized by U-Boot but I can't find the option in IceCube.h .. Where is this defined exactly? Best Regards, George Rubin

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[U-Boot] [PATCH] README: Fix how to for serial console when CONFIG_CFB_CONSOLE is defined
by Fabio Estevam 21 May '12

21 May '12

Fix how to force serial console when CONFIG_CFB_CONSOLE is defined. Tested on a mx51evk board. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- README | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/README b/README index 79016e6..9fc4618 100644 --- a/README +++ b/README @@ -615,7 +615,8 @@ The following options need to be configured: When CONFIG_CFB_CONSOLE is defined, video console is default i/o. Serial console can be forced with - environment 'console=serial'. + by placing 'setenv("stdout", "serial");' inside + board_late_init(). When CONFIG_SILENT_CONSOLE is defined, all console messages (by U-Boot and Linux!) can be silenced with -- 1.7.1

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[U-Boot] [PATCH] powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB
by York Sun 21 May '12

21 May '12

The fix for errata workaround is to avoid covering physical address 0xff000000 to 0xffffffff during the implementation. Early commit eb672e92 works until DDR size exceeds 4GB. This fix works for DDR size up to 64GB. Signed-off-by: York Sun <yorksun(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c index 18e9cc5..81961de 100644 --- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c +++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c @@ -50,7 +50,10 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, csn = i; csn_bnds_backup = regs->cs[i].bnds; csn_bnds_t = (unsigned int *) &regs->cs[i].bnds; - *csn_bnds_t = regs->cs[i].bnds ^ 0x0F000F00; + if (cs_ea > 0xeff) + *csn_bnds_t = regs->cs[i].bnds + 0x01000000; + else + *csn_bnds_t = regs->cs[i].bnds + 0x01000100; debug("Found cs%d_bns (0x%08x) covering 0xff000000, " "change it to 0x%x\n", csn, csn_bnds_backup, regs->cs[i].bnds); @@ -310,9 +313,15 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, /* 7. Wait for 400ms/GB */ total_gb_size_per_controller = 0; for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { - total_gb_size_per_controller += + if (i == csn) { + total_gb_size_per_controller += + ((csn_bnds_backup & 0xFFFF) >> 6) + - (csn_bnds_backup >> 22) + 1; + } else { + total_gb_size_per_controller += ((regs->cs[i].bnds & 0xFFFF) >> 6) - (regs->cs[i].bnds >> 22) + 1; + } } if (in_be32(&ddr->sdram_cfg) & 0x80000) total_gb_size_per_controller <<= 1; -- 1.7.0.4

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[U-Boot] [RFC] Make i2c probe opt-outable?
by Tom Rini 21 May '12

21 May '12

Hey all, I'd like to propose making 'i2c probe' be a command that is opt-out'able. In the Linux Kernel the notion of probing for devices was abandoned a while ago due to, in short, devices misbehaving when randomly poked at. Over in omap24xx_i2c land we changed our probe method a while ago from an attempted read to an attempted write as some i2c devices would NAK the read. But now with the am33xx SoM family we have a new issue which is that attempting to write to an address doesn't immediately issue a NAK so probe sees all addresses as valid and in turn leaves the bus upset. I've worked around this for now by making i2c_probe use the read method instead, only on am33xx (so most devices would be spotted, but the ones that caused the initial change would not show up). But a possibly better solution is to just make the i2c probe command not implemented for am33xx (as you don't have to run i2c probe to try and use your device). Thoughts? Thanks! -- Tom

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[U-Boot] [PATCH] Fix unused variable compile warning
by Joe Hershberger 21 May '12

21 May '12

In gcc 4.6 this warns. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Wolfgang Denk <wd(a)denx.de> --- common/cmd_nvedit.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 5999cb8..2712002 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -204,7 +204,6 @@ static int do_env_grep(cmd_tbl_t *cmdtp, int flag, */ int _do_env_set(int flag, int argc, char * const argv[]) { - bd_t *bd = gd->bd; int i, len; int console = -1; char *name, *value, *s; -- 1.6.0.2

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[U-Boot] [PATCH 0/2] patman further fixes
by Vikram Narayanan 21 May '12

21 May '12

Update README and source file with the new location of config file Cc: Simon Glass <sjg(a)chromium.org> Vikram Narayanan (2): patman: Change the location of the config file patman: Update README tools/patman/README | 5 ++++- tools/patman/settings.py | 8 ++++---- 2 files changed, 8 insertions(+), 5 deletions(-) -- 1.7.4.1

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[U-Boot] [PATCH 1/6 V4] EXYNOS5: Fix system register structure
by Rajeshwari Shinde 21 May '12

21 May '12

This patch corrects the SYSREG structure. We have removed the sysreg.h added in the previous patchset version as the sysreg structure is already defined in system.h. Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> Acked-by: Minkyu Kang <mk7.kang(a)samsung.com> --- arch/arm/include/asm/arch-exynos/system.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h index c85f949..c1d880f 100644 --- a/arch/arm/include/asm/arch-exynos/system.h +++ b/arch/arm/include/asm/arch-exynos/system.h @@ -42,6 +42,7 @@ struct exynos5_sysreg { unsigned int reserved; unsigned int ispblk_cfg; unsigned int usb20phy_cfg; + unsigned char res2[0x29c]; unsigned int mipi_dphy; unsigned int dptx_dphy; unsigned int phyclk_sel; -- 1.7.4.4

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[U-Boot] [PATCH v2] ATMEL/PIO: Enable new feature of PIO on Atmel device
by Bo Shen 21 May '12

21 May '12

v2: Remove legacy interface. v1: Enable new PIO feature supported by Atmel SoC. Using CPU_HAS_PIO3 micro to enable PIO new feature. Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- arch/arm/include/asm/arch-at91/at91_pio.h | 78 ++++++++++-------- drivers/gpio/at91_gpio.c | 125 ++++++++++++++++++++++++++++- 2 files changed, 167 insertions(+), 36 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h index 416cabf..0ec2dca 100644 --- a/arch/arm/include/asm/arch-at91/at91_pio.h +++ b/arch/arm/include/asm/arch-at91/at91_pio.h @@ -66,14 +66,50 @@ typedef struct at91_port { u32 puer; /* 0x64 Pull-up Enable Register */ u32 pusr; /* 0x68 Pad Pull-up Status Register */ u32 reserved4; +#if defined(CPU_HAS_PIO3) + u32 abcdsr1; /* 0x70 Peripheral ABCD Select Register 1 */ + u32 abcdsr2; /* 0x74 Peripheral ABCD Select Register 2 */ + u32 reserved5[2]; + u32 ifscdr; /* 0x80 Input Filter SCLK Disable Register */ + u32 ifscer; /* 0x84 Input Filter SCLK Enable Register */ + u32 ifscsr; /* 0x88 Input Filter SCLK Status Register */ + u32 scdr; /* 0x8C SCLK Divider Debouncing Register */ + u32 ppddr; /* 0x90 Pad Pull-down Disable Register */ + u32 ppder; /* 0x94 Pad Pull-down Enable Register */ + u32 ppdsr; /* 0x98 Pad Pull-down Status Register */ + u32 reserved6; /* */ +#else u32 asr; /* 0x70 Select A Register */ u32 bsr; /* 0x74 Select B Register */ u32 absr; /* 0x78 AB Select Status Register */ u32 reserved5[9]; /* */ +#endif u32 ower; /* 0xA0 Output Write Enable Register */ u32 owdr; /* 0xA4 Output Write Disable Register */ - u32 owsr; /* OxA8 utput Write Status Register */ + u32 owsr; /* OxA8 Output Write Status Register */ +#if defined(CPU_HAS_PIO3) + u32 reserved7; /* */ + u32 aimer; /* 0xB0 Additional INT Modes Enable Register */ + u32 aimdr; /* 0xB4 Additional INT Modes Disable Register */ + u32 aimmr; /* 0xB8 Additional INT Modes Mask Register */ + u32 reserved8; /* */ + u32 esr; /* 0xC0 Edge Select Register */ + u32 lsr; /* 0xC4 Level Select Register */ + u32 elsr; /* 0xC8 Edge/Level Status Register */ + u32 reserved9; /* 0xCC */ + u32 fellsr; /* 0xD0 Falling /Low Level Select Register */ + u32 rehlsr; /* 0xD4 Rising /High Level Select Register */ + u32 frlhsr; /* 0xD8 Fall/Rise - Low/High Status Register */ + u32 reserved10; /* */ + u32 locksr; /* 0xE0 Lock Status */ + u32 wpmr; /* 0xE4 Write Protect Mode Register */ + u32 wpsr; /* 0xE8 Write Protect Status Register */ + u32 reserved11[5]; /* */ + u32 schmitt; /* 0x100 Schmitt Trigger Register */ + u32 reserved12[63]; +#else u32 reserved6[85]; +#endif } at91_port_t; typedef union at91_pio { @@ -94,6 +130,13 @@ typedef union at91_pio { #ifdef CONFIG_AT91_GPIO int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup); int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup); +#if defined(CPU_HAS_PIO3) +int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup); +int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup); +int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div); +int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on); +int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin); +#endif int at91_set_pio_input(unsigned port, unsigned pin, int use_pullup); int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on); int at91_set_pio_output(unsigned port, unsigned pin, int value); @@ -111,37 +154,4 @@ int at91_get_pio_value(unsigned port, unsigned pin); #define AT91_PIO_PORTD 0x3 #define AT91_PIO_PORTE 0x4 -#ifdef CONFIG_AT91_LEGACY - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ -#endif - #endif diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index be2a026..ac3b322 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -86,7 +86,14 @@ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &pio->port[port].idr); at91_set_pio_pullup(port, pin, use_pullup); +#if defined(CPU_HAS_PIO3) + writel(readl(&pio->port[port].abcdsr1) & ~mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) & ~mask, + &pio->port[port].abcdsr2); +#else writel(mask, &pio->port[port].asr); +#endif writel(mask, &pio->port[port].pdr); } return 0; @@ -104,12 +111,63 @@ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &pio->port[port].idr); at91_set_pio_pullup(port, pin, use_pullup); +#if defined(CPU_HAS_PIO3) + writel(readl(&pio->port[port].abcdsr1) | mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) & ~mask, + &pio->port[port].abcdsr2); +#else writel(mask, &pio->port[port].bsr); +#endif writel(mask, &pio->port[port].pdr); } return 0; } +#if defined(CPU_HAS_PIO3) +/* + * mux the pin to the "C" internal peripheral role. + */ +int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(mask, &pio->port[port].idr); + at91_set_pio_pullup(port, pin, use_pullup); + writel(readl(&pio->port[port].abcdsr1) & ~mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) | mask, + &pio->port[port].abcdsr2); + writel(mask, &pio->port[port].pdr); + } + return 0; +} + +/* + * mux the pin to the "D" internal peripheral role. + */ +int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(mask, &pio->port[port].idr); + at91_set_pio_pullup(port, pin, use_pullup); + writel(readl(&pio->port[port].abcdsr1) | mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) | mask, + &pio->port[port].abcdsr2); + writel(mask, &pio->port[port].pdr); + } + return 0; +} +#endif + /* * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and * configure it for an input. @@ -162,13 +220,76 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - if (is_on) + if (is_on) { +#if defined(CPU_HAS_PIO3) + writel(mask, &pio->port[port].ifscdr); +#endif writel(mask, &pio->port[port].ifer); - else + } else { writel(mask, &pio->port[port].ifdr); + } + } + return 0; +} + +#if defined(CPU_HAS_PIO3) +/* + * enable/disable the debounce filter. + */ +int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + if (is_on) { + writel(mask, &pio->port[port].ifscer); + writel(div & PIO_SCDR_DIV, &pio->port[port].scdr); + writel(mask, &pio->port[port].ifer); + } else { + writel(mask, &pio->port[port].ifdr); + } + } + return 0; +} + +/* + * enable/disable the pull-down. + * If pull-up already enabled while calling the function, we disable it. + */ +int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(mask, &pio->port[port].pudr); + if (is_on) + writel(mask, &pio->port[port].ppder); + else + writel(mask, &pio->port[port].ppddr); + } + return 0; +} + +/* + * disable Schmitt trigger + */ +int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(readl(&pio->port[port].schmitt) | mask, + &pio->port[port].schmitt); } return 0; } +#endif /* * enable/disable the multi-driver. This is only valid for output and -- 1.7.10

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[U-Boot] [PULL] u-boot-usb/master :: FOR u-boot/-next
by Marek Vasut 20 May '12

20 May '12

The following changes since commit 7cb30b13f12077c7eec8ce2419cd96cd65ace8e2: Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash (2012-03-23 21:59:16 +0100) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to 3cfdca334e86e5491c0091182a83cb35523a9da7: usb: use noinline define (2012-04-06 02:19:35 +0200) ---------------------------------------------------------------- Mike Frysinger (1): usb: use noinline define Vipin KUMAR (1): Enable high speed support for USB device framework and usbtty README | 8 +++++++ common/usb.c | 3 +- drivers/serial/usbtty.c | 50 ++++++++++++++++++++++++++++++++++++++++++++- drivers/serial/usbtty.h | 4 +++ drivers/usb/gadget/core.c | 1 - drivers/usb/gadget/ep0.c | 23 +++++++++++++++++--- include/usbdescriptors.h | 15 +++++++++++++ include/usbdevice.h | 22 ++++++++++++++++++- 8 files changed, 118 insertions(+), 8 deletions(-)

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[U-Boot] Pull request: nand flash
by Scott Wood 20 May '12

20 May '12

The following changes since commit f50bf50d7f6f99c5ad4666d63a7eef43d3940500: Improve MAKEALL parallel builds (2012-05-18 13:49:04 +0200) are available in the git repository at: git://git.denx.de/u-boot-nand-flash.git master Heiko Schocher (1): mtd, nand: move some printfs to debug output. Liu, Wentao (1): nand_util: correct YAFFS image write function Prabhakar Kushwaha (2): driver/mtd: IFC NAND: Add support of ONFI NAND flash driver/mtd:IFC: Fix possible memory leak Scott Wood (2): nand: extend .raw accesses to work on multiple pages powerpc/85xx: fix NAND boot linker scripts for -fpic Stefan Roese (1): NAND: Remove ONFI detection message to from bootup log arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 5 +- arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds | 4 +- common/cmd_nand.c | 95 +++++++++++++++++++------- doc/README.nand | 16 ++-- drivers/mtd/nand/fsl_ifc_nand.c | 22 +++++-- drivers/mtd/nand/nand_base.c | 5 +- drivers/mtd/nand/nand_bbt.c | 13 ++-- drivers/mtd/nand/nand_util.c | 2 +- 8 files changed, 113 insertions(+), 49 deletions(-)

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