May 2012 - U-Boot

[U-Boot] [PATCH 0/8] EXYNOS5: Enable I2C support
by Rajeshwari Shinde 01 Jun '12

01 Jun '12

This patch set enables I2C support for EXYNOS5. This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5. Multichannel support has been added to the s3c24x0 I2C driver. s3c24x0_i2c struct has been moved to a common place as it can used by different SOC's. Rajeshwari Shinde (8): EXYNOS: CLK: Add i2c clock EXYNOS: Add I2C base address. EXYNOS: PINMUX: Add pinmux support for I2C I2C: Move struct s3c24x0_i2c to a common place. I2C: S3C24X0: Add offset to calculate next i2c channel base address I2C: Modify the I2C driver for EXYNOS5 I2C: Add support for Multi channel CONFIG: SMDK5250: I2C: Enable I2C This patchset depends on the following patch: "[U-Boot] [PATCH 1/2] exynos5: pinmux: Added default pinumx settings" arch/arm/cpu/armv7/exynos/clock.c | 33 ++++ arch/arm/cpu/armv7/exynos/pinmux.c | 32 +++ arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/cpu.h | 3 + arch/arm/include/asm/arch-exynos/pinmux.h | 8 + arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 10 - drivers/i2c/s3c24x0_i2c.c | 277 ++++++++++++++++++++------- drivers/i2c/s3c24x0_i2c.h | 46 +++++ include/configs/smdk5250.h | 8 + 9 files changed, 336 insertions(+), 82 deletions(-) create mode 100644 drivers/i2c/s3c24x0_i2c.h -- 1.7.4.4

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[U-Boot] facing issues with malloc in U-Boot
by Sandeep Kumar 01 Jun '12

01 Jun '12

Hi Everyone, I am facing issues with malloc in U-Boot while trying to allocate some memory. Here are the prints which I am getting after enabling the debug. U-Boot 2011.12 (May 31 2012 - 20:49:16) U-Boot code: 60800020 -> 60824874 BSS: -> 608592BC monitor len: 0005929C ramsize: 20000000 TLB table at: 7fff0000 Top of RAM usable for U-Boot at: 7fff0000 Reserving 356k for U-Boot at: 7ff96000 Reserving 1024k for malloc() at: 7fe96000 Reserving 32 Bytes for Board Info at: 7fe95fe0 Reserving 120 Bytes for Global Data at: 7fe95f68 New Stack Pointer is: 7fe95f58 RAM Configuration: Bank #0: 60000000 512 MiB Bank #1: 80000000 512 MiB relocation Offset is: 1f795fe0 WARNING: Caches not enabled monitor flash len: 00028904 Board Init called.. GPIO Init called.. spi_setup_slave: bus:0 cs:0 SPI Init Done... spi_xfer: tx:9f rx:00 spi_xfer: tx:ff rx:ef spi_xfer: tx:ff rx:40 spi_xfer: tx:ff rx:17 spi_xfer: tx:ff rx:0 spi_xfer: tx:ff rx:0 spi_cs_deactivate Done... SF: Got idcodes 00000000: ef 40 17 00 00 .@... ARRAY_SIZE = 1 shift = 0 idcode = 0xEF shift = 0 idcode = 0xEF Calling Probe... SF: Winbond id 0x4017 found SF: Failed to allocate memory SF: Unsupported manufacturer ef spi_release_bus: bus:0 cs:0 spi_release_bus Done... dlmalloc.c:1656: do_check_chunk: Assertion `(char*)p >= sbrk_base' failed. resetting ...) Any kind of help will be highly appreciated. Thanks and Regards, Sandeep <PRE><font size="2" face="calibri" color="blue">The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material.If you are not the intended recipient of this message please do not read, copy, use or disclose this communication and notify the sender immediately.It should be noted that any review, retransmission, dissemination or other use of, or taking action or reliance upon, this information by persons or entities other than the intended recipient is prohibited.</PRE>

2 4

[U-Boot] [PATCH V2] tegra: Compulab TrimSlice board support
by Stephen Warren 01 Jun '12

01 Jun '12

From: Stephen Warren <swarren(a)nvidia.com> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: Fixed unused variable warnings --- MAINTAINERS | 1 + board/compulab/dts/tegra2-trimslice.dts | 57 ++++++++++++++++++++ board/compulab/trimslice/Makefile | 49 +++++++++++++++++ board/compulab/trimslice/trimslice.c | 73 +++++++++++++++++++++++++ boards.cfg | 1 + include/configs/trimslice.h | 89 +++++++++++++++++++++++++++++++ 6 files changed, 270 insertions(+), 0 deletions(-) create mode 100644 board/compulab/dts/tegra2-trimslice.dts create mode 100644 board/compulab/trimslice/Makefile create mode 100644 board/compulab/trimslice/trimslice.c create mode 100644 include/configs/trimslice.h diff --git a/MAINTAINERS b/MAINTAINERS index 7c161db..9d35c0e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -912,6 +912,7 @@ Stephen Warren <swarren(a)nvidia.com> ventana Tegra2 (ARM7 & A9 Dual Core) paz00 Tegra2 (ARM7 & A9 Dual Core) + trimslice Tegra2 (ARM7 & A9 Dual Core) whistler Tegra2 (ARM7 & A9 Dual Core) Thomas Weber <weber(a)corscience.de> diff --git a/board/compulab/dts/tegra2-trimslice.dts b/board/compulab/dts/tegra2-trimslice.dts new file mode 100644 index 0000000..c707eb8 --- /dev/null +++ b/board/compulab/dts/tegra2-trimslice.dts @@ -0,0 +1,57 @@ +/dts-v1/; + +/include/ ARCH_CPU_DTS + +/ { + model = "Compulab TrimSlice board"; + compatible = "compulab,trimslice", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + }; + + memory { + reg = <0x00000000 0x40000000>; + }; + + clocks { + clk_32k: clk_32k { + clock-frequency = <32000>; + }; + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006000 { + clock-frequency = <216000000>; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; +}; diff --git a/board/compulab/trimslice/Makefile b/board/compulab/trimslice/Makefile new file mode 100644 index 0000000..bf624f4 --- /dev/null +++ b/board/compulab/trimslice/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation <www.nvidia.com> +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../../nvidia/common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c new file mode 100644 index 0000000..7167c91 --- /dev/null +++ b/board/compulab/trimslice/trimslice.c @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2010-2012 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <i2c.h> +#include <asm/io.h> +#include <asm/arch/tegra2.h> +#include <asm/arch/clock.h> +#include <asm/arch/funcmux.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/mmc.h> +#include <asm/gpio.h> +#ifdef CONFIG_TEGRA2_MMC +#include <mmc.h> +#endif + +/* + * Routine: gpio_config_uart + * Description: Does nothing on TrimSlice - no UART-related GPIOs. + */ +void gpio_config_uart(void) +{ +} + +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +static void pin_mux_mmc(void) +{ + funcmux_select(PERIPH_ID_SDMMC1, FUNCMUX_SDMMC1_SDIO1_4BIT); + funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); + + /* For CD GPIO PP1 */ + pinmux_tristate_disable(PINGRP_DAP3); +} + +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("board_mmc_init called\n"); + + /* Enable muxes, etc. for SDMMC controllers */ + pin_mux_mmc(); + + /* init dev 0 (SDMMC4), (micro-SD slot) with 4-bit bus */ + tegra2_mmc_init(0, 4, -1, GPIO_PP1); + + /* init dev 3 (SDMMC1), (SD slot) with 4-bit bus */ + tegra2_mmc_init(3, 4, -1, -1); + + return 0; +} diff --git a/boards.cfg b/boards.cfg index a96b7d7..e983b05 100644 --- a/boards.cfg +++ b/boards.cfg @@ -260,6 +260,7 @@ jornada arm sa1100 plutux arm armv7 plutux avionic-design tegra2 medcom arm armv7 medcom avionic-design tegra2 paz00 arm armv7 paz00 compal tegra2 +trimslice arm armv7 trimslice compulab tegra2 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h new file mode 100644 index 0000000..dafca5e --- /dev/null +++ b/include/configs/trimslice.h @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2010-2012 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> +#include "tegra2-common.h" + +/* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */ +#define CONFIG_DEFAULT_DEVICE_TREE tegra2-trimslice +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE + +/* High-level configuration options */ +#define V_PROMPT "Tegra2 (TrimSlice) # " +#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Trimslice" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTA +#define CONFIG_TEGRA2_UARTA_GPU +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE +#define CONFIG_SYS_BOARD_ODMDATA 0x300c0011 /* lp?, 1GB, UARTA */ + +#define CONFIG_BOARD_EARLY_INIT_F + +/* I2C */ +#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_MAX_I2C_BUS 4 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_CMD_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + +/* Environment not stored */ +#define CONFIG_ENV_IS_NOWHERE + +/* USB Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP + +#include "tegra2-common-post.h" + +#endif /* __CONFIG_H */ -- 1.7.0.4

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[U-Boot] [PATCH 1/2] exynos5: pinmux: Added default pinumx settings
by Rajeshwari Shinde 01 Jun '12

01 Jun '12

This patch performs the pinmux configuration in a common file. As of now only Exynos5 pinmux for SDMMC, UART and Ethernet is supported. Signed-off-by: Abhilash Kesavan <a.kesavan(a)samsung.com> Signed-off-by: Che-Liang Chiou <clchiou(a)chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> --- arch/arm/cpu/armv7/exynos/pinmux.c | 189 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/pinmux.h | 77 ++++++++++++ 2 files changed, 266 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c new file mode 100644 index 0000000..11f4b71 --- /dev/null +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -0,0 +1,189 @@ +/* + * Copyright (c) 2012 Samsung Electronics. + * Abhilash Kesavan <a.kesavan(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/cpu.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/sromc.h> + +int exynos5_pinmux_config(int peripheral, int flags) +{ + struct exynos5_gpio_part1 *gpio1 = + (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); + struct s5p_gpio_bank *bank, *bank_ext; + int i, start, count; + + switch (peripheral) { + case PERIPH_ID_UART0: + case PERIPH_ID_UART1: + case PERIPH_ID_UART2: + case PERIPH_ID_UART3: + switch (peripheral) { + case PERIPH_ID_UART0: + bank = &gpio1->a0; + start = 0; count = 4; + break; + case PERIPH_ID_UART1: + bank = &gpio1->a0; + start = 4; count = 4; + break; + case PERIPH_ID_UART2: + bank = &gpio1->a1; + start = 0; count = 4; + break; + case PERIPH_ID_UART3: + bank = &gpio1->a1; + start = 4; count = 2; + break; + } + for (i = start; i < start + count; i++) { + s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); + } + break; + case PERIPH_ID_SDMMC0: + case PERIPH_ID_SDMMC1: + case PERIPH_ID_SDMMC2: + case PERIPH_ID_SDMMC3: + switch (peripheral) { + case PERIPH_ID_SDMMC0: + bank = &gpio1->c0; bank_ext = &gpio1->c1; + break; + case PERIPH_ID_SDMMC1: + bank = &gpio1->c1; bank_ext = NULL; + break; + case PERIPH_ID_SDMMC2: + bank = &gpio1->c2; bank_ext = &gpio1->c3; + break; + case PERIPH_ID_SDMMC3: + bank = &gpio1->c3; bank_ext = NULL; + break; + } + if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) { + debug("SDMMC device %d does not support 8bit mode", + peripheral); + return -1; + } + if (flags & PINMUX_FLAG_8BIT_MODE) { + for (i = 3; i <= 6; i++) { + s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); + s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP); + s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X); + } + } + for (i = 0; i < 2; i++) { + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); + s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); + s5p_gpio_set_drv(bank, i, GPIO_DRV_4X); + } + for (i = 3; i <= 6; i++) { + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); + s5p_gpio_set_pull(bank, i, GPIO_PULL_UP); + s5p_gpio_set_drv(bank, i, GPIO_DRV_4X); + } + break; + case PERIPH_ID_SROMC: + /* + * SROM:CS1 and EBI + * + * GPY0[0] SROM_CSn[0] + * GPY0[1] SROM_CSn[1](2) + * GPY0[2] SROM_CSn[2] + * GPY0[3] SROM_CSn[3] + * GPY0[4] EBI_OEn(2) + * GPY0[5] EBI_EEn(2) + * + * GPY1[0] EBI_BEn[0](2) + * GPY1[1] EBI_BEn[1](2) + * GPY1[2] SROM_WAIT(2) + * GPY1[3] EBI_DATA_RDn(2) + */ + s5p_gpio_cfg_pin(&gpio1->y0, (flags & PINMUX_FLAG_BANK), + GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->y0, 4, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->y0, 5, GPIO_FUNC(2)); + + for (i = 0; i < 4; i++) + s5p_gpio_cfg_pin(&gpio1->y1, i, GPIO_FUNC(2)); + + /* + * EBI: 8 Addrss Lines + * + * GPY3[0] EBI_ADDR[0](2) + * GPY3[1] EBI_ADDR[1](2) + * GPY3[2] EBI_ADDR[2](2) + * GPY3[3] EBI_ADDR[3](2) + * GPY3[4] EBI_ADDR[4](2) + * GPY3[5] EBI_ADDR[5](2) + * GPY3[6] EBI_ADDR[6](2) + * GPY3[7] EBI_ADDR[7](2) + * + * EBI: 16 Data Lines + * + * GPY5[0] EBI_DATA[0](2) + * GPY5[1] EBI_DATA[1](2) + * GPY5[2] EBI_DATA[2](2) + * GPY5[3] EBI_DATA[3](2) + * GPY5[4] EBI_DATA[4](2) + * GPY5[5] EBI_DATA[5](2) + * GPY5[6] EBI_DATA[6](2) + * GPY5[7] EBI_DATA[7](2) + * + * GPY6[0] EBI_DATA[8](2) + * GPY6[1] EBI_DATA[9](2) + * GPY6[2] EBI_DATA[10](2) + * GPY6[3] EBI_DATA[11](2) + * GPY6[4] EBI_DATA[12](2) + * GPY6[5] EBI_DATA[13](2) + * GPY6[6] EBI_DATA[14](2) + * GPY6[7] EBI_DATA[15](2) + */ + for (i = 0; i < 8; i++) { + s5p_gpio_cfg_pin(&gpio1->y3, i, GPIO_FUNC(2)); + s5p_gpio_set_pull(&gpio1->y3, i, GPIO_PULL_UP); + + s5p_gpio_cfg_pin(&gpio1->y5, i, GPIO_FUNC(2)); + s5p_gpio_set_pull(&gpio1->y5, i, GPIO_PULL_UP); + + s5p_gpio_cfg_pin(&gpio1->y6, i, GPIO_FUNC(2)); + s5p_gpio_set_pull(&gpio1->y6, i, GPIO_PULL_UP); + } + break; + default: + debug("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + + return 0; +} + +int exynos_pinmux_config(int peripheral, int flags) +{ + if (cpu_is_exynos5()) + return exynos5_pinmux_config(peripheral, flags); + else{ + debug("pinmux functionality not supported\n"); + return -1; + } +} diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h new file mode 100644 index 0000000..306f521 --- /dev/null +++ b/arch/arm/include/asm/arch-exynos/pinmux.h @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Abhilash Kesavan <a.kesavan(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARM_ARCH_PINMUX_H +#define __ASM_ARM_ARCH_PINMUX_H + +/* + * Peripherals requiring clock/pinmux configuration. List will + * grow with support for more devices getting added. + * + */ +enum periph_id { + PERIPH_ID_SDMMC0, + PERIPH_ID_SDMMC1, + PERIPH_ID_SDMMC2, + PERIPH_ID_SDMMC3, + PERIPH_ID_SDMMC4, + PERIPH_ID_SROMC, + PERIPH_ID_UART0, + PERIPH_ID_UART1, + PERIPH_ID_UART2, + PERIPH_ID_UART3, + + PERIPH_ID_COUNT, + PERIPH_ID_NONE = -1, +}; + +/* + * Flags for setting specific configarations of peripherals. + * List will grow with support for more devices getting added. + */ +enum { + PINMUX_FLAG_NONE = 0x00000000, + + /* Flags for eMMC */ + PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */ + + /* Flags for SROM controller */ + PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */ + PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */ +}; + +/** + * Configures the pinmux for a particular peripheral. + * + * Each gpio can be configured in many different ways (4 bits on exynos) + * such as "input", "output", "special function", "external interrupt" + * etc. This function will configure the peripheral pinmux along with + * pull-up/down and drive strength. + * + * @param peripheral peripheral to be configured + * @param flags configure flags + * @return 0 if ok, -1 on error (e.g. unsupported peripheral) + */ +int exynos_pinmux_config(int peripheral, int flags); + +#endif -- 1.7.4.4

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[U-Boot] [PATCH V5 RESEND 0/3] mtd/NAND: Support for FSMC controller
by Amit Virdi 01 Jun '12

01 Jun '12

This patchset adds support for ST's FSMC controller. In the current u-boot, a SPEAr specific driver exists for FSMC controller. This patchset adds a full fledged driver that can be used across multiple platforms and removes the obsolete SPEAr specific driver. V4 -> V5 - Dropped the patch that defined change_bit as wrapper over __change_bit and, instead, defined logic to correct bit errors without using __change_bit V3 -> V4 - Removed local_irq_save and local_irq_restore calls from change_bit wrapper - Report the total bit flips, including that of ECC, to the upper layers - Replace change_bit calls for err_idx's 0th and 1st bit with "^= 3" operation V2 -> V3 - Implemented timeout during hardware ecc read - Used __attribute__ ((aligned(2))) instead of using array of U16 - Removed unnecessary enum V1 -> V2 - Defined CONFIG_SYS_NAND_SELF_INIT and did the related changes - Modified the error index calculation process - Modified newly erased page read algorithm - Initialized the badblockbits index to 7 - Improved fsmc_bch8_correct_data() implementation Vipin KUMAR (3): mtd/NAND: Add FSMC driver support SPEAr: Configure FSMC driver for NAND interface mtd/NAND: Remove obsolete SPEAr specific NAND drivers arch/arm/include/asm/arch-spear/hardware.h | 8 +- arch/arm/include/asm/arch-spear/spr_nand.h | 57 ---- board/spear/spear300/spear300.c | 14 +- board/spear/spear310/spear310.c | 14 +- board/spear/spear320/spear320.c | 13 +- board/spear/spear600/spear600.c | 14 +- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/fsmc_nand.c | 487 ++++++++++++++++++++++++++++ drivers/mtd/nand/spr_nand.c | 124 ------- include/configs/spear-common.h | 3 +- include/configs/spear3xx.h | 4 + include/configs/spear6xx.h | 3 + include/linux/mtd/fsmc_nand.h | 101 ++++++ 13 files changed, 638 insertions(+), 205 deletions(-) delete mode 100644 arch/arm/include/asm/arch-spear/spr_nand.h create mode 100644 drivers/mtd/nand/fsmc_nand.c delete mode 100644 drivers/mtd/nand/spr_nand.c create mode 100644 include/linux/mtd/fsmc_nand.h -- 1.7.2.2

5 11

[U-Boot] [PATCH] gpio: tegra2: rename tegra2_gpio.* to tegra_gpio.*
by Tom Warren 01 Jun '12

01 Jun '12

In anticipation of Tegra3 support, continue removing/renaming Tegra2-specific files. No functional changes (yet). Updated copyrights to 2012. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- arch/arm/include/asm/arch-tegra2/gpio.h | 7 ++++--- drivers/gpio/Makefile | 2 +- drivers/gpio/{tegra2_gpio.c => tegra_gpio.c} | 2 +- include/configs/tegra2-common.h | 4 ++-- 4 files changed, 8 insertions(+), 7 deletions(-) rename drivers/gpio/{tegra2_gpio.c => tegra_gpio.c} (99%) diff --git a/arch/arm/include/asm/arch-tegra2/gpio.h b/arch/arm/include/asm/arch-tegra2/gpio.h index 41e66fe..40ddb02 100644 --- a/arch/arm/include/asm/arch-tegra2/gpio.h +++ b/arch/arm/include/asm/arch-tegra2/gpio.h @@ -2,6 +2,7 @@ * Copyright (c) 2011, Google Inc. All rights reserved. * See file CREDITS for list of people who contributed to this * project. + * Portions Copyright 2011-2012 NVIDIA Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -19,8 +20,8 @@ * MA 02111-1307 USA */ -#ifndef _TEGRA2_GPIO_H_ -#define _TEGRA2_GPIO_H_ +#ifndef _TEGRA_GPIO_H_ +#define _TEGRA_GPIO_H_ /* * The Tegra 2x GPIO controller has 224 GPIOs arranged in 7 banks of 4 ports, @@ -286,4 +287,4 @@ enum gpio_pin { void gpio_info(void); #define gpio_status() gpio_info() -#endif /* TEGRA2_GPIO_H_ */ +#endif /* TEGRA_GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index fb3b09a..5ae68d5 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -35,7 +35,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_PCA9698) += pca9698.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_SANDBOX_GPIO) += sandbox.o -COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o +COBJS-$(CONFIG_TEGRA_GPIO) += tegra_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra_gpio.c similarity index 99% rename from drivers/gpio/tegra2_gpio.c rename to drivers/gpio/tegra_gpio.c index 70ca46f..60ec6e3 100644 --- a/drivers/gpio/tegra2_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -1,6 +1,6 @@ /* * NVIDIA Tegra2 GPIO handling. - * (C) Copyright 2010,2011 + * (C) Copyright 2010-2012 * NVIDIA Corporation <www.nvidia.com> * * See file CREDITS for list of people who contributed to this diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 1931179..08fdbe3 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010,2011 + * (C) Copyright 2010-2012 * NVIDIA Corporation <www.nvidia.com> * * See file CREDITS for list of people who contributed to this @@ -191,6 +191,6 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_TEGRA2_GPIO +#define CONFIG_TEGRA_GPIO #define CONFIG_CMD_GPIO #endif /* __TEGRA2_COMMON_H */ -- 1.7.0.4

2 1

[U-Boot] [PATCH] mmc: tegra2: rename tegra2_mmc.* to tegra_mmc.*
by Tom Warren 01 Jun '12

01 Jun '12

In anticipation of Tegra3 support, continue removing/renaming Tegra2-specific files. No functional changes (yet). Updated copyrights to 2012. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- board/nvidia/harmony/harmony.c | 4 ++-- board/nvidia/seaboard/seaboard.c | 4 ++-- board/nvidia/whistler/whistler.c | 2 +- drivers/mmc/Makefile | 2 +- drivers/mmc/{tegra2_mmc.c => tegra_mmc.c} | 4 ++-- drivers/mmc/{tegra2_mmc.h => tegra_mmc.h} | 8 ++++---- include/configs/harmony.h | 2 +- include/configs/medcom.h | 2 +- include/configs/paz00.h | 2 +- include/configs/plutux.h | 2 +- include/configs/seaboard.h | 2 +- include/configs/trimslice.h | 2 +- include/configs/ventana.h | 2 +- include/configs/whistler.h | 2 +- 14 files changed, 20 insertions(+), 20 deletions(-) rename drivers/mmc/{tegra2_mmc.c => tegra_mmc.c} (99%) rename drivers/mmc/{tegra2_mmc.h => tegra_mmc.h} (97%) diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index 8f8e7bf..f27ad37 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -29,7 +29,7 @@ #include <asm/arch/pinmux.h> #include <asm/arch/mmc.h> #include <asm/gpio.h> -#ifdef CONFIG_TEGRA2_MMC +#ifdef CONFIG_TEGRA_MMC #include <mmc.h> #endif @@ -41,7 +41,7 @@ void gpio_config_uart(void) { } -#ifdef CONFIG_TEGRA2_MMC +#ifdef CONFIG_TEGRA_MMC /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 94efb1e..36039c4 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -29,7 +29,7 @@ #include <asm/arch/pinmux.h> #include <asm/arch/mmc.h> #include <asm/gpio.h> -#ifdef CONFIG_TEGRA2_MMC +#ifdef CONFIG_TEGRA_MMC #include <mmc.h> #endif @@ -54,7 +54,7 @@ void gpio_config_uart(void) } #endif -#ifdef CONFIG_TEGRA2_MMC +#ifdef CONFIG_TEGRA_MMC /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 1c2f33f..3ec24df 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -30,7 +30,7 @@ #include <asm/arch/pinmux.h> #include <asm/arch/mmc.h> #include <asm/gpio.h> -#ifdef CONFIG_TEGRA2_MMC +#ifdef CONFIG_TEGRA_MMC #include <mmc.h> #endif diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index c245352..8c9aeb8 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -42,7 +42,7 @@ COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o COBJS-$(CONFIG_SDHCI) += sdhci.o COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o -COBJS-$(CONFIG_TEGRA2_MMC) += tegra2_mmc.o +COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra_mmc.c similarity index 99% rename from drivers/mmc/tegra2_mmc.c rename to drivers/mmc/tegra_mmc.c index fb8a57d..29bf583 100644 --- a/drivers/mmc/tegra2_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -2,7 +2,7 @@ * (C) Copyright 2009 SAMSUNG Electronics * Minkyu Kang <mk7.kang(a)samsung.com> * Jaehoon Chung <jh80.chung(a)samsung.com> - * Portions Copyright 2011 NVIDIA Corporation + * Portions Copyright 2011-2012 NVIDIA Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ #include <asm/io.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> -#include "tegra2_mmc.h" +#include "tegra_mmc.h" /* support 4 mmc hosts */ struct mmc mmc_dev[4]; diff --git a/drivers/mmc/tegra2_mmc.h b/drivers/mmc/tegra_mmc.h similarity index 97% rename from drivers/mmc/tegra2_mmc.h rename to drivers/mmc/tegra_mmc.h index 67c00db..f9cdcaa 100644 --- a/drivers/mmc/tegra2_mmc.h +++ b/drivers/mmc/tegra_mmc.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2009 SAMSUNG Electronics * Minkyu Kang <mk7.kang(a)samsung.com> - * Portions Copyright (C) 2011 NVIDIA Corporation + * Portions Copyright (C) 2011-2012 NVIDIA Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,8 +19,8 @@ * */ -#ifndef __TEGRA2_MMC_H_ -#define __TEGRA2_MMC_H_ +#ifndef __TEGRA_MMC_H_ +#define __TEGRA_MMC_H_ #define TEGRA2_SDMMC1_BASE 0xC8000000 #define TEGRA2_SDMMC2_BASE 0xC8000200 @@ -128,4 +128,4 @@ struct mmc_host { }; #endif /* __ASSEMBLY__ */ -#endif /* __TEGRA2_MMC_H_ */ +#endif /* __TEGRA_MMC_H_ */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 88189be..d13ead9 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -55,7 +55,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/medcom.h b/include/configs/medcom.h index eecfa50..d3d1055 100644 --- a/include/configs/medcom.h +++ b/include/configs/medcom.h @@ -45,7 +45,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/paz00.h b/include/configs/paz00.h index f8bd7dc..0b93226 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -42,7 +42,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 1888276..e73be0b 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -45,7 +45,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 6bbea30..a40f2eb 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -86,7 +86,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index dafca5e..a6f9f54 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -58,7 +58,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 8e95db1..19e2e58 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -49,7 +49,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 6c0c77e..05b2425 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -58,7 +58,7 @@ /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA2_MMC +#define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION -- 1.7.0.4

2 1

[U-Boot] [PATCH 1/2] tegra: add SDMMC1 on SDIO1 funcmux entry
by Stephen Warren 01 Jun '12

01 Jun '12

From: Stephen Warren <swarren(a)nvidia.com> This will be used on TrimSlice. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- arch/arm/cpu/armv7/tegra2/funcmux.c | 7 +++++++ arch/arm/include/asm/arch-tegra2/funcmux.h | 1 + 2 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c index 1559869..820ba4e 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c @@ -127,6 +127,13 @@ int funcmux_select(enum periph_id id, int config) } break; + case PERIPH_ID_SDMMC1: + if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) { + pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1); + pinmux_tristate_disable(PINGRP_SDIO1); + } + break; + case PERIPH_ID_SDMMC2: if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) { pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra2/funcmux.h index 19184d1..b16c496 100644 --- a/arch/arm/include/asm/arch-tegra2/funcmux.h +++ b/arch/arm/include/asm/arch-tegra2/funcmux.h @@ -44,6 +44,7 @@ enum { FUNCMUX_I2C3_DTF = 0, /* SDMMC configs */ + FUNCMUX_SDMMC1_SDIO1_4BIT = 0, FUNCMUX_SDMMC2_DTA_DTD_8BIT = 0, FUNCMUX_SDMMC3_SDB_4BIT = 0, FUNCMUX_SDMMC3_SDB_SLXA_8BIT, -- 1.7.0.4

2 4

[U-Boot] [PATCH V3 1/2] tegra: whistler: reduce and comment network cfg options
by Stephen Warren 01 Jun '12

01 Jun '12

From: Stephen Warren <swarren(a)nvidia.com> CONFIG_CMD_PING/NFS aren't required for Whistler to boot. Add some comments. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v3: Fix duplicate #defines v2: Fix typo in comment Tom, this series replaces patches 3 and 4 of the V2 series I just posted. --- include/configs/whistler.h | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-) diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 2f2a512..6c0c77e 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -74,16 +74,14 @@ #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_USB_ETHER_ASIX + +/* USB networking support */ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_USB_ETHER_ASIX -#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -#define CONFIG_CMD_NFS /* NFS support */ -#define CONFIG_CMD_PING +/* General networking support */ +#define CONFIG_CMD_NET #define CONFIG_CMD_DHCP #include "tegra2-common-post.h" -- 1.7.0.4

2 3

[U-Boot] [PATCH] spi: tegra2: rename tegra2_spi.* to tegra_spi.*
by Tom Warren 01 Jun '12

01 Jun '12

In anticipation of Tegra3 support, start removing/renaming Tegra2-specific files. No functional changes (yet). Also updated copyright to 2012. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- .../asm/arch-tegra2/{tegra2_spi.h => tegra_spi.h} | 9 ++++----- board/nvidia/common/uart-spi-switch.c | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/{tegra2_spi.c => tegra_spi.c} | 4 ++-- include/configs/seaboard.h | 2 +- 5 files changed, 9 insertions(+), 10 deletions(-) rename arch/arm/include/asm/arch-tegra2/{tegra2_spi.h => tegra_spi.h} (95%) rename drivers/spi/{tegra2_spi.c => tegra_spi.c} (98%) diff --git a/arch/arm/include/asm/arch-tegra2/tegra2_spi.h b/arch/arm/include/asm/arch-tegra2/tegra_spi.h similarity index 95% rename from arch/arm/include/asm/arch-tegra2/tegra2_spi.h rename to arch/arm/include/asm/arch-tegra2/tegra_spi.h index ceec428..892d90c 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2_spi.h +++ b/arch/arm/include/asm/arch-tegra2/tegra_spi.h @@ -1,7 +1,7 @@ /* * NVIDIA Tegra2 SPI-FLASH controller * - * Copyright 2010-2011 NVIDIA Corporation + * Copyright 2010-2012 NVIDIA Corporation * * This software may be used and distributed according to the * terms of the GNU Public License, Version 2, incorporated @@ -22,8 +22,8 @@ * MA 02111-1307 USA */ -#ifndef _TEGRA2_SPI_H_ -#define _TEGRA2_SPI_H_ +#ifndef _TEGRA_SPI_H_ +#define _TEGRA_SPI_H_ #include <asm/types.h> @@ -72,5 +72,4 @@ struct spi_tegra { #define SPI_TIMEOUT 1000 #define TEGRA2_SPI_MAX_FREQ 52000000 - -#endif /* _TEGRA2_SPI_H_ */ +#endif /* _TEGRA_SPI_H_ */ diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c index 1ba1afd..307937a 100644 --- a/board/nvidia/common/uart-spi-switch.c +++ b/board/nvidia/common/uart-spi-switch.c @@ -25,7 +25,7 @@ #include <asm/arch/pinmux.h> #include <asm/arch/uart-spi-switch.h> #include <asm/arch/tegra2.h> -#include <asm/arch/tegra2_spi.h> +#include <asm/arch/tegra_spi.h> /* position of the UART/SPI select switch */ diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index c967d87..c20f1f2 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -43,7 +43,7 @@ COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o COBJS-$(CONFIG_SH_SPI) += sh_spi.o COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o -COBJS-$(CONFIG_TEGRA2_SPI) += tegra2_spi.o +COBJS-$(CONFIG_TEGRA_SPI) += tegra_spi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/spi/tegra2_spi.c b/drivers/spi/tegra_spi.c similarity index 98% rename from drivers/spi/tegra2_spi.c rename to drivers/spi/tegra_spi.c index fe7b405..4a3e799 100644 --- a/drivers/spi/tegra2_spi.c +++ b/drivers/spi/tegra_spi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011 NVIDIA Corporation + * Copyright (c) 2010-2012 NVIDIA Corporation * With help from the mpc8xxx SPI driver * With more help from omap3_spi SPI driver * @@ -32,7 +32,7 @@ #include <asm/arch/clock.h> #include <asm/arch/pinmux.h> #include <asm/arch/uart-spi-switch.h> -#include <asm/arch/tegra2_spi.h> +#include <asm/arch/tegra_spi.h> #if defined(CONFIG_SPI_CORRUPTS_UART) #define corrupt_delay() udelay(CONFIG_SPI_CORRUPTS_UART_DLY); diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 643af81..6bbea30 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -67,7 +67,7 @@ #define CONFIG_BOARD_EARLY_INIT_F /* SPI */ -#define CONFIG_TEGRA2_SPI +#define CONFIG_TEGRA_SPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -- 1.7.0.4

2 1