March 2012 - U-Boot

[U-Boot] [PATCH v2] sh: r0p7734: Add support I2C controller
by Nobuhiro Iwamatsu 08 Mar '12

08 Mar '12

This read MAC address from Serial EEPROM and set. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- V2: Remove white space. board/renesas/r0p7734/r0p7734.c | 20 +++++++++++++++++++- include/configs/r0p7734.h | 17 +++++++++++++++++ 2 files changed, 36 insertions(+), 1 deletions(-) diff --git a/board/renesas/r0p7734/r0p7734.c b/board/renesas/r0p7734/r0p7734.c index 80f4329..c1bde54 100644 --- a/board/renesas/r0p7734/r0p7734.c +++ b/board/renesas/r0p7734/r0p7734.c @@ -25,6 +25,7 @@ #include <asm/io.h> #include <asm/processor.h> #include <netdev.h> +#include <i2c.h> DECLARE_GLOBAL_DATA_PTR; @@ -55,6 +56,24 @@ int board_init(void) if (r & MSTPSR1_GETHER) writel((r & ~MSTPSR1_GETHER), MSTPCR1); #endif + + return 0; +} + +int board_late_init(void) +{ + u8 mac[6]; + + /* Read Mac Address and set*/ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_I2C_MODULE); + + /* Read MAC address */ + i2c_read(0x50, 0x10, 0, mac, 6); + + if (is_valid_ether_addr(mac)) + eth_setenv_enetaddr("ethaddr", mac); + return 0; } @@ -75,4 +94,3 @@ int board_eth_init(bd_t *bis) return rc; } #endif - diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index d73cc4d..aa3193d 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -34,6 +34,7 @@ #define CONFIG_400MHZ_MODE 1 /* #define CONFIG_533MHZ_MODE 1 */ +#define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 #define CONFIG_CMD_FLASH @@ -67,6 +68,22 @@ # define CONFIG_SMC911X_BASE (0x84000000) #endif + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SH_SH7734_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_SYS_MAX_I2C_BUS 2 +#define CONFIG_SYS_I2C_MODULE 0 +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x50 +#define CONFIG_SH_I2C_DATA_HIGH 4 +#define CONFIG_SH_I2C_DATA_LOW 5 +#define CONFIG_SH_I2C_CLOCK 500000000 +#define CONFIG_SH_I2C_BASE0 0xFFC70000 +#define CONFIG_SH_I2C_BASE1 0xFFC7100 + /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* Monitor Command Prompt */ -- 1.7.9.1

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[U-Boot] [PATCH] sh: r0p7734: Add support I2C controller
by Nobuhiro Iwamatsu 08 Mar '12

08 Mar '12

This read MAC address from Serial EEPROM and set. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- board/renesas/r0p7734/r0p7734.c | 20 +++++++++++++++++++- include/configs/r0p7734.h | 17 +++++++++++++++++ 2 files changed, 36 insertions(+), 1 deletions(-) diff --git a/board/renesas/r0p7734/r0p7734.c b/board/renesas/r0p7734/r0p7734.c index 80f4329..0af98ea 100644 --- a/board/renesas/r0p7734/r0p7734.c +++ b/board/renesas/r0p7734/r0p7734.c @@ -25,6 +25,7 @@ #include <asm/io.h> #include <asm/processor.h> #include <netdev.h> +#include <i2c.h> DECLARE_GLOBAL_DATA_PTR; @@ -55,6 +56,24 @@ int board_init(void) if (r & MSTPSR1_GETHER) writel((r & ~MSTPSR1_GETHER), MSTPCR1); #endif + + return 0; +} + +int board_late_init(void) +{ + u8 mac[6]; + + /* Read Mac Address and set*/ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_I2C_MODULE); + + /* Read MAC address */ + i2c_read(0x50, 0x10, 0, mac, 6); + + if (is_valid_ether_addr(mac)) + eth_setenv_enetaddr("ethaddr", mac); + return 0; } @@ -75,4 +94,3 @@ int board_eth_init(bd_t *bis) return rc; } #endif - diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index d73cc4d..3e9c531 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -34,6 +34,7 @@ #define CONFIG_400MHZ_MODE 1 /* #define CONFIG_533MHZ_MODE 1 */ +#define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 #define CONFIG_CMD_FLASH @@ -67,6 +68,22 @@ # define CONFIG_SMC911X_BASE (0x84000000) #endif + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SH_SH7734_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_SYS_MAX_I2C_BUS 2 +#define CONFIG_SYS_I2C_MODULE 0 +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x50 +#define CONFIG_SH_I2C_DATA_HIGH 4 +#define CONFIG_SH_I2C_DATA_LOW 5 +#define CONFIG_SH_I2C_CLOCK 500000000 +#define CONFIG_SH_I2C_BASE0 0xFFC70000 +#define CONFIG_SH_I2C_BASE1 0xFFC71000 + /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* Monitor Command Prompt */ -- 1.7.9.1

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[U-Boot] RFC - how to support multipl DRAM chips in a single SPL build?
by Peter Barada 07 Mar '12

07 Mar '12

I'm trying to build a single SPL/u-boot that supports multiple Logic OMAP 35x/37x boards, with multiple configurations of DRAM/NAND/NOR. This is to make our support/production much simpler, and allow one SPL/u-boot "just work" on all or various boards. To do so I need to figure out: 1) Probe for different DDR/NAND chips Our boards have multiple PoP parts on them (e.g. MT46H128M32L2K1-5 512MB DDR/0MB NAND, MT29C4G48MAPLCJI6 256MB DDR/512MB NAND, H8KCS0SJ0AER_MT29C2G24MAKLAJG6 128MB DDR/256MB NAND, etc), and no clear way in SPL to pick the right timings. In my current x-loader code I have a table of SDRC register settings, set them up, and then probe to see if memory exists (including holes), and if a configuration doesn't work then move onto the next set of SDRC settings and try again. 2) Probe for multiple configurations of NOR/NAND Our boards can be populated with PoP/NOR flash in multiple combinations including cases where NAND+NOR exist, NAND or NOR exist, or neither NAND or NOR exist. Currently u-boot has a static belief (driven by CONFIG_ENV_IS_*) of whether NAND/NOR exist and where to load/store the environment. If the runtime detection is inconsistent with u-boot's configuration u-boot wedges due to accessing incomplete structures (i.e. nand_info[0].block_isbad is NULL if no NAND is found causing u-boot to go off in the weeds). I currently have x-loader/u-boot code that does this, but want to identify an approach for doing this in the current u-boot trees(and incorporate such changes), such that it doesn't break other boards/archs, but also minimize impact on SPL/u-boot size... Any suggestions on an approach are much appreciated! -- Peter Barada peter.barada(a)logicpd.com

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[U-Boot] [PATCH 0/4] onenand: OneNAND board dependent probe and Samsung targets fixes
by Lukasz Majewski 07 Mar '12

07 Mar '12

This patch sets add board dependent onenand probes. Several fixes for GONI and C210_universal targets have been added. I'd like to ask other users of OneNAND infrastructure to _TEST_ if changes made on the onenand_base common code haven't broken anything. Tested at: Samsung S5PC110 GONI Samsung S5PC210 Universal Lukasz Majewski (4): onenand:samsung Target dependent OneNAND chip probe function onenand:samsung OneNAND chip probe functions added for GONI and C210_Universal onenand: Replace ONENAND_IS_MLC() test with ONENAND_HAS_4KB() onenand: samsung: Enable support OneNAND support at Samsung's S5PC210_Universal board/samsung/goni/onenand.c | 1 + board/samsung/universal_c210/onenand.c | 2 + drivers/mtd/onenand/onenand_base.c | 88 +++++++++++++++++++++++-------- drivers/mtd/onenand/samsung.c | 10 ++++ include/configs/s5pc210_universal.h | 1 + include/linux/mtd/onenand.h | 5 ++ include/linux/mtd/samsung_onenand.h | 2 + 7 files changed, 86 insertions(+), 23 deletions(-) -- 1.7.2.3

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[U-Boot] [PATCH v4 4/9] tegra: fdt: i2c: Add extra I2C bindings for U-Boot
by Simon Glass 07 Mar '12

07 Mar '12

Add U-Boot's peripheral clock information to the Tegra20 device tree file. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Adjust definitions to fit new peripheral clock bindings - Change 'speed' to 'clock-frequency' - Remove u-boot,pinmux binding (sadly) Changes in v3: - Move speed setting from tegra20.dtsi to board .dts file Changes in v4: - Update to use new tegra2 clock and reset binding arch/arm/dts/tegra20.dtsi | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index d6bc9f1..b6f37c2 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -34,6 +34,7 @@ compatible = "nvidia,tegra20-i2c"; reg = <0x7000C000 0x100>; interrupts = < 70 >; + clocks = <&tegra_car 12>; /* PERIPH_ID_I2C1 */ }; i2c@7000c400 { @@ -42,6 +43,7 @@ compatible = "nvidia,tegra20-i2c"; reg = <0x7000C400 0x100>; interrupts = < 116 >; + clocks = <&tegra_car 54>; /* PERIPH_ID_I2C2 */ }; i2c@7000c500 { @@ -50,14 +52,16 @@ compatible = "nvidia,tegra20-i2c"; reg = <0x7000C500 0x100>; interrupts = < 124 >; + clocks = <&tegra_car 67>; /* PERIPH_ID_I2C3 */ }; i2c@7000d000 { #address-cells = <1>; #size-cells = <0>; - compatible = "nvidia,tegra20-i2c"; + compatible = "nvidia,tegra20-i2c-dvc"; reg = <0x7000D000 0x200>; interrupts = < 85 >; + clocks = <&tegra_car 47>; /* PERIPH_ID_DVC_I2C */ }; i2s@70002800 { -- 1.7.7.3

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[U-Boot] [PATCH v8 15/21] tegra: fdt: Add function to return peripheral/clock ID
by Simon Glass 07 Mar '12

07 Mar '12

A common requirement is to find the clock ID for a peripheral. This is the second cell of the 'clocks' property (the first being the phandle itself). Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v4: - Add fdtdec function to return peripheral ID Changes in v6: - Move peripheral decode function into Tegra's clock.c Changes in v7: - Add belts and braces checking of device tree clock ID Changes in v8: - Only include clock_decode_periph_id() when CONFIG_OF_CONTROL defined arch/arm/cpu/armv7/tegra2/clock.c | 58 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-tegra2/clock.h | 13 +++++++ 2 files changed, 71 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c index 11d2346..a94cf81 100644 --- a/arch/arm/cpu/armv7/tegra2/clock.c +++ b/arch/arm/cpu/armv7/tegra2/clock.c @@ -28,6 +28,7 @@ #include <asm/arch/tegra2.h> #include <common.h> #include <div64.h> +#include <fdtdec.h> /* * This is our record of the current clock rate of each clock. We don't @@ -918,6 +919,63 @@ void clock_ll_start_uart(enum periph_id periph_id) reset_set_enable(periph_id, 0); } +#ifdef CONFIG_OF_CONTROL +/* + * Convert a device tree clock ID to our peripheral ID. They are mostly + * the same but we are very cautious so we check that a valid clock ID is + * provided. + * + * @param clk_id Clock ID according to tegra2 device tree binding + * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid + */ +static enum periph_id clk_id_to_periph_id(int clk_id) +{ + if (clk_id > 95) + return PERIPH_ID_NONE; + + switch (clk_id) { + case 1: + case 2: + case 7: + case 10: + case 20: + case 30: + case 35: + case 49: + case 56: + case 74: + case 76: + case 77: + case 78: + case 79: + case 80: + case 81: + case 82: + case 83: + case 91: + case 95: + return PERIPH_ID_NONE; + default: + return clk_id; + } +} + +int clock_decode_periph_id(const void *blob, int node) +{ + enum periph_id id; + u32 cell[2]; + int err; + + err = fdtdec_get_int_array(blob, node, "clocks", cell, + ARRAY_SIZE(cell)); + if (err) + return -1; + id = clk_id_to_periph_id(cell[1]); + assert(clock_periph_id_isvalid(id)); + return id; +} +#endif /* CONFIG_OF_CONTROL */ + int clock_verify(void) { struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH); diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra2/clock.h index 080ef18..6b12c76 100644 --- a/arch/arm/include/asm/arch-tegra2/clock.h +++ b/arch/arm/include/asm/arch-tegra2/clock.h @@ -177,6 +177,7 @@ enum periph_id { PERIPH_ID_CRAM2, PERIPH_ID_COUNT, + PERIPH_ID_NONE = -1, }; /* Converts a clock number to a clock register: 0=L, 1=H, 2=U */ @@ -355,6 +356,18 @@ unsigned clock_get_rate(enum clock_id clkid); */ void clock_ll_start_uart(enum periph_id periph_id); +/** + * Decode a peripheral ID from a device tree node. + * + * This works by looking up the peripheral's 'clocks' node and reading out + * the second cell, which is the clock number / peripheral ID. + * + * @param blob FDT blob to use + * @param node Node to look at + * @return peripheral ID, or PERIPH_ID_NONE if none + */ +enum periph_id clock_decode_periph_id(const void *blob, int node); + /* * Checks that clocks are valid and prints a warning if not * -- 1.7.7.3

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[U-Boot] legacy images with DTB only / DTB integrity
by Michael Walle 07 Mar '12

07 Mar '12

Hi all, is there a way to create an uImage containing only a DTB (linux device tree). From the uboot source (cmd_bootm.c) i can see that there is support for it but mkimage doesn't handle it correctly. uboot itself distinguishes between a FIT image and a raw DTB image (see boot_get_dtb()). But mkimage assumes that the type IH_TYPE_FLATDT is always a FIT image. I want to do this to be able to check the integrity of the DTB after loading it. AFAIK there is not mechanism for that inside the DTB. Am I on the completly wrong track with that? -- Michael

1 0

[U-Boot] i.MX6: mx6qsabrelite: allow use with Freescale 2.6.38 kernels
by Eric Nelson 07 Mar '12

07 Mar '12

This series of patches is needed to allow main-line U-Boot to be used with Freescale's Linux 2.6.38 non-DT kernel releases. These releases currently require at least the machine type and revision atag entries and are configured to load boot scripts from the ext3 filesystem.

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[U-Boot] [PATCH] i.MX6: imx_ccm is a constant that points to a register set
by Eric Nelson 07 Mar '12

07 Mar '12

If we're going to use globals to point at register banks, they should be constant and visible. --- arch/arm/cpu/armv7/mx6/clock.c | 2 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index ef98563..eb1f09b 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -34,7 +34,7 @@ enum pll_clocks { PLL_ENET, /* ENET PLL */ }; -struct imx_ccm_reg *imx_ccm = (struct imx_ccm_reg *)CCM_BASE_ADDR; +struct imx_ccm_reg *const imx_ccm = (struct imx_ccm_reg *)CCM_BASE_ADDR; void enable_usboh3_clk(unsigned char enable) { diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 3e5c4c2..3eae704 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -297,5 +297,7 @@ struct aipstz_regs { u32 opacr4; }; +extern struct imx_ccm_reg *const imx_ccm ; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */ -- 1.7.9

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[U-Boot] [PATCH] ARM: davinci: fixes for cam_enc_4xx board
by Heiko Schocher 07 Mar '12

07 Mar '12

- change CONFIG_ENV_RANGE to contain 2 nand erase blocks, one for bad block reserve. - remove from the envvariable "img_writeramdisk" the ubifsmount command, as it is not needed. - erase the hole mtd partition containing u-boot - save environment variable "dvn_app_vers" and "dvn_boot_vers" only after installing the new image. changes requested from Marek Vasut: - arm, davinci: fix eldk-4.2 warnings for cam_enc_4xx board - get rid of run_command2 usage needed since patch: commit 009dde1955583e306cf904c864068f3acb0db499 Author: Simon Glass <sjg(a)chromium.org> Date: Tue Feb 14 19:59:20 2012 +0000 Rename run_command2() to run_command() is now in mainline. - add CONFIG_SPL_LIBGENERIC_SUPPORT support - remove CONFIG_CMD_PXE support - fix warning: cam_enc_4xx.c: In function 'menu_handle': cam_enc_4xx.c:609: warning: dereferencing type-punned pointer will break strict-aliasing rules - fix error: arm-linux-ld: u-boot-spl: Not enough room for program headers, try linking with -N Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Tom Rini <tom.rini(a)gmail.com> Cc: Fletzer Martin <Martin.Fletzer(a)ait.ac.at> Cc: Wolfgang Denk <wd(a)denx.de> --- board/ait/cam_enc_4xx/cam_enc_4xx.c | 55 ++++++++++++++++++++++++---------- board/ait/cam_enc_4xx/config.mk | 7 ++++ board/ait/cam_enc_4xx/u-boot-spl.lds | 2 +- include/configs/cam_enc_4xx.h | 13 ++++---- 4 files changed, 54 insertions(+), 23 deletions(-) diff --git a/board/ait/cam_enc_4xx/cam_enc_4xx.c b/board/ait/cam_enc_4xx/cam_enc_4xx.c index bb29cf3..32b28f9 100644 --- a/board/ait/cam_enc_4xx/cam_enc_4xx.c +++ b/board/ait/cam_enc_4xx/cam_enc_4xx.c @@ -21,6 +21,7 @@ #include <common.h> #include <errno.h> +#include <hush.h> #include <linux/mtd/nand.h> #include <nand.h> #include <miiphy.h> @@ -554,7 +555,7 @@ static char *menu_handle(struct menu_display *display) { struct menu *m; int i; - char *choice = NULL; + void *choice = NULL; char key[2]; int ret; char *s; @@ -606,7 +607,7 @@ static char *menu_handle(struct menu_display *display) sprintf(key, "%d", 1); menu_default_set(m, key); - if (menu_get_choice(m, (void **)&choice) != 1) + if (menu_get_choice(m, &choice) != 1) debug("Problem picking a choice!\n"); menu_destroy(m); @@ -653,7 +654,7 @@ static int ait_writeublheader(void) sprintf(s, "%lx", i); ret = setenv("header_addr", s); if (ret == 0) - ret = run_command2("run img_writeheader", 0); + ret = run_command("run img_writeheader", 0); if (ret != 0) break; } @@ -697,7 +698,7 @@ static int ait_menu_install_images(void) setenv("filesize", s); switch (imgs[count].subtype) { case FIT_SUBTYPE_DF_ENV_IMAGE: - ret = run_command2("run img_writedfenv", 0); + ret = run_command("run img_writedfenv", 0); break; case FIT_SUBTYPE_RAMDISK_IMAGE: t = getenv("img_volume"); @@ -713,16 +714,16 @@ static int ait_menu_install_images(void) if (ret != 0) break; - ret = run_command2("run img_writeramdisk", 0); + ret = run_command("run img_writeramdisk", 0); break; case FIT_SUBTYPE_SPL_IMAGE: - ret = run_command2("run img_writespl", 0); + ret = run_command("run img_writespl", 0); break; case FIT_SUBTYPE_UBL_HEADER: ret = ait_writeublheader(); break; case FIT_SUBTYPE_UBOOT_IMAGE: - ret = run_command2("run img_writeuboot", 0); + ret = run_command("run img_writeuboot", 0); break; default: /* not supported type */ @@ -731,8 +732,19 @@ static int ait_menu_install_images(void) count++; } /* now save dvn_* and img_volume env vars to new values */ - if (ret == 0) - ret = run_command2("run savenewvers", 0); + if (ret == 0) { + t = getenv("x_dvn_boot_vers"); + if (t) + setenv("dvn_boot_vers", t); + + t = getenv("x_dvn_app_vers"); + if (t) + setenv("dvn_boot_vers", t); + + setenv("x_dvn_boot_vers", NULL); + setenv("x_dvn_app_vers", NULL); + ret = run_command("run savenewvers", 0); + } return ret; } @@ -749,6 +761,8 @@ static int ait_menu_evaluate_load(char *choice) break; case '2': /* cancel, back to main */ + setenv("x_dvn_boot_vers", NULL); + setenv("x_dvn_app_vers", NULL); break; } @@ -961,7 +975,7 @@ static int ait_menu_check_image(void) if (s) { ret = strcmp(s, imgs[found_uboot].desc); if (ret != 0) { - setenv("dvn_boot_vers", + setenv("x_dvn_boot_vers", imgs[found_uboot].desc); } else { found_uboot = -1; @@ -976,7 +990,7 @@ static int ait_menu_check_image(void) if (s) { ret = strcmp(s, imgs[found_ramdisk].desc); if (ret != 0) { - setenv("dvn_app_vers", + setenv("x_dvn_app_vers", imgs[found_ramdisk].desc); } else { found_ramdisk = -1; @@ -1005,7 +1019,7 @@ static int ait_menu_evaluate_update(char *choice) break; case '2': /* load image */ - ret = run_command2("run load_img", 0); + ret = run_command("run load_img", 0); printf("ret: %d\n", ret); if (ret) return MENU_UPDATE; @@ -1073,9 +1087,9 @@ int menu_show(int bootdelay) { int ret; - run_command2("run saveparms", 0); + run_command("run saveparms", 0); ret = ait_menu_show(&ait_main, bootdelay); - run_command2("run restoreparms", 0); + run_command("run restoreparms", 0); if (ret == MENU_EXIT_BOOTCMD) return 0; @@ -1085,8 +1099,17 @@ int menu_show(int bootdelay) void menu_display_statusline(struct menu *m) { - printf("State: dvn_boot_vers: %s dvn_app_vers: %s\n", - getenv("dvn_boot_vers"), getenv("dvn_app_vers")); + char *s1, *s2; + + s1 = getenv("x_dvn_boot_vers"); + if (!s1) + s1 = getenv("dvn_boot_vers"); + + s2 = getenv("x_dvn_app_vers"); + if (!s2) + s2 = getenv("dvn_app_vers"); + + printf("State: dvn_boot_vers: %s dvn_app_vers: %s\n", s1, s2); return; } #endif diff --git a/board/ait/cam_enc_4xx/config.mk b/board/ait/cam_enc_4xx/config.mk index b1f9b6c..744b927 100644 --- a/board/ait/cam_enc_4xx/config.mk +++ b/board/ait/cam_enc_4xx/config.mk @@ -12,4 +12,11 @@ PAD_TO := 12320 UBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/ublimage.cfg ifndef CONFIG_SPL_BUILD ALL-y += $(obj)u-boot.ubl +else +# as SPL_TEXT_BASE is not page-aligned, we need for some +# linkers the -n flag (Do not page align data), to prevent +# the following error message: +# arm-linux-ld: u-boot-spl: Not enough room for program headers, try linking +# with -N +LDFLAGS_u-boot-spl += -n endif diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds b/board/ait/cam_enc_4xx/u-boot-spl.lds index 6f6e065..52c986e 100644 --- a/board/ait/cam_enc_4xx/u-boot-spl.lds +++ b/board/ait/cam_enc_4xx/u-boot-spl.lds @@ -32,7 +32,7 @@ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { - . = 0x00000000; + . = CONFIG_SPL_TEXT_BASE; . = ALIGN(4); .text : diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 0fee53f..99856eb 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -161,15 +161,14 @@ #define CONFIG_MENU #define CONFIG_MENU_SHOW #define CONFIG_FIT -#define CONFIG_CMD_PXE #define CONFIG_BOARD_IMG_ADDR_R 0x80000000 #ifdef CONFIG_NAND_DAVINCI #define CONFIG_ENV_SIZE (16 << 10) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x180000 +#define CONFIG_ENV_RANGE 0x040000 #define CONFIG_ENV_OFFSET_REDUND 0x1c0000 -#define CONFIG_ENV_RANGE 0x020000 #undef CONFIG_ENV_IS_IN_FLASH #endif @@ -220,6 +219,7 @@ /* Defines for SPL */ #define CONFIG_SPL +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_NAND_LOAD @@ -229,7 +229,7 @@ #define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds" #define CONFIG_SPL_STACK (0x00010000 + 0x7f00) -#define CONFIG_SPL_TEXT_BASE 0x0000020 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE 12320 #ifndef CONFIG_SPL_BUILD @@ -274,6 +274,7 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000 +#define CONFIG_SYS_NAND_U_BOOT_ERA_SIZE 0x100000 /* for UBL header */ #define CONFIG_SYS_UBL_BLOCK (CONFIG_SYS_NAND_PAGE_SIZE) @@ -429,7 +430,7 @@ " 0 3000;nandrbl uboot\0" \ "writeuboot=nandrbl uboot;" \ "nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \ - xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) \ + xstr(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \ ";nand write " xstr(DVN4XX_UBOOT_ADDR_R_UBOOT) \ " " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \ xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \ @@ -466,14 +467,14 @@ "nand write ${img_addr_r} 0 3000;nandrbl uboot\0" \ "img_writeuboot=nandrbl uboot;" \ "nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \ - xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) \ + xstr(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \ ";nand write ${img_addr_r} " \ xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \ xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \ "img_writedfenv=ubi part ubi 2048;" \ "ubi write ${img_addr_r} default ${filesize}\0" \ "img_volume=rootfs1\0" \ - "img_writeramdisk=ubi part ubi 2048;ubifsmount ${img_volume};" \ + "img_writeramdisk=ubi part ubi 2048;" \ "ubi write ${img_addr_r} ${img_volume} ${filesize}\0" \ "load_img=tftp ${fit_addr_r} ${img_file}\0" \ "net_nfs=run load_kernel; " \ -- 1.7.7.6

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