March 2012 - U-Boot

[U-Boot] [PATCH] ARM: Fix malloc area size for versatile and integrator
by Marek Vasut 03 Feb '13

03 Feb '13

These boards couldn't save their environment because they couldn't malloc() the whole size of the sector. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Linus Walleij <linus.walleij(a)linaro.org> --- include/configs/integratorcp.h | 2 +- include/configs/versatile.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 57610a6..511fa1f 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -56,7 +56,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SECT_SIZE + 128*1024) /* * Hardware drivers diff --git a/include/configs/versatile.h b/include/configs/versatile.h index bb835e0..6a9aa30 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -71,7 +71,7 @@ * Size of malloc() pool */ #define CONFIG_ENV_SIZE 8192 -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SECT_SIZE + 128 * 1024) /* * Hardware drivers -- 1.7.9

3 5

[U-Boot] [PATCH v4] Marvell MV88E61XX Switch Driver support
by Prafulla Wadaskar 25 Jan '13

25 Jan '13

Chips supported:- 1. 88E6161 6 port gbe swtich with 5 integrated PHYs 2. 88E6165 6 port gbe swtich with 5 integrated PHYs 2. 88E6132 3 port gbe swtich with 2 integrated PHYs Platform specific configuration supported Note: This driver is supported and tested against kirkwood egiga interface Contributors: Yotam Admon <yotam(a)marvell.com> Michael Blostein <michaelbl(a)marvell.com Reviewed by: Ronen Shitrit <rshitrit(a)marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com> --- Changelog:- v2: updated as per review comments for v1 removed other two drivers form earlier patch debug_prints removed driver moved to drivers/net/ v3: updated as per review comments for v2 miiphy interface used, platform specific dependency resolved Chip id detection and printing added common code forked out some cosmetic and magic number fixes v4: updated as per review comments for v3 mv88e61xx.h added platform specific configuration support added some more documentation references provided cleaned rgmii delay enable related code drivers/net/Makefile | 1 + drivers/net/mv88e61xx.c | 296 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/mv88e61xx.h | 73 ++++++++++++ 3 files changed, 370 insertions(+), 0 deletions(-) create mode 100644 drivers/net/mv88e61xx.c create mode 100644 drivers/net/mv88e61xx.h diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a360a50..7d397d6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -46,6 +46,7 @@ COBJS-$(CONFIG_MACB) += macb.o COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o +COBJS-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o COBJS-$(CONFIG_NATSEMI) += natsemi.o COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o diff --git a/drivers/net/mv88e61xx.c b/drivers/net/mv88e61xx.c new file mode 100644 index 0000000..713e728 --- /dev/null +++ b/drivers/net/mv88e61xx.c @@ -0,0 +1,296 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Prafulla Wadaskar <prafulla(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include "mv88e61xx.h" + +/* Chip Address mode + * The Switch support two modes of operation + * 1. single chip mode and + * 2. Multi-chip mode + * Refer section 9.2 &9.3 in chip datasheet-02 for more details + * + * By default single chip mode is configured + * multichip mode operation can be configured in board header + */ +#ifndef CONFIG_MV88E61XX_MULTICHIP_ADRMODE +#define mv88e61xx_wr_phy miiphy_write +#define mv88e61xx_rd_phy miiphy_read +#else + +static int mv88e61xx_busychk_multic(u32 devaddr) +{ + u32 reg = 0; + u32 timeout = MV88E61XX_PHY_TIMEOUT; + + /* Poll till SMIBusy bit is clear */ + do { + miiphy_read(name, devaddr, 0x0, &reg); + if (timeout-- == 0) { + printf("SMI busy timeout\n"); + return -1; + } + } while (reg & BIT15); + return 0; +} + +static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data) +{ + u16 reg; + u32 mii_dev_addr; + + /* command to read PHY dev address */ + miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr); + mv88e61xx_busychk_multic(mii_dev_addr); + /* Write data to Switch indirect data register */ + miiphy_write(name, mii_dev_addr, 0x1, data); + /* Write command to Switch indirect command register (write) */ + miiphy_write(name, mii_dev_addr, 0x0, + reg_ofs | (phy_adr << 5) | BIT10 | BIT12 | BIT15); +} + +static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data) +{ + u16 reg; + u32 mii_dev_addr; + + /* command to read PHY dev address */ + miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr); + mv88e61xx_busychk_multic(mii_dev_addr); + /* Write command to Switch indirect command register (read) */ + miiphy_write(name, mii_dev_addr, 0x0, + reg_ofs | (phy_adr << 5) | BIT10 | BIT12 | BIT15); + mv88e61xx_busychk_multic(mii_dev_addr); + /* Read data from Switch indirect data register */ + miiphy_read(name, mii_dev_addr, 0x1, (u16 *) & data); +} +#endif /* CONFIG_MV88E61XX_MULTICHIP_ADRMODE */ + +static void mv88e61xx_vlaninit(struct mv88f61xx_config *swconfig, + u32 max_prtnum, u32 ports_ofs) +{ + u32 prt; + u16 reg; + char *name = swconfig->name; + u32 cpu_port = swconfig->cpuport; + u32 port_mask = swconfig->ports_enabled; + + /* be sure all ports are disabled */ + for (prt = 0; prt < max_prtnum; prt++) { + mv88e61xx_rd_phy(name, ports_ofs + prt, MV88E61XX_PRT_CTRL_REG, + &reg); + reg &= ~0x3; + mv88e61xx_wr_phy(name, ports_ofs + prt, MV88E61XX_PRT_CTRL_REG, + reg); + } + /* Set CPU port VID to 0x1 */ + mv88e61xx_rd_phy(name, (ports_ofs + cpu_port), MV88E61XX_PRT_VID_REG, + &reg); + reg &= ~0xfff; + reg |= 0x1; + mv88e61xx_wr_phy(name, (ports_ofs + cpu_port), MV88E61XX_PRT_VID_REG, + reg); + + /* Setting Port default priority for all ports to zero */ + for (prt = 0; prt < max_prtnum; prt++) { + mv88e61xx_rd_phy(name, ports_ofs + prt, MV88E61XX_PRT_VID_REG, + &reg); + reg &= ~0xc000; + mv88e61xx_wr_phy(name, ports_ofs + prt, MV88E61XX_PRT_VID_REG, + reg); + } + /* Setting VID and VID map for all ports except CPU port */ + for (prt = 0; prt < max_prtnum; prt++) { + /* only for enabled ports */ + if ((1 << prt) & port_mask) { + /* skip CPU port */ + if (prt == cpu_port) + continue; + + /* + * set Ports VLAN Mapping. + * port prt <--> cpu_port VLAN #prt+1. + */ + + mv88e61xx_rd_phy(name, ports_ofs + prt, + MV88E61XX_PRT_VID_REG, &reg); + reg &= ~0x0fff; + reg |= (prt + 1); + mv88e61xx_wr_phy(name, ports_ofs + prt, + MV88E61XX_PRT_VID_REG, reg); + + /* + * Set Vlan map table for all ports to send only to + * cpu_port + */ + mv88e61xx_rd_phy(name, ports_ofs + prt, + MV88E61XX_PRT_VMAP_REG, &reg); + reg &= ~((1 << max_prtnum) - 1); + reg |= (1 << cpu_port); + mv88e61xx_wr_phy(name, ports_ofs + prt, + MV88E61XX_PRT_VMAP_REG, reg); + } + } + /* Set Vlan map table for cpu_port to see all ports */ + mv88e61xx_rd_phy(name, (ports_ofs + cpu_port), MV88E61XX_PRT_VMAP_REG, + &reg); + reg &= ~((1 << max_prtnum) - 1); + reg |= port_mask & ~(1 << cpu_port); + mv88e61xx_wr_phy(name, (ports_ofs + cpu_port), MV88E61XX_PRT_VMAP_REG, + reg); + + /* + * enable only appropriate ports to forwarding mode + * and disable the others + */ + for (prt = 0; prt < max_prtnum; prt++) { + if ((1 << prt) & port_mask) { + mv88e61xx_rd_phy(name, ports_ofs + prt, + MV88E61XX_PRT_CTRL_REG, &reg); + reg |= 0x3; + mv88e61xx_wr_phy(name, ports_ofs + prt, + MV88E61XX_PRT_CTRL_REG, reg); + } else { + /* Disable port */ + mv88e61xx_rd_phy(name, ports_ofs + prt, + MV88E61XX_PRT_CTRL_REG, &reg); + reg &= ~0x3; + mv88e61xx_wr_phy(name, ports_ofs + prt, + MV88E61XX_PRT_CTRL_REG, reg); + } + } +} + +/* + * Make sure SMIBusy bit cleared before another + * SMI operation can take place + */ +static int mv88361xx_busychk(char *name) +{ + u32 reg = 0; + u32 timeout = MV88E61XX_PHY_TIMEOUT; + do { + mv88e61xx_rd_phy(name, MV88E61XX_GLB2REG_DEVADR, + MV88E61XX_PHY_CMD, (u16 *) & reg); + if (timeout-- == 0) { + printf("SMI busy timeout\n"); + return -1; + } + } while (reg & BIT28); /* busy mask */ + return 0; +} + +/* + * Marvell 88E61XX Switch initialization + */ +int mv_switch_88e61xx_init(struct mv88f61xx_config *swconfig) +{ + u32 prt; + u16 reg; + char *idstr; + char *name = swconfig->name; + + if (miiphy_set_current_dev(name)) { + printf("%s failed\n", __FUNCTION__); + return -1; + } + + if (swconfig->mode != MV88F61XX_MODE_SW_MANAGEED) { + printf("Unsupported mode %s failed\n", __FUNCTION__); + return -1; + } + + if (swconfig->cpuport < 4) { + swconfig->cpuport = 5; + printf("Invalid cpu port config, using default port5\n"); + } + + mv88e61xx_rd_phy(name, MV88E61XX_PRT_OFST, PHY_PHYIDR2, &reg); + reg &= 0xfff0; + if (reg == 0x1610) + idstr = "88E6161"; + if (reg == 0x1650) + idstr = "88E6165"; + if (reg == 0x1210) { + idstr = "88E6123"; + swconfig->ports_enabled &= 0x023; /* ports 2,3,4 no available */ + } + + /* Init vlan */ + mv88e61xx_vlaninit(swconfig, MV88E61XX_MAX_PORTS_NUM, + MV88E61XX_PRT_OFST); + + if (swconfig->rgmii_delay == MV88F61XX_RGMII_DELAY_EN) { + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 9.5 of chip datasheet-02 + */ + mv88e61xx_wr_phy(name, MV88E61XX_PRT_OFST + 5, + MV88E61XX_RGMII_TIMECTRL_REG, 0x18); + mv88e61xx_wr_phy(name, MV88E61XX_PRT_OFST + 4, + MV88E61XX_RGMII_TIMECTRL_REG, 0xc1e7); + } + + for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + if (prt != swconfig->cpuport) { + /* Write Copper Specific control reg1 (0x14) for- + * Enable Phy power up + * Energy Detect on (sense&Xmit NLP Periodically + * reset other settings default + */ + mv88e61xx_wr_phy(name, MV88E61XX_GLB2REG_DEVADR, + MV88E61XX_PHY_DATA, 0x3360); + mv88e61xx_wr_phy(name, MV88E61XX_GLB2REG_DEVADR, + MV88E61XX_PHY_CMD, + (0x9410 | (prt << 5))); + + if (mv88361xx_busychk(name)) + return -1; + + /* Write PHY ctrl reg (0x0) to apply + * Phy reset (BIT15=low) + * reset other default values + */ + mv88e61xx_wr_phy(name, MV88E61XX_GLB2REG_DEVADR, + MV88E61XX_PHY_DATA, 0x1140); + mv88e61xx_wr_phy(name, MV88E61XX_GLB2REG_DEVADR, + MV88E61XX_PHY_CMD, + (0x9400 | (prt << 5))); + + if (mv88361xx_busychk(name)) + return -1; + } + + /*Program port state */ + mv88e61xx_rd_phy(name, MV88E61XX_PRT_OFST + prt, + MV88E61XX_PRT_CTRL_REG, &reg); + mv88e61xx_wr_phy(name, MV88E61XX_PRT_OFST + prt, + MV88E61XX_PRT_CTRL_REG, + reg | (swconfig->portstate & 0x03)); + } + + printf("%s Initialized on %s\n", idstr, name); + return 0; +} diff --git a/drivers/net/mv88e61xx.h b/drivers/net/mv88e61xx.h new file mode 100644 index 0000000..f1c86a6 --- /dev/null +++ b/drivers/net/mv88e61xx.h @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Prafulla Wadaskar <prafulla(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _MV88E61XX_H +#define _MV88E61XX_H + +#define PORT(_x) (1 << _x) +#define MV88E61XX_CPU_PORT 0x5 +#define MV88E61XX_MAX_PORTS_NUM 0x6 + +#define MV88E61XX_PHY_TIMEOUT 100000 + +#define MV88E61XX_PRT_STS_REG 0x1 +#define MV88E61XX_PRT_CTRL_REG 0x4 +#define MV88E61XX_PRT_VMAP_REG 0x6 +#define MV88E61XX_PRT_VID_REG 0x7 + +#define MV88E61XX_PRT_OFST 0x10 +#define MV88E61XX_PHY_CMD 0x18 +#define MV88E61XX_PHY_DATA 0x19 +#define MV88E61XX_RGMII_TIMECTRL_REG 0x1A +#define MV88E61XX_GLB2REG_DEVADR 0x1C + +/* constants for switch configuration */ +enum mv88f61xx_cfg_mode { + MV88F61XX_MODE_SW_MANAGEED, + MV88F61XX_MODE_SW_UNMANAGEED +}; + +enum mv88f61xx_cfg_rgmiid { + MV88F61XX_RGMII_DELAY_DIS, + MV88F61XX_RGMII_DELAY_EN +}; + +enum mv88f61xx_cfg_prtstt { + MV88E61XX_PORTSTT_DISABLED, + MV88E61XX_PORTSTT_BLOCKING, + MV88E61XX_PORTSTT_LEARNING, + MV88E61XX_PORTSTT_FORWARDING +}; + +/* switch configuration structure */ +struct mv88f61xx_config { + char *name; + enum mv88f61xx_cfg_mode mode; + enum mv88f61xx_cfg_rgmiid rgmii_delay; + enum mv88f61xx_cfg_prtstt portstate; + u32 ports_enabled; + u8 cpuport; +}; + +#endif /* _MV88E61XX_H */ -- 1.5.3.3

5 11

[U-Boot] Read-only env variables
by Joe Hershberger 15 Jan '13

15 Jan '13

Hi u-boot, I see u-boot supports readonly serial# and ethaddr, but I have a few other variables that I need to be read-only. I'm planning to implement a generic list of variables that cannot be changed or deleted. I'm interested to know what sort of specification people would find most appropriate. My current thought is to follow the same delimiter as the env itself, i.e. null separated list with double null terminator. This list would then be defined in the board config header. It also seems that you should be able to specify simple access rules for each variable name perhaps using "=<val>" after each var name where <val> could have constants (probably numbers for performance, but could be string literals) to define modes. Right now I'm thinking read-only, create-only, change-default, and change-only (i.e no delete) are the modes that make sense. I'm also interested if anyone would be opposed to simply using this new specification of readonly vars to implement the serial# and ethaddr protection. The CONFIG_HAS_UID is a bit odd... should that be available in general for read-only vars? Comments? Thanks, -Joe

10 123

[U-Boot] [PATCH v3] davinci: cleanup davinci_sync_env_enetaddr() fucntion
by Manjunath Hadli 14 Jan '13

14 Jan '13

check for the return status for eth_getenv_enetaddr_by_index() and eth_setenv_enetaddr() functions and print appropriate message on failure. Signed-off-by: Manjunath Hadli <manjunath.hadli(a)ti.com> Cc: Tom Rini <trini(a)ti.com> Cc: Mike Frysinger <vapier(a)gentoo.org> Cc: Wolfgang Denk <wd(a)denx.de> --- Changes for v3: undo conversion of debug statement to printf(). Changes for v2: Removed additional check of comparing ethernet address is all zeros, As the core code already calls is_valid_ether_addr() and one of the checks in there is for all zeros. arch/arm/cpu/arm926ejs/davinci/misc.c | 9 ++++++--- 1 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/misc.c b/arch/arm/cpu/arm926ejs/davinci/misc.c index 5f510b6..c310c69 100644 --- a/arch/arm/cpu/arm926ejs/davinci/misc.c +++ b/arch/arm/cpu/arm926ejs/davinci/misc.c @@ -101,9 +101,10 @@ void davinci_emac_mii_mode_sel(int mode_sel) void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) { uint8_t env_enetaddr[6]; + int ret; - eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr); - if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) { + ret = eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr); + if (ret) { /* * There is no MAC address in the environment, so we * initialize it from the value in the EEPROM. @@ -111,8 +112,10 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) debug("### Setting environment from EEPROM MAC address = " "\"%pM\"\n", env_enetaddr); - eth_setenv_enetaddr("ethaddr", rom_enetaddr); + ret = !eth_setenv_enetaddr("ethaddr", rom_enetaddr); } + if (!ret) + printf("Failed to set mac address from EEPROM\n"); } #endif /* CONFIG_DRIVER_TI_EMAC */ -- 1.6.2.4

3 2

[U-Boot] Pull request for u-boot-marvell.git
by Prafulla Wadaskar 10 Jan '13

10 Jan '13

Dear Albert Please kindly pull The following changes since commit ca849aa4b86b282f837c58a0b129460ebfad2239: David MÃ¼ller (ELSOFT AG) (1): ARM: activate DISPLAY_CPUINFO for VCMA9 + SMDK2410 board are available in the git repository at: u-boot-marvell.git master branch. Albert ARIBAUD (5): edminiv2: add hush parser, cmdline editing and long help Rename ehci-kirkwood as ehci-marvell Remove kirkwood-specifics from marvell EHCI driver orion5x: add USB host ehci-marvell support edminiv2: add USB host support Holger Brunck (2): arm/km: speed up i2c access for keymile boards arm/km: checkpatch cleanup Ian Campbell (1): kirkwood_spi: correct access to irq_mask register Michael Walle (1): arm, arm-kirkwood: disable l2c before linux boot Prafulla Wadaskar (1): bugfix: all Marvell specific build fails due to undefined reference to `get_ticks' Stefan (1): kirkwood: add support for D-Link DNS-325 MAINTAINERS | 4 + arch/arm/cpu/arm926ejs/armada100/timer.c | 18 ++ arch/arm/cpu/arm926ejs/cache.c | 9 + arch/arm/cpu/arm926ejs/cpu.c | 2 + arch/arm/cpu/arm926ejs/kirkwood/Makefile | 1 + arch/arm/cpu/arm926ejs/kirkwood/cache.c | 34 ++++ arch/arm/cpu/arm926ejs/kirkwood/timer.c | 18 ++ arch/arm/cpu/arm926ejs/orion5x/timer.c | 18 ++ arch/arm/cpu/arm926ejs/pantheon/timer.c | 18 ++ arch/arm/include/asm/arch-kirkwood/config.h | 2 +- arch/arm/include/asm/arch-kirkwood/kirkwood.h | 12 ++ arch/arm/include/asm/arch-orion5x/orion5x.h | 12 ++ board/d-link/dns325/Makefile | 49 +++++ board/d-link/dns325/dns325.c | 148 ++++++++++++++ board/d-link/dns325/dns325.h | 48 +++++ board/d-link/dns325/kwbimage.cfg | 208 ++++++++++++++++++++ board/keymile/km_arm/km_arm.c | 23 +-- boards.cfg | 1 + drivers/spi/kirkwood_spi.c | 2 +- drivers/usb/host/Makefile | 2 +- .../usb/host/{ehci-kirkwood.c => ehci-marvell.c} | 36 ++-- include/configs/dns325.h | 188 ++++++++++++++++++ include/configs/edminiv2.h | 24 +++ include/configs/km/km_arm.h | 2 +- 24 files changed, 849 insertions(+), 30 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c create mode 100644 board/d-link/dns325/Makefile create mode 100644 board/d-link/dns325/dns325.c create mode 100644 board/d-link/dns325/dns325.h create mode 100644 board/d-link/dns325/kwbimage.cfg rename drivers/usb/host/{ehci-kirkwood.c => ehci-marvell.c} (73%) create mode 100644 include/configs/dns325.h Regards.. Prafulla . . .

4 47

[U-Boot] Secure update of uboot devices?
by Andreas Bäck 08 Jan '13

08 Jan '13

With the new threats like Stuxnet and Duqu one need to improve on how new updates to software is distrubuted to devcies so one can be sure that it's not a hacked or modified software that runs in the device. We use uboot + usb stick to update the software in our devices. Have anyone been trying out to add e.g cryptated,certificates or rsa keys to uboot?

5 6

[U-Boot] ERROR: CTL:TIMEOUT - USB porting issue for UBoot on S3C2450
by dongdaking 23 Nov '12

23 Nov '12

Hi, I am porting UBoot on S3C2450 and has an USB issue. Here is an error message: ERROR: CTL:TIMEOUT USB device not responding, giving up (status=20) 2 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found The problem seems submit_common_msg couldn't get description of USB flash memory device Could I have help? Please tell me if you had this issue before. Thank you for your helping Here is a log data usb start (Re)start USB... USB: INFO: aligned ghcca c3e4f900 DEBUG: USB HC reset_hc usb-smdk2450: ctrl = 0x9F ; DEBUG: OHCI controller usb-smdk2450 state DEBUG: control: 0x0000008f HCFS=operational IE PLE CBSR=3 DEBUG: cmdstatus: 0x00000000 SOC=0 DEBUG: intrstatus: 0x00000044 RHSC SF DEBUG: intrenable: 0x00000053 RHSC UE WDH SO DEBUG: hcca frame #0000 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS scanning bus for devices... New Device 0 start 0st usb_new_device usb_control_msg: request: 0x6, requesttype: 0x80 value 0x100 index 0x0 length 0x40 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 INFO: Root-Hub: adr: 0 cmd(8): 00000680 0100 0000 0040 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:64/64 stat:0x0 start 1st usb_new_device usb_control_msg: request: 0x6, requesttype: 0x80 value 0x100 index 0x0 length 0x40 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 INFO: Root-Hub: adr: 0 cmd(8): 00000680 0100 0000 0040 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:64/64 stat:0x0 start 2st usb_new_device usb_control_msg: request: 0x6, requesttype: 0x80 value 0x100 index 0x0 length 0x40 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 INFO: Root-Hub: adr: 0 cmd(8): 00000680 0100 0000 0040 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:64/64 stat:0x0 set address 1 usb_control_msg: request: 0x5, requesttype: 0x0 value 0x1 index 0x0 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 0,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 0,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000500 0001 0000 0000 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 0,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x6, requesttype: 0x80 value 0x100 index 0x0 length 0x12 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/18 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/18 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000680 0100 0000 0012 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:18/18 stat:0x0 usb_control_msg: request: 0x6, requesttype: 0x80 value 0x200 index 0x0 length 0x8 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/8 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/8 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000680 0200 0000 0008 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:8/8 stat:0x0 usb_control_msg: request: 0x6, requesttype: 0x80 value 0x200 index 0x0 length 0x19 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/25 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/25 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000680 0200 0000 0019 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:25/25 stat:0x0 get_conf_no 0 Result 25, wLength 25 if 0, ep 0 ##EP epmaxpacketin[1] = 2 set configuration 1 usb_control_msg: request: 0x9, requesttype: 0x0 value 0x1 index 0x0 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000900 0001 0000 0000 INFO: WR:status 0x10000 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 new device strings: Mfr=0, Product=1, SerialNumber=0 usb_control_msg: request: 0x6, requesttype: 0x80 value 0x300 index 0x0 length 0xFF INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/255 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/255 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000680 0300 0000 00ff DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:255/255 stat:0x0 USB device number 1 default language ID 0x409 usb_control_msg: request: 0x6, requesttype: 0x80 value 0x301 index 0x409 length 0xFF INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/255 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/255 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000680 0301 0409 00ff DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:255/255 stat:0x0 Manufacturer Product OHCI Root Hub SerialNumber usb_control_msg: request: 0x6, requesttype: 0xA0 value 0x2900 index 0x0 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000006a0 2900 0000 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 usb_control_msg: request: 0x6, requesttype: 0xA0 value 0x2900 index 0x0 length 0x9 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/9 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/9 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000006a0 2900 0000 0009 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:9/9 stat:0x0 usb_control_msg: request: 0x0, requesttype: 0xA0 value 0x0 index 0x0 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000000a0 0000 0000 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 usb_control_msg: request: 0x3, requesttype: 0x23 value 0x8 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000323 0008 0001 0000 INFO: WR:portstatus[0] 0x100 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x3, requesttype: 0x23 value 0x8 index 0x2 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000323 0008 0002 0000 INFO: WR:portstatus[1] 0x100 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x0, requesttype: 0xA3 value 0x0 index 0x1 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000000a3 0000 0001 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 usb_control_msg: request: 0x0, requesttype: 0xA3 value 0x0 index 0x1 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000000a3 0000 0001 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00010101 CSC PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 usb_control_msg: request: 0x1, requesttype: 0x23 value 0x10 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000123 0010 0001 0000 INFO: WR:portstatus[0] 0x10000 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00000101 PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x3, requesttype: 0x23 value 0x4 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000323 0004 0001 0000 INFO: WR:portstatus[0] 0x10 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00100103 PRSC PPS PES CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x0, requesttype: 0xA3 value 0x0 index 0x1 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000000a3 0000 0001 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00100103 PRSC PPS PES CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 usb_control_msg: request: 0x1, requesttype: 0x23 value 0x14 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000123 0014 0001 0000 INFO: WR:portstatus[0] 0x100000 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00000103 PPS PES CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 New Device 1 start 0st usb_new_device usb_control_msg: request: 0x6, requesttype: 0x80 value 0x100 index 0x0 length 0x40 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 DEBUG: SUB URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x80000000 DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. DEBUG: % DEBUG: hc_interrupt: returning.. ERROR: hc_interrupt: returning.. ERROR: CTL:TIMEOUT DEBUG: submit_common_msg: TO status ff DEBUG: RET(ctlr) URB:[ 0] dev: 0,ep: 0-I,type:CTRL,len:0/64 stat:0x20 usb_new_device: 64 byte descr usb_control_msg: request: 0x3, requesttype: 0x23 value 0x4 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000323 0004 0001 0000 INFO: WR:portstatus[0] 0x10 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00100103 PRSC PPS PES CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x0, requesttype: 0xA3 value 0x0 index 0x1 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000000a3 0000 0001 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00100103 PRSC PPS PES CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 usb_control_msg: request: 0x1, requesttype: 0x23 value 0x14 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000123 0014 0001 0000 INFO: WR:portstatus[0] 0x100000 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00000103 PPS PES CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 set address 2 usb_control_msg: request: 0x5, requesttype: 0x0 value 0x2 index 0x0 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 0,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 ERROR: submit_control_message: pipesize for pipe 80000000 is zero USB device not accepting new address (error=80000000) usb_control_msg: request: 0x1, requesttype: 0x23 value 0x1 index 0x1 length 0x0 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 00000123 0001 0001 0000 INFO: WR:portstatus[0] 0x1 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00000101 PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-O,type:CTRL,len:0/0 stat:0x0 usb_control_msg: request: 0x0, requesttype: 0xA3 value 0x0 index 0x2 length 0x4 INFO: submit_control_msg DEBUG: SUB URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 DEBUG: SUB(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:0/4 stat:0x80000000 INFO: Root-Hub: adr: 1 cmd(8): 000000a3 0000 0002 0004 DEBUG: roothub.a: 02001202 POTPGT=2 NOCP NPS NDP=2 DEBUG: roothub.b: 00000000 PPCM=0000 DR=0000 DEBUG: roothub.status: 00000000 DEBUG: roothub.portstatus [0] = 0x00000101 PPS CCS DEBUG: roothub.portstatus [1] = 0x00000100 PPS DEBUG: RET(rh) URB:[ 0] dev: 1,ep: 0-I,type:CTRL,len:4/4 stat:0x0 2 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found Thank you a lot. Best regards -- View this message in context: http://old.nabble.com/ERROR%3A-CTL%3ATIMEOUT---USB-porting-issue-for-UBoot-… Sent from the Uboot - Users mailing list archive at Nabble.com.

2 1

[U-Boot] [PATCH 2/2] usb: r8a66597: Switched from variable to only macro
by Nobuhiro Iwamatsu 15 Nov '12

15 Nov '12

Some variables are initialized with a value defined by macro. This was changed to use the macro directly. And the variable not to use deleted it. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/usb/host/r8a66597-hcd.c | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index ab1b8d0..f5a7e30 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -31,9 +31,6 @@ #endif static const char hcd_name[] = "r8a66597_hcd"; -static unsigned short clock = CONFIG_R8A66597_XTAL; -static unsigned short vif = CONFIG_R8A66597_LDRV; -static unsigned short endian = CONFIG_R8A66597_ENDIAN; static struct r8a66597 gr8a66597; static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport) @@ -96,7 +93,7 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) } } while ((tmp & USBE) != USBE); r8a66597_bclr(r8a66597, USBE, SYSCFG0); - r8a66597_mdfy(r8a66597, clock, XTAL, SYSCFG0); + r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0); i = 0; r8a66597_bset(r8a66597, XCKE, SYSCFG0); @@ -162,7 +159,7 @@ static int enable_controller(struct r8a66597 *r8a66597) if (ret < 0) return ret; - r8a66597_bset(r8a66597, vif & LDRV, PINCFG); + r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG); r8a66597_bset(r8a66597, USBE, SYSCFG0); r8a66597_bset(r8a66597, INTL, SOFCFG); @@ -170,9 +167,9 @@ static int enable_controller(struct r8a66597 *r8a66597) r8a66597_write(r8a66597, 0, INTENB1); r8a66597_write(r8a66597, 0, INTENB2); - r8a66597_bset(r8a66597, endian & BIGEND, CFIFOSEL); - r8a66597_bset(r8a66597, endian & BIGEND, D0FIFOSEL); - r8a66597_bset(r8a66597, endian & BIGEND, D1FIFOSEL); + r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL); + r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL); + r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL); r8a66597_bset(r8a66597, TRNENSEL, SOFCFG); for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) @@ -673,7 +670,6 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe, int stat = 0; __u16 bmRType_bReq; __u16 wValue; - __u16 wIndex; __u16 wLength; unsigned char data[32]; @@ -686,7 +682,6 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe, bmRType_bReq = cmd->requesttype | (cmd->request << 8); wValue = cpu_to_le16 (cmd->value); - wIndex = cpu_to_le16 (cmd->index); wLength = cpu_to_le16 (cmd->length); switch (bmRType_bReq) { -- 1.7.9.1

2 3

[U-Boot] [PATCH 00/14] Nokia RX-51 support
by Pali Rohár 02 Nov '12

02 Nov '12

This patch series add support for new board Nokia RX-51 (aka N900). Last two patches adding on screen bootmenu support. This series supersedes the last sent version. Pali Rohár (14): arm,omap3: Define save_boot_params in lowlevel_init.S for SPL only arm: Optionally use existing atags in bootm.c Add power bus message definitions in twl4030.h Fix function readline in main.c cfb_console: Fix function console_scrollup cfb_console: Add function console_clear and console_clear_line cfb_console: Add functions for moving with cursor cfb_console: Add support for some ANSI terminal escape codes New command clear: Clear the ANSI terminal New config variable CONFIG_MENUCMD New config variable CONFIG_PREMONITOR New board support: Nokia RX-51 aka N900 New command bootmenu: ANSI terminal Boot Menu support RX-51: Add support for bootmenu README | 2 + arch/arm/cpu/armv7/omap3/lowlevel_init.S | 4 +- arch/arm/lib/bootm.c | 39 +++- board/nokia/rx51/Makefile | 46 ++++ board/nokia/rx51/lowlevel_init.S | 79 ++++++ board/nokia/rx51/rx51.c | 381 ++++++++++++++++++++++++++++++ board/nokia/rx51/rx51.h | 378 +++++++++++++++++++++++++++++ boards.cfg | 1 + common/Makefile | 2 + common/cmd_bootmenu.c | 366 ++++++++++++++++++++++++++++ common/cmd_clear.c | 42 ++++ common/env_common.c | 3 + common/main.c | 89 ++++++- drivers/video/cfb_console.c | 346 +++++++++++++++++++++++++-- include/common.h | 20 ++ include/config_cmd_all.h | 2 + include/configs/nokia_rx51.h | 375 +++++++++++++++++++++++++++++ include/twl4030.h | 98 ++++++++ 18 files changed, 2233 insertions(+), 40 deletions(-) create mode 100644 board/nokia/rx51/Makefile create mode 100644 board/nokia/rx51/lowlevel_init.S create mode 100644 board/nokia/rx51/rx51.c create mode 100644 board/nokia/rx51/rx51.h create mode 100644 common/cmd_bootmenu.c create mode 100644 common/cmd_clear.c create mode 100644 include/configs/nokia_rx51.h -- 1.7.5.4

12 219

[U-Boot] [PATCH 0/5] Support for qualcomm msm7630 board
by mohamed.haneef＠lntinfotech.com 26 Oct '12

26 Oct '12

From: Mohamed Haneef <mohamed.haneef(a)lntinfotech.com> This is a patch series for msm7630 board. The Patches contain the following support * low speed uart for msm7630 * interprocessor communication * msm7630 soc * msm7630 surf board Mohamed Haneef (5): msm7x30: Add support for low speed uart on msm7x30 msm7x30: Add support for interprocessor communication msm7x30: Add support for Qualcomm msm7630 soc Add support for mmc read and writes msm7x30: Add support for msm7630_surf board arch/arm/cpu/armv7/msm7630/Makefile | 59 +++ arch/arm/cpu/armv7/msm7630/acpuclock.c | 328 +++++++++++++ arch/arm/cpu/armv7/msm7630/board.c | 58 +++ arch/arm/cpu/armv7/msm7630/config.mk | 1 + arch/arm/cpu/armv7/msm7630/gpio.c | 229 +++++++++ arch/arm/cpu/armv7/msm7630/lowlevel_init.S | 626 +++++++++++++++++++++++++ arch/arm/cpu/armv7/msm7630/timer.c | 148 ++++++ arch/arm/include/asm/arch-msm7630/adm.h | 28 ++ arch/arm/include/asm/arch-msm7630/gpio.h | 47 ++ arch/arm/include/asm/arch-msm7630/gpio_hw.h | 168 +++++++ arch/arm/include/asm/arch-msm7630/iomap.h | 96 ++++ arch/arm/include/asm/arch-msm7630/mmc.h | 399 ++++++++++++++++ arch/arm/include/asm/arch-msm7630/proc_comm.h | 42 ++ arch/arm/include/asm/arch-msm7630/sys_proto.h | 29 ++ board/qcom/msm7630_surf/Makefile | 55 +++ board/qcom/msm7630_surf/msm7630_surf.c | 155 ++++++ board/qcom/msm7630_surf/msm7630_surf.h | 30 ++ boards.cfg | 1 + drivers/misc/Makefile | 1 + drivers/misc/msm_proc_comm.c | 303 ++++++++++++ drivers/mmc/Makefile | 1 + drivers/mmc/qc_mmc.c | 584 +++++++++++++++++++++++ drivers/serial/Makefile | 1 + drivers/serial/serial_msm_uart.c | 206 ++++++++ include/configs/msm7630_surf.h | 131 +++++ 25 files changed, 3726 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7630/Makefile create mode 100644 arch/arm/cpu/armv7/msm7630/acpuclock.c create mode 100644 arch/arm/cpu/armv7/msm7630/board.c create mode 100644 arch/arm/cpu/armv7/msm7630/config.mk create mode 100644 arch/arm/cpu/armv7/msm7630/gpio.c create mode 100644 arch/arm/cpu/armv7/msm7630/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/msm7630/timer.c create mode 100644 arch/arm/include/asm/arch-msm7630/adm.h create mode 100644 arch/arm/include/asm/arch-msm7630/gpio.h create mode 100644 arch/arm/include/asm/arch-msm7630/gpio_hw.h create mode 100644 arch/arm/include/asm/arch-msm7630/iomap.h create mode 100644 arch/arm/include/asm/arch-msm7630/mmc.h create mode 100644 arch/arm/include/asm/arch-msm7630/proc_comm.h create mode 100644 arch/arm/include/asm/arch-msm7630/sys_proto.h create mode 100644 board/qcom/msm7630_surf/Makefile create mode 100644 board/qcom/msm7630_surf/msm7630_surf.c create mode 100644 board/qcom/msm7630_surf/msm7630_surf.h create mode 100644 drivers/misc/msm_proc_comm.c create mode 100644 drivers/mmc/qc_mmc.c create mode 100644 drivers/serial/serial_msm_uart.c create mode 100644 include/configs/msm7630_surf.h The contents of this e-mail and any attachment(s) may contain confidential or privileged information for the intended recipient(s). Unintended recipients are prohibited from taking action on the basis of information in this e-mail and using or disseminating the information, and must notify the sender and delete it from their system. L&T Infotech will not accept responsibility or liability for the accuracy or completeness of, or the presence of any virus or disabling code in this e-mail"

3 2