March 2012 - U-Boot

Re: [U-Boot] [PATCH 1/4] doc: Add documentation for mpc85xx debugger support
by Wolfgang Denk 15 Mar '12

15 Mar '12

Dear Kushwaha Prabhakar-B32579, In message <071A08F2C6A57E4E94D980ECA553F874575244(a)039-SN1MPN1-005.039d.mgd.msft.net> you wrote: > > Regarding CONFIG_E500_V1_V2, Its description is also part of this > patch or is it not cleared ? First, documentation of CONFIG_ options belongs into the central README, so we have it all in a single place. Second, "Enables code taking care of above mentioned rule" is not really helpful to understand what it's actually doing. The name of the cvariable suggests that this defiens a E500 core based system, but it does not even contain a slight hint that it has something to do with debugging. Also, what's the "V1_V2" ? Are there also other systems (say, e500 v3 cores), and are this not affected? We already have CONFIG_E500 and CONFIG_E500MC so CONFIG_E500_V1_V2 appears to belong to this group, but if I understand your intentions it does something completely unrelated. All this is highly confusing. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de If you hear an onion ring, answer it.

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[U-Boot] [PATCH v3 0/28] Create generic board init for ARM, x86, PPC
by Simon Glass 15 Mar '12

15 Mar '12

This series creates a generic board.c implementation which contains the essential functions of the major arch/xxx/lib/board.c files. What is the motivation for this change? 1. There is a lot of repeated code in the board.c files. Any change to things like setting up the baud rate requires a change in 10 separate places. 2. Since there are 10 separate files, adding a new feature which requires initialisation is painful since it must be independently added in 10 places. 3. As time goes by the architectures naturely diverge since there is limited pressure to compare features or even CONFIG options against simiilar things in other board.c files. 4. New architectures must implement all the features all over again, and sometimes in subtley different ways. This places an unfair burden on getting a new architecture fully functional and running with U-Boot. 5. While it is a bit of a tricky change, I believe it is worthwhile and achievable. There is no requirement that all code be common, only that the code that is common should be located in common/board.c rather than arch/xxx/lib/board.c. All the functions of board_init_f() and board_init_r() are broken into separate function calls so that they can easily be included or excluded for a particular architecture. It also makes it easier to adopt Graeme's initcall proposal when it is ready. http://lists.denx.de/pipermail/u-boot/2012-January/114499.html This series removes the dependency on generic relocation. So relocation happens as one big chunk and is still completely arch-specific. See the relocation series for a proposed solution to this for ARM: http://lists.denx.de/pipermail/u-boot/2011-December/112928.html or Graeme's recent x86 series v2: http://lists.denx.de/pipermail/u-boot/2012-January/114467.html Instead of moving over a whole architecture, this series takes the approach of simply enabling generic board support for an architecture. It is then up to each board to opt in by defining CONFIG_SYS_GENERIC_BOARD in the board config file. If this is not done, then the code will be generated as before. This allows both sets of code to co-exist until we are comfortable with the generic approach, and enough boards run. ARM is a relatively large board.c file and one which I can test, therefore I think it is a good target for this series. On the other hand, x86 is relatively small and simple, but different enough that it introduces a few issues to be solved. So I have chosen both ARM and x86 for this series. After a suggestion from Wolfgang I have added PPC also. This is the largest and most feature-full board, so hopefully we have all bases covered in this RFC. A generic global_data structure is also required. This might upset a few people. Here is my basic reasoning: most fields are the same, all architectures include and need it, most global_data.h files already have #ifdefs to select fields for a particular SOC, so it is hard to see why architecures are different in this area. We can perhaps add a way to put architecture-specific fields into a separate header file, but for now I have judged that to be counter-productive. Similarly we need a generic bd_info structure, since generic code will be accessing it. I have done this in the same way as global_data and the same comments apply. There was dicussion on the list about passing gd_t around as a parameter to pre-relocation init functions. I think this makes sense, but it can be done as a separate change, and this series does not require it. While this series needs to stand on its own (as with the link script cleanup series and the generic relocation series) the goal is the unification of the board init code. So I hope we can address issues with this in mind, rather than focusing too narrowly on particular ARM, x86 or PPC issues. I have run-tested ARM on Tegra Seaboard only. To try it out, define CONFIG_SYS_GENERIC_BOARD in your board file and rebuild. Most likely on x86 and PPC at least it will hang, but if you are lucky it will print something first :-) I have run this though MAKEALL with CONFIG_SYS_GENERIC_BOARD on for all ARM, PPC and x86 boards. There are a few failures, some due to errors in the board config, some due to things that need fixing. I will address these with the final series if required. Note: the first group of commits are required for this series to build, but could be separated out if required. I have included them here for convenience. Comments welcome. Changes in v2: - Add CONFIG_SYS_GENERIC_BOARD to allow board to select generic board - Add PowerPC support - Change generic board to an opt-in system on a per-board basic - Rebase to master Changes in v3: - Add header to new x86 relocate.c and init_helpers.c - Cast away the volatile on gd for memcpy() - Rebase on top of x86/master (which has not yet been pulled to master) - Rebase to master Simon Glass (28): arm: Change board baud_rate to ulong x86: Change board baud_rate to ulong arm: Only display frame buffer info if there is LCD/video support x86: Remove compiler warning in sc520_timer.c x86: Remove dead code in eNET x86: Add initial memory barrier macros ppc: Add initial memory barrier macros Introduce generic global_data Introduce generic u-boot.h file Introduce generic link symbol file arm: Use sections header to obtain link symbols x86: Change stub example to use asm-generic/sections.h Introduce a basic initcall implementation Define CONFIG_SYS_LEGACY_BOARD everywhere Introduce generic pre-relocation board_f.c Introduce generic post-relocation board_r.c Add spl load feature arm: Enable generic board support Add CONFIG_SYS_SYM_OFFSETS to support offset symbols x86: Use sections header to obtain link symbols Add x86 fields to generic global_data x86: Enable generic board support Add ppc fields to generic global data Adjust board_f for ppc Adjust board_r.c for PowerPC ppc: Enable generic board board tegra: Mark board init files for ARMv4t tegra: Enable generic board for Seaboard. README | 17 + arch/arm/cpu/armv7/tegra2/config.mk | 2 + arch/arm/include/asm/global_data.h | 7 + arch/arm/include/asm/u-boot-arm.h | 4 - arch/arm/include/asm/u-boot.h | 11 +- arch/arm/lib/Makefile | 4 +- arch/arm/lib/board.c | 1 + arch/avr32/config.mk | 3 + arch/blackfin/config.mk | 3 + arch/m68k/config.mk | 3 + arch/microblaze/config.mk | 3 + arch/mips/config.mk | 3 + arch/nds32/config.mk | 3 + arch/nios2/config.mk | 3 + arch/powerpc/include/asm/global_data.h | 7 + arch/powerpc/include/asm/io.h | 8 + arch/powerpc/include/asm/u-boot.h | 7 + arch/powerpc/lib/Makefile | 4 +- arch/sandbox/config.mk | 3 + arch/sh/config.mk | 3 + arch/sparc/config.mk | 3 + arch/x86/cpu/sc520/sc520_timer.c | 2 +- arch/x86/include/asm/global_data.h | 7 + arch/x86/include/asm/io.h | 8 + arch/x86/include/asm/u-boot-x86.h | 8 - arch/x86/include/asm/u-boot.h | 13 +- arch/x86/lib/Makefile | 4 +- arch/x86/lib/board.c | 1 + arch/x86/lib/init_helpers.c | 1 + arch/x86/lib/relocate.c | 1 + board/cm4008/flash.c | 1 + board/cm41xx/flash.c | 1 + board/eNET/eNET.c | 5 - common/Makefile | 4 + common/board_f.c | 888 ++++++++++++++++++++++++++++++++ common/board_r.c | 863 +++++++++++++++++++++++++++++++ common/cmd_bdinfo.c | 6 +- config.mk | 8 + examples/standalone/stubs.c | 7 +- include/asm-generic/global_data.h | 241 +++++++++ include/asm-generic/sections.h | 124 +++++ include/asm-generic/u-boot.h | 155 ++++++ include/common.h | 16 + include/configs/seaboard.h | 2 + include/initcall.h | 25 + lib/Makefile | 1 + lib/initcall.c | 41 ++ 47 files changed, 2506 insertions(+), 29 deletions(-) create mode 100644 common/board_f.c create mode 100644 common/board_r.c create mode 100644 include/asm-generic/global_data.h create mode 100644 include/asm-generic/sections.h create mode 100644 include/asm-generic/u-boot.h create mode 100644 include/initcall.h create mode 100644 lib/initcall.c -- 1.7.7.3

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[U-Boot] [PATCH V3] net: fec_mxc: allow use with cache enabled
by Eric Nelson 14 Mar '12

14 Mar '12

ensure that transmit and receive buffers are cache-line aligned invalidate cache for each packet as received update receive buffer descriptors one cache line at a time flush cache before transmitting Original patch by Marek: http://lists.denx.de/pipermail/u-boot/2012-February/117695.html Signed-off-by: Eric Nelson <eric.nelson(a)boundarydevices.com> --- V2 addresses some concerns from the ML: - Use readl()/writel() instead of mapped data structure accesses - Wrong comment style - &rbd_base[0] == rbd_base removed 'volatile' from fec_send(). V3 updates from ML (and Marek): consolidated CONFIG_FEC_DATA_ALIGNMENT and CONFIG_FEC_DESC_ALIGNMENT added cache flushes after initialization of TBD/RBD drivers/net/fec_mxc.c | 265 +++++++++++++++++++++++++++++++++++-------------- drivers/net/fec_mxc.h | 19 +---- 2 files changed, 189 insertions(+), 95 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 1fdd071..94a3927 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -50,6 +50,24 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_FEC_MXC_SWAP_PACKET #endif +#if ARCH_DMA_MINALIGN > CONFIG_SYS_CACHELINE_SIZE +#define CONFIG_FEC_ALIGN ARCH_DMA_MINALIGN +#else +#define CONFIG_FEC_ALIGN CONFIG_SYS_CACHELINE_SIZE +#endif + +#define RXDESC_PER_CACHELINE (CONFIG_FEC_ALIGN/sizeof(struct fec_bd)) + +/* Check various alignment issues at compile time */ +#if ((CONFIG_FEC_ALIGN < 16) || (CONFIG_FEC_ALIGN % 16 != 0)) +#error "CONFIG_FEC_ALIGN must be multiple of 16!" +#endif + +#if ((PKTALIGN < CONFIG_FEC_ALIGN) || \ + (PKTALIGN % CONFIG_FEC_ALIGN != 0)) +#error "PKTALIGN must be multiple of CONFIG_FEC_ALIGN!" +#endif + #undef DEBUG struct nbuf { @@ -259,43 +277,52 @@ static int fec_tx_task_disable(struct fec_priv *fec) * Initialize receive task's buffer descriptors * @param[in] fec all we know about the device yet * @param[in] count receive buffer count to be allocated - * @param[in] size size of each receive buffer + * @param[in] dsize desired size of each receive buffer * @return 0 on success * * For this task we need additional memory for the data buffers. And each * data buffer requires some alignment. Thy must be aligned to a specific - * boundary each (DB_DATA_ALIGNMENT). + * boundary each. */ -static int fec_rbd_init(struct fec_priv *fec, int count, int size) +static int fec_rbd_init(struct fec_priv *fec, int count, int dsize) { - int ix; - uint32_t p = 0; - - /* reserve data memory and consider alignment */ - if (fec->rdb_ptr == NULL) - fec->rdb_ptr = malloc(size * count + DB_DATA_ALIGNMENT); - p = (uint32_t)fec->rdb_ptr; - if (!p) { - puts("fec_mxc: not enough malloc memory\n"); - return -ENOMEM; - } - memset((void *)p, 0, size * count + DB_DATA_ALIGNMENT); - p += DB_DATA_ALIGNMENT-1; - p &= ~(DB_DATA_ALIGNMENT-1); - - for (ix = 0; ix < count; ix++) { - writel(p, &fec->rbd_base[ix].data_pointer); - p += size; - writew(FEC_RBD_EMPTY, &fec->rbd_base[ix].status); - writew(0, &fec->rbd_base[ix].data_length); - } + uint32_t size; + int i; + /* - * mark the last RBD to close the ring + * Allocate memory for the buffers. This allocation respects the + * alignment */ - writew(FEC_RBD_WRAP | FEC_RBD_EMPTY, &fec->rbd_base[ix - 1].status); + size = roundup(dsize, CONFIG_FEC_ALIGN); + for (i = 0; i < count; i++) { + uint32_t data_ptr = readl(&fec->rbd_base[i].data_pointer); + if (data_ptr == 0) { + uint8_t *data = memalign(CONFIG_FEC_ALIGN, + size); + if (!data) { + printf("%s: error allocating rxbuf %d\n", + __func__, i); + goto err; + } + writel((uint32_t)data, &fec->rbd_base[i].data_pointer); + } /* needs allocation */ + writew(FEC_RBD_EMPTY, &fec->rbd_base[i].status); + writew(0, &fec->rbd_base[i].data_length); + } + + /* Mark the last RBD to close the ring. */ + writew(FEC_RBD_WRAP | FEC_RBD_EMPTY, &fec->rbd_base[i - 1].status); fec->rbd_index = 0; return 0; + +err: + for (; i >= 0; i--) { + uint32_t data_ptr = readl(&fec->rbd_base[i].data_pointer); + free((void *)data_ptr); + } + + return -ENOMEM; } /** @@ -312,9 +339,13 @@ static int fec_rbd_init(struct fec_priv *fec, int count, int size) */ static void fec_tbd_init(struct fec_priv *fec) { + unsigned addr = (unsigned)fec->tbd_base; + unsigned size = roundup(2 * sizeof(struct fec_bd), + CONFIG_FEC_ALIGN); writew(0x0000, &fec->tbd_base[0].status); writew(FEC_TBD_WRAP, &fec->tbd_base[1].status); fec->tbd_index = 0; + flush_dcache_range(addr, addr+size); } /** @@ -324,16 +355,10 @@ static void fec_tbd_init(struct fec_priv *fec) */ static void fec_rbd_clean(int last, struct fec_bd *pRbd) { - /* - * Reset buffer descriptor as empty - */ + unsigned short flags = FEC_RBD_EMPTY; if (last) - writew(FEC_RBD_WRAP | FEC_RBD_EMPTY, &pRbd->status); - else - writew(FEC_RBD_EMPTY, &pRbd->status); - /* - * no data in it - */ + flags |= FEC_RBD_WRAP; + writew(flags, &pRbd->status); writew(0, &pRbd->data_length); } @@ -387,12 +412,25 @@ static int fec_open(struct eth_device *edev) { struct fec_priv *fec = (struct fec_priv *)edev->priv; int speed; + uint32_t addr, size; + int i; debug("fec_open: fec_open(dev)\n"); /* full-duplex, heartbeat disabled */ writel(1 << 2, &fec->eth->x_cntrl); fec->rbd_index = 0; + /* Invalidate all descriptors */ + for (i = 0; i < FEC_RBD_NUM - 1; i++) + fec_rbd_clean(0, &fec->rbd_base[i]); + fec_rbd_clean(1, &fec->rbd_base[i]); + + /* Flush the descriptors into RAM */ + size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd), + CONFIG_FEC_ALIGN); + addr = (uint32_t)fec->rbd_base; + flush_dcache_range(addr, addr + size); + #ifdef FEC_QUIRK_ENET_MAC /* Enable ENET HW endian SWAP */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_DBSWAP, @@ -478,38 +516,55 @@ static int fec_open(struct eth_device *edev) static int fec_init(struct eth_device *dev, bd_t* bd) { - uint32_t base; struct fec_priv *fec = (struct fec_priv *)dev->priv; uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop; uint32_t rcntrl; - int i; + uint32_t size; + int i, ret; /* Initialize MAC address */ fec_set_hwaddr(dev); /* - * reserve memory for both buffer descriptor chains at once - * Datasheet forces the startaddress of each chain is 16 byte - * aligned + * Allocate transmit descriptors, there are two in total. This + * allocation respects cache alignment. */ - if (fec->base_ptr == NULL) - fec->base_ptr = malloc((2 + FEC_RBD_NUM) * - sizeof(struct fec_bd) + DB_ALIGNMENT); - base = (uint32_t)fec->base_ptr; - if (!base) { - puts("fec_mxc: not enough malloc memory\n"); - return -ENOMEM; + if (!fec->tbd_base) { + size = roundup(2 * sizeof(struct fec_bd), + CONFIG_FEC_ALIGN); + fec->tbd_base = memalign(CONFIG_FEC_ALIGN, size); + if (!fec->tbd_base) { + ret = -ENOMEM; + goto err1; + } + memset(fec->tbd_base, 0, size); + fec_tbd_init(fec); + flush_dcache_range((unsigned)fec->tbd_base, size); } - memset((void *)base, 0, (2 + FEC_RBD_NUM) * - sizeof(struct fec_bd) + DB_ALIGNMENT); - base += (DB_ALIGNMENT-1); - base &= ~(DB_ALIGNMENT-1); - - fec->rbd_base = (struct fec_bd *)base; - base += FEC_RBD_NUM * sizeof(struct fec_bd); - - fec->tbd_base = (struct fec_bd *)base; + /* + * Allocate receive descriptors. This allocation respects cache + * alignment. + */ + if (!fec->rbd_base) { + size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd), + CONFIG_FEC_ALIGN); + fec->rbd_base = memalign(CONFIG_FEC_ALIGN, size); + if (!fec->rbd_base) { + ret = -ENOMEM; + goto err2; + } + memset(fec->rbd_base, 0, size); + /* + * Initialize RxBD ring + */ + if (fec_rbd_init(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE) < 0) { + ret = -ENOMEM; + goto err3; + } + flush_dcache_range((unsigned)fec->rbd_base, + (unsigned)fec->rbd_base + size); + } /* * Set interrupt mask register @@ -566,23 +621,19 @@ static int fec_init(struct eth_device *dev, bd_t* bd) writel((uint32_t)fec->tbd_base, &fec->eth->etdsr); writel((uint32_t)fec->rbd_base, &fec->eth->erdsr); - /* - * Initialize RxBD/TxBD rings - */ - if (fec_rbd_init(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE) < 0) { - free(fec->base_ptr); - fec->base_ptr = NULL; - return -ENOMEM; - } - fec_tbd_init(fec); - - #ifndef CONFIG_PHYLIB if (fec->xcv_type != SEVENWIRE) miiphy_restart_aneg(dev); #endif fec_open(dev); return 0; + +err3: + free(fec->rbd_base); +err2: + free(fec->tbd_base); +err1: + return ret; } /** @@ -631,9 +682,11 @@ static void fec_halt(struct eth_device *dev) * @param[in] length Data count in bytes * @return 0 on success */ -static int fec_send(struct eth_device *dev, volatile void* packet, int length) +static int fec_send(struct eth_device *dev, void *packet, int length) { unsigned int status; + uint32_t size; + uint32_t addr; /* * This routine transmits one frame. This routine only accepts @@ -650,15 +703,21 @@ static int fec_send(struct eth_device *dev, volatile void* packet, int length) } /* - * Setup the transmit buffer - * Note: We are always using the first buffer for transmission, - * the second will be empty and only used to stop the DMA engine + * Setup the transmit buffer. We are always using the first buffer for + * transmission, the second will be empty and only used to stop the DMA + * engine. We also flush the packet to RAM here to avoid cache trouble. */ #ifdef CONFIG_FEC_MXC_SWAP_PACKET swap_packet((uint32_t *)packet, length); #endif + + addr = (uint32_t)packet; + size = roundup(length, CONFIG_FEC_ALIGN); + flush_dcache_range(addr, addr + size); + writew(length, &fec->tbd_base[fec->tbd_index].data_length); - writel((uint32_t)packet, &fec->tbd_base[fec->tbd_index].data_pointer); + writel(addr, &fec->tbd_base[fec->tbd_index].data_pointer); + /* * update BD's status now * This block: @@ -672,16 +731,30 @@ static int fec_send(struct eth_device *dev, volatile void* packet, int length) writew(status, &fec->tbd_base[fec->tbd_index].status); /* + * Flush data cache. This code flushes both TX descriptors to RAM. + * After this code, the descriptors will be safely in RAM and we + * can start DMA. + */ + size = roundup(2 * sizeof(struct fec_bd), CONFIG_FEC_ALIGN); + addr = (uint32_t)fec->tbd_base; + flush_dcache_range(addr, addr + size); + + /* * Enable SmartDMA transmit task */ fec_tx_task_enable(fec); /* - * wait until frame is sent . + * Wait until frame is sent. On each turn of the wait cycle, we must + * invalidate data cache to see what's really in RAM. Also, we need + * barrier here. */ + invalidate_dcache_range(addr, addr + size); while (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) { udelay(1); + invalidate_dcache_range(addr, addr + size); } + debug("fec_send: status 0x%x index %d\n", readw(&fec->tbd_base[fec->tbd_index].status), fec->tbd_index); @@ -707,6 +780,8 @@ static int fec_recv(struct eth_device *dev) int frame_length, len = 0; struct nbuf *frame; uint16_t bd_status; + uint32_t addr, size; + int i; uchar buff[FEC_MAX_PKT_SIZE]; /* @@ -737,8 +812,23 @@ static int fec_recv(struct eth_device *dev) } /* - * ensure reading the right buffer status + * Read the buffer status. Before the status can be read, the data cache + * must be invalidated, because the data in RAM might have been changed + * by DMA. The descriptors are properly aligned to cachelines so there's + * no need to worry they'd overlap. + * + * WARNING: By invalidating the descriptor here, we also invalidate + * the descriptors surrounding this one. Therefore we can NOT change the + * contents of this descriptor nor the surrounding ones. The problem is + * that in order to mark the descriptor as processed, we need to change + * the descriptor. The solution is to mark the whole cache line when all + * descriptors in the cache line are processed. */ + addr = (uint32_t)rbd; + addr &= ~(CONFIG_FEC_ALIGN - 1); + size = roundup(sizeof(struct fec_bd), CONFIG_FEC_ALIGN); + invalidate_dcache_range(addr, addr + size); + bd_status = readw(&rbd->status); debug("fec_recv: status 0x%x\n", bd_status); @@ -751,6 +841,13 @@ static int fec_recv(struct eth_device *dev) frame = (struct nbuf *)readl(&rbd->data_pointer); frame_length = readw(&rbd->data_length) - 4; /* + * Invalidate data cache over the buffer + */ + addr = (uint32_t)frame; + size = roundup(frame_length, CONFIG_FEC_ALIGN); + invalidate_dcache_range(addr, addr + size); + + /* * Fill the buffer and pass it to upper layers */ #ifdef CONFIG_FEC_MXC_SWAP_PACKET @@ -765,11 +862,25 @@ static int fec_recv(struct eth_device *dev) (ulong)rbd->data_pointer, bd_status); } + /* - * free the current buffer, restart the engine - * and move forward to the next buffer + * Free the current buffer, restart the engine and move forward + * to the next buffer. Here we check if the whole cacheline of + * descriptors was already processed and if so, we mark it free + * as whole. */ - fec_rbd_clean(fec->rbd_index == (FEC_RBD_NUM - 1) ? 1 : 0, rbd); + size = RXDESC_PER_CACHELINE - 1; + if ((fec->rbd_index & size) == size) { + i = fec->rbd_index - size; + addr = (uint32_t)&fec->rbd_base[i]; + for (; i <= fec->rbd_index ; i++) { + fec_rbd_clean(i == (FEC_RBD_NUM - 1), + &fec->rbd_base[i]); + } + flush_dcache_range(addr, + addr + CONFIG_FEC_ALIGN); + } + fec_rx_task_enable(fec); fec->rbd_index = (fec->rbd_index + 1) % FEC_RBD_NUM; } diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 2eb7803..852b2e0 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -234,22 +234,6 @@ struct ethernet_regs { #endif /** - * @brief Descriptor buffer alignment - * - * i.MX27 requires a 16 byte alignment (but for the first element only) - */ -#define DB_ALIGNMENT 16 - -/** - * @brief Data buffer alignment - * - * i.MX27 requires a four byte alignment for transmit and 16 bits - * alignment for receive so take 16 - * Note: Valid for member data_pointer in struct buffer_descriptor - */ -#define DB_DATA_ALIGNMENT 16 - -/** * @brief Receive & Transmit Buffer Descriptor definitions * * Note: The first BD must be aligned (see DB_ALIGNMENT) @@ -282,8 +266,7 @@ struct fec_priv { struct fec_bd *tbd_base; /* TBD ring */ int tbd_index; /* next transmit BD to write */ bd_t *bd; - void *rdb_ptr; - void *base_ptr; + uint8_t *tdb_ptr; int dev_id; int phy_id; struct mii_dev *bus; -- 1.7.9

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[U-Boot] [PATCH v3] mx6: Read silicon revision from register
by Fabio Estevam 14 Mar '12

14 Mar '12

Instead of hardcoding the mx6 silicon revision, read it in run-time. Also, besides the silicon version also print the mx6 variant type: quad, dual/solo or solo-lite. Tested on a mx6qsabrelite, where it shows: CPU: Freescale i.MX6Q rev1.0 at 792 MHz Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v2: - Read both chip variant and chip silicon version from anatop - Create a struct for accessing the anatop registers Changes since v1: - Fix typo on Subject arch/arm/cpu/armv7/imx-common/cpu.c | 19 +++++++++++++++++-- arch/arm/cpu/armv7/mx6/soc.c | 8 +++++++- arch/arm/include/asm/arch-mx6/imx-regs.h | 5 +++++ 3 files changed, 29 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c index 6d7486b..6ced943 100644 --- a/arch/arm/cpu/armv7/imx-common/cpu.c +++ b/arch/arm/cpu/armv7/imx-common/cpu.c @@ -64,13 +64,28 @@ static char *get_reset_cause(void) } #if defined(CONFIG_DISPLAY_CPUINFO) + +static char *get_mx6_type(u32 mx6type) +{ + switch (mx6type) { + case 0x63: + return "Q"; /* Quad-core version of the mx6 */ + case 0x61: + return "DS"; /* Dual/Solo version of the mx6 */ + case 0x60: + return "SL"; /* Solo-Lite version of the mx6 */ + default: + return "unknown"; + } +} + int print_cpuinfo(void) { u32 cpurev; cpurev = get_cpu_rev(); - printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n", - (cpurev & 0xFF000) >> 12, + printf("CPU: Freescale i.MX6%s rev%d.%d at %d MHz\n", + get_mx6_type((cpurev & 0xFF000) >> 12), (cpurev & 0x000F0) >> 4, (cpurev & 0x0000F) >> 0, mxc_get_clock(MXC_ARM_CLK) / 1000000); diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 2ac74b5..a9772ca 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -32,7 +32,13 @@ u32 get_cpu_rev(void) { - int system_rev = 0x61000 | CHIP_REV_1_0; + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + int reg = readl(&anatop->siliconid); + + /* Read mx6 variant: quad, dual or solo */ + int system_rev = (reg >> 4) & 0xFF000; + /* Read mx6 silicon revision */ + system_rev |= (reg & 0xFF) + 0x10; return system_rev; } diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 5ba5f39..9644807 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -294,5 +294,10 @@ struct aipstz_regs { u32 opacr4; }; +struct anatop_regs { + u8 rsvd[0x260]; /* To be completed as needed */ + u32 siliconid; +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */ -- 1.7.1

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[U-Boot] Is it possible to send HDMI signal from u-boot on PandaBoard?
by Qiao.HelloWorld＠gmail.com 14 Mar '12

14 Mar '12

Hi everyone, I'm working on modifying u-boot source code for testing HDMI function on PandaBoard (CPU is TI OMAP4430). There seems no related information on the web. I've studied the android kernel source, and it confused me that the linux video driver access lots of registers which are not mentioned in the OMAP4430 Technical Reference Manual. However, the driver of android is so huge and complicated that I can't port it on u-boot. Can anyone tell me how to control HDMI module inside OMAP4430 by u-boot? I just want to do some tiny tasks, such as showing the Android logo or filling the screen of specified color. Maybe give some suggestions or directions for me to study is OK. Or is it impossible? and why? Thanks a lot. Qiao

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[U-Boot] [U-boot -Users]- Hush shell
by periyasamy samy 14 Mar '12

14 Mar '12

Hi.. I defined CFG_HUSH_PARSER and CFG_PROMPT_HUSH_PS2 for Command Interpreter. I am facing a problem that i able to see only one line at the screen (last printf) and overwrites the previouly printed lines. I am trying to display like "welcome to u-boot" and in the next line "u-boot version number-".but i am able to see only u-boot version number. because the last line overwrites previous line. i given \n at printf. any idea to solve my problem? Thanks in advace... -- *Thanks & Regards** * *periyasamy.R*

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[U-Boot] [PATCH V4] BOOT: Add "bootz" command to boot Linux zImage on ARM
by Marek Vasut 14 Mar '12

14 Mar '12

From: Marek Vasut <marek.vasut(a)gmail.com> This command boots Linux zImage from where the zImage is loaded to. Passing initrd and fdt is supported. Tested on i.MX28 based DENX M28EVK Tested on PXA270 based Voipac PXA270. NOTE: This currently only supports ARM, but other architectures can be easily added by defining bootz_setup(). Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> Cc: Tom Warren <TWarren(a)nvidia.com> Cc: albert.u.boot(a)aribaud.net Cc: afleming(a)gmail.com, Cc: Simon Glass <sjg(a)chromium.org>, Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Nicolas Pitre <nico(a)fluxnic.net> Cc: Wolfgang Denk <wd(a)denx.de> Cc: Detlev Zundel <dzu(a)denx.de> --- arch/arm/lib/bootm.c | 30 ++++++++++ common/cmd_bootm.c | 141 +++++++++++++++++++++++++++++++++++++++++++--- include/config_cmd_all.h | 1 + 3 files changed, 163 insertions(+), 9 deletions(-) V2: Use CONFIG_BOOTZ_MAX_KERNEL_LMB_SIZE to reserve kernel LMB V3: Compute the LMB size at runtime (obsoletes V2) Move shared code to image.c/image.h Sync with latest U-Boot V4: Add all this into cmd_bootm. Therefore, this is part of cmd_bootm (basically it's stripped-down version). Also, separate out arm-specific component into arm-specific location. diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index afa0093..b7a74a8 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -344,3 +344,33 @@ static ulong get_sp(void) asm("mov %0, sp" : "=r"(ret) : ); return ret; } + +#ifdef CONFIG_CMD_BOOTZ + +struct zimage_header { + uint32_t code[9]; + uint32_t zi_magic; + uint32_t zi_start; + uint32_t zi_end; +}; + +#define LINUX_ARM_ZIMAGE_MAGIC 0x016f2818 + +int bootz_setup(void *image, void **start, void **end) +{ + struct zimage_header *zi = (struct zimage_header *)image; + + if (zi->zi_magic != LINUX_ARM_ZIMAGE_MAGIC) { + puts("Bad Linux ARM zImage magic!\n"); + return 1; + } + + *start = (void *)zi->zi_start; + *end = (void *)zi->zi_end; + + debug("Kernel image @ 0x%08x [ 0x%08x - 0x%08x ]\n", + (uint32_t)image, (uint32_t)*start, (uint32_t)*end); + + return 0; +} +#endif /* CONFIG_CMD_BOOTZ */ diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index d5745b1..67588b2 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -169,25 +169,25 @@ void arch_preboot_os(void) __attribute__((weak, alias("__arch_preboot_os"))); #define IH_INITRD_ARCH IH_ARCH_DEFAULT -static void bootm_start_lmb(void) -{ #ifdef CONFIG_LMB +static void boot_start_lmb(bootm_headers_t *images) +{ ulong mem_start; phys_size_t mem_size; - lmb_init(&images.lmb); + lmb_init(&images->lmb); mem_start = getenv_bootm_low(); mem_size = getenv_bootm_size(); - lmb_add(&images.lmb, (phys_addr_t)mem_start, mem_size); + lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size); - arch_lmb_reserve(&images.lmb); - board_lmb_reserve(&images.lmb); + arch_lmb_reserve(&images->lmb); + board_lmb_reserve(&images->lmb); +} #else -# define lmb_reserve(lmb, base, size) +static inline void boot_start_lmb(bootm_headers_t *images) { } #endif -} static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -197,7 +197,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] memset((void *)&images, 0, sizeof(images)); images.verify = getenv_yesno("verify"); - bootm_start_lmb(); + boot_start_lmb(&images); /* get kernel image header, start address and length */ os_hdr = boot_get_kernel(cmdtp, flag, argc, argv, @@ -1523,3 +1523,126 @@ static int do_bootm_integrity(int flag, int argc, char * const argv[], return 1; } #endif + +#ifdef CONFIG_CMD_BOOTZ + +int __bootz_setup(void *image, void **start, void **end) +{ + /* Please define bootz_setup() for your platform */ + + puts("Your platform's zImage format isn't supported yet!\n"); + return -1; +} +int bootz_setup(void *image, void **start, void **end) + __attribute__((weak, alias("__bootz_setup"))); + +/* + * zImage booting support + */ +static int bootz_start(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[], bootm_headers_t *images) +{ + int ret; + void *zi_start, *zi_end; + + memset(images, 0, sizeof(bootm_headers_t)); + + boot_start_lmb(images); + + /* Setup Linux kernel zImage entry point */ + if (argc < 2) { + images->ep = load_addr; + debug("* kernel: default image load address = 0x%08lx\n", + load_addr); + } else { + images->ep = simple_strtoul(argv[1], NULL, 16); + debug("* kernel: cmdline image address = 0x%08lx\n", + images->ep); + } + + ret = bootz_setup((void *)images->ep, &zi_start, &zi_end); + if (ret != 0) + return 1; + + lmb_reserve(&images->lmb, images->ep, zi_end - zi_start); + + /* Find ramdisk */ + ret = boot_get_ramdisk(argc, argv, images, IH_INITRD_ARCH, + &images->rd_start, &images->rd_end); + if (ret) { + puts("Ramdisk image is corrupt or invalid\n"); + return 1; + } + +#if defined(CONFIG_OF_LIBFDT) + /* find flattened device tree */ + ret = boot_get_fdt(flag, argc, argv, images, + &images->ft_addr, &images->ft_len); + if (ret) { + puts("Could not find a valid device tree\n"); + return 1; + } + + set_working_fdt_addr(images->ft_addr); +#endif + + return 0; +} + +int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + ulong iflag; + bootm_headers_t images; + + if (bootz_start(cmdtp, flag, argc, argv, &images)) + return 1; + + /* + * We have reached the point of no return: we are going to + * overwrite all exception vector code, so we cannot easily + * recover from any failures any more... + */ + iflag = disable_interrupts(); + +#if defined(CONFIG_CMD_USB) + /* + * turn off USB to prevent the host controller from writing to the + * SDRAM while Linux is booting. This could happen (at least for OHCI + * controller), because the HCCA (Host Controller Communication Area) + * lies within the SDRAM and the host controller writes continously to + * this area (as busmaster!). The HccaFrameNumber is for example + * updated every 1 ms within the HCCA structure in SDRAM! For more + * details see the OpenHCI specification. + */ + usb_stop(); +#endif + +#ifdef CONFIG_SILENT_CONSOLE + fixup_silent_linux(); +#endif + arch_preboot_os(); + + do_bootm_linux(0, argc, argv, &images); +#ifdef DEBUG + puts("\n## Control returned to monitor - resetting...\n"); +#endif + do_reset(cmdtp, flag, argc, argv); + + return 1; +} + +U_BOOT_CMD( + bootz, CONFIG_SYS_MAXARGS, 1, do_bootz, + "boot Linux zImage image from memory", + "[addr [initrd] [fdt]]\n - boot Linux zImage stored in memory\n" + "\tThe argument 'initrd' is optional and specifies the address\n" + "\tof the initrd in memory.\n" +#if defined(CONFIG_OF_LIBFDT) + "\tWhen booting a Linux kernel which requires a flat device-tree\n" + "\ta third argument is required which is the address of the\n" + "\tdevice-tree blob. To boot that kernel without an initrd image,\n" + "\tuse a '-' for the second argument. If you do not pass a third\n" + "\ta bd_info struct will be passed instead\n" +#endif +); +#endif /* CONFIG_CMD_BOOTZ */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 9716f9c..2c6b829 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -20,6 +20,7 @@ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ #define CONFIG_CMD_BOOTD /* bootd */ +#define CONFIG_CMD_BOOTZ /* boot zImage */ #define CONFIG_CMD_BSP /* Board Specific functions */ #define CONFIG_CMD_CACHE /* icache, dcache */ #define CONFIG_CMD_CDP /* Cisco Discovery Protocol */ -- 1.7.9

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[U-Boot] [PATCH] usb:udc:samsung:fix Remove the req_config flag
by Lukasz Majewski 14 Mar '12

14 Mar '12

The dev->req_config flag was indicating that the forwarded request needs to perform the usb gadget delayed status. This is however not needed anymore, so it can be removed. Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Marek Vasut <marex(a)denx.de> --- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 18 +++++------------- include/usb/s3c_udc.h | 2 +- 2 files changed, 6 insertions(+), 14 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index b11108d..afd4931 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -1316,7 +1316,7 @@ void s3c_ep0_setup(struct s3c_udc *dev) /* cope with automagic for some standard requests. */ dev->req_std = (usb_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD; - dev->req_config = 0; + dev->req_pending = 1; /* Handle some SETUP packets ourselves */ @@ -1337,10 +1337,9 @@ void s3c_ep0_setup(struct s3c_udc *dev) DEBUG_SETUP("%s: USB_REQ_SET_CONFIGURATION (%d)\n", __func__, usb_ctrl->wValue); - if (usb_ctrl->bRequestType == USB_RECIP_DEVICE) { + if (usb_ctrl->bRequestType == USB_RECIP_DEVICE) reset_available = 1; - dev->req_config = 1; - } + break; case USB_REQ_GET_DESCRIPTOR: @@ -1352,10 +1351,9 @@ void s3c_ep0_setup(struct s3c_udc *dev) DEBUG_SETUP("%s: *** USB_REQ_SET_INTERFACE (%d)\n", __func__, usb_ctrl->wValue); - if (usb_ctrl->bRequestType == USB_RECIP_INTERFACE) { + if (usb_ctrl->bRequestType == USB_RECIP_INTERFACE) reset_available = 1; - dev->req_config = 1; - } + break; case USB_REQ_GET_CONFIGURATION: @@ -1404,12 +1402,6 @@ void s3c_ep0_setup(struct s3c_udc *dev) spin_lock(&dev->lock); if (i < 0) { - if (dev->req_config) { - DEBUG_SETUP("\tconfig change 0x%02x fail %d?\n", - (u32)usb_ctrl->bRequest, i); - return; - } - /* setup processing failed, force stall */ s3c_udc_ep0_set_stall(ep); dev->ep0state = WAIT_FOR_SETUP; diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 31d8f6c..6c973b6 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -102,7 +102,7 @@ struct s3c_udc { unsigned char usb_address; - unsigned req_pending:1, req_std:1, req_config:1; + unsigned req_pending:1, req_std:1; }; extern struct s3c_udc *the_controller; -- 1.7.2.3

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[U-Boot] undefine reference to `__bss_end__' error
by Will Khan 14 Mar '12

14 Mar '12

Hi all. I'm trying to upgrade my u-boot from 16 May 2009 release (out of tree customized version) to the release version December 2011. This is for powerpc MPC8349. I feel I’m very close to having U-boot successfully built, but I’m getting a symbol error at the end of the final link: arch/powerpc/cpu/mpc83xx/start.o:(.got2+0x8): undefined reference to `__bss_end__' arch/powerpc/lib/libpowerpc.o:(.got2+0x54): undefined reference to `__bss_end__' I googled around and saw (perhaps unrelated) that in some cases, the symbol `__bss_end__' may not be defined. So, in /arch/powerpc/mpc83xx/Start.s and arch/powerpc/lib/board.c, I manually changed `__bss_end__' to `_end'. However, I now get the following error: arch/powerpc/cpu/mpc83xx/start.o:(.got2+0x8): undefined reference to `_end' arch/powerpc/lib/libpowerpc.o:(.got2+0x54): undefined reference to `_end' So, my question is, is my problem a basic definition of these symbols, and if so, how to define `__bss_end__' or ‘_end’? (and where is the best place to put the definition)? Thanks in advance, Will

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[U-Boot] [PATCH] ns16550: tegra: Specify debugging serial port at boot.
by Stephen Warren 13 Mar '12

13 Mar '12

From: Doug Anderson <dianders(a)chromium.org> This works together with a kernel change that looks at the scratchpad register to determine which of the many UARTs it should use for early printing: http://www.spinics.net/lists/arm-kernel/msg154633.html While it is unfortunate to need to pass this information in a second way (it's already in the device tree), this does allow the very early boot code (decompressing stub and early assembly code) to print to the right port. At the moment, I'm adding this to the UART init function. Alternatively, we could add a more complex patch to key off of the 'console' setting. Signed-off-by: Doug Anderson <dianders(a)chromium.org> [swarren: Limited the change to Tegra platforms] Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- drivers/serial/ns16550.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 0c23955..19a28cd 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -62,6 +62,13 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out(0, &com_port->mdr1); #endif #endif /* CONFIG_OMAP */ +#if defined(CONFIG_TEGRA2) + /* + * Put a 'D' in the scratchpad to let the kernel know which UART + * for earlyprintk [D]ebugging. + */ + serial_out('D', &com_port->spr); +#endif } #ifndef CONFIG_NS16550_MIN_FUNCTIONS -- 1.7.0.4

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