March 2012 - U-Boot

[U-Boot] [PATCH 3/3] ARM: SAMSUNG: support sdhci controller
by Jaehoon Chung 29 Mar '12

29 Mar '12

To support sdhci controller, remove the CONFIG_S5P_MMC.. Instead, use the CONFIG_S5P_SDHCI/CONFIG_SDHCI. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- include/configs/origen.h | 3 ++- include/configs/s5p_goni.h | 3 ++- include/configs/s5pc210_universal.h | 3 ++- include/configs/smdk5250.h | 3 ++- include/configs/smdkv310.h | 3 ++- include/configs/trats.h | 3 ++- 6 files changed, 12 insertions(+), 6 deletions(-) diff --git a/include/configs/origen.h b/include/configs/origen.h index 8ede825..ea8066f 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -71,7 +71,8 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_SDHCI 1 +#define CONFIG_S5P_SDHCI 1 /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 56b5547..f659699 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -65,7 +65,8 @@ /* MMC */ #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_SDHCI 1 +#define CONFIG_S5P_SDHCI 1 /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 8286680..33cbaf9 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -68,7 +68,8 @@ /* MMC */ #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_SDHCI 1 +#define CONFIG_S5P_SDHCI 1 /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 9659f9e..0f63040 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -78,7 +78,8 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC #define CONFIG_MMC -#define CONFIG_S5P_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 93c25da..077f0e0 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -70,7 +70,8 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_SDHCI 1 +#define CONFIG_S5P_SDHCI 1 /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/trats.h b/include/configs/trats.h index 10f11d9..71b9393 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -74,7 +74,8 @@ /* MMC */ #define CONFIG_GENERIC_MMC #define CONFIG_MMC -#define CONFIG_S5P_MMC +#define CONFIG_S5P_SDHCI +#define CONFIG_SDHCI /* PWM */ #define CONFIG_PWM

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[U-Boot] Subject: [PATCH 2/3] mmc: use sdhci.c instead of s5p_mmc.c
by Jaehoon Chung 29 Mar '12

29 Mar '12

In driver mmc, generic sdhci code is implemented. s5p_mmc file is dupulicated. we are good that use the generic sdhci. This patch supported the sdhci for Samsung-SoC. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- arch/arm/include/asm/arch-exynos/mmc.h | 93 +++++++++++++++-------------- arch/arm/include/asm/arch-s5pc1xx/mmc.h | 93 +++++++++++++++-------------- drivers/mmc/Makefile | 2 +- drivers/mmc/s5p_sdhci.c | 98 +++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 12 ++++ include/sdhci.h | 6 ++ 6 files changed, 211 insertions(+), 93 deletions(-) create mode 100644 drivers/mmc/s5p_sdhci.c diff --git a/arch/arm/include/asm/arch-exynos/mmc.h b/arch/arm/include/asm/arch-exynos/mmc.h index 30f82b8..0f701c9 100644 --- a/arch/arm/include/asm/arch-exynos/mmc.h +++ b/arch/arm/include/asm/arch-exynos/mmc.h @@ -21,53 +21,54 @@ #ifndef __ASM_ARCH_MMC_H_ #define __ASM_ARCH_MMC_H_ -#ifndef __ASSEMBLY__ -struct s5p_mmc { - unsigned int sysad; - unsigned short blksize; - unsigned short blkcnt; - unsigned int argument; - unsigned short trnmod; - unsigned short cmdreg; - unsigned int rspreg0; - unsigned int rspreg1; - unsigned int rspreg2; - unsigned int rspreg3; - unsigned int bdata; - unsigned int prnsts; - unsigned char hostctl; - unsigned char pwrcon; - unsigned char blkgap; - unsigned char wakcon; - unsigned short clkcon; - unsigned char timeoutcon; - unsigned char swrst; - unsigned int norintsts; /* errintsts */ - unsigned int norintstsen; /* errintstsen */ - unsigned int norintsigen; /* errintsigen */ - unsigned short acmd12errsts; - unsigned char res1[2]; - unsigned int capareg; - unsigned char res2[4]; - unsigned int maxcurr; - unsigned char res3[0x34]; - unsigned int control2; - unsigned int control3; - unsigned char res4[4]; - unsigned int control4; - unsigned char res5[0x6e]; - unsigned short hcver; - unsigned char res6[0xFF00]; -}; +#define SDHCI_CONTROL2 0x80 +#define SDHCI_CONTROL3 0x84 +#define SDHCI_CONTROL4 0x8C -struct mmc_host { - struct s5p_mmc *reg; - unsigned int version; /* SDHCI spec. version */ - unsigned int clock; /* Current clock (MHz) */ - int dev_index; -}; +#define SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31) +#define SDHCI_CTRL2_ENCMDCNFMSK (1 << 30) +#define SDHCI_CTRL2_CDINVRXD3 (1 << 29) +#define SDHCI_CTRL2_SLCARDOUT (1 << 28) -int s5p_mmc_init(int dev_index, int bus_width); +#define SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24) +#define SDHCI_CTRL2_FLTCLKSEL_SHIFT (24) +#define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) -#endif /* __ASSEMBLY__ */ +#define SDHCI_CTRL2_LVLDAT_MASK (0xff << 16) +#define SDHCI_CTRL2_LVLDAT_SHIFT (16) +#define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) + +#define SDHCI_CTRL2_ENFBCLKTX (1 << 15) +#define SDHCI_CTRL2_ENFBCLKRX (1 << 14) +#define SDHCI_CTRL2_SDCDSEL (1 << 13) +#define SDHCI_CTRL2_SDSIGPC (1 << 12) +#define SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11) + +#define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9) +#define SDHCI_CTRL2_DFCNT_SHIFT (9) + +#define SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8) +#define SDHCI_CTRL2_RWAITMODE (1 << 7) +#define SDHCI_CTRL2_DISBUFRD (1 << 6) +#define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4) +#define SDHCI_CTRL2_SELBASECLK_SHIFT (4) +#define SDHCI_CTRL2_PWRSYNC (1 << 3) +#define SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1) +#define SDHCI_CTRL2_HWINITFIN (1 << 0) + +#define SDHCI_CTRL3_FCSEL3 (1 << 31) +#define SDHCI_CTRL3_FCSEL2 (1 << 23) +#define SDHCI_CTRL3_FCSEL1 (1 << 15) +#define SDHCI_CTRL3_FCSEL0 (1 << 7) + +#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) +#define SDHCI_CTRL4_DRIVE_SHIFT (16) + +int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks); + +static inline unsigned int s5p_mmc_init(int index, int bus_width) +{ + unsigned int base = samsung_get_base_mmc() + (0x10000 * index); + return s5p_sdhci_init(base, 52000000, 400000, index); +} #endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h b/arch/arm/include/asm/arch-s5pc1xx/mmc.h index adef4ee..0f701c9 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h +++ b/arch/arm/include/asm/arch-s5pc1xx/mmc.h @@ -21,53 +21,54 @@ #ifndef __ASM_ARCH_MMC_H_ #define __ASM_ARCH_MMC_H_ -#ifndef __ASSEMBLY__ -struct s5p_mmc { - unsigned int sysad; - unsigned short blksize; - unsigned short blkcnt; - unsigned int argument; - unsigned short trnmod; - unsigned short cmdreg; - unsigned int rspreg0; - unsigned int rspreg1; - unsigned int rspreg2; - unsigned int rspreg3; - unsigned int bdata; - unsigned int prnsts; - unsigned char hostctl; - unsigned char pwrcon; - unsigned char blkgap; - unsigned char wakcon; - unsigned short clkcon; - unsigned char timeoutcon; - unsigned char swrst; - unsigned int norintsts; /* errintsts */ - unsigned int norintstsen; /* errintstsen */ - unsigned int norintsigen; /* errintsigen */ - unsigned short acmd12errsts; - unsigned char res1[2]; - unsigned int capareg; - unsigned char res2[4]; - unsigned int maxcurr; - unsigned char res3[0x34]; - unsigned int control2; - unsigned int control3; - unsigned char res4[4]; - unsigned int control4; - unsigned char res5[0x6e]; - unsigned short hcver; - unsigned char res6[0xFFF00]; -}; +#define SDHCI_CONTROL2 0x80 +#define SDHCI_CONTROL3 0x84 +#define SDHCI_CONTROL4 0x8C -struct mmc_host { - struct s5p_mmc *reg; - unsigned int version; /* SDHCI spec. version */ - unsigned int clock; /* Current clock (MHz) */ - int dev_index; -}; +#define SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31) +#define SDHCI_CTRL2_ENCMDCNFMSK (1 << 30) +#define SDHCI_CTRL2_CDINVRXD3 (1 << 29) +#define SDHCI_CTRL2_SLCARDOUT (1 << 28) -int s5p_mmc_init(int dev_index, int bus_width); +#define SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24) +#define SDHCI_CTRL2_FLTCLKSEL_SHIFT (24) +#define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) -#endif /* __ASSEMBLY__ */ +#define SDHCI_CTRL2_LVLDAT_MASK (0xff << 16) +#define SDHCI_CTRL2_LVLDAT_SHIFT (16) +#define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) + +#define SDHCI_CTRL2_ENFBCLKTX (1 << 15) +#define SDHCI_CTRL2_ENFBCLKRX (1 << 14) +#define SDHCI_CTRL2_SDCDSEL (1 << 13) +#define SDHCI_CTRL2_SDSIGPC (1 << 12) +#define SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11) + +#define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9) +#define SDHCI_CTRL2_DFCNT_SHIFT (9) + +#define SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8) +#define SDHCI_CTRL2_RWAITMODE (1 << 7) +#define SDHCI_CTRL2_DISBUFRD (1 << 6) +#define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4) +#define SDHCI_CTRL2_SELBASECLK_SHIFT (4) +#define SDHCI_CTRL2_PWRSYNC (1 << 3) +#define SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1) +#define SDHCI_CTRL2_HWINITFIN (1 << 0) + +#define SDHCI_CTRL3_FCSEL3 (1 << 31) +#define SDHCI_CTRL3_FCSEL2 (1 << 23) +#define SDHCI_CTRL3_FCSEL1 (1 << 15) +#define SDHCI_CTRL3_FCSEL0 (1 << 7) + +#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) +#define SDHCI_CTRL4_DRIVE_SHIFT (16) + +int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks); + +static inline unsigned int s5p_mmc_init(int index, int bus_width) +{ + unsigned int base = samsung_get_base_mmc() + (0x10000 * index); + return s5p_sdhci_init(base, 52000000, 400000, index); +} #endif diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index c245352..a8e681c 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -39,8 +39,8 @@ COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o -COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o COBJS-$(CONFIG_SDHCI) += sdhci.o +COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o COBJS-$(CONFIG_TEGRA2_MMC) += tegra2_mmc.o diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c new file mode 100644 index 0000000..1d4481b --- /dev/null +++ b/drivers/mmc/s5p_sdhci.c @@ -0,0 +1,98 @@ +/* + * (C) Copyright 2012 SAMSUNG Electronics + * Jaehoon Chung <jh80.chung(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <sdhci.h> +#include <asm/arch/mmc.h> + +static char *S5P_NAME = "SAMSUNG SDHCI"; +static void s5p_sdhci_set_control_reg(struct sdhci_host *host) +{ + unsigned long val, ctrl; + /* + * SELCLKPADDS[17:16] + * 00 = 2mA + * 01 = 4mA + * 10 = 7mA + * 11 = 9mA + */ + sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4); + + val = sdhci_readl(host, SDHCI_CONTROL2); + val &= SDHCI_CTRL2_SELBASECLK_SHIFT; + + val |= SDHCI_CTRL2_ENSTAASYNCCLR | + SDHCI_CTRL2_ENCMDCNFMSK | + SDHCI_CTRL2_ENFBCLKRX | + SDHCI_CTRL2_ENCLKOUTHOLD; + + sdhci_writel(host, val, SDHCI_CONTROL2); + + /* + * FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7] + * FCSel[1:0] : Rx Feedback Clock Delay Control + * Inverter delay means10ns delay if SDCLK 50MHz setting + * 01 = Delay1 (basic delay) + * 11 = Delay2 (basic delay + 2ns) + * 00 = Delay3 (inverter delay) + * 10 = Delay4 (inverter delay + 2ns) + */ + val = SDHCI_CTRL3_FCSEL3 | SDHCI_CTRL3_FCSEL1; + sdhci_writel(host, val, SDHCI_CONTROL3); + + /* + * SELBASECLK[5:4] + * 00/01 = HCLK + * 10 = EPLL + * 11 = XTI or XEXTCLK + */ + ctrl = sdhci_readl(host, SDHCI_CONTROL2); + ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3); + ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2); + sdhci_writel(host, ctrl, SDHCI_CONTROL2); +} + +int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) +{ + struct sdhci_host *host = NULL; + host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); + if (!host) { + printf("sdhci__host malloc fail!\n"); + return 1; + } + + host->name = S5P_NAME; + host->ioaddr = (void *)regbase; + host->quirks = quirks; + + host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE; + host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; + if (quirks & SDHCI_QUIRK_REG32_RW) + host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; + else + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + + host->set_control_reg = &s5p_sdhci_set_control_reg; + + host->host_caps = MMC_MODE_HC; + + add_sdhci(host, max_clk, min_clk); + return 0; +} diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 0dd08b9..962633b 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -338,6 +338,9 @@ void sdhci_set_ios(struct mmc *mmc) u32 ctrl; struct sdhci_host *host = (struct sdhci_host *)mmc->priv; + if (host->set_control_reg) + host->set_control_reg(host); + if (mmc->clock != host->clock) sdhci_set_clock(mmc, mmc->clock); @@ -361,6 +364,9 @@ void sdhci_set_ios(struct mmc *mmc) else ctrl &= ~SDHCI_CTRL_HISPD; + if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) + ctrl &= ~SDHCI_CTRL_HISPD; + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); } @@ -444,9 +450,15 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; if (caps & SDHCI_CAN_VDD_180) mmc->voltages |= MMC_VDD_165_195; + + if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) + mmc->voltages |= host->voltages; + mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; if (caps & SDHCI_CAN_DO_8BIT) mmc->host_caps |= MMC_MODE_8BIT; + if (host->host_caps) + mmc->host_caps |= host->host_caps; sdhci_reset(host, SDHCI_RESET_ALL); mmc_register(mmc); diff --git a/include/sdhci.h b/include/sdhci.h index 800f9d9..435f945 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -216,6 +216,8 @@ */ #define SDHCI_QUIRK_32BIT_DMA_ADDR (1 << 0) #define SDHCI_QUIRK_REG32_RW (1 << 1) +#define SDHCI_QUIRK_NO_HISPD_BIT (1 << 2) +#define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 3) /* to make gcc happy */ struct sdhci_host; @@ -240,10 +242,14 @@ struct sdhci_host { char *name; void *ioaddr; unsigned int quirks; + unsigned int host_caps; unsigned int version; unsigned int clock; struct mmc *mmc; const struct sdhci_ops *ops; + + void (*set_control_reg)(struct sdhci_host *host); + uint voltages; }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS

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[U-Boot] [PATCH 1/3] mmc: sdhci: fix the wrong operation when response type is R1b
by Jaehoon Chung 29 Mar '12

29 Mar '12

When response type is R1b, mask value is added the SDHCI_INT_DAT_END. but in while(), didn't check that flag. So sdhci controller didn't work fine. CMD6 didn't always complete. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- drivers/mmc/sdhci.c | 33 +++++++++++++++++++++++---------- 1 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index fc904b5..0dd08b9 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -124,10 +124,11 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, { struct sdhci_host *host = (struct sdhci_host *)mmc->priv; unsigned int stat = 0; - int ret = 0; + int i, ret = 0; int trans_bytes = 0, is_aligned = 1; u32 mask, flags, mode; unsigned int timeout, start_addr = 0; + unsigned int retry = 10000; /* Wait max 10 ms */ timeout = 10; @@ -206,19 +207,31 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, flush_cache(start_addr, trans_bytes); #endif sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND); - do { + + for (i = 0; i < retry; i++) { stat = sdhci_readl(host, SDHCI_INT_STATUS); - if (stat & SDHCI_INT_ERROR) + if (stat & (SDHCI_INT_RESPONSE | SDHCI_INT_DATA_END)) { + sdhci_cmd_done(host, cmd); + sdhci_writel(host, mask, SDHCI_INT_STATUS); + if (!data) { + sdhci_writel(host, stat, SDHCI_INT_STATUS); + } break; - } while ((stat & mask) != mask); + } + } - if ((stat & (SDHCI_INT_ERROR | mask)) == mask) { - sdhci_cmd_done(host, cmd); - sdhci_writel(host, mask, SDHCI_INT_STATUS); - } else - ret = -1; + if (i == retry) { + printf("%s: waiting for status update\n",__func__); + return TIMEOUT; + } + + if (stat & SDHCI_INT_TIMEOUT) { + return TIMEOUT; + } else if (stat & SDHCI_INT_ERROR) { + return -1; + } - if (!ret && data) + if (data) ret = sdhci_transfer_data(host, data, start_addr); stat = sdhci_readl(host, SDHCI_INT_STATUS);

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Re: [U-Boot] [PATCH 1/3] misc:pmic: Support for voltage to register value conversion function
by Stefano Babic 29 Mar '12

29 Mar '12

On 28/03/2012 14:38, Lukasz Majewski wrote: > Hi Stefano, > Hi Lucasz, > I've already forwarded those patches to you. > They are also available on the mailing list, so I don't know what has > happened. Really nothing, I got all e-mails, I was only not able to explain my doubt. I try again: - In patch 1/3 you add voltage_to_reg to the pmic struct ==> Ok - in patch 2/3 you add voltage_to_reg to MAX8997. ==> Ok Everything clear. The consequence for me is that PATCH 3/3 shows the reason to add voltage_to_reg(), and calls the new function pmic_vol_to_reg(), because you need it, as you have already explained. But I see only pmic_set_output() and pmic_reg_write() in your patch. What have I not yet understood ? (maybe I need a coffe to wake up my brain...) Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[U-Boot] arithmetic operations on hush
by Haneef Mohamed 29 Mar '12

29 Mar '12

Hi, Does hush script support arithmetic operations. thanks haneef

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[U-Boot] pull request for u-boot-tegra/master
by Tom Warren 29 Mar '12

29 Mar '12

Albert, Please pull u-boot-tegra/master into arm master. Thanks! The following changes since commit 4a3ea216414ad762b3718775a65437c13f0accbc: ARM: highbank: setup env from boot source register (2012-03-28 23:34:27 +0200) are available in the git repository at: git://git.denx.de/u-boot-tegra master Simon Glass (32): fdt: Add fdtdec_find_aliases() to deal with alias nodes fdt: Add tests for fdtdec fdt: Tidy up a few fdtdec problems fdt: Add functions to access phandles, arrays and bools fdt: Add basic support for decoding GPIO definitions arm: fdt: Add skeleton device tree file from kernel tegra: fdt: Add Tegra2x device tree file from kernel tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel fdt: Add staging area for device tree binding documentation fdt: Add tegra-usb bindings file from linux tegra: fdt: Add additional USB binding tegra: fdt: Add clock bindings tegra: fdt: Add clock bindings for Tegra2 Seaboard tegra: usb: fdt: Add additional device tree definitions for USB ports tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard usb: Add support for txfifo threshold tegra: fdt: Add function to return peripheral/clock ID tegra: usb: Add support for Tegra USB peripheral fdt: Avoid early panic() when there is no FDT present arm: Check for valid FDT after console is up tegra: usb: Add USB support to nvidia boards tegra: usb: Add common USB defines for tegra2 boards tegra: usb: Enable USB on Seaboard tegra: fdt: Enable FDT support for Seaboard tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE fdt: Add function to allow aliases to refer to multiple nodes tegra: Enhance clock support to handle 16-bit clock divisors tegra: i2c: Initialise I2C on Nvidia boards tegra: i2c: Select number of controllers for Tegra2 boards tegra: i2c: Enable I2C on Seaboard tegra: i2c: Select I2C ordering for Seaboard tegra: fdt: i2c: Add extra I2C bindings for U-Boot Tom Warren (2): arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load tegra: fdt: Enable FDT support for Ventana Yen Lin (1): tegra: i2c: Add I2C driver README | 3 + arch/arm/cpu/armv7/tegra2/Makefile | 4 +- arch/arm/cpu/armv7/tegra2/ap20.c | 20 +- arch/arm/cpu/armv7/tegra2/board.c | 2 +- arch/arm/cpu/armv7/tegra2/clock.c | 121 ++++- arch/arm/cpu/armv7/tegra2/config.mk | 2 + arch/arm/cpu/armv7/tegra2/usb.c | 460 ++++++++++++++++ arch/arm/dts/skeleton.dtsi | 13 + arch/arm/dts/tegra20.dtsi | 196 +++++++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 10 +- arch/arm/include/asm/arch-tegra2/clock.h | 13 + arch/arm/include/asm/arch-tegra2/tegra2.h | 6 +- arch/arm/include/asm/arch-tegra2/tegra_i2c.h | 157 ++++++ arch/arm/include/asm/arch-tegra2/usb.h | 252 +++++++++ arch/arm/lib/board.c | 8 + board/nvidia/common/board.c | 19 + board/nvidia/common/board.h | 6 + board/nvidia/dts/tegra2-seaboard.dts | 92 ++++ board/nvidia/seaboard/seaboard.c | 6 + doc/device-tree-bindings/README | 17 + .../clock/nvidia,tegra20-car.txt | 207 +++++++ doc/device-tree-bindings/i2c/tegra20-i2c.txt | 23 + doc/device-tree-bindings/usb/tegra-usb.txt | 25 + drivers/i2c/Makefile | 1 + drivers/i2c/tegra_i2c.c | 569 ++++++++++++++++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-hcd.c | 7 + drivers/usb/host/ehci-tegra.c | 62 +++ drivers/usb/host/ehci.h | 6 +- include/configs/seaboard.h | 20 + include/configs/tegra2-common.h | 13 + include/configs/ventana.h | 5 + include/fdtdec.h | 197 +++++++- lib/Makefile | 1 + lib/fdtdec.c | 323 +++++++++++- lib/fdtdec_test.c | 226 ++++++++ 36 files changed, 3038 insertions(+), 55 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/usb.c create mode 100644 arch/arm/dts/skeleton.dtsi create mode 100644 arch/arm/dts/tegra20.dtsi create mode 100644 arch/arm/include/asm/arch-tegra2/tegra_i2c.h create mode 100644 arch/arm/include/asm/arch-tegra2/usb.h create mode 100644 board/nvidia/dts/tegra2-seaboard.dts create mode 100644 doc/device-tree-bindings/README create mode 100644 doc/device-tree-bindings/clock/nvidia,tegra20-car.txt create mode 100644 doc/device-tree-bindings/i2c/tegra20-i2c.txt create mode 100644 doc/device-tree-bindings/usb/tegra-usb.txt create mode 100644 drivers/i2c/tegra_i2c.c create mode 100644 drivers/usb/host/ehci-tegra.c create mode 100644 lib/fdtdec_test.c -- nvpublic

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[U-Boot] Any outstanding ARM pull requests?
by Albert ARIBAUD 28 Mar '12

28 Mar '12

Hi all, On my working repo where I have all ARM subrepos as remotes, a git branch -r --no-merged | grep '/master' with HEAD set to my master branch gives the following: u-boot-atmel/master u-boot-atmel/master-arm u-boot-imx/master u-boot-pxa/master u-boot-samsung/master u-boot-tegra/master Which means there are commmits on these repo's master branches that are not currently in u-boot-arm. Are there any ARM pull requests pending that I would have missed or are about to be sent? Amicalement, -- Albert.

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[U-Boot] Using qemu-system-ppc to boot U-Boot
by Frank Svendsbøe 28 Mar '12

28 Mar '12

Hi, I'm trying to figure out if anyone has ported a PPC system to QEMU that is capable of booting U-Boot. Similar to the ARM versatilepb target, but for PPC instead. I've tried the Bamboo and MPC8544DS but it seems they only use stubs to OS calls and parses a DTB for info. If there's no target supported yet, what about a QEMU target the support booting an ARM target in big-endian mode? Big-endian is important in order to test some endian dependent code. The purpose is to emulate a network of connected machines without having to buy lots of hardware. Best regards, Frank

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[U-Boot] [PATCH] arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings
by Anatolij Gustschin 28 Mar '12

28 Mar '12

Fix: clocks-common.c: In function 'setup_non_essential_dplls': clocks-common.c:323:6: warning: variable 'sys_clk_khz' set but not used [-Wunused-but-set-variable] clocks-common.c: In function 'setup_non_essential_dplls': clocks-common.c:323:6: warning: variable 'sys_clk_khz' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust(a)denx.de> Cc: Tom Rini <trini(a)ti.com> --- arch/arm/cpu/armv7/omap-common/clocks-common.c | 4 +--- 1 files changed, 1 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 4cfe119..4e74569 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -320,11 +320,9 @@ static void setup_dplls(void) #ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL static void setup_non_essential_dplls(void) { - u32 sys_clk_khz, abe_ref_clk; + u32 abe_ref_clk; const struct dpll_params *params; - sys_clk_khz = get_sys_clk_freq() / 1000; - /* IVA */ clrsetbits_le32(&prcm->cm_bypclk_dpll_iva, CM_BYPCLK_DPLL_IVA_CLKSEL_MASK, DPLL_IVA_CLKSEL_CORE_X2_DIV_2); -- 1.7.7.6

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[U-Boot] [PATCH] board/ti/beagle/beagle.c: Fix build warnings
by Anatolij Gustschin 28 Mar '12

28 Mar '12

Fix: beagle.c:257:13: warning: function declaration isn't a prototype [-Wstrict-prototypes] beagle.c:257:13: warning: function declaration isn't a prototype [-Wstrict-prototypes] Also make beagle_dvi_pup() checkpatch clean, fix: ERROR: open brace '{' following function declarations go on the next line Signed-off-by: Anatolij Gustschin <agust(a)denx.de> Cc: Tom Rini <trini(a)ti.com> --- board/ti/beagle/beagle.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 114ab7e..8b07eef 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -254,7 +254,8 @@ void beagle_display_init(void) /* * Enable DVI power */ -static void beagle_dvi_pup() { +static void beagle_dvi_pup(void) +{ uchar val; switch (get_board_revision()) { -- 1.7.7.6

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