March 2012 - U-Boot

[U-Boot] [PATCH 01/14] AT91: Drop AT91_SPIMUX command from cmd_all
by Marek Vasut 02 Apr '12

02 Apr '12

$ git grep AT91_SPIMUX include/config_cmd_all.h:#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ It isn't used anywhere it seems. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Albert ARIBAUD <albert.u.boot(a)aribaud.net> --- include/config_cmd_all.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 2c6b829..55f4f7a 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -15,7 +15,6 @@ #define CONFIG_CMD_AMBAPP /* AMBA Plug & Play Bus print utility */ #define CONFIG_CMD_ASKENV /* ask for env variable */ -#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ -- 1.7.9.1

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[U-Boot] [PATCH] Correct corrupted NAND Flash access on KARO TX25 modules
by Gachet Daniel 01 Apr '12

01 Apr '12

This short patch correct corrupted data while reading NAND flash modules on the KARO TX25 module. The current version of the mxc_nand driver uses the symmetric mode to access the NAND flash, but the devices populated on the KARO TX25 only support an asymmetric mode (i.MX25: bit 8 within NAND_FLASH_CONFIG1 register cleared). Signed-off-by: Daniel Gachet <daniel.gachet(a)hefr.ch> Cc: Wolfgang Denk <wd(a)denx.de > diff -upr drivers/mtd/nand/mxc_nand.c drivers/mtd/nand/mxc_nand.c --- drivers/mtd/nand/mxc_nand.c 2011-12-23 20:25:35.000000000 +0100 +++ drivers/mtd/nand/mxc_nand.c 2012-03-30 08:10:13.000000000 +0200 @@ -1290,7 +1290,9 @@ static void mxc_setup_config1(void) uint16_t tmp; tmp = readw(&host->regs->nfc_config1); +#ifndef MACH_TYPE_TX25 tmp |= NFC_ONE_CYCLE; +#endif tmp |= NFC_4_8N_ECC; writew(tmp, &host->regs->nfc_config1); if (host->pagesize_2k)

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[U-Boot] [STATUS] v2012.04-rc1 is out
by Wolfgang Denk 01 Apr '12

01 Apr '12

Hi everybody, after long struggeling we finally have a -rc1. Please help testing, so we can fix the remaining issues before the release, which I decided to shift to April 21, 2012. Thanks to all who helped. Please note: Any help with processing patch backlog, for example through the u-boot-staging tree, is more than welcome. Thanks in advance! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Nearly everyone is in favor of going to heaven but too many are hoping they'll live long enough to see an easing of the entrance requirements. Never appeal to a man's "better nature." he might not have one.

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[U-Boot] [PATCH] mx6qsabrelite: Fix the serial console port
by Fabio Estevam 01 Apr '12

01 Apr '12

On mx6qsabrelite the console is ttymxc1. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- include/configs/mx6qsabrelite.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 8bc8a83..2643817 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -116,7 +116,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "uimage=uImage\0" \ - "console=ttymxc3\0" \ + "console=ttymxc1\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "mmcdev=0\0" \ -- 1.7.1

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[U-Boot] [PATCH V6] BOOT: Add "bootz" command to boot Linux zImage on ARM
by Marek Vasut 01 Apr '12

01 Apr '12

From: Marek Vasut <marek.vasut(a)gmail.com> This command boots Linux zImage from where the zImage is loaded to. Passing initrd and fdt is supported. Tested on i.MX28 based DENX M28EVK Tested on PXA270 based Voipac PXA270. NOTE: This currently only supports ARM, but other architectures can be easily added by defining bootz_setup(). Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> Cc: Tom Warren <TWarren(a)nvidia.com> Cc: albert.u.boot(a)aribaud.net Cc: afleming(a)gmail.com, Cc: Simon Glass <sjg(a)chromium.org>, Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Nicolas Pitre <nico(a)fluxnic.net> Cc: Wolfgang Denk <wd(a)denx.de> Cc: Detlev Zundel <dzu(a)denx.de> --- README | 8 +++ arch/arm/lib/bootm.c | 30 ++++++++++ common/cmd_bootm.c | 141 +++++++++++++++++++++++++++++++++++++++++++--- include/config_cmd_all.h | 1 + 4 files changed, 171 insertions(+), 9 deletions(-) V2: Use CONFIG_BOOTZ_MAX_KERNEL_LMB_SIZE to reserve kernel LMB V3: Compute the LMB size at runtime (obsoletes V2) Move shared code to image.c/image.h Sync with latest U-Boot V4: Add all this into cmd_bootm. Therefore, this is part of cmd_bootm (basically it's stripped-down version). Also, separate out arm-specific component into arm-specific location. V5: Staticize bootz_setup(), add information into README. V6: Make cmd_bootz() static. diff --git a/README b/README index 4021715..b273070 100644 --- a/README +++ b/README @@ -3594,6 +3594,7 @@ go - start application at address 'addr' run - run commands in an environment variable bootm - boot application image from memory bootp - boot image via network using BootP/TFTP protocol +bootz - boot zImage from memory tftpboot- boot image via network using TFTP protocol and env variables "ipaddr" and "serverip" (and eventually "gatewayip") @@ -4414,6 +4415,13 @@ U-Boot supports the following image types: useful when you configure U-Boot to use a real shell (hush) as command interpreter. +Booting the Linux zImage: +------------------------- + +On some platforms, it's possible to boot Linux zImage. This is done +using the "bootz" command. The syntax of "bootz" command is the same +as the syntax of "bootm" command. + Standalone HOWTO: ================= diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index afa0093..ec46d76 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -344,3 +344,33 @@ static ulong get_sp(void) asm("mov %0, sp" : "=r"(ret) : ); return ret; } + +#ifdef CONFIG_CMD_BOOTZ + +struct zimage_header { + uint32_t code[9]; + uint32_t zi_magic; + uint32_t zi_start; + uint32_t zi_end; +}; + +#define LINUX_ARM_ZIMAGE_MAGIC 0x016f2818 + +int bootz_setup(void *image, void **start, void **end) +{ + struct zimage_header *zi = (struct zimage_header *)image; + + if (zi->zi_magic != LINUX_ARM_ZIMAGE_MAGIC) { + puts("Bad Linux ARM zImage magic!\n"); + return 1; + } + + *start = (void *)zi->zi_start; + *end = (void *)zi->zi_end; + + debug("Kernel image @ 0x%08x [ 0x%08x - 0x%08x ]\n", + (uint32_t)image, (uint32_t)*start, (uint32_t)*end); + + return 0; +} +#endif /* CONFIG_CMD_BOOTZ */ diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index d5745b1..b49d4f7 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -169,25 +169,25 @@ void arch_preboot_os(void) __attribute__((weak, alias("__arch_preboot_os"))); #define IH_INITRD_ARCH IH_ARCH_DEFAULT -static void bootm_start_lmb(void) -{ #ifdef CONFIG_LMB +static void boot_start_lmb(bootm_headers_t *images) +{ ulong mem_start; phys_size_t mem_size; - lmb_init(&images.lmb); + lmb_init(&images->lmb); mem_start = getenv_bootm_low(); mem_size = getenv_bootm_size(); - lmb_add(&images.lmb, (phys_addr_t)mem_start, mem_size); + lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size); - arch_lmb_reserve(&images.lmb); - board_lmb_reserve(&images.lmb); + arch_lmb_reserve(&images->lmb); + board_lmb_reserve(&images->lmb); +} #else -# define lmb_reserve(lmb, base, size) +static inline void boot_start_lmb(bootm_headers_t *images) { } #endif -} static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -197,7 +197,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] memset((void *)&images, 0, sizeof(images)); images.verify = getenv_yesno("verify"); - bootm_start_lmb(); + boot_start_lmb(&images); /* get kernel image header, start address and length */ os_hdr = boot_get_kernel(cmdtp, flag, argc, argv, @@ -1523,3 +1523,126 @@ static int do_bootm_integrity(int flag, int argc, char * const argv[], return 1; } #endif + +#ifdef CONFIG_CMD_BOOTZ + +static int __bootz_setup(void *image, void **start, void **end) +{ + /* Please define bootz_setup() for your platform */ + + puts("Your platform's zImage format isn't supported yet!\n"); + return -1; +} +int bootz_setup(void *image, void **start, void **end) + __attribute__((weak, alias("__bootz_setup"))); + +/* + * zImage booting support + */ +static int bootz_start(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[], bootm_headers_t *images) +{ + int ret; + void *zi_start, *zi_end; + + memset(images, 0, sizeof(bootm_headers_t)); + + boot_start_lmb(images); + + /* Setup Linux kernel zImage entry point */ + if (argc < 2) { + images->ep = load_addr; + debug("* kernel: default image load address = 0x%08lx\n", + load_addr); + } else { + images->ep = simple_strtoul(argv[1], NULL, 16); + debug("* kernel: cmdline image address = 0x%08lx\n", + images->ep); + } + + ret = bootz_setup((void *)images->ep, &zi_start, &zi_end); + if (ret != 0) + return 1; + + lmb_reserve(&images->lmb, images->ep, zi_end - zi_start); + + /* Find ramdisk */ + ret = boot_get_ramdisk(argc, argv, images, IH_INITRD_ARCH, + &images->rd_start, &images->rd_end); + if (ret) { + puts("Ramdisk image is corrupt or invalid\n"); + return 1; + } + +#if defined(CONFIG_OF_LIBFDT) + /* find flattened device tree */ + ret = boot_get_fdt(flag, argc, argv, images, + &images->ft_addr, &images->ft_len); + if (ret) { + puts("Could not find a valid device tree\n"); + return 1; + } + + set_working_fdt_addr(images->ft_addr); +#endif + + return 0; +} + +static int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + ulong iflag; + bootm_headers_t images; + + if (bootz_start(cmdtp, flag, argc, argv, &images)) + return 1; + + /* + * We have reached the point of no return: we are going to + * overwrite all exception vector code, so we cannot easily + * recover from any failures any more... + */ + iflag = disable_interrupts(); + +#if defined(CONFIG_CMD_USB) + /* + * turn off USB to prevent the host controller from writing to the + * SDRAM while Linux is booting. This could happen (at least for OHCI + * controller), because the HCCA (Host Controller Communication Area) + * lies within the SDRAM and the host controller writes continously to + * this area (as busmaster!). The HccaFrameNumber is for example + * updated every 1 ms within the HCCA structure in SDRAM! For more + * details see the OpenHCI specification. + */ + usb_stop(); +#endif + +#ifdef CONFIG_SILENT_CONSOLE + fixup_silent_linux(); +#endif + arch_preboot_os(); + + do_bootm_linux(0, argc, argv, &images); +#ifdef DEBUG + puts("\n## Control returned to monitor - resetting...\n"); +#endif + do_reset(cmdtp, flag, argc, argv); + + return 1; +} + +U_BOOT_CMD( + bootz, CONFIG_SYS_MAXARGS, 1, do_bootz, + "boot Linux zImage image from memory", + "[addr [initrd] [fdt]]\n - boot Linux zImage stored in memory\n" + "\tThe argument 'initrd' is optional and specifies the address\n" + "\tof the initrd in memory.\n" +#if defined(CONFIG_OF_LIBFDT) + "\tWhen booting a Linux kernel which requires a flat device-tree\n" + "\ta third argument is required which is the address of the\n" + "\tdevice-tree blob. To boot that kernel without an initrd image,\n" + "\tuse a '-' for the second argument. If you do not pass a third\n" + "\ta bd_info struct will be passed instead\n" +#endif +); +#endif /* CONFIG_CMD_BOOTZ */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 9716f9c..2c6b829 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -20,6 +20,7 @@ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ #define CONFIG_CMD_BOOTD /* bootd */ +#define CONFIG_CMD_BOOTZ /* boot zImage */ #define CONFIG_CMD_BSP /* Board Specific functions */ #define CONFIG_CMD_CACHE /* icache, dcache */ #define CONFIG_CMD_CDP /* Cisco Discovery Protocol */ -- 1.7.9

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[U-Boot] [PATCH] mx6qsabrelite: Add boot switch setting information into the README
by Fabio Estevam 01 Apr '12

01 Apr '12

Add boot switch setting information into the README Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- doc/README.mx6qsabrelite | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/doc/README.mx6qsabrelite b/doc/README.mx6qsabrelite index 0498cba..6f2f534 100644 --- a/doc/README.mx6qsabrelite +++ b/doc/README.mx6qsabrelite @@ -31,7 +31,8 @@ Note: Replace sXx with the device representing the SD card in your system. Note: This writes SD card loader at address 0 2. Put this SD card into the slot for the large SD card (SD3 on the bottom of -the board) +the board). Make sure SW1 switch is at position "00", so that it can boot +from the fuses. 3. Power-up the SabreLite, press 'space' to enter command mode in the U-Boot (the default one the board is shipped with, starting from the SPI NOR) and -- 1.7.1

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[U-Boot] [PATCH V2 0/3] i.MX6: Add preliminary cache support
by Eric Nelson 01 Apr '12

01 Apr '12

This series of patches defines the prerequisites for cache support on i.MX6 to allow further driver development to occur. It does not enable the use of the data cache by default. To enable data cache, comment out this line in mx6qsabrelite.h or mx6qarm2.h: #define CONFIG_SYS_DCACHE_OFF V2 of this patch set removes the ethernet driver (fec_mxc) from the patch set because the changes in that driver require additional attention. Eric Nelson (3): i.MX6: define CACHELINE_SIZE i.MX6: implement enable_caches() i.MX6: mx6qsabrelite: add cache commands if cache is enabled arch/arm/cpu/armv7/mx6/soc.c | 8 ++++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ include/configs/mx6qarm2.h | 2 ++ include/configs/mx6qsabrelite.h | 6 ++++++ 4 files changed, 18 insertions(+), 0 deletions(-) -- 1.7.9

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[U-Boot] [PATCH v6] kirkwood: add NAS62x0 board support
by Luka Perkov 01 Apr '12

01 Apr '12

Add support for new boards RaidSonic ICY BOX NAS6210 and NAS6220. Only difference between boards is number of SATA ports. More information about the boards can be found here: http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7036 http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7515 Signed-off-by: Luka Perkov <uboot(a)lukaperkov.net> Signed-off-by: Gerald Kerma <dreagle(a)doukki.net> Signed-off-by: Simon Baatz <gmbnomis(a)gmail.com> --- Changes from version v1: * use tools/checkpatch.pl to locate patch errors and fix them * add two entries in boards.cfg, one for each board * fixed CONFIG_RESET_PHY_R * don't define values for macros that enable features only * remove static RAM configuration * fix comments * use only CONFIG_ENV_OFFSET and remove CONFIG_ENV_ADDR * clean coding style * add entry in MAINTAINERS file Changes from version v2: * use defined() in macros for board selection for robustness Changes from version v3: * don't use utf8 for Geralds name * don't mix upper/lower case in kwbimage.cfg * fix prompt Changes from version v4: * fix board Makefile (clean and distclean) * use generic way to handle arch number of the board * fix MAINTAINERS file * move code from Marvell to raidsonic folder * use CONFIG_MACH_TYPE * set only necessary GPIOs * use link instead of address for license * add few links about board being supported for quick reference * add previous change logs * multiple updates to kwbimage.cfg, thank you Simon Changes from version v5: * remove typo from kwbimage.cfg (duplicated lines), thank you David * clean up comments in kwbimage.cfg MAINTAINERS | 5 + board/raidsonic/ib62x0/Makefile | 43 +++++++++ board/raidsonic/ib62x0/ib62x0.c | 79 ++++++++++++++++ board/raidsonic/ib62x0/ib62x0.h | 40 ++++++++ board/raidsonic/ib62x0/kwbimage.cfg | 169 ++++++++++++++++++++++++++++++++++ boards.cfg | 2 + include/configs/ib62x0.h | 172 +++++++++++++++++++++++++++++++++++ 7 files changed, 510 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 72f8b64..e6608ea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -781,6 +781,11 @@ Linus Walleij <linus.walleij(a)linaro.org> integratorap various integratorcp various +Luka Perkov <uboot(a)lukaperkov.net> + + ib6210 ARM926EJS + ib6220 ARM926EJS + Dave Peverley <dpeverley(a)mpc-data.co.uk> omap730p2 ARM926EJS diff --git a/board/raidsonic/ib62x0/Makefile b/board/raidsonic/ib62x0/Makefile new file mode 100644 index 0000000..d450f8d --- /dev/null +++ b/board/raidsonic/ib62x0/Makefile @@ -0,0 +1,43 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := ib62x0.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c new file mode 100644 index 0000000..65f2c2e --- /dev/null +++ b/board/raidsonic/ib62x0/ib62x0.c @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2011-2012 + * Gerald Kerma <dreagle(a)doukki.net> + * Luka Perkov <uboot(a)lukaperkov.net> + * Simon Baatz <gmbnomis(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "ib62x0.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(IB62x0_OE_VAL_LOW, + IB62x0_OE_VAL_HIGH, + IB62x0_OE_LOW, IB62x0_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_SATA1_ACTn, + MPP21_SATA0_ACTn, + MPP22_GPIO, /* Power LED red */ + MPP24_GPIO, /* Power off device */ + MPP25_GPIO, /* Power LED green */ + MPP27_GPIO, /* USB transfer LED */ + MPP28_GPIO, /* Reset button */ + MPP29_GPIO, /* USB Copy button */ + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} diff --git a/board/raidsonic/ib62x0/ib62x0.h b/board/raidsonic/ib62x0/ib62x0.h new file mode 100644 index 0000000..0c30690 --- /dev/null +++ b/board/raidsonic/ib62x0/ib62x0.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2011-2012 + * Gerald Kerma <dreagle(a)doukki.net> + * Simon Baatz <gmbnomis(a)gmail.com> + * Luka Perkov <uboot(a)lukaperkov.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __IB62x0_H +#define __IB62x0_H + +#define IB62x0_OE_LOW (~(1 << 22 | 1 << 24 | 1 << 25 | 1 << 27)) +#define IB62x0_OE_HIGH (~(0)) +#define IB62x0_OE_VAL_LOW 0 +#define IB62x0_OE_VAL_HIGH 0 + +/* PHY related */ +#define MV88E1116_LED_FCTRL_REG 10 +#define MV88E1116_CPRSP_CR3_REG 21 +#define MV88E1116_MAC_CTRL_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __IB62x0_H */ diff --git a/board/raidsonic/ib62x0/kwbimage.cfg b/board/raidsonic/ib62x0/kwbimage.cfg new file mode 100644 index 0000000..bd594eb --- /dev/null +++ b/board/raidsonic/ib62x0/kwbimage.cfg @@ -0,0 +1,169 @@ +# +# Copyright (C) 2011-2012 +# Gerald Kerma <dreagle(a)doukki.net> +# Simon Baatz <gmbnomis(a)gmail.com> +# Luka Perkov <uboot(a)lukaperkov.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand # change from nand to uart if building UART image +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xffd100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xffd01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30, (3120 DDR2 clks refresh rate) +# bit23-14: 0x0, +# bit24: 0x1, enable exit self refresh mode on DDR access +# bit25: 0x1, required +# bit29-26: 0x0, +# bit31-30: 0x1, + +DATA 0xffd01404 0x37543000 # DDR Controller Control Low +# bit4: 0x0, addr/cmd in smame cycle +# bit5: 0x0, clk is driven during self refresh, we don't care for APX +# bit6: 0x0, use recommended falling edge of clk for addr/cmd +# bit14: 0x0, input buffer always powered up +# bit18: 0x1, cpu lock transaction enabled +# bit23-20: 0x5, recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 0x7, CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 0x3, required +# bit31: 0x0, no additional STARTBURST delay + +DATA 0xffd01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11-8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xffd0140c 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: 0x0, required + +DATA 0xffd01410 0x0000000c # DDR Address Control +# bit1-0: 00, Cs0width (x8) +# bit3-2: 11, Cs0size (1Gb) +# bit5-4: 00, Cs1width (x8) +# bit7-6: 11, Cs1size (1Gb) +# bit9-8: 00, Cs2width (nonexistent +# bit11-10: 00, Cs2size (nonexistent +# bit13-12: 00, Cs3width (nonexistent +# bit15-14: 00, Cs3size (nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0x0, required + +DATA 0xffd01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0x0, required + +DATA 0xffd01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0x0, required + +DATA 0xffd0141c 0x00000c52 # DDR Mode +# bit2-0: 0x2, BurstLen=2 required +# bit3: 0x0, BurstType=0 required +# bit6-4: 0x4, CL=5 +# bit7: 0x0, TestMode=0 normal +# bit8: 0x0, DLL reset=0 normal +# bit11-9: 0x6, auto-precharge write recovery ???????????? +# bit12: 0x0, PD must be zero +# bit31-13: 0x0, required + +DATA 0xffd01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 1, DDR ODT control lsd (disabled) +# bit5-3: 0x0, required +# bit6: 0, DDR ODT control msb, (disabled) +# bit9-7: 0x0, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0x0, required + +DATA 0xffd01424 0x0000f17f # DDR Controller Control High +# bit2-0: 0x7, required +# bit3: 0x1, MBUS Burst Chop disabled +# bit6-4: 0x7, required +# bit7: 0x0, +# bit8: 0x1, add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9: 0x0, no half clock cycle addition to dataout +# bit10: 0x0, 1/4 clock cycle skew enabled for addr/ctl signals +# bit11: 0x0, 1/4 clock cycle skew disabled for write mesh +# bit15-12: 0xf, required +# bit31-16: 0, required + +DATA 0xffd01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xffd0147c 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xffd01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xffd01504 0x0ffffff1 # CS[0]n Size +# bit0: 0x1, Window enabled +# bit1: 0x0, Write Protect disabled +# bit3-2: 0x0, CS0 hit selected +# bit23-4: 0xfffff, required +# bit31-24: 0x0f, Size (i.e. 256MB) + +DATA 0xffd01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xffd0150c 0x00000000 # CS[1]n Size, window disabled + +DATA 0xffd01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xffd0151c 0x00000000 # CS[3]n Size, window disabled + +DATA 0xffd01494 0x00030000 # DDR ODT Control (Low) +# bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1 +# bit7-4: ODT0Rd, MODT[0] asserted during read from DRAM CS0 +# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1 +# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 + +DATA 0xffd01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 0x0, ODT0 controlled by ODT Control (low) register above +# bit3-2: 0x1, ODT1 active NEVER! +# bit31-4: 0x0, required + +DATA 0xffd0149c 0x0000e803 # CPU ODT Control +DATA 0xffd01480 0x00000001 # DDR Initialization Control +# bit0: 0x1, enable DDR init upon this register write + +DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register +DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register + +# End of Header extension +DATA 0x0 0x0 diff --git a/boards.cfg b/boards.cfg index c6090ba..5cf5c43 100644 --- a/boards.cfg +++ b/boards.cfg @@ -153,6 +153,8 @@ openrd_client arm arm926ejs openrd Marvell openrd_ultimate arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_ULTIMATE rd6281a arm arm926ejs - Marvell kirkwood sheevaplug arm arm926ejs - Marvell kirkwood +ib_nas6210 arm arm926ejs ib62x0 raidsonic kirkwood ib62x0:BOARD_IS_IB_NAS6210 +ib_nas6220 arm arm926ejs ib62x0 raidsonic kirkwood ib62x0:BOARD_IS_IB_NAS6220 dockstar arm arm926ejs - Seagate kirkwood jadecpu arm arm926ejs jadecpu syteco mb86r0x mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h new file mode 100644 index 0000000..2dc698e --- /dev/null +++ b/include/configs/ib62x0.h @@ -0,0 +1,172 @@ +/* + * Copyright (C) 2011-2012 + * Gerald Kerma <dreagle(a)doukki.net> + * Luka Perkov <uboot(a)lukaperkov.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _CONFIG_IB62x0_H +#define _CONFIG_IB62x0_H + +/* + * Version number information + */ +#if defined(CONFIG_BOARD_IS_IB_NAS6210) +# define CONFIG_IDENT_STRING " RaidSonic ICY BOX IB-NAS6210" +#elif defined(CONFIG_BOARD_IS_IB_NAS6220) +# define CONFIG_IDENT_STRING " RaidSonic ICY BOX IB-NAS6220" +#else +# error Unknown RaidSonic ICY BOX board specified +#endif + +/* + * High level configuration options + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Machine type + */ +#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210 + +/* + * Compression configuration + */ +#define CONFIG_BZIP2 +#define CONFIG_LZMA +#define CONFIG_LZO + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */ +#define CONFIG_SYS_MVFS +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_IDE +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#undef CONFIG_SYS_PROMPT +#if defined(CONFIG_BOARD_IS_IB_NAS6210) +# define CONFIG_SYS_PROMPT "IB-NAS6210 => " +#elif defined(CONFIG_BOARD_IS_IB_NAS6220) +# define CONFIG_SYS_PROMPT "IB-NAS6220 => " +#else +# error Unknown RaidSonic ICY BOX board specified +#endif + +/* + * Environment variables configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND \ + "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ + "ubi part root; " \ + "ubifsmount root; " \ + "ubifsload 0x800000 ${kernel}; " \ + "ubifsload 0x1100000 ${initrd}; " \ + "bootm 0x800000 0x1100000" + +#define CONFIG_MTDPARTS \ + "mtdparts=orion_nand:" \ + "0x80000@0x0(uboot)," \ + "0x20000@0x80000(uboot_env)," \ + "-@0xa0000(root)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts="CONFIG_MTDPARTS \ + "kernel=/boot/uImage\0" \ + "initrd=/boot/uInitrd\0" \ + "bootargs_root=ubi.mtd=2 root=ubi0:root rootfstype=ubifs\0" + +/* + * Ethernet driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#undef CONFIG_RESET_PHY_R +#endif /* CONFIG_CMD_NET */ + +/* + * SATA driver configuration + */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_IDE_PREINIT +#define CONFIG_DOS_PARTITION +#define CONFIG_MVSATA_IDE_USE_PORT0 +# if defined(CONFIG_BOARD_IS_IB_NAS6210) +# undef CONFIG_SYS_IDE_MAXBUS +# define CONFIG_SYS_IDE_MAXBUS 1 +# undef CONFIG_SYS_IDE_MAXDEVICE +# define CONFIG_SYS_IDE_MAXDEVICE 1 +# elif defined(CONFIG_BOARD_IS_IB_NAS6220) +# define CONFIG_MVSATA_IDE_USE_PORT1 +# endif +#define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET +# if defined(CONFIG_BOARD_IS_IB_NAS6220) +# define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET +# endif +#endif /* CONFIG_CMD_IDE */ + +/* + * RTC driver configuration + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MV +#endif /* CONFIG_CMD_DATE */ + +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS + +#endif /* _CONFIG_IB62x0_H */

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Re: [U-Boot] [PATCH] MIPS: fix endianess handling
by Shinya Kuribayashi 31 Mar '12

31 Mar '12

On 12/4/11 9:02 PM, Daniel Schwierzeck wrote: >> diff --git a/boards.cfg b/boards.cfg >> index c83d861..2cd917e 100644 >> --- a/boards.cfg >> +++ b/boards.cfg >> @@ -324,13 +324,13 @@ dbau1000 mips mips32 dbau1x00 - >> dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100 >> dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500 >> dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 >> -dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 >> +dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN This looks Ok. >> gth2 mips mips32 - - au1x00 >> incaip mips mips32 incaip - incaip >> incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000 >> incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000 >> incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000 >> -pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000 >> +pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000,SYS_LITTLE_ENDIAN >> qemu_mips mips mips32 qemu-mips - - qemu-mips >> tb0229 mips mips32 >> vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in boards.cfg. Just putting it in configs/pb1000.h is enough, isn't it? > Shinya, do you have an opinion about this? No, if it works for you, I'm fine. Thanks for tackling this issue. Does anyone disagree with this change? If not, I'll pick this up. >> diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile >> index e23865b..eab23b4 100644 >> --- a/examples/standalone/Makefile >> +++ b/examples/standalone/Makefile >> @@ -88,6 +88,10 @@ endif >> CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder) >> CFLAGS += $(CFLAGS_NTR) >> >> +# Pass through endianess settings in LDFLAGS to LD s/endianess/endianness/

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[U-Boot] [PATCH] Honor /memory/reg node in DTB files
by Deepak Saxena 31 Mar '12

31 Mar '12

commit 341764495180a712b9aaccfa0479b2ff7e44e35b Author: Deepak Saxena <deepak_saxena(a)mentor.com> Date: Mon Dec 6 15:52:07 2010 -0800 Honor /memory/reg node in DTB files This patch adds code to the bootm path to check if a valid /memory/reg node exists in the DTB file and if so, it does not override it with the values in bi_memstart and bi_memsize. This is particularly useful in multi-core environments where the memory may be partitioned across a large number of nodes. While the same can be accomplished on certain boards (p1022ds and p1_p2_rdb) by using the bootm_low and bootm_size environment variables, that solution is not universal and requires adding code ft_board_setup() for any new board that wants to support AMP operation. Also, given that the DTB is already used to partition board devices (see commit dc2e673 in the Linux kernel tree), it makes sense to allow memory to be partitioned the same way from a user configuration perspective. This patch allows for the user to override the DTB file parameters on the p1022ds and p1_p2_rdb boards by setting the bootm_low and bootm_size to something other than bi_memstart and bi_memsize. In the long-term, those env variables should be depecrated and removed and system implementors should provide the memory partitioning information in the DTB. Signed-off-by: Deepak Saxena <deepak_saxena(a)mentor.com> Signed-off-by: Hollis Blanchard <hollis_blanchard(a)mentor.com> --- See http://lists.denx.de/pipermail/u-boot/2010-December/083057.html for initial proposal on this. diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 4540364..6d384e3 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -377,6 +377,55 @@ static void ft_fixup_qe_snum(void *blob) } #endif +/* + * Check to see if an valid memory/reg property exists + * in the fdt. If so, we do not overwrite it with what's + * been scanned. + * + * Valid mean all the following: + * + * - Memory node has a device-type of "memory" + * - A reg property exists which: + * + has exactly as many cells as #address-cells + #size-cells + * + provides a range that is within [bi_memstart, bi_memstart + bi_memsize] + */ +static int ft_validate_memory(void *blob, bd_t *bd) +{ + int nodeoffset; + u32 *addrcell = (u32*)fdt_getprop(blob, 0, "#address-cells", NULL); + u32 *sizecell = (u32*)fdt_getprop(blob, 0, "#size-cells", NULL); + u64 reg_base, reg_size; + void *reg, *dtype; + int len; + + if ((nodeoffset = fdt_path_offset(blob, "/memory")) >= 0) + { + dtype = fdt_getprop(blob, nodeoffset, "device_type", &len); + if (!dtype || (strcmp(dtype, "memory") != 0)) + return 0; + + reg = fdt_getprop(blob, nodeoffset, "reg", &len); + if (reg && len == ((*addrcell + *sizecell) * 4)) { + if (*addrcell == 2) { + reg_base = ((u64*)reg)[0]; + reg_size = ((u64*)reg)[1]; + } else { + reg_base = ((u32*)reg)[0]; + reg_size = ((u32*)reg)[1]; + } + + if ((reg_size) && + (reg_base >= (u64)bd->bi_memstart) && + ((reg_size + reg_base) + <= ((u64)bd->bi_memstart + (u64)bd->bi_memsize))) + return 1; + } + } + + return 0; + +} + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -434,7 +483,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); #endif - fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); + if (!ft_validate_memory(blob, bd)) + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #ifdef CONFIG_MP ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize); diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 5cdee9f..7378d88 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -320,7 +320,8 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); - fdt_fixup_memory(blob, (u64)base, (u64)size); + if (base != (phys_addr_t)bd->bi_memstart && size != (phys_addr_t)bd->bi_memsize) + fdt_fixup_memory(blob, (u64)base, (u64)size); FT_FSL_PCI_SETUP; diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index fae31f2..5e4adc6 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -220,9 +220,10 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); - ft_pci_board_setup(blob); + if (base != (phys_addr_t)bd->bi_memstart && size != (phys_addr_t)bd->bi_memsize) + fdt_fixup_memory(blob, (u64)base, (u64)size); - fdt_fixup_memory(blob, (u64)base, (u64)size); + ft_pci_board_setup(blob); } #endif

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