March 2012 - U-Boot

[U-Boot] U-Boot build report @ Sat Mar 31 05:30:15 CEST 2012
by Marek Vasut 02 Apr '12

02 Apr '12

Hello guys, we now have exactly these boards not building for -RC1, can you please look into it?: arm/flea3 FAILED FOR: eldk4.2 eldk5.1 arm/hawkboard FAILED FOR: eldk4.2 arm/hawkboard_uart FAILED FOR: eldk4.2 arm/highbank FAILED FOR: eldk4.2 arm/mx35pdk FAILED FOR: eldk4.2 eldk5.1 arm/seaboard FAILED FOR: eldk4.2 eldk5.1 arm/ventana FAILED FOR: eldk4.2 eldk5.1 powerpc/P2020DS_36BIT FAILED FOR: eldk4.2 powerpc/PMC440 FAILED FOR: eldk4.2 eldk5.1 powerpc/TQM8541 FAILED FOR: eldk4.2 powerpc/TQM8555 FAILED FOR: eldk4.2 If you need logs, please contact me, I'll provide them. Best regards, Marek Vasut

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[U-Boot] [PATCH] mmc:fix: Set mmc width according to MMC host capabilities
by Lukasz Majewski 02 Apr '12

02 Apr '12

This patch sets the MMC width according to the MMC host capabilities. It turned out, that there are some targets (e.g. GONI), which are able to read data from SPI only at 4 bit mode. This patch restricts the width number according to the MMC host. Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Andy Fleming <afleming(a)gmail.com> --- drivers/mmc/mmc.c | 4 +++- include/mmc.h | 3 +++ 2 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 49c3349..51c0106 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1103,7 +1103,9 @@ int mmc_startup(struct mmc *mmc) else mmc_set_clock(mmc, 25000000); } else { - for (width = EXT_CSD_BUS_WIDTH_8; width >= 0; width--) { + width = ((mmc->host_caps & MMC_MODE_MASK_WIDTH_BITS) >> + MMC_MODE_WIDTH_BITS_SHIFT); + for (; width >= 0; width--) { /* Set the card to use 4 bit*/ err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, width); diff --git a/include/mmc.h b/include/mmc.h index 30c2375..ff2f28e 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -47,6 +47,9 @@ #define MMC_MODE_SPI 0x400 #define MMC_MODE_HC 0x800 +#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) +#define MMC_MODE_WIDTH_BITS_SHIFT 8 + #define SD_DATA_4BIT 0x00040000 #define IS_SD(x) (x->version & SD_VERSION_SD) -- 1.7.2.3

1 2

[U-Boot] [PATCH V2 00/24] SPEAr: Update platform support for SPEAr3xx/6xx
by Amit Virdi 02 Apr '12

02 Apr '12

This patchset updates the SPEAr support in the u-boot. It contains various bugfixes and enhancements. The patches have certain dependencies on the drivers, so should be applied once the driver patches are frozen. The various drivers on which these patches depend are: 1. USB device controller: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/125220/focus=126598 2. Designware ethernet controller: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/126029 3. ST_SMI: http://lists.denx.de/pipermail/u-boot/2012-February/118672.html 4. FSMC_NAND: http://patchwork.ozlabs.org/patch/143167/ In a subsequent patchset, more features shall be added along with cleanup of the directory structure. Changes since V1: - config.mk files removed from board/spear/spearxxx/ directories - Dropped two patches which were irrelevant - Removed following config variables: CONFIG_MONITOR_IS_IN_RAM CONFIG_MTD_NAND_VERIFY_WRITE - Defined CONFIG_EXTRA_ENV_UNLOCK only for SPEAr310 and SPEAr320 - Some cosmetic cleanups Amit Virdi (6): SPEAr: Fix ARM relocation support SPEAr: Eliminate dependency on Xloader table SPEAr: Initialize SNOR in early_board_init_f SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access cleanup/SPEAr: Remove unnecessary parenthesis cleanup/SPEAr: Define configuration flags more elegantly Shiraz Hashim (4): SPEAr: Enable autoneg for ethernet SPEAr: Enable dcache for fast file transfer SPEAr: explicitly select clk src for UART SPEAr: Correct SoC ID offset in misc configuration space Vipin KUMAR (9): SPEAr: Place ethaddr write and read within CONFIG_CMD_NET SPEAr: Configure network support for spear SoCs SPEAr: Add macb driver support for spear310 and spear320 SPEAr: Add basic arch related support for SPEAr SoCs SPEAr: Add configuration options for spear3xx and spear6xx boards SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK) SPEAr: Change the default environment variables SPEAr: Enable usb device high speed support SPEAr: Enable udc and usb-console support only for usbtty configuration Vipin Kumar (5): SPEAr: Add interface information in initialization SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb arch/arm/cpu/arm926ejs/spear/Makefile | 3 +- arch/arm/cpu/arm926ejs/spear/cpu.c | 87 +++++++++++++++++ .../arm/include/asm/arch-spear/clk.h | 29 +----- arch/arm/include/asm/arch-spear/hardware.h | 8 ++ arch/arm/include/asm/arch-spear/spr_defs.h | 7 -- arch/arm/include/asm/arch-spear/spr_gpt.h | 4 +- arch/arm/include/asm/arch-spear/spr_misc.h | 11 ++- .../arm/include/asm/arch-spear/spr_xloader_table.h | 67 ------------- board/spear/common/spr_misc.c | 102 +++++++------------- board/spear/spear300/config.mk | 39 -------- board/spear/spear300/spear300.c | 15 +++ board/spear/spear310/config.mk | 44 --------- board/spear/spear310/spear310.c | 32 ++++++ board/spear/spear320/config.mk | 44 --------- board/spear/spear320/spear320.c | 30 ++++++ board/spear/spear600/config.mk | 39 -------- board/spear/spear600/spear600.c | 18 ++++ boards.cfg | 24 ++++- doc/README.spear | 54 ++++++++--- drivers/net/designware.c | 10 ++- drivers/net/designware.h | 1 + include/configs/spear-common.h | 86 +++++++++++----- include/configs/{spear3xx.h => spear3xx_evb.h} | 58 +++++++++-- include/configs/{spear6xx.h => spear6xx_evb.h} | 17 +++- include/netdev.h | 2 +- 25 files changed, 436 insertions(+), 395 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/spear/cpu.c copy include/configs/spear6xx.h => arch/arm/include/asm/arch-spear/clk.h (60%) delete mode 100644 arch/arm/include/asm/arch-spear/spr_xloader_table.h delete mode 100644 board/spear/spear300/config.mk delete mode 100644 board/spear/spear310/config.mk delete mode 100644 board/spear/spear320/config.mk delete mode 100644 board/spear/spear600/config.mk rename include/configs/{spear3xx.h => spear3xx_evb.h} (74%) rename include/configs/{spear6xx.h => spear6xx_evb.h} (80%) -- 1.7.2.2

3 27

[U-Boot] [PATCH 00/11] MIPS: fixes and updates
by Daniel Schwierzeck 02 Apr '12

02 Apr '12

This series contains bugfixes and coding style cleanups. Furthermore it contains some extensions for MIPS24k and MIPS34k cores as preparation for merging the support for various Lantiq SoCs. Daniel Schwierzeck (11): MIPS: board.c: make checkpatch.pl clean MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined MIPS: board.c: fix init of flash data in bd_info MIPS: add register definition for EBase register MIPS: add sleep handler for slave CPUs in multi-processor systems MIPS: make cache operation mode configurable in dcache_enable() MIPS: extend cache initialization for MIPS24K and MIPS34K cores MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores MIPS: add header file for generic GPIO API MIPS: add init hook for CPU specific initialization MIPS: MAKEALL: fix lists for MIPSel and MIPS boards MAKEALL | 11 +--- arch/mips/cpu/mips32/cache.S | 24 ++++++- arch/mips/cpu/mips32/start.S | 37 ++++++++++- arch/mips/include/asm/gpio.h | 13 ++++ arch/mips/include/asm/mipsregs.h | 20 ++++++ arch/mips/lib/board.c | 139 +++++++++++++++++++++----------------- 6 files changed, 171 insertions(+), 73 deletions(-) create mode 100644 arch/mips/include/asm/gpio.h -- 1.7.7.2

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[U-Boot] [PATCH v2] lsxl: add support for lschlv2 and lsxhl
by Michael Walle 02 Apr '12

02 Apr '12

This patchset adds support for both the Linkstation Live (LS-CHLv2) and Linkstation Pro (LS-XHL) by Buffalo. Signed-off-by: Michael Walle <michael(a)walle.cc> Cc: Prafulla Wadaskar <prafulla(a)marvell.com> Cc: Wolfgang Denk <wd(a)denx.de> --- v2: - add to buffalo vendor directory instead of Marvell - add both boards to MAINTAINERS - don't define values for feature macros - use tab for vertical alignment - remove static network configuration, instead introduce a rescue mode - add some convenience scripts - small cleanups MAINTAINERS | 5 + board/buffalo/lsxl/Makefile | 50 ++++++ board/buffalo/lsxl/config.mk | 1 + board/buffalo/lsxl/kwbimage-lschl.cfg | 66 ++++++++ board/buffalo/lsxl/kwbimage-lsxhl.cfg | 66 ++++++++ board/buffalo/lsxl/lsxl.c | 294 +++++++++++++++++++++++++++++++++ board/buffalo/lsxl/lsxl.h | 75 +++++++++ boards.cfg | 3 + include/configs/lsxl.h | 171 +++++++++++++++++++ 9 files changed, 731 insertions(+), 0 deletions(-) create mode 100644 board/buffalo/lsxl/Makefile create mode 100644 board/buffalo/lsxl/config.mk create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg create mode 100644 board/buffalo/lsxl/lsxl.c create mode 100644 board/buffalo/lsxl/lsxl.h create mode 100644 include/configs/lsxl.h diff --git a/MAINTAINERS b/MAINTAINERS index 1e40af2..25a5a5d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -905,6 +905,11 @@ Prafulla Wadaskar <prafulla(a)marvell.com> rd6281a ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC) +Michael Walle <michael(a)walle.cc> + + lschlv2 ARM926EJS (Kirkwood SoC) + lsxhl ARM926EJS (Kirkwood SoC) + Tom Warren <twarren(a)nvidia.com> harmony Tegra2 (ARM7 & A9 Dual Core) diff --git a/board/buffalo/lsxl/Makefile b/board/buffalo/lsxl/Makefile new file mode 100644 index 0000000..4c08079 --- /dev/null +++ b/board/buffalo/lsxl/Makefile @@ -0,0 +1,50 @@ +# +# Copyright (c) 2011 Michael Walle +# Michael Walle <michael(a)walle.cc> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := lsxl.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/buffalo/lsxl/config.mk b/board/buffalo/lsxl/config.mk new file mode 100644 index 0000000..062554b --- /dev/null +++ b/board/buffalo/lsxl/config.mk @@ -0,0 +1 @@ +ALL-y += $(obj)u-boot.kwb diff --git a/board/buffalo/lsxl/kwbimage-lschl.cfg b/board/buffalo/lsxl/kwbimage-lschl.cfg new file mode 100644 index 0000000..4d96c3f --- /dev/null +++ b/board/buffalo/lsxl/kwbimage-lschl.cfg @@ -0,0 +1,66 @@ +# +# Copyright (c) 2011 Michael Walle +# Michael Walle <michael(a)walle.cc> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100E0 0x1B1B1B9B + +DATA 0xFFD20134 0xBBBBBBBB # L2 RAM Timing 0 +DATA 0xFFD20138 0x00BBBBBB # L2 RAM Timint 1 + +# DRAM configuration +DATA 0xFFD01400 0x43000618 # DDR Configuration register +DATA 0xFFD01404 0x39543000 # DDR Controller Control Low +DATA 0xFFD01408 0x3302444F # DDR Timing (Low) +DATA 0xFFD0140C 0x00000823 # DDR Timing (High) +DATA 0xFFD01410 0x00000009 # DDR Address Control +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +DATA 0xFFD01418 0x00000000 # DDR Operation +DATA 0xFFD0141C 0x00000652 # DDR Mode +DATA 0xFFD01420 0x00000042 # DDR Extended Mode +DATA 0xFFD01424 0x0000F1FF # DDR Controller Control High +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) +DATA 0xFFD0142C 0x00000000 # DDR Operation Control + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x03FFFFF1 # CS[0]n Size +DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x003C0000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +DATA 0xFFD0149C 0x0000E80F # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/buffalo/lsxl/kwbimage-lsxhl.cfg b/board/buffalo/lsxl/kwbimage-lsxhl.cfg new file mode 100644 index 0000000..1f978fe --- /dev/null +++ b/board/buffalo/lsxl/kwbimage-lsxhl.cfg @@ -0,0 +1,66 @@ +# +# Copyright (c) 2011 Michael Walle +# Michael Walle <michael(a)walle.cc> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100E0 0x1B1B9B9B + +DATA 0xFFD20134 0xBBBBBBBB # L2 RAM Timing 0 +DATA 0xFFD20138 0x00BBBBBB # L2 RAM Timint 1 + +# DRAM configuration +DATA 0xFFD01400 0x43000618 # DDR Configuration register +DATA 0xFFD01404 0x39543010 # DDR Controller Control Low +DATA 0xFFD01408 0x22125441 # DDR Timing (Low) +DATA 0xFFD0140C 0x00000832 # DDR Timing (High) +DATA 0xFFD01410 0x0000000C # DDR Address Control +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +DATA 0xFFD01418 0x00000000 # DDR Operation +DATA 0xFFD0141C 0x00000652 # DDR Mode +DATA 0xFFD01420 0x00000006 # DDR Extended Mode +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) +DATA 0xFFD0142C 0x00000000 # DDR Operation Control + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +DATA 0xFFD0149C 0x0000E80F # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c new file mode 100644 index 0000000..1b9f024 --- /dev/null +++ b/board/buffalo/lsxl/lsxl.c @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2011 Michael Walle + * Michael Walle <michael(a)walle.cc> + * + * Based on sheevaplug/sheevaplug.c by + * Marvell Semiconductor <www.marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <malloc.h> +#include <netdev.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/cpu.h> +#include <asm/arch/mpp.h> +#include <asm/arch/gpio.h> +#include <spi_flash.h> + +#include "lsxl.h" + +/* + * Rescue mode + * + * Selected by holding the push button for 3 seconds, while powering on + * the device. + * + * These linkstations don't have a (populated) serial port. There is no + * way to access an (unmodified) board other than using the netconsole. If + * you want to recover from a bad environment setting or an empty environment, + * you can do this only with a working network connection. Therefore, the + * following network configuration will be set when rescue mode is stared. + * Additionally, the bootsource is set to 'cli'. + */ +#define RESCUE_ETHADDR "02:00:01:00:00:00" +#define RESCUE_IPADDR "192.168.11.150" +#define RESCUE_NETMASK "255.255.255.0" +#define RESCUE_SERVERIP "192.168.11.1" +#define RESCUE_NCIP RESCUE_SERVERIP + +#ifndef CONFIG_ENV_OVERWRITE +# error "You need to set CONFIG_ENV_OVERWRITE" +#endif + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(LSXL_OE_VAL_LOW, + LSXL_OE_VAL_HIGH, + LSXL_OE_LOW, LSXL_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_UART0_RXD, + MPP5_UART0_TXD, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_GPIO, + MPP9_GPIO, + MPP10_GPO, + MPP11_GPIO, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_GPO, + MPP19_GPO, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + + kirkwood_mpp_conf(kwmpp_config); + + return 0; +} + +#define LED_OFF 0 +#define LED_ALARM_ON 1 +#define LED_ALARM_BLINKING 2 +#define LED_POWER_ON 3 +#define LED_POWER_BLINKING 4 +#define LED_INFO_ON 5 +#define LED_INFO_BLINKING 6 + +static void __set_led(int blink_alarm, int blink_info, int blink_power, + int value_alarm, int value_info, int value_power) +{ + kw_gpio_set_blink(GPIO_ALARM_LED, blink_alarm); + kw_gpio_set_blink(GPIO_INFO_LED, blink_info); + kw_gpio_set_blink(GPIO_POWER_LED, blink_power); + kw_gpio_set_value(GPIO_ALARM_LED, value_alarm); + kw_gpio_set_value(GPIO_INFO_LED, value_info); + kw_gpio_set_value(GPIO_POWER_LED, value_power); +} + +static void set_led(int state) +{ + switch (state) { + case LED_OFF: + __set_led(0, 0, 0, 0, 0, 0); + break; + case LED_ALARM_ON: + __set_led(0, 0, 0, 0, 1, 1); + break; + case LED_ALARM_BLINKING: + __set_led(1, 0, 0, 1, 1, 1); + break; + case LED_INFO_ON: + __set_led(0, 0, 0, 1, 0, 1); + break; + case LED_INFO_BLINKING: + __set_led(0, 1, 0, 1, 1, 1); + break; + case LED_POWER_ON: + __set_led(0, 0, 0, 1, 1, 0); + break; + case LED_POWER_BLINKING: + __set_led(0, 0, 1, 1, 1, 1); + break; + } +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + set_led(LED_POWER_BLINKING); + + return 0; +} + +#ifdef CONFIG_MISC_INIT_R +void check_enetaddr(void) +{ + if (getenv("ethaddr") == NULL) { + /* signal unset ethaddr to user */ + set_led(LED_INFO_BLINKING); + } +} + +static void erase_environment(void) +{ + struct spi_flash *flash; + + printf("Erasing environment..\n"); + flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); + if (!flash) { + printf("Erasing flash failed\n"); + return; + } + + spi_flash_erase(flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE); + spi_flash_free(flash); + do_reset(NULL, 0, 0, NULL); +} + +static void rescue_mode(void) +{ + printf("Entering rescue mode..\n"); + setenv("bootsource", "cli"); + if (getenv("ethaddr") == NULL) + setenv("ethaddr", RESCUE_ETHADDR); + setenv("ipaddr", RESCUE_IPADDR); + setenv("netmask", RESCUE_NETMASK); + setenv("serverip", RESCUE_SERVERIP); + setenv("ncip", RESCUE_NCIP); + setenv("stdin", "nc"); + setenv("stdout", "nc"); + setenv("stderr", "nc"); + set_led(LED_ALARM_ON); + printf("Rescue mode active\n"); +} + +static void check_push_button(void) +{ + int i = 0; + + while (!kw_gpio_get_value(GPIO_FUNC_BUTTON)) { + udelay(100000); + i++; + + if (i == 10) + set_led(LED_INFO_ON); + + if (i >= 100) { + set_led(LED_INFO_BLINKING); + break; + } + } + + if (i >= 100) + erase_environment(); + else if (i >= 10) + rescue_mode(); +} + +int misc_init_r(void) +{ + check_enetaddr(); + check_push_button(); + + return 0; +} +#endif + +#ifdef CONFIG_SHOW_BOOT_PROGRESS +void show_boot_progress(int progress) +{ + if (progress < 0) { + set_led(LED_ALARM_BLINKING); + return; + } +} +#endif + +#ifdef CONFIG_RESET_PHY_R +/* Configure and enable MV88E1118 PHY */ +void reset_phy(void) +{ + u16 devadr; + char *name = "egiga1"; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", __func__); + return; + } + + /* reset the phy */ + miiphy_reset(name, devadr); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/buffalo/lsxl/lsxl.h b/board/buffalo/lsxl/lsxl.h new file mode 100644 index 0000000..db6108f --- /dev/null +++ b/board/buffalo/lsxl/lsxl.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2011 Michael Walle + * Michael Walle <michael(a)walle.cc> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __LSXL_H +#define __LSXL_H + +#define GPIO_HDD_POWER 10 +#define GPIO_USB_VBUS 11 +#define GPIO_FAN_HIGH 18 +#define GPIO_FAN_LOW 19 +#define GPIO_FUNC_LED 36 +#define GPIO_ALARM_LED 37 +#define GPIO_INFO_LED 38 +#define GPIO_POWER_LED 39 +#define GPIO_FAN_LOCK 40 +#define GPIO_FUNC_BUTTON 41 +#define GPIO_POWER_SWITCH 42 +#define GPIO_POWER_AUTO_SWITCH 43 +#define GPIO_FUNC_RED_LED 48 + +#define _BIT(x) (1<<(x)) + +#define LSXL_OE_LOW (~(_BIT(GPIO_HDD_POWER) \ + | _BIT(GPIO_USB_VBUS) \ + | _BIT(GPIO_FAN_HIGH) \ + | _BIT(GPIO_FAN_LOW))) + +#define LSXL_OE_HIGH (~(_BIT(GPIO_FUNC_LED - 32) \ + | _BIT(GPIO_ALARM_LED - 32) \ + | _BIT(GPIO_INFO_LED - 32) \ + | _BIT(GPIO_POWER_LED - 32) \ + | _BIT(GPIO_FUNC_RED_LED - 32))) + +#define LSXL_OE_VAL_LOW (_BIT(GPIO_HDD_POWER) \ + | _BIT(GPIO_USB_VBUS)) + +#define LSXL_OE_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32) \ + | _BIT(GPIO_ALARM_LED - 32) \ + | _BIT(GPIO_INFO_LED - 32) \ + | _BIT(GPIO_POWER_LED - 32) \ + | _BIT(GPIO_FUNC_RED_LED - 32)) + +#define LSXL_POL_VAL_LOW (_BIT(GPIO_FAN_HIGH) \ + | _BIT(GPIO_FAN_LOW)) + +#define LSXL_POL_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32) \ + | _BIT(GPIO_ALARM_LED - 32) \ + | _BIT(GPIO_INFO_LED - 32) \ + | _BIT(GPIO_POWER_LED - 32) \ + | _BIT(GPIO_FUNC_BUTTON - 32) \ + | _BIT(GPIO_POWER_SWITCH - 32) \ + | _BIT(GPIO_POWER_AUTO_SWITCH - 32) \ + | _BIT(GPIO_FUNC_RED_LED - 32)) + +#endif /* __LSXL_H */ diff --git a/boards.cfg b/boards.cfg index 05ce1ae..0155ea8 100644 --- a/boards.cfg +++ b/boards.cfg @@ -137,6 +137,9 @@ hawkboard_uart arm arm926ejs da8xxevm davinci enbw_cmc arm arm926ejs enbw_cmc enbw davinci calimain arm arm926ejs calimain omicron davinci dns325 arm arm926ejs - d-link kirkwood +lschlv2 arm arm926ejs lsxl buffalo kirkwood lsxl:LSCHLV2 +lschlv2_ramboot arm arm926ejs lsxl buffalo kirkwood lsxl:LSCHLV2,SYS_RAMBOOT,SYS_TEXT_BASE=0x00700000 +lsxhl arm arm926ejs lsxl buffalo kirkwood lsxl:LSXHL km_kirkwood arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_DISABLE_PCI km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_RECONFIG_XLX mgcoge3un arm arm926ejs km_arm keymile kirkwood diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h new file mode 100644 index 0000000..451cbc7 --- /dev/null +++ b/include/configs/lsxl.h @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2011 Michael Walle + * Michael Walle <michael(a)walle.cc> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_LSXL_H +#define _CONFIG_LSXL_H + +/* + * Version number information + */ +#if defined(CONFIG_LSCHLV2) +#define CONFIG_IDENT_STRING "\nBuffalo Linkstation Live (LS-CHLv2)" +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lschl.cfg +#define CONFIG_MACH_TYPE 3006 +#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */ +#elif defined(CONFIG_LSXHL) +#define CONFIG_IDENT_STRING "\nBuffalo Linkstation Pro (LS-XHL)" +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg +#define CONFIG_MACH_TYPE 2663 +#define CONFIG_SYS_TCLK 200000000 /* 200 MHz */ +#else +#error "unknown board" +#endif + +/* + * General configuration options + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ + +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_MISC_INIT_R +#define CONFIG_SHOW_BOOT_PROGRESS + +#define CONFIG_KIRKWOOD_GPIO +#define CONFIG_OF_LIBFDT + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_INFO_QUIET + +/* + * Commands configuration + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_USB +#define CONFIG_CMD_IDE +#define CONFIG_CMD_SPI +#define CONFIG_CMD_EXT2 + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_SYS_RAMBOOT +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT +#endif + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* ST M25P40 */ +#undef CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_SPI_FLASH_STMICRO +#undef CONFIG_ENV_SPI_MAX_HZ +#define CONFIG_ENV_SPI_MAX_HZ 25000000 +#undef CONFIG_SF_DEFAULT_SPEED +#define CONFIG_SF_DEFAULT_SPEED 25000000 + + +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 8 +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K */ +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x10000 /* 64k */ +#define CONFIG_ENV_OFFSET 0x70000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_LOADADDR 0x00800000 +#define CONFIG_BOOTCOMMAND "run bootcmd_${bootsource}" +#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/sda2" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootsource=hdd\0" \ + "hdpart=0:1\0" \ + "bootcmd_net=bootp 0x00100000 uImage " \ + "&& tftpboot 0x00800000 uInitrd " \ + "&& bootm 0x00100000 0x00800000\0" \ + "bootcmd_hdd=ide reset; " \ + "&& ext2load ide ${hdpart} 0x00100000 /uImage " \ + "&& ext2load ide ${hdpart} 0x00800000 /uInitrd " \ + "&& bootm 0x00100000 0x00800000\0" \ + "bootcmd_usb=usb start " \ + "&& fatload usb 0:1 0x00100000 /uImage " \ + "&& fatload usb 0:1 0x00800000 /uInitrd " \ + "&& bootm 0x00100000 0x00800000\0" \ + "bootcmd_cli=echo Entering CLI\0" \ + "eraseenv=sf probe 0 " \ + "&& sf erase " MK_STR(CONFIG_ENV_OFFSET) \ + " +" MK_STR(CONFIG_ENV_SIZE) "\0" \ + "standard_env=setenv ipaddr; setenv netmask; setenv serverip; " \ + "setenv ncip; setenv bootsource hdd; run ser\0" \ + "ser=setenv stdin serial; setenv stdout serial; " \ + "setenv stderr serial\0" \ + "nc=setenv stdin nc; setenv stdout nc; setenv stderr nc\0" \ + "restore_env=run standard_env; saveenv; reset\0" \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {0, 1} /* enable port 1 only */ +#define CONFIG_PHY_BASE_ADR 7 +#endif /* CONFIG_CMD_NET */ + +#ifdef CONFIG_CMD_IDE +#undef CONFIG_IDE_LED +#undef CONFIG_SYS_IDE_MAXBUS +#define CONFIG_SYS_IDE_MAXBUS 1 +#undef CONFIG_SYS_IDE_MAXDEVICE +#define CONFIG_SYS_IDE_MAXDEVICE 1 +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif + +#endif /* _CONFIG_LSXL_H */ -- 1.7.2.5

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[U-Boot] [PATCH 0/5 v3] Kirkwood: add lschlv2 and lsxhl board support
by Michael Walle 02 Apr '12

02 Apr '12

This patchset add support for the LS-CHLv2 and LS-XHL boards by Buffalo. Changes: v3: - add "Kirkwood:" prefix to patch subject - moved board/buffalo/lsxl/config.mk to an own patch, so it can be separately acked/naked ;) - removed any hardcoding, that is the mac address is now automatically generated (random, locally administered) and the IP settings are fetched with DHCP/BOOTP. - add detailed comments to every configuration line in kwbimage.cfg - add comments in MPP configuration about GPIO usage - removed lschlv2 ramboot - use short board ident string - small cleanups v2: - add to buffalo vendor directory instead of Marvell - add both boards to MAINTAINERS - don't define values for feature macros - use tab for vertical alignment - remove static network configuration, instead introduce a rescue mode - add some convenience scripts - small cleanups Michael Walle (5): lib: add rand() function net: add helper to generate random mac address net: add eth_setenv_enetaddr_by_index() Kirkwood: add lschlv2 and lsxhl board support Kirkwood: automatically build kwb image for lsxl MAINTAINERS | 5 + board/buffalo/lsxl/Makefile | 50 ++++++ board/buffalo/lsxl/config.mk | 1 + board/buffalo/lsxl/kwbimage-lschl.cfg | 229 +++++++++++++++++++++++++ board/buffalo/lsxl/kwbimage-lsxhl.cfg | 229 +++++++++++++++++++++++++ board/buffalo/lsxl/lsxl.c | 303 +++++++++++++++++++++++++++++++++ board/buffalo/lsxl/lsxl.h | 75 ++++++++ boards.cfg | 2 + include/common.h | 4 + include/configs/lsxl.h | 174 +++++++++++++++++++ include/net.h | 27 +++ lib/Makefile | 1 + lib/rand.c | 43 +++++ net/eth.c | 23 +++ 14 files changed, 1166 insertions(+), 0 deletions(-) create mode 100644 board/buffalo/lsxl/Makefile create mode 100644 board/buffalo/lsxl/config.mk create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg create mode 100644 board/buffalo/lsxl/lsxl.c create mode 100644 board/buffalo/lsxl/lsxl.h create mode 100644 include/configs/lsxl.h create mode 100644 lib/rand.c -- 1.7.2.5

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[U-Boot] [PATCH] m28evk: Use GENERATED_GBL_DATA_SIZE
by Fabio Estevam 02 Apr '12

02 Apr '12

Use GENERATED_GBL_DATA_SIZE for calculating CONFIG_SYS_INIT_SP_OFFSET. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- include/configs/m28evk.h | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 39c841f..2b4871e 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -92,7 +92,14 @@ #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Point initial SP in SRAM so SPL can use it too. */ -#define CONFIG_SYS_INIT_SP_ADDR 0x00002000 + +#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000 +#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * We need to sacrifice first 4 bytes of RAM here to avoid triggering some * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot -- 1.7.1

4 6

[U-Boot] [PATCH] ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement
by Lukasz Majewski 02 Apr '12

02 Apr '12

This patch enables LDO4 power line for preparing proper voltages to be measured by ADC converter. This measurement is used for determination of target board HW revision. Test HW: Universal_C210 (Exynos4210) rev. 0.0 Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- board/samsung/universal_c210/universal.c | 30 +++++++++++++++++++++++++++--- include/max8998_pmic.h | 1 + 2 files changed, 28 insertions(+), 3 deletions(-) diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index d0ff834..f166c3e 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -58,13 +58,13 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - check_hw_revision(); - printf("HW Revision:\t0x%x\n", board_rev); - #if defined(CONFIG_PMIC) pmic_init(); #endif + check_hw_revision(); + printf("HW Revision:\t0x%x\n", board_rev); + return 0; } @@ -109,10 +109,32 @@ static unsigned short get_adc_value(int channel) return ret; } +static int adc_power_control(int on) +{ + int ret; + struct pmic *p = get_pmic(); + + if (pmic_probe(p)) + return -1; + + if (on) + ret = pmic_set_output(p, + MAX8998_REG_ONOFF1, + MAX8998_LDO4, LDO_ON); + else + ret = pmic_set_output(p, + MAX8998_REG_ONOFF1, + MAX8998_LDO4, LDO_OFF); + + return ret; +} + static unsigned int get_hw_revision(void) { int hwrev, mode0, mode1; + adc_power_control(1); + mode0 = get_adc_value(1); /* HWREV_MODE0 */ mode1 = get_adc_value(2); /* HWREV_MODE1 */ @@ -135,6 +157,8 @@ static unsigned int get_hw_revision(void) debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); + adc_power_control(0); + return hwrev; } diff --git a/include/max8998_pmic.h b/include/max8998_pmic.h index 10c892a..ca21f88 100644 --- a/include/max8998_pmic.h +++ b/include/max8998_pmic.h @@ -75,6 +75,7 @@ enum { }; #define MAX8998_LDO3 (1 << 2) +#define MAX8998_LDO4 (1 << 1) #define MAX8998_LDO8 (1 << 5) #define MAX8998_SAFEOUT1 (1 << 4) -- 1.7.2.3

2 4

[U-Boot] [PATCH v2] EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
by Chander Kashyap 02 Apr '12

02 Apr '12

TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic usase of tzpc. Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc. Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- Changes in V2: - Renaming is changed from s5p_ctzpc to exynos_tzpc as per Kyungmin's Comments. arch/arm/include/asm/arch-exynos/tzpc.h | 2 +- board/samsung/smdk5250/tzpc_init.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h b/arch/arm/include/asm/arch-exynos/tzpc.h index 2c9a07b..c5eb4b1 100644 --- a/arch/arm/include/asm/arch-exynos/tzpc.h +++ b/arch/arm/include/asm/arch-exynos/tzpc.h @@ -22,7 +22,7 @@ #define __TZPC_H_ #ifndef __ASSEMBLY__ -struct exynos5_tzpc { +struct exynos_tzpc { unsigned int r0size; char res1[0x7FC]; unsigned int decprot0stat; diff --git a/board/samsung/smdk5250/tzpc_init.c b/board/samsung/smdk5250/tzpc_init.c index c2ccef3..f39bd55 100644 --- a/board/samsung/smdk5250/tzpc_init.c +++ b/board/samsung/smdk5250/tzpc_init.c @@ -28,7 +28,7 @@ /* Setting TZPC[TrustZone Protection Controller] */ void tzpc_init(void) { - struct exynos5_tzpc *tzpc; + struct exynos_tzpc *tzpc; unsigned int addr; for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) { -- 1.7.5.4

2 1

[U-Boot] [PATCH] TRATS: modify the trats's configuration
by Jaehoon Chung 02 Apr '12

02 Apr '12

Trats is supported 1GiB memory size. (Each bank size is 512MB.) And INITRD is unnecessary. So removed them. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- include/configs/trats.h | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/include/configs/trats.h b/include/configs/trats.h index 10f11d9..674bc71 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -53,7 +53,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG -#define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_EDITING #define CONFIG_SKIP_LOWLEVEL_INIT @@ -174,9 +173,9 @@ /* TRATS has 2 banks of DRAM */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ -#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ +#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */ #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ -#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ +#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */

2 1