November 2012 - U-Boot

Re: [U-Boot] USB mass storage gadget patch
by victor 02 Nov '12

02 Nov '12

>> I attach the file for your reference. Please kindly advise me. Thanks. The changes of file_storage.c: --- file_storage.c 2012-11-02 18:27:41.072702402 +0800 +++ file_storage.orig.c 2012-11-02 19:36:37.992528292 +0800 @@ -746,10 +745,6 @@ struct fsg_dev *fsg = ep->driver_data; struct fsg_buffhd *bh = req->context; -ga_bh = bh; -ga_tag = fsg->tag; - dump_msg(fsg, "bulk-out", req->buf, req->actual); if (req->status || req->actual != bh->bulk_out_intended_length) DBG(fsg, "%s --> %d, %u/%u\n", __func__, @@ -1185,9 +1174,6 @@ return rc; } -bh->inreq->buf = bh->buf; - /* If we were asked to read past the end of file, * end with an empty buffer. */ if (amount == 0) { @@ -1575,8 +1560,6 @@ static char vendor_id[] = "Linux "; static char product_cdrom_id[] = "File-CD Gadget "; -bh->inreq->buf = bh->buf; if (!fsg->curlun) { // Unsupported LUNs are okay fsg->bad_lun_okay = 1; @@ -1667,15 +1649,12 @@ int pmi = fsg->cmnd[8]; u8 *buf = (u8 *) bh->buf; -bh->inreq->buf = bh->buf; /* Check the PMI and LBA fields */ if (pmi > 1 || (pmi == 0 && lba != 0)) { curlun->sense_data = SS_INVALID_FIELD_IN_CDB; return -EINVAL; } @@ -1755,8 +1734,6 @@ curlun->sense_data = SS_SAVING_PARAMETERS_NOT_SUPPORTED; return -EINVAL; } -printf("C %s %x ", __func__, (u8 *)bh->buf); -bh->inreq->buf = bh->buf; changeable_values = (pc == 1); all_pages = (page_code == 0x3f); @@ -1865,8 +1842,6 @@ struct fsg_lun *curlun = fsg->curlun; u8 *buf = (u8 *) bh->buf; -printf("%s\n",__func__); -bh->inreq->buf = bh->buf; buf[0] = buf[1] = buf[2] = 0; buf[3] = 8; // Only the Current/Maximum Capacity Descriptor buf += 4; @@ -1956,9 +1931,8 @@ nsend = min(fsg->usb_amount_left, (u32) mod_data.buflen); memset(bh->buf + nkeep, 0, nsend - nkeep); - //bh->inreq->length = nsend; + bh->inreq->length = nsend; bh->inreq->zero = 0; -printf("%s %x %d %d\n", __func__, (u8 *)bh, bh->inreq->length, nsend); start_transfer(fsg, fsg->bulk_in, bh->inreq, &bh->inreq_busy, &bh->state); bh = fsg->next_buffhd_to_fill = bh->next; @@ -2137,13 +2107,7 @@ /* Wait for the next buffer to become available */ bh = fsg->next_buffhd_to_fill; -printf("%s %x %d\n", __func__, (u8 *)bh, bh->state); while (bh->state != BUF_STATE_EMPTY) { -if (bh->state == BUF_STATE_FULL) -{ - bh->state = BUF_STATE_EMPTY; - break; -} rc = sleep_thread(fsg, __LINE__); if (rc) return rc; @@ -2180,8 +2144,6 @@ bh->inreq->length = USB_BULK_CS_WRAP_LEN; bh->inreq->zero = 0; -bh->inreq->buf = bh->buf; -printf("bbb %s %x %d\n", __func__, (u8 *)bh, bh->state); start_transfer(fsg, fsg->bulk_in, bh->inreq, &bh->inreq_busy, &bh->state); @@ -2362,12 +2320,9 @@ for (i = 1; i < cmnd_size; ++i) { if (fsg->cmnd[i] && !(mask & (1 << i))) { if (curlun) curlun->sense_data = SS_INVALID_FIELD_IN_CDB; //return -EINVAL; } } @@ -2669,8 +2620,6 @@ ga_bh->inreq->length = USB_BULK_CS_WRAP_LEN; ga_bh->inreq->zero = 0; -ga_bh->inreq->buf = ga_bh->buf; -printf("bbb %s %x %d\n", __func__, (u8 *)ga_bh, ga_bh->state); start_transfer(fsg, fsg->bulk_in, ga_bh->inreq, &(ga_bh->inreq_busy), &(ga_bh->state)); @@ -2732,26 +2679,20 @@ /* Queue a request to read a Bulk-only CBW */ set_bulk_out_req_length(fsg, bh, USB_BULK_CB_WRAP_LEN); bh->outreq->short_not_ok = 1; -printf("call start_transfer, %x %x\n", (u8 *)bh, (u8 *)(fsg->bulk_out)); -bh->outreq->context = bh; start_transfer(fsg, fsg->bulk_out, bh->outreq, &bh->outreq_busy, &bh->state); @@ -3468,8 +3406,6 @@ ep->driver_data = fsg; // claim the endpoint fsg->bulk_out = ep; -if (fsg_fs_bulk_out_desc.bEndpointAddress != 0x1) - fsg_fs_bulk_out_desc.bEndpointAddress = 0x1; if (transport_is_cbi()) { ep = usb_ep_autoconfig(gadget, &fsg_fs_intr_in_desc); ================================================================================================ CONFIDENTIALITY NOTE: This e-mail and any attachments may contain confidential information and may be protected by legal privilege. If you are not the intended addressee (or authorized to receive for the addressee). be aware that any disclosure, copying, distribution or use of this e-mail or any attachment is prohibited. If you have received this e-mail in error, please notify us immediately by returning it to the sender and delete this copy from your system. Thank you for your cooperation. KeyASIC Inc. ================================================================================================

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[U-Boot] [PATCH 0/6 V8] EXYNOS5: Enable SPI support
by Hatim Ali 02 Nov '12

02 Nov '12

This patch set adds SPI driver for EXYNOS5 and enables same. This patch set is based on latest u-boot-samsung.git tree. Changes in V2: - Correted the Commit message. Changes in V3: - Removed SPI_SLAVE Flag. - Corrected warning messages. Changes in V4: - Rebased on mainline u-boot.git - Incorporated review comments for SPI driver. Changes in V5: - Rebased on u-boot-samsung.git - Incorporated review comments by Simon Glass Changes in V6: - Incorporated review comments by Minkyu Kang Changes in V7: - Incorporated review comments by Minkyu Kang & Simon Glass Changes in V8: - Rebased on u-boot-samsung.git Hatim Ali (2): EXYNOS: Add clock for SPI EXYNOS5: Enable SPI Rajeshwari Shinde (4): EXYNOS5: Add pinmux support for SPI EXYNOS5: Add base address for SPI. SPI: Add SPI Driver for EXYNOS. EXYNOS5: Enable SPI booting. arch/arm/cpu/armv7/exynos/clock.c | 125 ++++++++++ arch/arm/cpu/armv7/exynos/pinmux.c | 51 ++++ arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/cpu.h | 6 + arch/arm/include/asm/arch-exynos/periph.h | 5 + arch/arm/include/asm/arch-exynos/spi.h | 78 ++++++ board/samsung/smdk5250/Makefile | 2 +- board/samsung/smdk5250/mmc_boot.c | 58 ----- board/samsung/smdk5250/smdk5250.c | 4 + board/samsung/smdk5250/spl_boot.c | 85 +++++++ drivers/spi/Makefile | 1 + drivers/spi/exynos_spi.c | 367 +++++++++++++++++++++++++++++ include/configs/smdk5250.h | 27 ++- 13 files changed, 750 insertions(+), 60 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/spi.h delete mode 100644 board/samsung/smdk5250/mmc_boot.c create mode 100644 board/samsung/smdk5250/spl_boot.c create mode 100644 drivers/spi/exynos_spi.c -- 1.7.2.3

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[U-Boot] which toolchain version for Microblaze
by Stephan Linz 02 Nov '12

02 Nov '12

Hi Michal, Hi David which version of binutils and gcc you are currently using for embedded Linux development? Just now I've played a little bit with the new one I've found in the Xilinx git repository on: git://git.xilinx.com/microblaze-gnu.git Unfortunately both the binaries and the sources seems to be buggy. When I try to compile U-Boot with it the final linker stage runs into a SIGSEGV -- here is the (reduced) output: UNDEF_SYM=`microblaze-unknown-linux-gnu-objdump -x board/xilinx/microblaze-generic/libmicroblaze-generic.o api/libapi.o arch/microblaze/cpu/libmicroblaze.o arch/microblaze/lib/libmicroblaze.o **/*.o | sed -n -e 's/.*$__u_boot_cmd_.*$/-u\1/p'|sort|uniq`; cd /store/devel/MICROBLAZE/u-boot-mbref && microblaze-unknown-linux-gnu-ld.bfd -T u-boot.lds -Bstatic -Ttext 0x29000000 $UNDEF_SYM arch/microblaze/cpu/start.o --start-group api/libapi.o arch/microblaze/cpu/libmicroblaze.o arch/microblaze/lib/libmicroblaze.o **/*.o board/xilinx/microblaze-generic/libmicroblaze-generic.o --end-group -L /opt/tools-4.6.2-mb-xilinx-v3.0/microblaze-unknown-linux-gnu/bin/../lib/gcc/microblaze-unknown-linux-gnu/4.6.2 -lgcc -Map u-boot.map -o u-boot /opt/tools-4.6.2-mb-xilinx-v3.0/microblaze-unknown-linux-gnu/bin/../lib/gcc/microblaze-unknown-linux-gnu/4.6.2/libgcc.a(_muldi3.o): In function `__muldi3': /home/buildbot/plgx_bld/xils005/2012_06_30/toolchains/lin32-microblaze-xilinx-linux-gnu/crosstool-ng/targets/src/gcc-4.6.2/libgcc/../gcc/libgcc2.c:549: undefined reference to `_GLOBAL_OFFSET_TABLE_' /bin/sh: line 1: 17792 Segmentation fault @David: This error can be reproduced with the binaries in Xilinx git repo. Have you any idea? @Michal: which version did you use currently? @all: Is there anybody who can give me a hint how I can / should handle this error? br, Stephan

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[U-Boot] [PATCH 0/9 V4] EXYNOS5: Add Audio support
by Rajeshwari Shinde 02 Nov '12

02 Nov '12

This patchset adds the audio support for EXYNOS5. This patchset plays a predefined beep sound. Rajeshwari Shinde (9): SOUND: SAMSUNG: Add I2S driver SOUND: Add WM8994 codec Sound: Add command for audio playback EXYNOS: Add I2S registers EXYNOS: Add parameters required by I2S EXYNOS: Add pinmux for I2S EXYNOS: Add I2S base address EXYNOS: Add clock for I2S SMDK5250: Enable Sound Changes in V2: - renamed i2s.c to samsung-i2s.c. - made exynos_i2s_config pinmux function static. - corrected the commit message for "Enable sound" patch. Changes in V3: - Incorporated comments from Simon Glass and Minkyu Kang. Changes in V4: - Corrected the coding style issues suggested by Simon Glass. Makefile | 1 + arch/arm/cpu/armv7/exynos/clock.c | 120 ++++ arch/arm/cpu/armv7/exynos/pinmux.c | 13 + arch/arm/include/asm/arch-exynos/clk.h | 3 + arch/arm/include/asm/arch-exynos/clock.h | 29 + arch/arm/include/asm/arch-exynos/cpu.h | 3 + arch/arm/include/asm/arch-exynos/i2s-regs.h | 66 +++ arch/arm/include/asm/arch-exynos/periph.h | 1 + arch/arm/include/asm/arch-exynos/sound.h | 44 ++ common/Makefile | 1 + common/cmd_sound.c | 96 ++++ drivers/sound/Makefile | 48 ++ drivers/sound/samsung-i2s.c | 358 ++++++++++++ drivers/sound/sound.c | 228 ++++++++ drivers/sound/wm8994.c | 792 +++++++++++++++++++++++++++ drivers/sound/wm8994.h | 87 +++ drivers/sound/wm8994_registers.h | 299 ++++++++++ include/configs/smdk5250.h | 8 + include/i2s.h | 127 +++++ include/sound.h | 62 +++ 20 files changed, 2386 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/i2s-regs.h create mode 100644 arch/arm/include/asm/arch-exynos/sound.h create mode 100644 common/cmd_sound.c create mode 100644 drivers/sound/Makefile create mode 100644 drivers/sound/samsung-i2s.c create mode 100644 drivers/sound/sound.c create mode 100644 drivers/sound/wm8994.c create mode 100644 drivers/sound/wm8994.h create mode 100644 drivers/sound/wm8994_registers.h create mode 100644 include/i2s.h create mode 100644 include/sound.h -- 1.7.4.4

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Re: [U-Boot] [PATCH] powerpc/corenet_ds: move SATA config to board configuration
by Tabi Timur-B04825 02 Nov '12

02 Nov '12

On Thu, Nov 1, 2012 at 11:20 AM, Tabi Timur-B04825 <b04825(a)freescale.com> wrote: > >> To solve this problem, move CONFIG_FSL_SATA_V2 to board >> configuration header file. > > http://patchwork.ozlabs.org/patch/126958/ To be clear, I think you should say in the patch description that your patch effectively reverts mine. -- Timur Tabi Linux kernel developer at Freescale

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[U-Boot] [PATCH] powerpc/esdhc: force the bus width to 4bit
by Chang-Ming.Huang＠freescale.com 02 Nov '12

02 Nov '12

From: Jerry Huang <Chang-Ming.Huang(a)freescale.com> For the current u-boot codes, only 4bit/1bit SD/SDHC bus width is support. So for MMC card, we also support 4bit bus width, otherwiase, we will get the 12bit bus width, which is not correct: => mmcinfo Device: FSL_SDHC Manufacturer ID: 1e OEM: ffff Name: MMC Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.0 High Capacity: No Capacity: 1.9 GiB Bus Width: 12-bit Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescalecom> CC: Andy Fleming <afleming(a)gmail.com> CC: Marek Vasut <marex(a)denx.de> --- drivers/mmc/fsl_esdhc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 3f8d30d..7b83dd2 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -577,7 +577,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) return -1; } - mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; + mmc->host_caps = MMC_MODE_4BIT; if (caps & ESDHC_HOSTCAPBLT_HSS) mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; -- 1.7.9.5

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[U-Boot] [PATCH] WIP: cbfs: Add docbook template
by Simon Glass 02 Nov '12

02 Nov '12

This adds a docbook template for fs, and makes CBFS use it. Problems (advise please as I have enough 500pp books in my bookshelf): 1. It requires the function names to be repeated. I would like to do this: /** * Get the name of a file in CBFS. * * @file: The handle to the file. * * @return The name of the file, NULL on error. */ const char *file_cbfs_name(const struct cbfs_cachenode *file); but I must do this: /** * file_cbfs_name() - Get the name of a file in CBFS. * * @file: The handle to the file. * * @return The name of the file, NULL on error. */ const char *file_cbfs_name(const struct cbfs_cachenode *file); 2. It will not accept the doxygen @param style for parameters: /** * file_cbfs_name() - Get the name of a file in CBFS. * * @param file The handle to the file. * * @return The name of the file, NULL on error. */ const char *file_cbfs_name(const struct cbfs_cachenode *file); Signed-off-by: Simon Glass <sjg(a)chromium.org> --- doc/DocBook/Makefile | 2 +- include/cbfs.h | 45 +++++++++++++++++++++++---------------------- 2 files changed, 24 insertions(+), 23 deletions(-) diff --git a/doc/DocBook/Makefile b/doc/DocBook/Makefile index da88b32..521e8bc 100644 --- a/doc/DocBook/Makefile +++ b/doc/DocBook/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/config.mk -DOCBOOKS := linker_lists.xml stdio.xml +DOCBOOKS := fs.xml linker_lists.xml stdio.xml ### # The build process is as follows (targets): diff --git a/include/cbfs.h b/include/cbfs.h index 6ea3f35..dc17109 100644 --- a/include/cbfs.h +++ b/include/cbfs.h @@ -77,46 +77,46 @@ struct cbfs_cachenode { extern enum cbfs_result file_cbfs_result; -/* +/** * Return a string describing the most recent error condition. * * @return A pointer to the constant string. */ const char *file_cbfs_error(void); -/* +/** * Initialize the CBFS driver and load metadata into RAM. * - * @param end_of_rom Points to the end of the ROM the CBFS should be read + * @end_of_rom: Points to the end of the ROM the CBFS should be read * from. */ void file_cbfs_init(uintptr_t end_of_rom); -/* +/** * Get the header structure for the current CBFS. * * @return A pointer to the constant structure, or NULL if there is none. */ const struct cbfs_header *file_cbfs_get_header(void); -/* +/** * Get a handle for the first file in CBFS. * * @return A handle for the first file in CBFS, NULL on error. */ const struct cbfs_cachenode *file_cbfs_get_first(void); -/* +/** * Get a handle to the file after this one in CBFS. * - * @param file A pointer to the handle to advance. + * @file: A pointer to the handle to advance. */ void file_cbfs_get_next(const struct cbfs_cachenode **file); -/* +/** * Find a file with a particular name in CBFS. * - * @param name The name to search for. + * @name: The name to search for. * * @return A handle to the file, or NULL on error. */ @@ -127,53 +127,54 @@ const struct cbfs_cachenode *file_cbfs_find(const char *name); /* All of the functions below can be used without first initializing CBFS. */ /***************************************************************************/ -/* +/** * Find a file with a particular name in CBFS without using the heap. * - * @param end_of_rom Points to the end of the ROM the CBFS should be read + * @end_of_rom: Points to the end of the ROM the CBFS should be read * from. - * @param name The name to search for. + * @name: The name to search for. * * @return A handle to the file, or NULL on error. */ const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom, const char *name); -/* +/** * Get the name of a file in CBFS. * - * @param file The handle to the file. + * @file: The handle to the file. * * @return The name of the file, NULL on error. */ const char *file_cbfs_name(const struct cbfs_cachenode *file); -/* +/** * Get the size of a file in CBFS. * - * @param file The handle to the file. + * @file: The handle to the file. * * @return The size of the file, zero on error. */ u32 file_cbfs_size(const struct cbfs_cachenode *file); -/* +/** * Get the type of a file in CBFS. * - * @param file The handle to the file. + * @file: The handle to the file. * * @return The type of the file, zero on error. */ u32 file_cbfs_type(const struct cbfs_cachenode *file); -/* +/** * Read a file from CBFS into RAM * - * @param file A handle to the file to read. - * @param buffer Where to read it into memory. + * @file: A handle to the file to read. + * @buffer: Where to read it into memory. + * @maxsize: Maximum number of bytes to read * * @return If positive or zero, the number of characters read. If negative, an - * error occurred. + * error occurred. */ long file_cbfs_read(const struct cbfs_cachenode *file, void *buffer, unsigned long maxsize); -- 1.7.7.3

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[U-Boot] [PATCH v4 0/6] tegra: Add NAND flash support
by Simon Glass 02 Nov '12

02 Nov '12

This series adds NAND flash support to Tegra and enables it on Seaboard. Included here is a proposed device tree binding with most of the properties private to "nvidia,". The binding includes information about the NAND controller as well as the connected NAND device. The Seaboard has a Hynix HY27UF4G2B. The driver supports ECC-based access and uses DMA and NAND acceleration features of the Tegra SOC to provide access at reasonable speed. Changes in v2: - Add new patch to align default buffers in nand_base - Added comment about the behaviour of the 'resp' register - Call set_bus_width_page_size() at init to report errors earlier - Change set_bus_width_page_size() to return an error when needed - Change timing structure member to u32 to match device tree - Check for supported bus width in board_nand_init() - Fix tegra nand header file to remove BIT defines - Implement a dummy nand_select_chip() instead of nand_hwcontro() - Make nand_command() display an error on an unknown command - Minor code tidy-ups in driver for style - Move cache logic into a separate dma_prepare() function - Remove CMD_TRANS_SIZE_BYTESx enum - Remove space after casts - Remove use of 'register' variables - Rename struct nand_info to struct nand_drv to avoid nand_info_t confusion - Support 4096 byte page devices, drop 1024 and 2048 - Tidy up nand_waitfor_cmd_completion() logic - Update NAND binding to add "nvidia," prefix - Use s32 for device tree integer values Changes in v3: - Add reg property for unit address (should be used for chip select) - Change note in fdt binding about the need for a hardware-specific binding - Fix up typos in fdt binding, and rename the file - Update fdt binding to make everything Nvidia-specific Changes in v4: - Align buffer length to cache line size in dma_prepare() - Fix "Write Page 0x0 timeout with ECC" error on 4.4.1 - Fix the issue that read_byte can read at most 4 times - Get some information from Read ID data instead of from device tree - In nand_command, set NAND_CMD_RNDOUT as unsupported command - Modify eccoob layout - Move to using CONFIG_SYS_NAND_SELF_INIT - Remove "DEFAULT" from comment because that function is not default - Remove fdt bindings related to page structure - Remove local read_buf and write_buf functions - Remove some fields in fdt_nand structure - Rename CONFIG_TEGRA2_NAND to CONFIG_TEGRA_NAND - Rename variables my_* as our_* - Use virt_to_phys() when filling address register Jim Lin (1): tegra: nand: Add Tegra NAND driver Simon Glass (5): nand: Try to align the default buffers tegra: Add NAND support to funcmux tegra: fdt: Add NAND controller binding and definitions tegra: fdt: Add NAND definitions to fdt tegra: Enable NAND on Seaboard arch/arm/cpu/tegra20-common/funcmux.c | 7 + arch/arm/dts/tegra20.dtsi | 7 + arch/arm/include/asm/arch-tegra20/funcmux.h | 3 + arch/arm/include/asm/arch-tegra20/tegra20.h | 1 + board/nvidia/dts/tegra20-seaboard.dts | 10 + .../nand/nvidia,tegra20-nand.txt | 53 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/nand_base.c | 3 +- drivers/mtd/nand/tegra_nand.c | 1026 ++++++++++++++++++++ drivers/mtd/nand/tegra_nand.h | 257 +++++ include/configs/seaboard.h | 9 + include/configs/tegra20-common.h | 2 + include/fdtdec.h | 1 + include/linux/mtd/nand.h | 7 +- lib/fdtdec.c | 1 + 15 files changed, 1384 insertions(+), 4 deletions(-) create mode 100644 doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt create mode 100644 drivers/mtd/nand/tegra_nand.c create mode 100644 drivers/mtd/nand/tegra_nand.h -- 1.7.7.3

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[U-Boot] PCIe on the i.MX6?
by Carolyn Smith 01 Nov '12

01 Nov '12

Hello, Does anyone have any experience with PCIe on an i.MX6 processor (in particular the i.MX6 Solo)? I can access the config space of my PCIe device but can't seem to get its BARs mapped in properly. I thought I had the viewports set up but when I try to access the space, I just get a processor lockup. Any suggestions would be greatly appreciated. Thanks, Carolyn

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[U-Boot] [PATCH 1/2] powerpc/85xx: update the work-around for P4080 erratum SERDES-9
by Timur Tabi 01 Nov '12

01 Nov '12

The documented work-around for P4080 erratum SERDES-9 has been updated. It is now compatible with the work-around for erratum A-4580. This requires adding a few bitfield macros for the BnTTLCRy0 register. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 20 +++++++++++++------- arch/powerpc/include/asm/immap_85xx.h | 3 +++ 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index e6b1b1b..fcd3bff 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -714,9 +714,13 @@ void fsl_serdes_init(void) #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 /* - * Set BnTTLCRy0[FLT_SEL] = 000011 and set BnTTLCRy0[17] = 1 for - * each of the SerDes lanes selected as SGMII, XAUI, SRIO, or - * AURORA before the device is initialized. + * Set BnTTLCRy0[FLT_SEL] = 011011 and set BnTTLCRy0[31] = 1 + * for each of the SerDes lanes selected as SGMII, XAUI, SRIO, + * or AURORA before the device is initialized. + * + * Note that this part of the SERDES-9 work-around is + * redundant if the work-around for A-4580 has already been + * applied via PBI. */ switch (lane_prtcl) { case SGMII_FM1_DTSEC1: @@ -733,10 +737,12 @@ void fsl_serdes_init(void) case SRIO1: case SRIO2: case AURORA: - clrsetbits_be32(&srds_regs->lane[idx].ttlcr0, - SRDS_TTLCR0_FLT_SEL_MASK, - SRDS_TTLCR0_FLT_SEL_750PPM | - SRDS_TTLCR0_PM_DIS); + out_be32(&srds_regs->lane[idx].ttlcr0, + SRDS_TTLCR0_FLT_SEL_KFR_26 | + SRDS_TTLCR0_FLT_SEL_KPH_28 | + SRDS_TTLCR0_FLT_SEL_750PPM | + SRDS_TTLCR0_FREQOVD_EN); + break; default: break; } diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 969f726..128a4ae 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2637,8 +2637,11 @@ typedef struct serdes_corenet { u32 res3; u32 ttlcr0; /* Transition Tracking Loop Ctrl 0 */ #define SRDS_TTLCR0_FLT_SEL_MASK 0x3f000000 +#define SRDS_TTLCR0_FLT_SEL_KFR_26 0x10000000 +#define SRDS_TTLCR0_FLT_SEL_KPH_28 0x08000000 #define SRDS_TTLCR0_FLT_SEL_750PPM 0x03000000 #define SRDS_TTLCR0_PM_DIS 0x00004000 +#define SRDS_TTLCR0_FREQOVD_EN 0x00000001 u32 res4[7]; } lane[24]; u32 res6[384]; -- 1.7.3.4

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