November 2012 - U-Boot

[U-Boot] [PATCH 3/3] cm4008: use common cfi_flash support
by Yann Vernier 01 Dec '12

01 Dec '12

This change allows use of other flash chips than the two supported by the cm4008 flash.c. Tested with Micrel KSZ8695X demo board. Signed-off-by: Yann Vernier <yann.vernier(a)orsoc.se> --- board/cm4008/Makefile | 2 +- include/configs/cm4008.h | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/board/cm4008/Makefile b/board/cm4008/Makefile index 5b98824..22fd74e 100644 --- a/board/cm4008/Makefile +++ b/board/cm4008/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS := cm4008.o flash.o +COBJS := cm4008.o # flash.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index 7c2e113..6d1a1ae 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -125,6 +125,10 @@ #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT + /*----------------------------------------------------------------------- * FLASH and environment organization */ -- 1.7.10

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[U-Boot] [PATCHv3 1/4] usb documentation: fix typo
by richard.genoud＠gmail.com 01 Dec '12

01 Dec '12

From: Richard Genoud <richard.genoud(a)gmail.com> Signed-off-by: Richard Genoud <richard.genoud(a)gmail.com> --- doc/README.usb | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/doc/README.usb b/doc/README.usb index ef1d6ba..b4c3ef5 100644 --- a/doc/README.usb +++ b/doc/README.usb @@ -63,7 +63,7 @@ Common USB Commands: Storage USB Commands: - usb scan: scans the USB for storage devices.The USB must be running for this command (usb start) -- usb device [dev]: show or set current USB staorage device +- usb device [dev]: show or set current USB storage device - usb part [dev]: print partition table of one or all USB storage devices - usb read addr blk# cnt: -- 1.7.2.5

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[U-Boot] [PATCH] mxs: i2c: Implement algorithm to set up arbitrary i2c speed
by Marek Vasut 01 Dec '12

01 Dec '12

This algorithm computes the values of TIMING{0,1,2} registers for the MX28 I2C block. This algorithm was derived by using a scope, but the result seems correct. The resulting values programmed into the registers do not correlate with the contents of the datasheet. When using the values from the datasheet, the I2C clock were completely wrong. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> --- drivers/i2c/mxs_i2c.c | 73 ++++++++++++++----------------------------------- 1 file changed, 21 insertions(+), 52 deletions(-) NOTE: Heiko, please apply it onto your u-boot-i2c tree, it's dependent on the patches that are already there. diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c index 006fb91..7b3eec5 100644 --- a/drivers/i2c/mxs_i2c.c +++ b/drivers/i2c/mxs_i2c.c @@ -28,6 +28,7 @@ #include <common.h> #include <malloc.h> +#include <i2c.h> #include <asm/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> @@ -40,6 +41,7 @@ void mxs_i2c_reset(void) { struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; int ret; + int speed = i2c_get_bus_speed(); ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg); if (ret) { @@ -53,6 +55,8 @@ void mxs_i2c_reset(void) &i2c_regs->hw_i2c_ctrl1_clr); writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set); + + i2c_set_bus_speed(speed); } void mxs_i2c_setup_read(uint8_t chip, int len) @@ -210,62 +214,28 @@ int i2c_probe(uchar chip) return ret; } -static struct mxs_i2c_speed_table { - uint32_t speed; - uint32_t timing0; - uint32_t timing1; -} mxs_i2c_tbl[] = { - { - 100000, - (0x0078 << I2C_TIMING0_HIGH_COUNT_OFFSET) | - (0x0030 << I2C_TIMING0_RCV_COUNT_OFFSET), - (0x0080 << I2C_TIMING1_LOW_COUNT_OFFSET) | - (0x0030 << I2C_TIMING1_XMIT_COUNT_OFFSET) - }, - { - 400000, - (0x000f << I2C_TIMING0_HIGH_COUNT_OFFSET) | - (0x0007 << I2C_TIMING0_RCV_COUNT_OFFSET), - (0x001f << I2C_TIMING1_LOW_COUNT_OFFSET) | - (0x000f << I2C_TIMING1_XMIT_COUNT_OFFSET), - } -}; - -static struct mxs_i2c_speed_table *mxs_i2c_speed_to_cfg(uint32_t speed) -{ - int i; - for (i = 0; i < ARRAY_SIZE(mxs_i2c_tbl); i++) - if (mxs_i2c_tbl[i].speed == speed) - return &mxs_i2c_tbl[i]; - return NULL; -} - -static uint32_t mxs_i2c_cfg_to_speed(uint32_t timing0, uint32_t timing1) -{ - int i; - for (i = 0; i < ARRAY_SIZE(mxs_i2c_tbl); i++) { - if (mxs_i2c_tbl[i].timing0 != timing0) - continue; - if (mxs_i2c_tbl[i].timing1 != timing1) - continue; - return mxs_i2c_tbl[i].speed; - } - - return 0; -} - int i2c_set_bus_speed(unsigned int speed) { struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; - struct mxs_i2c_speed_table *spd = mxs_i2c_speed_to_cfg(speed); - if (!spd) { - printf("MXS I2C: Invalid speed selected (%d Hz)\n", speed); + uint32_t base = ((24000000 / speed) - 38) / 2; + uint16_t high_count = base + 3; + uint16_t low_count = base - 3; + uint16_t rcv_count = (high_count * 3) / 4; + uint16_t xmit_count = low_count / 4; + + if (speed > 540000) { + printf("MXS I2C: Speed too high (%d Hz)\n", speed); + return -EINVAL; + } + + if (speed < 12000) { + printf("MXS I2C: Speed too low (%d Hz)\n", speed); return -EINVAL; } - writel(spd->timing0, &i2c_regs->hw_i2c_timing0); - writel(spd->timing1, &i2c_regs->hw_i2c_timing1); + writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0); + writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1); writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) | (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET), @@ -277,12 +247,11 @@ int i2c_set_bus_speed(unsigned int speed) unsigned int i2c_get_bus_speed(void) { struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; - uint32_t timing0, timing1; + uint32_t timing0; timing0 = readl(&i2c_regs->hw_i2c_timing0); - timing1 = readl(&i2c_regs->hw_i2c_timing1); - return mxs_i2c_cfg_to_speed(timing0, timing1); + return 24000000 / ((((timing0 >> 16) - 3) * 2) + 38); } void i2c_init(int speed, int slaveadd) -- 1.7.10.4

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[U-Boot] [PATCH v3 03/12] x86: video: Add coreboot framebuffer support
by Simon Glass 30 Nov '12

30 Nov '12

From: Stefan Reinauer <reinauer(a)chromium.org> Add a basic driver for the coreboot framebuffer. Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v3: - Update to avoid using gd which is now a #define Changes in v2: None drivers/video/Makefile | 1 + drivers/video/coreboot_fb.c | 101 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+), 0 deletions(-) create mode 100644 drivers/video/coreboot_fb.c diff --git a/drivers/video/Makefile b/drivers/video/Makefile index ebb6da8..cc3022a 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -39,6 +39,7 @@ COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o COBJS-$(CONFIG_S6E63D6) += s6e63d6.o COBJS-$(CONFIG_SED156X) += sed156x.o COBJS-$(CONFIG_VIDEO_AMBA) += amba.o +COBJS-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o diff --git a/drivers/video/coreboot_fb.c b/drivers/video/coreboot_fb.c new file mode 100644 index 0000000..d93bd89 --- /dev/null +++ b/drivers/video/coreboot_fb.c @@ -0,0 +1,101 @@ +/* + * coreboot Framebuffer driver. + * + * Copyright (C) 2011 The Chromium OS authors + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/tables.h> +#include <asm/arch/sysinfo.h> +#include <video_fb.h> +#include "videomodes.h" + +/* + * The Graphic Device + */ +GraphicDevice ctfb; + +static int parse_coreboot_table_fb(GraphicDevice *gdev) +{ + struct cb_framebuffer *fb = lib_sysinfo.framebuffer; + + /* If there is no framebuffer structure, bail out and keep + * running on the serial console. + */ + if (!fb) + return 0; + + gdev->winSizeX = fb->x_resolution; + gdev->winSizeY = fb->y_resolution; + + gdev->plnSizeX = fb->x_resolution; + gdev->plnSizeY = fb->y_resolution; + + gdev->gdfBytesPP = fb->bits_per_pixel / 8; + + switch (fb->bits_per_pixel) { + case 24: + gdev->gdfIndex = GDF_32BIT_X888RGB; + break; + case 16: + gdev->gdfIndex = GDF_16BIT_565RGB; + break; + default: + gdev->gdfIndex = GDF__8BIT_INDEX; + break; + } + + gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS; + gdev->pciBase = (unsigned int)fb->physical_address; + + gdev->frameAdrs = (unsigned int)fb->physical_address; + gdev->memSize = fb->bytes_per_line * fb->y_resolution; + + gdev->vprBase = (unsigned int)fb->physical_address; + gdev->cprBase = (unsigned int)fb->physical_address; + + return 1; +} + +void *video_hw_init(void) +{ + GraphicDevice *gdev = &ctfb; + int bits_per_pixel; + + printf("Video: "); + + if (!parse_coreboot_table_fb(gdev)) { + printf("No video mode configured in coreboot!\n"); + return NULL; + } + + bits_per_pixel = gdev->gdfBytesPP * 8; + + /* fill in Graphic device struct */ + sprintf(gdev->modeIdent, "%dx%dx%d", gdev->winSizeX, gdev->winSizeY, + bits_per_pixel); + printf("%s\n", gdev->modeIdent); + + memset((void *)gdev->pciBase, 0, + gdev->winSizeX * gdev->winSizeY * gdev->gdfBytesPP); + + return (void *)gdev; +} -- 1.7.7.3

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[U-Boot] [PATCHv3 0/4] enable USB on sam9x5ek boards
by richard.genoud＠gmail.com 30 Nov '12

30 Nov '12

From: Richard Genoud <richard.genoud(a)gmail.com> This small patchset is based on current master ( 178d0cc1a4c73c3341afbeb2a93b172de8c96bd1 ) It enables usb on at91sam9x5ek boards. Tested on at91sam9x5ek with a sam9g35 CPU (+ usb key and mouse) By default the 3 USB 1.1 ports (A, B and C) are enabled. If CONFIG_USB_EHCI is defined, the 2 USB 2.0 ports (A and B) will be enabled. changes from v2: * VBUS on port C is now only enabled when OHCI is selected * ATMEL_BASE_OHCI is used instead of hard coded value * uneeded undef CONFIG_USB_EHCI is removed changes from v1: * VBUS for usb port A is enabled * EHCI configuration is now present * number of OHCI ports corrected (3 instead of 2) Richard Genoud (4): usb documentation: fix typo at91sam9x5: enable USB support for 9x5ek board. at91sam9x5ek: regroup FAT/DOS features at91sam9x5ek: add USB configuration arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 13 ++++++++++ arch/arm/include/asm/arch-at91/at91sam9x5.h | 2 + board/atmel/at91sam9x5ek/at91sam9x5ek.c | 3 ++ doc/README.usb | 2 +- drivers/usb/host/ohci-at91.c | 6 +++- include/configs/at91sam9x5ek.h | 29 +++++++++++++++++++++- 6 files changed, 51 insertions(+), 4 deletions(-) -- 1.7.2.5

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[U-Boot] [PATCHv2 0/4]enable USB OHCI on sam9x5ek boards
by Richard Genoud 30 Nov '12

30 Nov '12

This small patchset is based on current master ( 178d0cc1a4c73c3341afbeb2a93b172de8c96bd1 ) It enables usb on at91sam9x5ek boards. Tested on at91sam9x5ek with a sam9g35 CPU (+ usb key and mouse) By default the 3 USB 1.1 ports (A, B and C) are enabled. If CONFIG_USB_EHCI is defined, the 2 USB 2.0 ports (A and B) will be enabled. changes from v1: * VBUS for usb port A is enabled * EHCI configuration is now present * number of OHCI ports corrected (3 instead of 2) Richard Genoud (4): usb documentation: fix typo ARM: at91sam9x5: enable USB OHCI support for 9x5ek board. at91sam9x5ek: regroup FAT/DOS features at91sam9x5ek: add USB OHCI configuration arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 9 +++++++++ arch/arm/include/asm/arch-at91/at91sam9x5.h | 2 ++ board/atmel/at91sam9x5ek/at91sam9x5ek.c | 3 +++ doc/README.usb | 2 +- drivers/usb/host/ohci-at91.c | 6 ++++-- include/configs/at91sam9x5ek.h | 18 +++++++++++++++++- 6 files changed, 36 insertions(+), 4 deletions(-) -- 1.7.2.5

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[U-Boot] [PATCH 0/6 V3] XYNOS5: FDT support for Sound
by Rajeshwari Shinde 30 Nov '12

30 Nov '12

This patch adds FDT support for Sound driver. This patch is based on following patchset. "EXYNOS5: FDT Support for I2C" "fdt: Export fdtdec_lookup() and fix the name" Changes in V2: - Add documentation for sound node. - Decoding codec FDT values moved to codec. - fd_dec_lookup function added to header file. - Single sound init funtion to handle both fdt and non fdt support. - Removed SPI compatible string. Chnages in V3: - Removed patch "FDT: Declare API in header file" as it is already submitted by Simon Glass. - Removed #ifdef CONFIG_OF_CONTROL where ever not required. Rajeshwari Shinde (6): EXYNOS5: FDT: Add sound device node data EXYNOS5: FDT: Add sound and codec device node EXYNOS5: FDT: Add compatible strings for sound Sound: Add FDT support to driver Sound: WM8994: Add FDT support to codec Sound: Add FDT support to CMD. arch/arm/dts/exynos5250.dtsi | 5 + board/samsung/dts/exynos5250-smdk5250.dts | 17 +++ common/cmd_sound.c | 2 +- doc/device-tree-bindings/exynos/sound.txt | 27 +++++ drivers/sound/sound.c | 173 +++++++++++++++++------------ drivers/sound/wm8994.c | 76 ++++++++++++- drivers/sound/wm8994.h | 6 +- include/fdtdec.h | 2 + include/sound.h | 4 +- lib/fdtdec.c | 2 + 10 files changed, 235 insertions(+), 79 deletions(-) create mode 100644 doc/device-tree-bindings/exynos/sound.txt -- 1.7.4.4

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[U-Boot] [PATCH 0/6 V4] EXYNOS5: FDT Support for I2C
by Rajeshwari Shinde 30 Nov '12

30 Nov '12

This patch set adds FDT support for I2C driver and API's to acess the bus number using the fdt node and also reset the port. Changes in V2: - Baord i2c init moved to I2C driver in case of FDT. - Added Periph id to device node. - Modified i2c_get_bus_num_fdt api to compare using node. Changes in V3: - Peripheral id removed from dtsi file and decoded based on interrupts. - API for fdtdec_lookup removed as it is already present as fd_dec_lookup. Changes in V4: - renamed decode_peripheral_id to pinmux_decode_peripheral_id. - added comments in periph.h as suggested by Simon Glass. Rajeshwari Shinde (6): EXYNOS5: FDT: Add I2C device node data EXYNOS5 : FDT: Add Aliases for I2C device EXYNOS5: FDT: Add compatible string for I2C EXYNOS5: FDT : Decode peripheral id I2C: Driver changes for FDT support SMDK5250: Initialise I2C using FDT arch/arm/cpu/armv7/exynos/pinmux.c | 28 ++++++++++ arch/arm/dts/exynos5250.dtsi | 64 ++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/periph.h | 31 ++++++----- arch/arm/include/asm/arch-exynos/pinmux.h | 8 +++ board/samsung/dts/exynos5250-smdk5250.dts | 11 ++++ board/samsung/smdk5250/smdk5250.c | 20 +------- drivers/i2c/s3c24x0_i2c.c | 83 ++++++++++++++++++++++++++++- drivers/i2c/s3c24x0_i2c.h | 8 +++ include/fdtdec.h | 1 + include/i2c.h | 26 +++++++++ lib/fdtdec.c | 1 + 11 files changed, 248 insertions(+), 33 deletions(-) -- 1.7.4.4

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[U-Boot] [PATCH] EXYNOS: Add L2 Cache Support.
by Rajeshwari Shinde 30 Nov '12

30 Nov '12

This patch set adds L2 Cache Support to EXYNOS. Signed-off-by: Arun Mankuzhi <arun.m(a)samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> --- arch/arm/cpu/armv7/exynos/soc.c | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c index ab65b8d..a45bbfb 100644 --- a/arch/arm/cpu/armv7/exynos/soc.c +++ b/arch/arm/cpu/armv7/exynos/soc.c @@ -23,6 +23,14 @@ #include <common.h> #include <asm/io.h> +#include <asm/system.h> + +enum l2_cache_params { + CACHE_TAG_RAM_SETUP = (1<<9), + CACHE_DATA_RAM_SETUP = (1<<5), + CACHE_TAG_RAM_LATENCY = (2<<6), + CACHE_DATA_RAM_LATENCY = (2<<0) +}; void reset_cpu(ulong addr) { @@ -36,3 +44,31 @@ void enable_caches(void) dcache_enable(); } #endif + +#ifndef CONFIG_SYS_L2CACHE_OFF +/* + * Set L2 cache parameters + */ +static void exynos5_set_l2cache_params(void) +{ + unsigned int val = 0; + + asm volatile("mrc p15, 1, %0, c9, c0, 2\n" : "=r"(val)); + + val |= CACHE_TAG_RAM_SETUP | + CACHE_DATA_RAM_SETUP | + CACHE_TAG_RAM_LATENCY | + CACHE_DATA_RAM_LATENCY; + + asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val)); +} + +/* + * Sets L2 cache related parameters before enabling data cache + */ +void v7_outer_cache_enable(void) +{ + exynos5_set_l2cache_params(); +} +#endif + -- 1.7.4.4

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[U-Boot] [PATCH v2 01/12] x86: Allow compiling out realmode/bios code
by Simon Glass 30 Nov '12

30 Nov '12

From: Gabe Black <gabeblack(a)chromium.org> We don't want this for coreboot, so provide a way of compiling it out. Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Rename real mode option to CONFIG_X86_NO_REAL_MODE README | 6 ++++++ arch/x86/lib/Makefile | 9 ++++++--- arch/x86/lib/video.c | 2 ++ 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/README b/README index b9a3685..ed7d270 100644 --- a/README +++ b/README @@ -3668,6 +3668,12 @@ Low Level (hardware related) configuration options: If defined, the x86 reset vector code is excluded. You will need to do this when U-Boot is running from Coreboot. +- CONFIG_X86_NO_REAL_MODE + If defined, x86 real mode code is omitted. This assumes a + 32-bit environment where such code is not needed. You will + need to do this when U-Boot is running from Coreboot. + + Freescale QE/FMAN Firmware Support: ----------------------------------- diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 51836da..4325b25 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -25,11 +25,16 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).o +ifeq ($(CONFIG_X86_NO_REAL_MODE),) SOBJS-$(CONFIG_SYS_PC_BIOS) += bios.o SOBJS-$(CONFIG_SYS_PCI_BIOS) += bios_pci.o -SOBJS-$(CONFIG_SYS_X86_REALMODE) += realmode_switch.o +COBJS-y += realmode.o +SOBJS-y += realmode_switch.o COBJS-$(CONFIG_SYS_PC_BIOS) += bios_setup.o +COBJS-$(CONFIG_VIDEO) += video_bios.o +endif + COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cmd_boot.o @@ -41,11 +46,9 @@ COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o COBJS-$(CONFIG_PCI) += pci.o COBJS-$(CONFIG_PCI) += pci_type1.o -COBJS-$(CONFIG_SYS_X86_REALMODE) += realmode.o COBJS-y += relocate.o COBJS-y += string.o COBJS-$(CONFIG_SYS_X86_ISR_TIMER) += timer.o -COBJS-$(CONFIG_VIDEO) += video_bios.o COBJS-$(CONFIG_VIDEO) += video.o COBJS-$(CONFIG_CMD_ZBOOT) += zimage.o diff --git a/arch/x86/lib/video.c b/arch/x86/lib/video.c index 3d6b24d..20e2416 100644 --- a/arch/x86/lib/video.c +++ b/arch/x86/lib/video.c @@ -222,8 +222,10 @@ int video_init(void) int drv_video_init(void) { +#ifndef CONFIG_X86_NO_REAL_MODE if (video_bios_init()) return 1; +#endif return video_init(); } -- 1.7.7.3

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