June 2011 - U-Boot

[U-Boot] Loan Application.
by Loan Team 28 Jun '11

28 Jun '11

We loan at 0.2%, Any interested person,irrespective of your country should contact us now Via email for more information. Contact Email: loansolutionteam11(a)eb2a.com Regards, E-Loan Solution Team.

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[U-Boot] [PATCH v2 00/10] armv7: cache maintenance operations
by Aneesh V 28 Jun '11

28 Jun '11

With D-cache and MMU enabled for ARM in u-boot it becomes imperative to support a minimal set of cache maintenance operations and necessary initializations before enabling MMU. This series of patches attempt to do the following for armv7: * Necessary initialization sequence before enabling MMU that includes invalidation of TLB, data caches, branch predictor array etc. * Framework for supporting SOC specific outer caches in a generic manner (using a structure of function pointers - inspired by the Linux implementation) * Generic armv7 cache maintenance operations for caches known to the CPU * Support for ARM PL310 L2 cache controller used in OMAP4 * Cleanup of the cleanup_before_linux() function * Adapting all armv7 SOCs to use the new framework and removing duplicated code Testing: * Extensive testing on OMAP4430SDP and OMAP3430SDP by creating coherency issues and solving them using the maintenance routines - Eg: memfill a region of memory with a known pattern - Invalidate the region - Read back and compare the region with the original pattern - If match fails it means that invalidate is successful - Now add a flush call just before the invalidate - If match succeeds it means that flush was successful - Outer caches were tested with experiments involving making the function pointers NULL * Kernel booting on OMAP4430SDP and OMAP3430SDP Note: v2 has been tested only on OMAP4430SDP v2: * Pointer based callback mechanism for outer cache operations changed to a weakly linked functions. * Change -march=armv7-a back to armv5 * Moved utility macros out of armv7.h * Added documentation for new CONFIG options. * Changed implementation of log2n to not use CLZ instruction as armv4 doesn't support this instruction and newly added Tegra2 uses -march=armv4 * Blank line after local variable declarations - fixed globally * Explicitly added an empty flush_cache() under #ifdef CONFIG_SYS_NO_DCACHE * Removed the print inside the weakly linked stub function - __arm_init_before_mmu * Fixed signature of flush_cache in cache.c * More descriptive commit message for the PL310 support patch * C struct for PL310 register accesses * Fixed white space issues Aneesh V (10): arm: make default implementation of cache_flush() weakly linked armv7: add miscellaneous utility macros armv7: cache maintenance operations for armv7 armv7: replace CONFIG_L2_OFF with CONFIG_SYS_NO_L2CACHE armv7: integrate cache maintenance support arm: minor fixes for cache and mmu handling armv7: add PL310 support to u-boot armv7: adapt omap4 to the new cache maintenance framework armv7: adapt omap3 to the new cache maintenance framework armv7: adapt s5pc1xx to the new cache maintenance framework README | 11 + arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/cache_v7.c | 390 +++++++++++++++++++++++++ arch/arm/cpu/armv7/cpu.c | 51 ++-- arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/cpu/armv7/omap3/board.c | 138 ++++++++-- arch/arm/cpu/armv7/omap3/cache.S | 263 ----------------- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 32 ++ arch/arm/cpu/armv7/omap4/lowlevel_init.S | 18 ++ arch/arm/cpu/armv7/s5pc1xx/cache.S | 88 +----- arch/arm/cpu/armv7/start.S | 18 +- arch/arm/include/asm/arch-omap3/omap3.h | 20 ++ arch/arm/include/asm/arch-omap3/sys_proto.h | 10 +- arch/arm/include/asm/arch-omap4/sys_proto.h | 1 - arch/arm/include/asm/arch-s5pc1xx/sys_proto.h | 3 - arch/arm/include/asm/armv7.h | 68 +++++ arch/arm/include/asm/pl310.h | 74 +++++ arch/arm/include/asm/utils.h | 80 +++++ arch/arm/lib/Makefile | 1 + arch/arm/lib/board.c | 6 + arch/arm/lib/cache-cp15.c | 16 +- arch/arm/lib/cache-pl310.c | 116 ++++++++ arch/arm/lib/cache.c | 20 +- include/common.h | 5 +- include/configs/ca9x4_ct_vxp.h | 2 +- include/configs/efikamx.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/omap4_panda.h | 8 +- include/configs/omap4_sdp4430.h | 8 +- include/configs/s5pc210_universal.h | 2 +- include/configs/tegra2-common.h | 2 +- include/configs/vision2.h | 2 +- 33 files changed, 1037 insertions(+), 425 deletions(-) create mode 100644 arch/arm/cpu/armv7/cache_v7.c delete mode 100644 arch/arm/cpu/armv7/omap3/cache.S create mode 100644 arch/arm/include/asm/armv7.h create mode 100644 arch/arm/include/asm/pl310.h create mode 100644 arch/arm/include/asm/utils.h create mode 100644 arch/arm/lib/cache-pl310.c

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[U-Boot] [PATCHv2] omap3evm: Update ethernet reset sequence for Rev.G board
by Sanjeev Premi 27 Jun '11

27 Jun '11

From: Sriramakrishnan <srk(a)ti.com> The GPIO pin used for resetting the external LAN chip has changed for Rev.G board. The patch uses generic gpio API instead of direct access to corresponding registers. Signed-off-by: Sriramakrishnan <srk(a)ti.com> Signed-off-by: Sanjeev Premi <premi(a)ti.com> --- Changes since v1: * Use of gpio API instead of direct register access. Tested basic ethernet operations - dhcp and tftpboot - on the OMAP3EVM Rev G to load kernel and ramdisk images. board/ti/evm/evm.c | 35 ++++++++++++++++++++++++++--------- 1 files changed, 26 insertions(+), 9 deletions(-) diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 8f9f141..2c95fae 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -33,10 +33,14 @@ #include <asm/arch/mem.h> #include <asm/arch/mux.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> #include <i2c.h> #include <asm/mach-types.h> #include "evm.h" +#define OMAP3EVM_GPIO_ETH_RST_GEN1 64 +#define OMAP3EVM_GPIO_ETH_RST_GEN2 7 + DECLARE_GLOBAL_DATA_PTR; static u32 omap3_evm_version; @@ -181,17 +185,30 @@ static void setup_net_chip(void) */ static void reset_net_chip(void) { - struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE; - - /* Make GPIO 64 as output pin */ - writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe); - - /* Now send a pulse on the GPIO pin */ - writel(GPIO0, &gpio3_base->setdataout); + int ret; + int rst_gpio; + + if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) { + rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1; + } else { + rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2; + } + + ret = omap_request_gpio(rst_gpio); + if (ret < 0) { + printf("Unable to get GPIO %d\n", rst_gpio); + return ; + } + + /* Configure as output */ + omap_set_gpio_direction(rst_gpio, 0); + + /* Send a pulse on the GPIO pin */ + omap_set_gpio_dataout(rst_gpio, 1); udelay(1); - writel(GPIO0, &gpio3_base->cleardataout); + omap_set_gpio_dataout(rst_gpio, 0); udelay(1); - writel(GPIO0, &gpio3_base->setdataout); + omap_set_gpio_dataout(rst_gpio, 1); } int board_eth_init(bd_t *bis) -- 1.7.2.2

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[U-Boot] Email;uk.claims.department2011@live.com
by Majumdar, Saurindranath 27 Jun '11

27 Jun '11

You have been selected for a cash prize of £800,000.Contact with the below information for claim./Name/Tell/Occupation/Address/Age/via Email;uk.claims.department2011(a)live.com

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[U-Boot] promo
by PROMO 27 Jun '11

27 Jun '11

Your Email Id has won 1,000,000.00 GBP in the British MICROSOFT Promo 2011. send your Names. Address. Sex. Age. Tel. Occupation. to our claims department: carl_robmsn(a)hotmail.com Thank you for your full corporation.

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[U-Boot] Hello
by magret williams 26 Jun '11

26 Jun '11

HELLO My name is Miss Magret i interested in you,i will also like to know you the more,and i want you to send an email to my email address so i can give you my picture for you to know whom i am Here is my email address (williamsmagret56(a)rediffmail.com) i believe we can move from here!I am waiting for your mail to my email address above. (Remember the distance or colour an age does not matter but love matters a lot in life (williamsmagret56(a)rediffmail.com)

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[U-Boot] CONFIG_SYS_SDRAM_BASE error
by Benoit PRIGENT 26 Jun '11

26 Jun '11

Hi, I try compiling u-boot for Iomega iConnect using these files: http://patchwork.openwrt.org/patch/299/ But I got this error: board.c: In function â__dram_init_banksizeâ: board.c:233: error: âCONFIG_SYS_SDRAM_BASEâ undeclared (first use in this function) board.c:233: error: (Each undeclared identifier is reported only once board.c:233: error: for each function it appears in.) board.c: In function âboard_init_fâ: board.c:279: error: âCONFIG_SYS_INIT_SP_ADDRâ undeclared (first use in this function) board.c:312: error: âCONFIG_SYS_SDRAM_BASEâ undeclared (first use in this function) make[1]: *** [board.o] Error 1 I found this thread, it seems to be a solution, but I don't know how to do: http://www.mail-archive.com/u-boot@lists.denx.de/msg36109.html Please could you help me? Regards, Ben ____________________________________________________ Suivez l'actualité de l'émission X Factor : les photos des primes et les news sont sur Voila http://people.voila.fr/evenementiel/X-factor/

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[U-Boot] [PATCH 0/2] unify hw level clock for at91 cores
by Andreas Bießmann 26 Jun '11

26 Jun '11

This patchset makes the arm926ejs/at91/clock.c features available to arm920t/at91 devices. This is a first step to replace at91rm9200_usart by atmel_usart driver. This change was already discussed in mid.gmane.org/BANLkTimn29vmAYGb5csMdCYS-xx6zD_6Zw@mail.gmail.com The patchset is on top of current atmel/master. It would be nice if we can get this change into 2011.06. The changes for at91rm9200 removal are ongoing (atmel_usart is required!) but will most probable not be finished for 2011.06 release. Therefore it is not a must to get these changes in now. Andreas Bießmann (2): at91: move a/a/c/arm926ejs/at91/clock.c -> a/a/lib/at91 arm920t/at91: use new clock features from libat91-common Makefile | 3 + arch/arm/cpu/arm920t/at91/Makefile | 1 + arch/arm/cpu/arm926ejs/at91/Makefile | 1 - arch/arm/cpu/arm926ejs/at91/clock.c | 215 --------------------------- arch/arm/include/asm/arch-at91/at91rm9200.h | 1 + arch/arm/lib/at91/Makefile | 45 ++++++ arch/arm/lib/at91/clock.c | 215 +++++++++++++++++++++++++++ include/configs/at91rm9200ek.h | 3 + include/configs/cpuat91.h | 5 +- include/configs/eb_cpux9k2.h | 4 +- 10 files changed, 273 insertions(+), 220 deletions(-) delete mode 100644 arch/arm/cpu/arm926ejs/at91/clock.c create mode 100644 arch/arm/lib/at91/Makefile create mode 100644 arch/arm/lib/at91/clock.c -- 1.7.5.4

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[U-Boot] [PATCH V5 0/2] GPIO: Tegra2: add GPIO driver for Tegra2
by Tom Warren 26 Jun '11

26 Jun '11

This patchset adds a GPIO driver for Tegra2 SoC, and enables it for all boards Changes in V2: - use 'gpio_pin' enum in gpio.h (Simon Glass review request) - change 'GPIO_PORT8' to 'GPIO_FULLPORT' (Simon Glass request) - change 'offset' to 'pin' globally - enable GPIO for all boards (tegra2-common.h) Changes in V3: - use common cmd_gpio; remove redundant cmd processing code - add gpio_request, gpio_free and gpio_toggle - alias 'gpio_status' to 'gpio_info' for use in cmd_gpio Changes in V4: - update code as per Mike Frysinger's review comments - rewrite gpio_info, aka gpio_status Changes in V5: - NUL-terminate the name string in gpio_request Tom Warren (2): GPIO: Tegra2: add GPIO driver for Tegra2 arm: Tegra2: GPIO: enable GPIO for Tegra2 boards arch/arm/include/asm/arch-tegra2/gpio.h | 250 +++++++++++++++++++++++++++++-- arch/arm/include/asm/gpio.h | 38 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/tegra2_gpio.c | 255 +++++++++++++++++++++++++++++++ include/configs/tegra2-common.h | 2 + 5 files changed, 536 insertions(+), 10 deletions(-) create mode 100644 arch/arm/include/asm/gpio.h create mode 100644 drivers/gpio/tegra2_gpio.c -- 1.7.5.4

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[U-Boot] (no subject)
by Mr. Allan Davis 26 Jun '11

26 Jun '11

My working partner in relationship with HSBC London has concluded that our working partner has helped us to send you first payment of US$5,000 to you as instructed by Malaysia government and will keep sending you $5000 twice a week until the payment of (US$820,000 ) is completed within Eight months and here is the information MONEY TRANSFER REFERENCE:2116-3297 SENDER'S NAME: Mike Marx AMOUNT: US$5000 To track your funds forward money gram Transfer agent Mr Allan Davis Your Name.____________ Phone .______________ Contact Allan Davis for the funds clearance certificate neccessary for the realise of your funds E-mail:mrallan_davis1@yahoo.co.jp D/L: Tel:+601-635-44376 Best Regards, Mr Allan Davis

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