April 2011 - U-Boot

[U-Boot] [PATCH] MPC83xx: add config options for memory setup.
by Andre Schwarz 07 Jul '11

07 Jul '11

CPO value and driver strength settings are board specifc. Also allow SPD data fetch from any accessible I2C EEPROM. Signed-off-by: Andre Schwarz <andre.schwarz(a)matrix-vision.de> --- arch/powerpc/cpu/mpc83xx/spd_sdram.c | 19 ++++++++++++++++++- 1 files changed, 18 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c index 44aaa9a..9b01f0d 100644 --- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c +++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c @@ -68,6 +68,12 @@ void board_add_ram_info(int use_default) #ifndef CONFIG_SYS_READ_SPD #define CONFIG_SYS_READ_SPD i2c_read #endif +#ifndef SPD_EEPROM_OFFSET +#define SPD_EEPROM_OFFSET 0 +#endif +#ifndef SPD_EEPROM_ADDR_LEN +#define SPD_EEPROM_ADDR_LEN 1 +#endif /* * Convert picoseconds into clock cycles (rounding up if needed). @@ -160,7 +166,8 @@ long int spd_sdram() isync(); /* Read SPD parameters with I2C */ - CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof (spd)); + CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET, + SPD_EEPROM_ADDR_LEN, (uchar *) &spd, sizeof(spd)); #ifdef SPD_DEBUG spd_debug(&spd); #endif @@ -562,6 +569,9 @@ long int spd_sdram() * Empirically, 0x3 == 6/8 clock delay is suggested for DDR I 266. */ wr_data_delay = 2; +#ifdef CONFIG_SYS_DDR_WRITE_DATA_DELAY + wr_data_delay = CONFIG_SYS_DDR_WRITE_DATA_DELAY; +#endif /* * Write Latency @@ -601,6 +611,9 @@ long int spd_sdram() */ cpo = 0; if (spd.mem_type == SPD_MEMTYPE_DDR2) { +#ifdef CONFIG_SYS_DDR_CPO + cpo = CONFIG_SYS_DDR_CPO; +#else if (effective_data_rate == 266) { cpo = 0x4; /* READ_LAT + 1/2 */ } else if (effective_data_rate == 333) { @@ -611,6 +624,7 @@ long int spd_sdram() /* Automatic calibration */ cpo = 0x1f; } +#endif } ddr->timing_cfg_2 = (0 @@ -679,6 +693,9 @@ long int spd_sdram() ddr->sdram_mode = (0 | (1 << (16 + 10)) /* DQS Differential disable */ +#ifdef CONFIG_SYS_DDR_MODE_WEAK + | (1 << (16 + 1)) /* weak driver (~60%) */ +#endif | (add_lat << (16 + 3)) /* Additive Latency in EMRS1 */ | (mode_odt_enable << 16) /* ODT Enable in EMRS1 */ | ((twr_clk - 1) << 9) /* Write Recovery Autopre */ -- 1.7.0.4

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[U-Boot] [PATCH] MPC83xx: add define for global half-strength enable (HSE)
by Andre Schwarz 07 Jul '11

07 Jul '11

Signed-off-by: Andre Schwarz <andre.schwarz(a)matrix-vision.de> --- include/mpc83xx.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/mpc83xx.h b/include/mpc83xx.h index ea137c7..8292018 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -1000,6 +1000,7 @@ #define SDRAM_CFG_8_BE 0x00040000 #define SDRAM_CFG_NCAP 0x00020000 #define SDRAM_CFG_2T_EN 0x00008000 +#define SDRAM_CFG_HSE 0x00000008 #define SDRAM_CFG_BI 0x00000001 /* DDR_SDRAM_MODE - DDR SDRAM Mode Register -- 1.7.0.4

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[U-Boot] [PATCH v2] MPC837x: set i2c1_clk
by Andre Schwarz 07 Jul '11

07 Jul '11

Running on mpc837x without CONFIG_FSL_ESDHC leads to i2c1_clk not being set at all. It is bound to clock of encryption module. fix this. Signed-off-by: Andre Schwarz <andre.schwarz(a)matrix-vision.de> --- Changes for v2: - fix commit message mangling in subject line. arch/powerpc/cpu/mpc83xx/speed.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 5e616dd..1eca1a8 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -327,6 +327,8 @@ int get_clocks(void) i2c1_clk = enc_clk; #elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; +#elif defined(CONFIG_MPC837x) + i2c1_clk = enc_clk; #endif #if !defined(CONFIG_MPC832x) i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ -- 1.7.0.4

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[U-Boot] [PATCH] fsl_dma: fix support for 83xx DMA engine
by Ira W. Snyder 07 Jul '11

07 Jul '11

Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the Freescale DMA engine on the 83xx parts. This is due to using registers which do not exist on 83xx. Remove the attribute register accesses from the 83xx build. Signed-off-by: Ira W. Snyder <iws(a)ovro.caltech.edu> Cc: York Sun <yorksun(a)freescale.com> Cc: Peter Tyser <ptyser(a)xes-inc.com> Cc: Kumar Gala <galak(a)kernel.crashing.org> --- drivers/dma/fsl_dma.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index 09c18c1..30785ec 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -116,10 +116,12 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) { out_dma32(&dma->dar, (u32) (dest & 0xFFFFFFFF)); out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); +#if !defined(CONFIG_MPC83xx) out_dma32(&dma->satr, in_dma32(&dma->satr) | (u32)((u64)src >> 32)); out_dma32(&dma->datr, in_dma32(&dma->datr) | (u32)((u64)dest >> 32)); +#endif out_dma32(&dma->bcr, xfer_size); dma_sync(); -- 1.7.3.4

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[U-Boot] [PATCH 1/4 v3] musb: Use name based initialization for musb_config
by Ajay Kumar Gupta 06 Jul '11

06 Jul '11

Changed musb_config initialization for omap3.c, davinci.c and da8xx.c using name of structure fields. This would cause the uninitialized field to be null by default and thus would help in avoiding to init some flags required to be set only for a few selected platforms. CC: Remy Bohmer <linux(a)bohmer.net> Signed-off-by: Ajay Kumar Gupta <ajay.gupta(a)ti.com> --- No change from v2. drivers/usb/musb/da8xx.c | 6 +++--- drivers/usb/musb/davinci.c | 6 +++--- drivers/usb/musb/omap3.c | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c index 40bfe44..617d88e 100644 --- a/drivers/usb/musb/da8xx.c +++ b/drivers/usb/musb/da8xx.c @@ -27,9 +27,9 @@ /* MUSB platform configuration */ struct musb_config musb_cfg = { - (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE, - DA8XX_USB_OTG_TIMEOUT, - 0 + .regs = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE, + .timeout = DA8XX_USB_OTG_TIMEOUT, + .musb_speed = 0, }; /* diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c index 8fbadc9..f56f2df 100644 --- a/drivers/usb/musb/davinci.c +++ b/drivers/usb/musb/davinci.c @@ -28,9 +28,9 @@ /* MUSB platform configuration */ struct musb_config musb_cfg = { - (struct musb_regs *)MENTOR_USB0_BASE, - DAVINCI_USB_TIMEOUT, - 0 + .regs = (struct musb_regs *)MENTOR_USB0_BASE, + .timeout = DAVINCI_USB_TIMEOUT, + .musb_speed = 0, }; /* MUSB module register overlay */ diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c index 3bfd0a0..785629c 100644 --- a/drivers/usb/musb/omap3.c +++ b/drivers/usb/musb/omap3.c @@ -36,9 +36,9 @@ static int platform_needs_initialization = 1; struct musb_config musb_cfg = { - (struct musb_regs *)MENTOR_USB0_BASE, - OMAP3_USB_TIMEOUT, - 0 + .regs = (struct musb_regs *)MENTOR_USB0_BASE, + .timeout = OMAP3_USB_TIMEOUT, + .musb_speed = 0, }; /* -- 1.6.2.4

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[U-Boot] smdk2416 board support
by Thiago A. Corrêa 06 Jul '11

06 Jul '11

Hi, We have a board based on smdk2416 and we received from the kit manufacturer, from which we based our own board a custom u-boot, which contains support for the following SMDK boards: 2412 2416 2440 2442 2443 2450 6400 6410 6430 c100 We are only interested in 2416 atm, but since we use Buildroot, it would make our lives a lot easier if this was upstream instead of this .tar.bz2 file. How would we proceed to add at least 2416 support to upstream? Can I just update it to HEAD? Should I rewrite it entierly? The board/samsung/smdk2416/smdk2416.c file contains the following copyright notice: /* * (C) Copyright 2007-2008 * Jong - pill, Lee <boyko.lee(a)samsung.com> * * (C) Copyright 2002 * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ Please advise. Kind Regards, Thiago A. Correa

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[U-Boot] [PATCH 1/2] powerpc/85xx: Specify hwconfig usage for USB controller
by Kumar Gala 01 Jul '11

01 Jul '11

From: Ramneek Mehresh <ramneek.mehresh(a)freescale.com> Specify hwconfig usage for USB mode and phy change Signed-off-by: Ramneek Mehresh <ramneek.mehresh(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- doc/README.fsl-hwconfig | 26 ++++++++++++++++++++++++++ 1 files changed, 26 insertions(+), 0 deletions(-) diff --git a/doc/README.fsl-hwconfig b/doc/README.fsl-hwconfig index 03fea74..6889a70 100644 --- a/doc/README.fsl-hwconfig +++ b/doc/README.fsl-hwconfig @@ -19,3 +19,29 @@ audclk 'audclk:12' Select the 12.288MHz clock + +usb + Specific to boards have USB controller + + This option specifies the following for a USB controller: + + - which controller mode to use + - which USB PHY to use + + This is used by generic USB device-tree fixup function to update + modified values of phy type and controller mode. + + Also used for configuring multiple USB controllers such that + 'usbN' (where N is 1, 2, etc. refers to controller no.) + + 'phy_type' + Select USB phy type: 'utmi' OR 'ulpi' + + 'dr_mode' + Select USB controller mode: 'host', 'peripheral' OR 'otg' + + Examples: + usb1:dr_mode=host;usb2:dr_mode=peripheral' + + usb1:dr_mode=host,phy_type=utmi;usb2:dr_mode=host' + -- 1.7.2.3

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[U-Boot] [PATCH] OMAP[34]: fix broken timer
by John Rigby 29 Jun '11

29 Jun '11

As implemented now the timer used to implement __udelay counts to 0xffffffff and then gets stuck there because the the programmed reload value is 0xffffffff. This value is not only wrong but illegal according to the reference manual. One can reproduce the bug by leaving a board at the u-boot prompt for sometime then issuing a sleep command. The sleep will hang forever. The timer is a count up timer that reloads as it rolls over from 0xffffffff so the correct load value is 0. Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff. Signed-off-by: John Rigby <john.rigby(a)linaro.org> --- arch/arm/cpu/armv7/omap-common/timer.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 9beebb1..59bbca8 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -43,8 +43,9 @@ static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; * Nothing really to do with interrupts, just starts up a counter. */ -#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) -#define TIMER_LOAD_VAL 0xffffffff +#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) +#define TIMER_OVERFLOW_VAL 0xffffffff +#define TIMER_LOAD_VAL 0 int timer_init(void) { @@ -86,7 +87,7 @@ void __udelay(unsigned long usec) while (tmo > 0) { now = readl(&timer_base->tcrr); if (last > now) /* count up timer overflow */ - tmo -= TIMER_LOAD_VAL - last + now; + tmo -= TIMER_OVERFLOW_VAL - last + now + 1; else tmo -= now - last; last = now; -- 1.7.3.1.120.g38a18

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[U-Boot] strawman Fastboot in U-Boot Design Doc
by John Rigby 28 Jun '11

28 Jun '11

Here a first draft design doc. It is based in part on the Fastboot implementation in the rowboat git repo (pointer below). As always, comments welcome. John Purpose ======= Mainline support for Android Fastboot would be useful. Arguing the merits of Fastboot vs DFU is not in the scope of this document. This document is to discuss design goals/requirements of an implementation of Fastboot in U-Boot. Background ========== See the Android Fastboot page in Omappedia for an example of how Fastboot is used to flash nand partitions on an Android device. http://www.omappedia.org/wiki/Android_Fastboot A description of the Fastboot protocol is available in the gitorious rowboat git repo. http://gitorious.org/rowboat/bootable-bootloader-legacy/blobs/master/fastbo… Hooks into U-Boot ================= Fastboot gets access to the USB subsystem via the same interfaces as USB_TTY, namely the udc_* api's: udc_init udc_startup_events udc_connect udc_poll udc_setup_ep etc. Startup ======= Fastboot will be started on the target by issuing the "fastboot" command. Optionally a board specific startup method may exist. For example if a certain combination of keys is pressed on reset then fastboot will be started immediately. Shutdown ======== Once started the fastboot command will continue until: <CTRL-C> is typed on the console a "continue" command is sent from the host usb cable is removed no commands have been sent from the host for some configurable timeout Coexistance With USB_TTY and DFU ================================ One should be able to enable USB_TTY, DFU and Fastboot at compile time and chose one at runtime. Questions ======== Should a Fastboot host program be included in the U-Boot source? Could Fastboot be implemented as an extension to USB_TTY? Could Fastboot, DFU and USB_TTY share a layer of code above the udc_* api's?

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[U-Boot] [PATCH v2 00/10] armv7: cache maintenance operations
by Aneesh V 28 Jun '11

28 Jun '11

With D-cache and MMU enabled for ARM in u-boot it becomes imperative to support a minimal set of cache maintenance operations and necessary initializations before enabling MMU. This series of patches attempt to do the following for armv7: * Necessary initialization sequence before enabling MMU that includes invalidation of TLB, data caches, branch predictor array etc. * Framework for supporting SOC specific outer caches in a generic manner (using a structure of function pointers - inspired by the Linux implementation) * Generic armv7 cache maintenance operations for caches known to the CPU * Support for ARM PL310 L2 cache controller used in OMAP4 * Cleanup of the cleanup_before_linux() function * Adapting all armv7 SOCs to use the new framework and removing duplicated code Testing: * Extensive testing on OMAP4430SDP and OMAP3430SDP by creating coherency issues and solving them using the maintenance routines - Eg: memfill a region of memory with a known pattern - Invalidate the region - Read back and compare the region with the original pattern - If match fails it means that invalidate is successful - Now add a flush call just before the invalidate - If match succeeds it means that flush was successful - Outer caches were tested with experiments involving making the function pointers NULL * Kernel booting on OMAP4430SDP and OMAP3430SDP Note: v2 has been tested only on OMAP4430SDP v2: * Pointer based callback mechanism for outer cache operations changed to a weakly linked functions. * Change -march=armv7-a back to armv5 * Moved utility macros out of armv7.h * Added documentation for new CONFIG options. * Changed implementation of log2n to not use CLZ instruction as armv4 doesn't support this instruction and newly added Tegra2 uses -march=armv4 * Blank line after local variable declarations - fixed globally * Explicitly added an empty flush_cache() under #ifdef CONFIG_SYS_NO_DCACHE * Removed the print inside the weakly linked stub function - __arm_init_before_mmu * Fixed signature of flush_cache in cache.c * More descriptive commit message for the PL310 support patch * C struct for PL310 register accesses * Fixed white space issues Aneesh V (10): arm: make default implementation of cache_flush() weakly linked armv7: add miscellaneous utility macros armv7: cache maintenance operations for armv7 armv7: replace CONFIG_L2_OFF with CONFIG_SYS_NO_L2CACHE armv7: integrate cache maintenance support arm: minor fixes for cache and mmu handling armv7: add PL310 support to u-boot armv7: adapt omap4 to the new cache maintenance framework armv7: adapt omap3 to the new cache maintenance framework armv7: adapt s5pc1xx to the new cache maintenance framework README | 11 + arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/cache_v7.c | 390 +++++++++++++++++++++++++ arch/arm/cpu/armv7/cpu.c | 51 ++-- arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/cpu/armv7/omap3/board.c | 138 ++++++++-- arch/arm/cpu/armv7/omap3/cache.S | 263 ----------------- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 32 ++ arch/arm/cpu/armv7/omap4/lowlevel_init.S | 18 ++ arch/arm/cpu/armv7/s5pc1xx/cache.S | 88 +----- arch/arm/cpu/armv7/start.S | 18 +- arch/arm/include/asm/arch-omap3/omap3.h | 20 ++ arch/arm/include/asm/arch-omap3/sys_proto.h | 10 +- arch/arm/include/asm/arch-omap4/sys_proto.h | 1 - arch/arm/include/asm/arch-s5pc1xx/sys_proto.h | 3 - arch/arm/include/asm/armv7.h | 68 +++++ arch/arm/include/asm/pl310.h | 74 +++++ arch/arm/include/asm/utils.h | 80 +++++ arch/arm/lib/Makefile | 1 + arch/arm/lib/board.c | 6 + arch/arm/lib/cache-cp15.c | 16 +- arch/arm/lib/cache-pl310.c | 116 ++++++++ arch/arm/lib/cache.c | 20 +- include/common.h | 5 +- include/configs/ca9x4_ct_vxp.h | 2 +- include/configs/efikamx.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/omap4_panda.h | 8 +- include/configs/omap4_sdp4430.h | 8 +- include/configs/s5pc210_universal.h | 2 +- include/configs/tegra2-common.h | 2 +- include/configs/vision2.h | 2 +- 33 files changed, 1037 insertions(+), 425 deletions(-) create mode 100644 arch/arm/cpu/armv7/cache_v7.c delete mode 100644 arch/arm/cpu/armv7/omap3/cache.S create mode 100644 arch/arm/include/asm/armv7.h create mode 100644 arch/arm/include/asm/pl310.h create mode 100644 arch/arm/include/asm/utils.h create mode 100644 arch/arm/lib/cache-pl310.c

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