April 2011 - U-Boot

[U-Boot] [PATCH] gpio: generalize for all generic gpio providers
by Mike Frysinger 12 Apr '11

12 Apr '11

The Blackfin gpio command isn't terribly Blackfin-specific. So generalize the few pieces into two new optional helpers: name_to_gpio() - turn a string name into a GPIO # gpio_status() - display current pin bindings (think /proc/gpio) Once these pieces are pulled out, we can relocate the cmd_gpio.c into the common directory. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- arch/blackfin/cpu/Makefile | 1 - arch/blackfin/cpu/cmd_gpio.c | 118 -------------------------------------- arch/blackfin/include/asm/gpio.h | 53 +++++++++++++++++ common/Makefile | 1 + common/cmd_gpio.c | 86 +++++++++++++++++++++++++++ 5 files changed, 140 insertions(+), 119 deletions(-) delete mode 100644 arch/blackfin/cpu/cmd_gpio.c create mode 100644 common/cmd_gpio.c diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile index 4a9e577..df10f1b 100644 --- a/arch/blackfin/cpu/Makefile +++ b/arch/blackfin/cpu/Makefile @@ -18,7 +18,6 @@ CEXTRA := initcode.o SEXTRA := start.o SOBJS := interrupt.o cache.o COBJS-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount.o -COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o COBJS-y += cpu.o COBJS-y += gpio.o COBJS-y += interrupts.o diff --git a/arch/blackfin/cpu/cmd_gpio.c b/arch/blackfin/cpu/cmd_gpio.c deleted file mode 100644 index e96413b..0000000 --- a/arch/blackfin/cpu/cmd_gpio.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Control GPIO pins on the fly - * - * Copyright (c) 2008-2010 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <command.h> -#include <linux/ctype.h> - -#include <asm/blackfin.h> -#include <asm/gpio.h> - -enum { - GPIO_INPUT, - GPIO_SET, - GPIO_CLEAR, - GPIO_TOGGLE, -}; - -int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - if (argc == 2 && !strcmp(argv[1], "status")) { - bfin_gpio_labels(); - return 0; - } - - if (argc != 3) - show_usage: - return cmd_usage(cmdtp); - - /* parse the behavior */ - ulong sub_cmd; - switch (argv[1][0]) { - case 'i': sub_cmd = GPIO_INPUT; break; - case 's': sub_cmd = GPIO_SET; break; - case 'c': sub_cmd = GPIO_CLEAR; break; - case 't': sub_cmd = GPIO_TOGGLE; break; - default: goto show_usage; - } - - /* parse the pin with format: [p][port]<#> */ - const char *str_pin = argv[2]; - - /* grab the [p]<port> portion */ - ulong port_base; - if (tolower(*str_pin) == 'p') ++str_pin; - switch (tolower(*str_pin)) { -#ifdef GPIO_PA0 - case 'a': port_base = GPIO_PA0; break; -#endif -#ifdef GPIO_PB0 - case 'b': port_base = GPIO_PB0; break; -#endif -#ifdef GPIO_PC0 - case 'c': port_base = GPIO_PC0; break; -#endif -#ifdef GPIO_PD0 - case 'd': port_base = GPIO_PD0; break; -#endif -#ifdef GPIO_PE0 - case 'e': port_base = GPIO_PE0; break; -#endif -#ifdef GPIO_PF0 - case 'f': port_base = GPIO_PF0; break; -#endif -#ifdef GPIO_PG0 - case 'g': port_base = GPIO_PG0; break; -#endif -#ifdef GPIO_PH0 - case 'h': port_base = GPIO_PH0; break; -#endif -#ifdef GPIO_PI0 - case 'i': port_base = GPIO_PI0; break; -#endif -#ifdef GPIO_PJ - case 'j': port_base = GPIO_PJ0; break; -#endif - default: goto show_usage; - } - - /* grab the <#> portion */ - ulong pin = simple_strtoul(str_pin + 1, NULL, 10); - if (pin > 15) - goto show_usage; - - /* grab the pin before we tweak it */ - ulong gpio = port_base + pin; - gpio_request(gpio, "cmd_gpio"); - - /* finally, let's do it: set direction and exec command */ - ulong value; - if (sub_cmd == GPIO_INPUT) { - gpio_direction_input(gpio); - value = gpio_get_value(gpio); - } else { - switch (sub_cmd) { - case GPIO_SET: value = 1; break; - case GPIO_CLEAR: value = 0; break; - case GPIO_TOGGLE: value = !gpio_get_value(gpio); break; - default: goto show_usage; - } - gpio_direction_output(gpio, value); - } - printf("gpio: pin %lu on port %c (gpio %lu) value is %lu\n", - pin, *str_pin, gpio, value); - - gpio_free(gpio); - - return value; -} - -U_BOOT_CMD(gpio, 3, 0, do_gpio, - "input/set/clear/toggle gpio output pins", - "<input|set|clear|toggle> <port><pin>\n" - " - input/set/clear/toggle the specified pin (e.g. PF10)"); diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h index b650ef0..9c0e5d1 100644 --- a/arch/blackfin/include/asm/gpio.h +++ b/arch/blackfin/include/asm/gpio.h @@ -196,6 +196,59 @@ static inline int gpio_is_valid(int number) return number >= 0 && number < MAX_BLACKFIN_GPIOS; } +#include <linux/ctype.h> + +static inline int name_to_gpio(const char *name) +{ + int port_base; + + if (tolower(*name) == 'p') { + ++name; + + switch (tolower(*name)) { +#ifdef GPIO_PA0 + case 'a': port_base = GPIO_PA0; break; +#endif +#ifdef GPIO_PB0 + case 'b': port_base = GPIO_PB0; break; +#endif +#ifdef GPIO_PC0 + case 'c': port_base = GPIO_PC0; break; +#endif +#ifdef GPIO_PD0 + case 'd': port_base = GPIO_PD0; break; +#endif +#ifdef GPIO_PE0 + case 'e': port_base = GPIO_PE0; break; +#endif +#ifdef GPIO_PF0 + case 'f': port_base = GPIO_PF0; break; +#endif +#ifdef GPIO_PG0 + case 'g': port_base = GPIO_PG0; break; +#endif +#ifdef GPIO_PH0 + case 'h': port_base = GPIO_PH0; break; +#endif +#ifdef GPIO_PI0 + case 'i': port_base = GPIO_PI0; break; +#endif +#ifdef GPIO_PJ + case 'j': port_base = GPIO_PJ0; break; +#endif + default: return -1; + } + + ++name; + } else + port_base = 0; + + return port_base + simple_strtoul(name, NULL, 10); +} +#define name_to_gpio(n) name_to_gpio(n) + +#define gpio_status() bfin_gpio_labels() + #endif /* __ASSEMBLY__ */ #endif /* __ARCH_BLACKFIN_GPIO_H__ */ diff --git a/common/Makefile b/common/Makefile index 167612b..2ea0075 100644 --- a/common/Makefile +++ b/common/Makefile @@ -95,6 +95,7 @@ COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o endif +COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o diff --git a/common/cmd_gpio.c b/common/cmd_gpio.c new file mode 100644 index 0000000..9c9de28 --- /dev/null +++ b/common/cmd_gpio.c @@ -0,0 +1,86 @@ +/* + * Control GPIO pins on the fly + * + * Copyright (c) 2008-2011 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> + +#include <asm/gpio.h> + +#ifndef name_to_gpio +#define name_to_gpio(name) simple_strtoul(name, NULL, 10) +#endif + +enum gpio_cmd { + GPIO_INPUT, + GPIO_SET, + GPIO_CLEAR, + GPIO_TOGGLE, +}; + +static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int gpio; + enum gpio_cmd sub_cmd; + ulong value; + const char *str_cmd, *str_gpio; + +#ifdef gpio_status + if (argc == 2 && !strcmp(argv[1], "status")) { + gpio_status(); + return 0; + } +#endif + + if (argc != 3) + show_usage: + return cmd_usage(cmdtp); + str_cmd = argv[1]; + str_gpio = argv[2]; + + /* parse the behavior */ + switch (*str_cmd) { + case 'i': sub_cmd = GPIO_INPUT; break; + case 's': sub_cmd = GPIO_SET; break; + case 'c': sub_cmd = GPIO_CLEAR; break; + case 't': sub_cmd = GPIO_TOGGLE; break; + default: goto show_usage; + } + + /* turn the gpio name into a gpio number */ + gpio = name_to_gpio(str_gpio); + if (gpio < 0) + goto show_usage; + + /* grab the pin before we tweak it */ + gpio_request(gpio, "cmd_gpio"); + + /* finally, let's do it: set direction and exec command */ + if (sub_cmd == GPIO_INPUT) { + gpio_direction_input(gpio); + value = gpio_get_value(gpio); + } else { + switch (sub_cmd) { + case GPIO_SET: value = 1; break; + case GPIO_CLEAR: value = 0; break; + case GPIO_TOGGLE: value = !gpio_get_value(gpio); break; + default: goto show_usage; + } + gpio_direction_output(gpio, value); + } + printf("gpio: pin %s (gpio %i) value is %lu\n", + str_gpio, gpio, value); + + gpio_free(gpio); + + return value; +} + +U_BOOT_CMD(gpio, 3, 0, do_gpio, + "input/set/clear/toggle gpio pins", + "<input|set|clear|toggle> <pin>\n" + " - input/set/clear/toggle the specified pin"); -- 1.7.4.1

2 6

[U-Boot] [MIPS 0/2] Trivial cleanups
by Shinya Kuribayashi 12 Apr '11

12 Apr '11

Two boring patches for common MIPS area. Build tested on gth2, and verified no logical changes are incorporated.

2 4

[U-Boot] Hello
by Mis Norna 12 Apr '11

12 Apr '11

Hello How are you today,I hope all is well with you.l am Mis Norna Toure, Am deeply in need of someone to share with. I would like us to be friends and to know more about each other,If you are interested in knowing more about me get back to me. My dear,l want you to know that distance,age or color does not matter in a real relationship.waiting to hear from you soonest. Thanks, Mis Norna

1 0

[U-Boot] Is patchwork dropping patches?
by Graeme Russ 12 Apr '11

12 Apr '11

Of the following patches in my latest 6 patch series ([U-Boot] [PATCH 0/6] x86: General cleanup), only the first has shown up in patchwork. Has anyone else experienced this? http://lists.denx.de/pipermail/u-boot/2011-April/090145.html http://lists.denx.de/pipermail/u-boot/2011-April/090146.html http://lists.denx.de/pipermail/u-boot/2011-April/090151.html http://lists.denx.de/pipermail/u-boot/2011-April/090148.html http://lists.denx.de/pipermail/u-boot/2011-April/090147.html http://lists.denx.de/pipermail/u-boot/2011-April/090149.html Regards, Graeme

1 0

[U-Boot] [patch 0/6] Update patchset for some Freescale ColdFire boards
by Jason Jin 12 Apr '11

12 Apr '11

The following patches update some ColdFire boards to work with latest u-boot. Those update were tested on following Freescale boards: M54455EVB, M54451EVB, M5475EVB(M5475CFE_config), M5485EVB(M5485HFE_conifg), M5208EVB, M5253DEMO, M52277EVB, M53017EVB, M5373EVB, M5329EVB(M5329BFEE_config). [PATCH 1/6] Fix the configuration broken for ColdFire boards. [PATCH 2/6] Fix the CPP flags for toolchain 4.4.1 on ColdFire boards. [PATCH 3/6] Env and lds file clean up for ColdFire M5445x and M547x/8x boards. [PATCH 4/6] Clean up lds files for some ColdFire nommu chips [PATCH 5/6] Enable the dm9000 on ColdFire 5253DEMO board. [PATCH 6/6] Disable the NFS define for 52277 board.

2 9

[U-Boot] [PATCH 1/1] fsl_esdhc: Fix multi-block read restriction on i.MX53 eSDHCv2
by Jason Liu 12 Apr '11

12 Apr '11

For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need to be set to ABORT, otherwise, next read command will hang. This is a software Software Restrictions in i.MX53 reference manual: 29.7.8 Multi-block Read For pre-defined multi-block read operation, that is,the number of blocks to read has been defined by previous CMD23 for MMC, or pre-defined number of blocks in CMD53 for SDIO/SDCombo,or whatever multi-block read without abort command at card side, an abort command, either automatic or manual CMD12/CMD52, is still required by ESDHC after the pre-defined number of blocks are done, to drive the internal state machine to idle mode. In this case, the card may not respond to this extra abort command and ESDHC will get Response Timeout. It is recommended to manually send an abort command with RSPTYP[1:0] both bits cleared. Signed-off-by: Jason Liu <jason.hui(a)linaro.org> --- drivers/mmc/fsl_esdhc.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index f3cccbe..5c3618b 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -99,6 +99,10 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) else if (cmd->resp_type & MMC_RSP_PRESENT) xfertyp |= XFERTYP_RSPTYP_48; +#ifdef CONFIG_MX53 + if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) + xfertyp |= XFERTYP_CMDTYP_ABORT; +#endif return XFERTYP_CMD(cmd->cmdidx) | xfertyp; } -- 1.7.1

4 5

[U-Boot] [PATCH] Fix CFI flash driver for 8-bit bus support
by Aaron Williams 12 Apr '11

12 Apr '11

This patch corrects the addresses used when working with Spansion/AMD FLASH chips. Addressing for 8 and 16 bits is almost identical except in the 16-bit case the LSB of the address is always 0. The confusion arose because the addresses in the datasheet for 16-bit mode are word addresses but this code assumed it was byte addresses. I have only been able to test this on our Octeon boards which use either an 8-bit or 16-bit bus. I have not tested the case where there's an 8-bit part on a 16-bit bus. This patch also adds some delays as suggested by Spansion. If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an 8-bit bus is detected. -Aaron Williams Signed-off-by: Aaron Williams <aaron.williams(a)caviumnetworks.com> --- drivers/mtd/cfi_flash.c | 93 ++++++++++++++++++++++++++++++++++------------- include/mtd/cfi_flash.h | 40 ++++++++++---------- 2 files changed, 87 insertions(+), 46 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 0909fe7..eab1fbe 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -10,6 +10,9 @@ * * Copyright (C) 2006 * Tolunay Orkun <listmember(a)orkun.us> + * + * Copyright (C) 2011 Cavium Networks, Inc. + * Aaron Williams <Aaron.Williams(a)caviumnetworks.com> * * See file CREDITS for list of people who contributed to this * project. @@ -32,7 +35,6 @@ */ /* The DEBUG define must be before common to enable debugging */ -/* #define DEBUG */ #include <common.h> #include <asm/processor.h> @@ -209,9 +211,11 @@ unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) static inline void * flash_map (flash_info_t * info, flash_sect_t sect, uint offset) { - unsigned int byte_offset = offset * info->portwidth; - - return (void *)(info->start[sect] + byte_offset); + unsigned int byte_offset = offset * info->portwidth / info->chipwidth; + unsigned int addr = (info->start[sect] + byte_offset); + unsigned int mask = 0xffffffff << (info->portwidth - 1); + + return (void *)(addr & mask); } static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, @@ -397,6 +401,8 @@ void flash_write_cmd (flash_info_t * info, flash_sect_t sect, #endif flash_write64(cword.ll, addr); break; + default: + debug ("fwc: Unknown port width %d\n", info->portwidth); } /* Ensure all the instructions are fully finished */ @@ -581,6 +587,7 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, prompt, info->start[sector], flash_read_long (info, sector, 0)); flash_write_cmd (info, sector, 0, info->cmd_reset); + udelay(1); return ERR_TIMOUT; } udelay (1); /* also triggers watchdog */ @@ -628,6 +635,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, puts ("Vpp Low Error.\n"); } flash_write_cmd (info, sector, 0, info->cmd_reset); + udelay(1); break; default: break; @@ -744,12 +752,8 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) static flash_sect_t find_sector (flash_info_t * info, ulong addr) { static flash_sect_t saved_sector = 0; /* previously found sector */ - static flash_info_t *saved_info = 0; /* previously used flash bank */ flash_sect_t sector = saved_sector; - if ((info != saved_info) || (sector >= info->sector_count)) - sector = 0; - while ((info->start[sector] < addr) && (sector < info->sector_count - 1)) sector++; @@ -761,7 +765,6 @@ static flash_sect_t find_sector (flash_info_t * info, ulong addr) sector--; saved_sector = sector; - saved_info = info; return sector; } @@ -825,12 +828,15 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, switch (info->portwidth) { case FLASH_CFI_8BIT: + debug("%s: 8-bit 0x%02x\n", __func__, cword.c); flash_write8(cword.c, dstaddr); break; case FLASH_CFI_16BIT: + debug("%s: 16-bit 0x%04x\n", __func__, cword.w); flash_write16(cword.w, dstaddr); break; case FLASH_CFI_32BIT: + debug("%s: 32-bit 0x%08lx\n", __func__, cword.l); flash_write32(cword.l, dstaddr); break; case FLASH_CFI_64BIT: @@ -1043,6 +1049,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int prot; flash_sect_t sect; int st; + + debug("%s: erasing sectors %d to %d\n", __func__, s_first, s_last); if (info->flash_id != FLASH_MAN_CFI) { puts ("Can't erase unknown flash type - aborted\n"); @@ -1082,6 +1090,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) break; case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: + flash_write_cmd (info, 0, 0, AMD_CMD_RESET); flash_unlock_seq (info, sect); flash_write_cmd (info, sect, info->addr_unlock1, @@ -1121,6 +1130,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) rcode = 1; else if (flash_verbose) putc ('.'); + } else { + debug("\nSector %d is protected.\n", sect); } } @@ -1490,6 +1501,7 @@ void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); memcpy (dst, src + offset, len); flash_write_cmd (info, 0, 0, info->cmd_reset); + udelay(1); flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); } @@ -1505,6 +1517,7 @@ void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); memcpy (buffer, src + offset, len); flash_write_cmd (info, 0, 0, info->cmd_reset); + udelay(1); flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); } @@ -1536,6 +1549,7 @@ static void cfi_reverse_geometry(struct cfi_qry *qry) static void cmdset_intel_read_jedec_ids(flash_info_t *info) { flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); + udelay(1); flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); udelay(1000); /* some flash are slow to respond */ info->manufacturer_id = flash_read_uchar (info, @@ -1573,8 +1587,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) flash_unlock_seq(info, 0); flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); udelay(1000); /* some flash are slow to respond */ - - manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); + manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID); /* JEDEC JEP106Z specifies ID codes up to bank 7 */ while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { bankId += 0x100; @@ -1604,6 +1617,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) break; } flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + udelay(1); } static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) @@ -1719,7 +1733,7 @@ static void flash_read_cfi (flash_info_t *info, void *buf, unsigned int i; for (i = 0; i < len; i++) - p[i] = flash_read_uchar(info, start + i); + p[i] = flash_read_uchar(info, start + (i * 2)); } void __flash_cmd_reset(flash_info_t *info) @@ -1730,6 +1744,7 @@ void __flash_cmd_reset(flash_info_t *info) * that AMD flash roms ignore the Intel command. */ flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + udelay(1); flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); } void flash_cmd_reset(flash_info_t *info) @@ -1739,21 +1754,38 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) { int cfi_offset; - /* Issue FLASH reset command */ - flash_cmd_reset(info); - for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); cfi_offset++) { + /* Issue FLASH reset command */ + flash_cmd_reset(info); flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI); if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { + && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'R') + && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 4, 'Y')) { flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, sizeof(struct cfi_qry)); +#ifdef CONFIG_SYS_FLASH_INTERFACE_WIDTH + info->interface = CONFIG_SYS_FLASH_INTERFACE_WIDTH; +#else info->interface = le16_to_cpu(qry->interface_desc); - + /* Some flash chips can support multiple bus widths. + * In this case, override the interface width and + * limit it to the port width. + */ + if ((info->interface == FLASH_CFI_X8X16) && + (info->portwidth == FLASH_CFI_8BIT)) { + debug("Overriding 16-bit interface width to " + " 8-bit port width.\n"); + info->interface = FLASH_CFI_X8; + } else if ((info->interface == FLASH_CFI_X16X32) && + (info->portwidth == FLASH_CFI_16BIT)) { + debug("Overriding 16-bit interface width to " + " 16-bit port width.\n"); + info->interface = FLASH_CFI_X16; + } +#endif info->cfi_offset = flash_offset_cfi[cfi_offset]; debug ("device interface is %d\n", info->interface); @@ -1764,8 +1796,8 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) info->chipwidth << CFI_FLASH_SHIFT_WIDTH); /* calculate command offsets as in the Linux driver */ - info->addr_unlock1 = 0x555; - info->addr_unlock2 = 0x2aa; + info->addr_unlock1 = 0xaaa; + info->addr_unlock2 = 0x555; /* * modify the unlock address if we are @@ -1799,8 +1831,11 @@ static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; info->chipwidth <<= 1) - if (__flash_detect_cfi(info, qry)) + if (__flash_detect_cfi(info, qry)) { + debug("Found CFI flash, portwidth %d, chipwidth %d\n", + info->portwidth, info->chipwidth); return 1; + } } debug ("not found\n"); return 0; @@ -1819,7 +1854,7 @@ static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) /* CFI < 1.1, try to guess from device id */ if ((info->device_id & 0x80) != 0) cfi_reverse_geometry(qry); - } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { + } else if (flash_read_uchar(info, info->ext_addr + 0x1e) == 3) { /* CFI >= 1.1, deduct from top/bottom flag */ /* note: ext_addr is valid since cfi_version > 0 */ cfi_reverse_geometry(qry); @@ -1891,14 +1926,15 @@ ulong flash_get_size (phys_addr_t base, int banknum) if (flash_detect_cfi (info, &qry)) { info->vendor = le16_to_cpu(qry.p_id); - info->ext_addr = le16_to_cpu(qry.p_adr); + info->ext_addr = le16_to_cpu(qry.p_adr) * 2; + debug("extended address is 0x%x\n", info->ext_addr); num_erase_regions = qry.num_erase_regions; if (info->ext_addr) { info->cfi_version = (ushort) flash_read_uchar (info, - info->ext_addr + 3) << 8; + info->ext_addr + 6) << 8; info->cfi_version |= (ushort) flash_read_uchar (info, - info->ext_addr + 4); + info->ext_addr + 8); } #ifdef DEBUG @@ -1945,13 +1981,16 @@ ulong flash_get_size (phys_addr_t base, int banknum) debug ("device id is 0x%x\n", info->device_id); debug ("device id2 is 0x%x\n", info->device_id2); debug ("cfi version is 0x%04x\n", info->cfi_version); - + debug ("port width: %d, chipwidth: %d, interface: %d\n", + info->portwidth, info->chipwidth, info->interface); size_ratio = info->portwidth / info->chipwidth; +#if 0 /* if the chip is x8/x16 reduce the ratio by half */ if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { size_ratio >>= 1; } +#endif debug ("size_ratio %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); @@ -2023,6 +2062,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) sect_cnt++; } } + debug ("port width: %d, chipwidth: %d, interface: %d\n", + info->portwidth, info->chipwidth, info->interface); info->sector_count = sect_cnt; info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 3245b44..edcf9be 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -71,29 +71,29 @@ #define FLASH_CONTINUATION_CODE 0x7F #define FLASH_OFFSET_MANUFACTURER_ID 0x00 -#define FLASH_OFFSET_DEVICE_ID 0x01 -#define FLASH_OFFSET_DEVICE_ID2 0x0E -#define FLASH_OFFSET_DEVICE_ID3 0x0F -#define FLASH_OFFSET_CFI 0x55 +#define FLASH_OFFSET_DEVICE_ID 0x02 +#define FLASH_OFFSET_DEVICE_ID2 0x1C +#define FLASH_OFFSET_DEVICE_ID3 0x1E +#define FLASH_OFFSET_CFI 0xAA #define FLASH_OFFSET_CFI_ALT 0x555 -#define FLASH_OFFSET_CFI_RESP 0x10 -#define FLASH_OFFSET_PRIMARY_VENDOR 0x13 +#define FLASH_OFFSET_CFI_RESP 0x20 +#define FLASH_OFFSET_PRIMARY_VENDOR 0x26 /* extended query table primary address */ -#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x2A #define FLASH_OFFSET_WTOUT 0x1F -#define FLASH_OFFSET_WBTOUT 0x20 -#define FLASH_OFFSET_ETOUT 0x21 -#define FLASH_OFFSET_CETOUT 0x22 -#define FLASH_OFFSET_WMAX_TOUT 0x23 -#define FLASH_OFFSET_WBMAX_TOUT 0x24 -#define FLASH_OFFSET_EMAX_TOUT 0x25 -#define FLASH_OFFSET_CEMAX_TOUT 0x26 -#define FLASH_OFFSET_SIZE 0x27 -#define FLASH_OFFSET_INTERFACE 0x28 -#define FLASH_OFFSET_BUFFER_SIZE 0x2A -#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C -#define FLASH_OFFSET_ERASE_REGIONS 0x2D -#define FLASH_OFFSET_PROTECT 0x02 +#define FLASH_OFFSET_WBTOUT 0x40 +#define FLASH_OFFSET_ETOUT 0x4A +#define FLASH_OFFSET_CETOUT 0x44 +#define FLASH_OFFSET_WMAX_TOUT 0x46 +#define FLASH_OFFSET_WBMAX_TOUT 0x48 +#define FLASH_OFFSET_EMAX_TOUT 0x4A +#define FLASH_OFFSET_CEMAX_TOUT 0x4C +#define FLASH_OFFSET_SIZE 0x4E +#define FLASH_OFFSET_INTERFACE 0x50 +#define FLASH_OFFSET_BUFFER_SIZE 0x54 +#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x58 +#define FLASH_OFFSET_ERASE_REGIONS 0x5A +#define FLASH_OFFSET_PROTECT 0x04 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 -- 1.7.3.4

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[U-Boot] Net: smc911x: Invalid chip endian 0x04980498 No ethernet found.
by Sung Hee Park 12 Apr '11

12 Apr '11

Hi, I'm having a problem with detecting a network controller in Mistral's omap3evm board rev G. I've compiled both x-loader and u-boot from the one included in dvsdk_omap3530-evm_4_01_00_09_setuplinux. Can you please suggest any idea how I can fix this problem? Thanks in advance. Regards, Sung Hee ------------------------------------------------------------------ Texas Instruments X-Loader 1.46 (Apr 7 2011 - 19:06:54) Starting OS Bootloader... U-Boot 2009.11 (Apr 07 2011 - 19:07:12) OMAP3430/3530-GP ES3.1, CPU-OPP2 L3-165MHz OMAP3 EVM board + LPDDR/NAND I2C: ready DRAM: 128 MB NAND: 256 MiB In: serial Out: serial Err: serial Read back SMSC id 0x4980000 Die ID #61e4000400000000040365fa1801f01e Net: smc911x: Invalid chip endian 0x04980498 No ethernet found. Hit any key to stop autoboot: 0 No ethernet found. Wrong Image Format for bootm command ERROR: can't get kernel image! OMAP3_EVM #

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[U-Boot] [PATCH] Blackfin: adi boards: add eon to the "all" spi flash list
by Mike Frysinger 12 Apr '11

12 Apr '11

Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- include/configs/bfin_adi_common.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 9e61542..3312681 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -277,6 +277,7 @@ */ #ifdef CONFIG_SPI_FLASH_ALL # define CONFIG_SPI_FLASH_ATMEL +# define CONFIG_SPI_FLASH_EON # define CONFIG_SPI_FLASH_MACRONIX # define CONFIG_SPI_FLASH_SPANSION # define CONFIG_SPI_FLASH_SST -- 1.7.5.rc1

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Re: [U-Boot] [PATCH 1/2] powerpc: eSPI and eSPI controller support
by Xie Shaohui-B21989 12 Apr '11

12 Apr '11

>On Tuesday, March 15, 2011 22:53:20 Shaohui Xie wrote: >> --- a/drivers/mtd/spi/spi_flash.c >> +++ b/drivers/mtd/spi/spi_flash.c >> @@ -1,6 +1,8 @@ >> /* >> * SPI flash interface >> + * Add support for Freescale eSPI controller > >this is not the place for changelogs [Xie Shaohui] OK, I'll drop this. > >> @@ -30,6 +32,7 @@ static int spi_flash_read_write(struct spi_slave *spi, >> unsigned long flags = SPI_XFER_BEGIN; >> int ret; >> >> +#ifndef CONFIG_FSL_ESPI >> if (data_len == 0) >> flags |= SPI_XFER_END; >> >> @@ -43,6 +46,48 @@ static int spi_flash_read_write(struct spi_slave *spi, >> debug("SF: Failed to transfer %zu bytes of data: %d\n", >> data_len, ret); >> } >> +#else >> + struct espi_transfer transfer[1]; >> + unsigned char *buffer; >> + size_t buf_len; >> + >> + if (data_in == NULL) >> + buf_len = cmd_len; >> + else >> + buf_len = 2 * cmd_len; >> + >> + buffer = (unsigned char *)malloc(data_len + buf_len); >> + if (!buffer) { >> + debug("SF: Failed to malloc memory.\n"); >> + return 1; >> + } >> + >> + memcpy(buffer, cmd, cmd_len); >> + if (data_in == NULL) >> + memcpy(buffer + cmd_len, data_out, data_len); >> + >> + transfer[0].cmd_len = cmd_len; >> + transfer[0].data_len = data_len; >> + transfer[0].tx_buf = buffer; >> + if (data_in == NULL) >> + transfer[0].rx_buf = NULL; >> + else >> + transfer[0].rx_buf = buffer + cmd_len; >> + >> + transfer[0].flags = flags | SPI_XFER_END; >> + >> + spi->transfer = &transfer[0]; >> + ret = spi_xfer(spi, 0, NULL, NULL, 0); >> + if (ret) { >> + debug("SF: Failed to send command %02x: %d\n", cmd, ret); >> + return ret; >> + } >> + >> + if (data_in) >> + memcpy(data_in, transfer[0].rx_buf + cmd_len, data_len); >> + >> + free(buffer); >> +#endif >> >> return ret; >> } > >yikes, this cant be right [Xie Shaohui] Could you shed more light on this, I didn't get your point, I guess It's maybe the behavior the transaction being handled, for espi controller, software cannot control the chip selects directly, software need to tell the controller how long the CS signal need to be asserted. Driver need to combine the CMD and data together in one transaction, it cannot call spi_xfer two times, first for CMD, and second for data. If this is the reason you thought it was wrong, do you have better idea to handle this kind of Espi controller? Best Regards, Shaohui Xie

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