April 2011 - U-Boot

[U-Boot] [PATCH 0/8] ppc4xx: Update DLVision 10G support
by Dirk Eibach 21 Apr '11

21 Apr '11

Dirk Eibach (8): ppc4xx: Improve DLVision-10G PLL setup ppc4xx: Improve video board detection hwmon: Extend lm63.c to support LM64 ppc4xx: Adapt DLVision 10G to new FPGA firmware ppc4xx: Set DLVision 10G osd position to linux defaults ppc4xx: Enable MPC92469AC on DLVision 10G ppc4xx: Improve fan PWM curve on DLVision 10G ppc4xx: Do not stop booting on any keypress on dlvision-10g board/gdsys/405ep/405ep.c | 9 +++++- board/gdsys/405ep/dlvision-10g.c | 41 ++++++++++++++++++++++----- board/gdsys/common/osd.c | 57 ++++++++++++++++++++++++++++++++++++-- drivers/hwmon/lm63.c | 28 ++++++++++++++++-- include/configs/dlvision-10g.h | 12 ++++++- include/gdsys_fpga.h | 13 +++++--- 6 files changed, 137 insertions(+), 23 deletions(-)

2 11

[U-Boot] [PATCH] xilinx_ppc_boards: Change address of RESET_VECTOR
by Ricardo Ribalda Delgado 21 Apr '11

21 Apr '11

Old address of RESET_VECTOR were overwritten by the bss sector, making impossible its run from xmd. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- boards.cfg | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/boards.cfg b/boards.cfg index 94b8745..2ba603d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -675,9 +675,9 @@ yellowstone powerpc ppc4xx yosemite amcc yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE yucca powerpc ppc4xx - amcc AP1000 powerpc ppc4xx ap1000 amirix -fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o +fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o -v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o +v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o CRAYL1 powerpc ppc4xx L1 cray CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1 @@ -736,11 +736,11 @@ p3p440 powerpc ppc4xx - prodriv KAREF powerpc ppc4xx karef sandburst METROBOX powerpc ppc4xx metrobox sandburst xpedite1000 powerpc ppc4xx - xes -ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o +ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o -xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC +xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000 xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC -xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1 +xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC rsk7203 sh sh2 rsk7203 renesas - mpr2 sh sh3 mpr2 - - -- 1.7.2.3

3 2

Re: [U-Boot] Attention Buyer
by led10-May 21 Apr '11

21 Apr '11

Hello Sir, Good day to you. This is May from DesirePower International Group in Shenzhen, China, which is specialized in LED lighting for several years. Top quality with low price of LED lights for you. E-catalogue is free for your learning if you are in need. Would you just take several minutes to go over our website: www.desire-lighting.com & http://www.desire-ledlighting.com.cn/, if you are interested please feel free to let me know, thanks. Looking forward to hearing from you. Regards May -------------- DESIRE POWER INTERNATIONAL GROUP LED LIGHTING DEPARTMENT Tel: +86-755-2806-8560 Fax: +86-755-2806-8650 Mobile: 00 86 1355 4711 346 Website: www.desire-lighting.com & http://www.desire-ledlighting.com.cn/ E-mail: led10(a)desire-lighting.com or ledlighting.shenzhen(a)gmail.com MSN: footprint-jessie(a)hotmail.com Skype: ledtube_may02 Shenzhen Factory: Unit 6, Jiayiyuan Technology Park, Huaning Road, Dalang sub-district, Longhua Town, Baoan district, Shenzhen city, Guangdong province, China. 2011-04-21

1 0

[U-Boot] JOB APPLICATION
by NIPPON OIL EXPLORATION LTD 21 Apr '11

21 Apr '11

HUMAN RESOURCE DEPARTMENT NIPPON OIL EXPLORATION (CHINA), LTD Jian Guo Men Wai Avenue, Beijing 100004, P.R. China. Tel: +8613539710477 ATTN: APPLICANT INTERNATIONAL EXPATRIATE OFFICIAL JOB ONLINE INTERVIEW Your name has been shortlisted/Chosen among the Lucky expatriates who submitted the CV to the CHINA ONLINE JOB,before we will issue you the Success Letter and the Contract Document. You have to fill the following information's and send it back to us Full Names:..... City:....... State:....... Country:......... Zip code:..... Sex:..... Phone:....... AGE:.... MARITAL STATUS:.... Get back to me as soon as possible. Email : info(a)oilexplorationltd.tk Bar.TANG WING Head of Recruitment Service NIPPON OIL AND GAS (CHINA)

1 0

[U-Boot] Payment sent!!!
by WESTERN UNION MONEY OFFICE 21 Apr '11

21 Apr '11

I write to inform you that we have transferred USD$100,000 dollars. I would have called to give you the MTCN on phone but I have lost your call number. I decided to email you the MTCN and sender name so that you can pick start cashing your money in USD5000.00 daily instalment with the same MTCN and sender's name which will be valid for 20 days until you cash the full $100,000.00usd as it automatically activates for use for 20 days after the first reactivation. The money is available for pick up which was deposited for transfer to you by one MR Bernard Harry from BLACKBERRY MOBILE LOTTERY. The money is available for pick up by receiver(you) but when you track it, it will display PICKED UP due to the fact that it has been deactivated from our head office for security reason because it has stayed too long in the air as we have been trying to reach you on the phone for some days now but it was not reachable, so it was blocked. therefore you can not cash it out in any western union office due to its restriction from our head office,which was a security measure because the money has been in the air for three days now and maybe in danger, hence the mtcn has to be reactivated to enable you cash out the money in any western union office in your area, the reactivation of the MTCN will cost you a token of $85,once this is paid, our head office will release the fund on hold to enable you cash it.To be sure of this please log on to www.westernunion.com and click on track to and enter the sender's info and mtcn below. Sender's Fist name: Perry Sender's Last Name: Poston MTCN: 0341153617 Question: Who Is Great Answer: God Amount: $5000.00USD Total Amount To be cashed:$100,000usd With due respect please get back to me urgently after tracking the money online so i can instruct you on how to send the $85 to us for the reactivation of the MTCN. Thanks Best Regards Mr.Phoenix Mcferrin. western union Office, NIGERIA OFFICE. Western Union® Money Transfer Email: western_unionheadoffic11(a)w.cn Tel: +2348025046348

1 0

Re: [U-Boot] Authentication On How To Credit Your Account With The Sum of £5,800,000.00.
by BARCLAYS BANK OF UK 21 Apr '11

21 Apr '11

Barclays Bank Plc, 1 Churchill Place, London, E14 5HP, United Kingdom. +44 702 405 7644 Dear Customer, Re: Authentication On How To Credit Your Account With The Sum of £5,800,000.00. We at this bank wish to congratulate and inform you that after a skew review of your Inheritance/Contract funds transfer released documents in conjunction with the Central Bank and the International Monetary Fund assessment report, your payment file was forwarded to us for immediate transfer of a part-payment £5,800,000.00 through their philosophical agreement with Barclays Bank PLC as compensation to your designated bank account from their offshore account here with us. The Audit reports given to us shows that you have been going through hard times by paying a lot of money to see to the release of your funds, which has been delayed by some dubious officials, we therefore advice that you stop further communication with any correspondence outside this office since you do not have to pay any money or fee to Barclays Bank Plc to receive your funds as you have met up with the whole funds transfer requirements which will go through all the legal procedure to enable free hitch transfer into Your account. The only thing required from you is to obtain the Non-Residential Clearance Form to enable us credit your account directly by telegraphic wire transfer or through any of our corresponding banks and send copies of the funds transfer release documents to you and your bankers for confirmation and follow our directives, your funds will be credited and reflect in your bank account within five (5) bank working days from the day you obtain this Non-Residential Clearance Form. For further details and assistance on this Remittance Notification, you are advice to kindly forward your full contact, addresses telephone and fax numbers for validate and authentication to: Mrs Nancy Moree Email:nancymoree71@admin.in.th or Mr. Terry Johnson Email:terryj1956@hotmail.com Yours sincerely, Mrs. Nancy Moree Head, International Banking Division. Barclays Bank PLC, UK.

1 0

[U-Boot] [PATCH 1/8] pxa: move i2c driver to the common place
by Lei Wen 21 Apr '11

21 Apr '11

For better sharing with other platform other than pxa's, it is more convenient to put the driver to the common place. Signed-off-by: Lei Wen <leiwen(a)marvell.com> --- arch/arm/cpu/pxa/Makefile | 1 - arch/arm/cpu/pxa/i2c.c | 469 --------------------------------------------- drivers/i2c/Makefile | 1 + drivers/i2c/pxa_i2c.c | 469 +++++++++++++++++++++++++++++++++++++++++++++ include/configs/innokom.h | 1 + include/configs/xm250.h | 1 + 6 files changed, 472 insertions(+), 470 deletions(-) delete mode 100644 arch/arm/cpu/pxa/i2c.c create mode 100644 drivers/i2c/pxa_i2c.c diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile index 49a6ed3..e8b59a3 100644 --- a/arch/arm/cpu/pxa/Makefile +++ b/arch/arm/cpu/pxa/Makefile @@ -28,7 +28,6 @@ LIB = $(obj)lib$(CPU).o START = start.o COBJS += cpu.o -COBJS += i2c.o COBJS += pxafb.o COBJS += timer.o COBJS += usb.o diff --git a/arch/arm/cpu/pxa/i2c.c b/arch/arm/cpu/pxa/i2c.c deleted file mode 100644 index 7aa49ae..0000000 --- a/arch/arm/cpu/pxa/i2c.c +++ /dev/null @@ -1,469 +0,0 @@ -/* - * (C) Copyright 2000 - * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio(a)tin.it - * - * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger(a)sysgo.de> - * - * (C) Copyright 2003 Pengutronix e.K. - * Robert Schwebel <r.schwebel(a)pengutronix.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Back ported to the 8xx platform (from the 8260 platform) by - * Murray.Jensen(a)cmst.csiro.au, 27-Jan-01. - */ - -/* FIXME: this file is PXA255 specific! What about other XScales? */ - -#include <common.h> -#include <asm/io.h> - -#ifdef CONFIG_HARD_I2C - -/* - * - CONFIG_SYS_I2C_SPEED - * - I2C_PXA_SLAVE_ADDR - */ - -#include <asm/arch/hardware.h> -#include <asm/arch/pxa-regs.h> -#include <i2c.h> - -/*#define DEBUG_I2C 1 /###* activate local debugging output */ -#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */ - -#if (CONFIG_SYS_I2C_SPEED == 400000) -#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) -#else -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) -#endif - -#define I2C_ISR_INIT 0x7FF - -#ifdef DEBUG_I2C -#define PRINTD(x) printf x -#else -#define PRINTD(x) -#endif - - -/* Shall the current transfer have a start/stop condition? */ -#define I2C_COND_NORMAL 0 -#define I2C_COND_START 1 -#define I2C_COND_STOP 2 - -/* Shall the current transfer be ack/nacked or being waited for it? */ -#define I2C_ACKNAK_WAITACK 1 -#define I2C_ACKNAK_SENDACK 2 -#define I2C_ACKNAK_SENDNAK 4 - -/* Specify who shall transfer the data (master or slave) */ -#define I2C_READ 0 -#define I2C_WRITE 1 - -/* All transfers are described by this data structure */ -struct i2c_msg { - u8 condition; - u8 acknack; - u8 direction; - u8 data; -}; - - -/** - * i2c_pxa_reset: - reset the host controller - * - */ - -static void i2c_reset( void ) -{ - writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */ - writel(readl(ICR) | ICR_UR, ICR); /* reset the unit */ - udelay(100); - writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */ -#ifdef CONFIG_CPU_MONAHANS - /* | CKENB_1_PWM1 | CKENB_0_PWM0); */ - writel(readl(CKENB) | (CKENB_4_I2C), CKENB); -#else /* CONFIG_CPU_MONAHANS */ - /* set the global I2C clock on */ - writel(readl(CKEN) | CKEN14_I2C, CKEN); -#endif - writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */ - writel(I2C_ICR_INIT, ICR); /* set control reg values */ - writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */ - writel(readl(ICR) | ICR_IUE, ICR); /* enable unit */ - udelay(100); -} - - -/** - * i2c_isr_set_cleared: - wait until certain bits of the I2C status register - * are set and cleared - * - * @return: 1 in case of success, 0 means timeout (no match within 10 ms). - */ -static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask ) -{ - int timeout = 10000; - - while( ((ISR & set_mask)!=set_mask) || ((ISR & cleared_mask)!=0) ){ - udelay( 10 ); - if( timeout-- < 0 ) return 0; - } - - return 1; -} - - -/** - * i2c_transfer: - Transfer one byte over the i2c bus - * - * This function can tranfer a byte over the i2c bus in both directions. - * It is used by the public API functions. - * - * @return: 0: transfer successful - * -1: message is empty - * -2: transmit timeout - * -3: ACK missing - * -4: receive timeout - * -5: illegal parameters - * -6: bus is busy and couldn't be aquired - */ -int i2c_transfer(struct i2c_msg *msg) -{ - int ret; - - if (!msg) - goto transfer_error_msg_empty; - - switch(msg->direction) { - - case I2C_WRITE: - - /* check if bus is not busy */ - if (!i2c_isr_set_cleared(0,ISR_IBB)) - goto transfer_error_bus_busy; - - /* start transmission */ - writel(readl(ICR) & ~ICR_START, ICR); - writel(readl(ICR) & ~ICR_STOP, ICR); - writel(msg->data, IDBR); - if (msg->condition == I2C_COND_START) - writel(readl(ICR) | ICR_START, ICR); - if (msg->condition == I2C_COND_STOP) - writel(readl(ICR) | ICR_STOP, ICR); - if (msg->acknack == I2C_ACKNAK_SENDNAK) - writel(readl(ICR) | ICR_ACKNAK, ICR); - if (msg->acknack == I2C_ACKNAK_SENDACK) - writel(readl(ICR) & ~ICR_ACKNAK, ICR); - writel(readl(ICR) & ~ICR_ALDIE, ICR); - writel(readl(ICR) | ICR_TB, ICR); - - /* transmit register empty? */ - if (!i2c_isr_set_cleared(ISR_ITE,0)) - goto transfer_error_transmit_timeout; - - /* clear 'transmit empty' state */ - writel(readl(ISR) | ISR_ITE, ISR); - - /* wait for ACK from slave */ - if (msg->acknack == I2C_ACKNAK_WAITACK) - if (!i2c_isr_set_cleared(0,ISR_ACKNAK)) - goto transfer_error_ack_missing; - break; - - case I2C_READ: - - /* check if bus is not busy */ - if (!i2c_isr_set_cleared(0,ISR_IBB)) - goto transfer_error_bus_busy; - - /* start receive */ - writel(readl(ICR) & ~ICR_START, ICR); - writel(readl(ICR) & ~ICR_STOP, ICR); - if (msg->condition == I2C_COND_START) - writel(readl(ICR) | ICR_START, ICR); - if (msg->condition == I2C_COND_STOP) - writel(readl(ICR) | ICR_STOP, ICR); - if (msg->acknack == I2C_ACKNAK_SENDNAK) - writel(readl(ICR) | ICR_ACKNAK, ICR); - if (msg->acknack == I2C_ACKNAK_SENDACK) - writel(readl(ICR) & ~ICR_ACKNAK, ICR); - writel(readl(ICR) & ~ICR_ALDIE, ICR); - writel(readl(ICR) | ICR_TB, ICR); - - /* receive register full? */ - if (!i2c_isr_set_cleared(ISR_IRF,0)) - goto transfer_error_receive_timeout; - - msg->data = readl(IDBR); - - /* clear 'receive empty' state */ - writel(readl(ISR) | ISR_IRF, ISR); - - break; - - default: - - goto transfer_error_illegal_param; - - } - - return 0; - -transfer_error_msg_empty: - PRINTD(("i2c_transfer: error: 'msg' is empty\n")); - ret = -1; goto i2c_transfer_finish; - -transfer_error_transmit_timeout: - PRINTD(("i2c_transfer: error: transmit timeout\n")); - ret = -2; goto i2c_transfer_finish; - -transfer_error_ack_missing: - PRINTD(("i2c_transfer: error: ACK missing\n")); - ret = -3; goto i2c_transfer_finish; - -transfer_error_receive_timeout: - PRINTD(("i2c_transfer: error: receive timeout\n")); - ret = -4; goto i2c_transfer_finish; - -transfer_error_illegal_param: - PRINTD(("i2c_transfer: error: illegal parameters\n")); - ret = -5; goto i2c_transfer_finish; - -transfer_error_bus_busy: - PRINTD(("i2c_transfer: error: bus is busy\n")); - ret = -6; goto i2c_transfer_finish; - -i2c_transfer_finish: - PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR)); - i2c_reset(); - return ret; - -} - -/* ------------------------------------------------------------------------ */ -/* API Functions */ -/* ------------------------------------------------------------------------ */ - -void i2c_init(int speed, int slaveaddr) -{ -#ifdef CONFIG_SYS_I2C_INIT_BOARD - /* call board specific i2c bus reset routine before accessing the */ - /* environment, which might be in a chip on that bus. For details */ - /* about this problem see doc/I2C_Edge_Conditions. */ - i2c_init_board(); -#endif -} - - -/** - * i2c_probe: - Test if a chip answers for a given i2c address - * - * @chip: address of the chip which is searched for - * @return: 0 if a chip was found, -1 otherwhise - */ - -int i2c_probe(uchar chip) -{ - struct i2c_msg msg; - - i2c_reset(); - - msg.condition = I2C_COND_START; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = (chip << 1) + 1; - if (i2c_transfer(&msg)) return -1; - - msg.condition = I2C_COND_STOP; - msg.acknack = I2C_ACKNAK_SENDNAK; - msg.direction = I2C_READ; - msg.data = 0x00; - if (i2c_transfer(&msg)) return -1; - - return 0; -} - - -/** - * i2c_read: - Read multiple bytes from an i2c device - * - * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) - * - * @chip: address of the chip which is to be read - * @addr: i2c data address within the chip - * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to write the data - * @len: how much byte do we want to read - * @return: 0 in case of success - */ - -int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) -{ - struct i2c_msg msg; - u8 addr_bytes[3]; /* lowest...highest byte of data address */ - int ret; - - PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len)); - - i2c_reset(); - - /* dummy chip address write */ - PRINTD(("i2c_read: dummy chip address write\n")); - msg.condition = I2C_COND_START; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = (chip << 1); - msg.data &= 0xFE; - if ((ret=i2c_transfer(&msg))) return -1; - - /* - * send memory address bytes; - * alen defines how much bytes we have to send. - */ - /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ - addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); - addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); - addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); - - while (--alen >= 0) { - - PRINTD(("i2c_read: send memory word address byte %1d\n",alen)); - msg.condition = I2C_COND_NORMAL; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = addr_bytes[alen]; - if ((ret=i2c_transfer(&msg))) return -1; - } - - - /* start read sequence */ - PRINTD(("i2c_read: start read sequence\n")); - msg.condition = I2C_COND_START; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = (chip << 1); - msg.data |= 0x01; - if ((ret=i2c_transfer(&msg))) return -1; - - /* read bytes; send NACK at last byte */ - while (len--) { - - if (len==0) { - msg.condition = I2C_COND_STOP; - msg.acknack = I2C_ACKNAK_SENDNAK; - } else { - msg.condition = I2C_COND_NORMAL; - msg.acknack = I2C_ACKNAK_SENDACK; - } - - msg.direction = I2C_READ; - msg.data = 0x00; - if ((ret=i2c_transfer(&msg))) return -1; - - *buffer = msg.data; - PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer)); - buffer++; - - } - - i2c_reset(); - - return 0; -} - - -/** - * i2c_write: - Write multiple bytes to an i2c device - * - * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) - * - * @chip: address of the chip which is to be written - * @addr: i2c data address within the chip - * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to find the data to be written - * @len: how much byte do we want to read - * @return: 0 in case of success - */ - -int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) -{ - struct i2c_msg msg; - u8 addr_bytes[3]; /* lowest...highest byte of data address */ - - PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len)); - - i2c_reset(); - - /* chip address write */ - PRINTD(("i2c_write: chip address write\n")); - msg.condition = I2C_COND_START; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = (chip << 1); - msg.data &= 0xFE; - if (i2c_transfer(&msg)) return -1; - - /* - * send memory address bytes; - * alen defines how much bytes we have to send. - */ - addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); - addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); - addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); - - while (--alen >= 0) { - - PRINTD(("i2c_write: send memory word address\n")); - msg.condition = I2C_COND_NORMAL; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = addr_bytes[alen]; - if (i2c_transfer(&msg)) return -1; - } - - /* write bytes; send NACK at last byte */ - while (len--) { - - PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer)); - - if (len==0) - msg.condition = I2C_COND_STOP; - else - msg.condition = I2C_COND_NORMAL; - - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = *(buffer++); - - if (i2c_transfer(&msg)) return -1; - - } - - i2c_reset(); - - return 0; - -} - -#endif /* CONFIG_HARD_I2C */ diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 052fe36..16308ac 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o +COBJS-$(CONFIG_PXA_I2C) += pxa_i2c.o COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o diff --git a/drivers/i2c/pxa_i2c.c b/drivers/i2c/pxa_i2c.c new file mode 100644 index 0000000..7aa49ae --- /dev/null +++ b/drivers/i2c/pxa_i2c.c @@ -0,0 +1,469 @@ +/* + * (C) Copyright 2000 + * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio(a)tin.it + * + * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2003 Pengutronix e.K. + * Robert Schwebel <r.schwebel(a)pengutronix.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Back ported to the 8xx platform (from the 8260 platform) by + * Murray.Jensen(a)cmst.csiro.au, 27-Jan-01. + */ + +/* FIXME: this file is PXA255 specific! What about other XScales? */ + +#include <common.h> +#include <asm/io.h> + +#ifdef CONFIG_HARD_I2C + +/* + * - CONFIG_SYS_I2C_SPEED + * - I2C_PXA_SLAVE_ADDR + */ + +#include <asm/arch/hardware.h> +#include <asm/arch/pxa-regs.h> +#include <i2c.h> + +/*#define DEBUG_I2C 1 /###* activate local debugging output */ +#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */ + +#if (CONFIG_SYS_I2C_SPEED == 400000) +#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) +#else +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) +#endif + +#define I2C_ISR_INIT 0x7FF + +#ifdef DEBUG_I2C +#define PRINTD(x) printf x +#else +#define PRINTD(x) +#endif + + +/* Shall the current transfer have a start/stop condition? */ +#define I2C_COND_NORMAL 0 +#define I2C_COND_START 1 +#define I2C_COND_STOP 2 + +/* Shall the current transfer be ack/nacked or being waited for it? */ +#define I2C_ACKNAK_WAITACK 1 +#define I2C_ACKNAK_SENDACK 2 +#define I2C_ACKNAK_SENDNAK 4 + +/* Specify who shall transfer the data (master or slave) */ +#define I2C_READ 0 +#define I2C_WRITE 1 + +/* All transfers are described by this data structure */ +struct i2c_msg { + u8 condition; + u8 acknack; + u8 direction; + u8 data; +}; + + +/** + * i2c_pxa_reset: - reset the host controller + * + */ + +static void i2c_reset( void ) +{ + writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */ + writel(readl(ICR) | ICR_UR, ICR); /* reset the unit */ + udelay(100); + writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */ +#ifdef CONFIG_CPU_MONAHANS + /* | CKENB_1_PWM1 | CKENB_0_PWM0); */ + writel(readl(CKENB) | (CKENB_4_I2C), CKENB); +#else /* CONFIG_CPU_MONAHANS */ + /* set the global I2C clock on */ + writel(readl(CKEN) | CKEN14_I2C, CKEN); +#endif + writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */ + writel(I2C_ICR_INIT, ICR); /* set control reg values */ + writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */ + writel(readl(ICR) | ICR_IUE, ICR); /* enable unit */ + udelay(100); +} + + +/** + * i2c_isr_set_cleared: - wait until certain bits of the I2C status register + * are set and cleared + * + * @return: 1 in case of success, 0 means timeout (no match within 10 ms). + */ +static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask ) +{ + int timeout = 10000; + + while( ((ISR & set_mask)!=set_mask) || ((ISR & cleared_mask)!=0) ){ + udelay( 10 ); + if( timeout-- < 0 ) return 0; + } + + return 1; +} + + +/** + * i2c_transfer: - Transfer one byte over the i2c bus + * + * This function can tranfer a byte over the i2c bus in both directions. + * It is used by the public API functions. + * + * @return: 0: transfer successful + * -1: message is empty + * -2: transmit timeout + * -3: ACK missing + * -4: receive timeout + * -5: illegal parameters + * -6: bus is busy and couldn't be aquired + */ +int i2c_transfer(struct i2c_msg *msg) +{ + int ret; + + if (!msg) + goto transfer_error_msg_empty; + + switch(msg->direction) { + + case I2C_WRITE: + + /* check if bus is not busy */ + if (!i2c_isr_set_cleared(0,ISR_IBB)) + goto transfer_error_bus_busy; + + /* start transmission */ + writel(readl(ICR) & ~ICR_START, ICR); + writel(readl(ICR) & ~ICR_STOP, ICR); + writel(msg->data, IDBR); + if (msg->condition == I2C_COND_START) + writel(readl(ICR) | ICR_START, ICR); + if (msg->condition == I2C_COND_STOP) + writel(readl(ICR) | ICR_STOP, ICR); + if (msg->acknack == I2C_ACKNAK_SENDNAK) + writel(readl(ICR) | ICR_ACKNAK, ICR); + if (msg->acknack == I2C_ACKNAK_SENDACK) + writel(readl(ICR) & ~ICR_ACKNAK, ICR); + writel(readl(ICR) & ~ICR_ALDIE, ICR); + writel(readl(ICR) | ICR_TB, ICR); + + /* transmit register empty? */ + if (!i2c_isr_set_cleared(ISR_ITE,0)) + goto transfer_error_transmit_timeout; + + /* clear 'transmit empty' state */ + writel(readl(ISR) | ISR_ITE, ISR); + + /* wait for ACK from slave */ + if (msg->acknack == I2C_ACKNAK_WAITACK) + if (!i2c_isr_set_cleared(0,ISR_ACKNAK)) + goto transfer_error_ack_missing; + break; + + case I2C_READ: + + /* check if bus is not busy */ + if (!i2c_isr_set_cleared(0,ISR_IBB)) + goto transfer_error_bus_busy; + + /* start receive */ + writel(readl(ICR) & ~ICR_START, ICR); + writel(readl(ICR) & ~ICR_STOP, ICR); + if (msg->condition == I2C_COND_START) + writel(readl(ICR) | ICR_START, ICR); + if (msg->condition == I2C_COND_STOP) + writel(readl(ICR) | ICR_STOP, ICR); + if (msg->acknack == I2C_ACKNAK_SENDNAK) + writel(readl(ICR) | ICR_ACKNAK, ICR); + if (msg->acknack == I2C_ACKNAK_SENDACK) + writel(readl(ICR) & ~ICR_ACKNAK, ICR); + writel(readl(ICR) & ~ICR_ALDIE, ICR); + writel(readl(ICR) | ICR_TB, ICR); + + /* receive register full? */ + if (!i2c_isr_set_cleared(ISR_IRF,0)) + goto transfer_error_receive_timeout; + + msg->data = readl(IDBR); + + /* clear 'receive empty' state */ + writel(readl(ISR) | ISR_IRF, ISR); + + break; + + default: + + goto transfer_error_illegal_param; + + } + + return 0; + +transfer_error_msg_empty: + PRINTD(("i2c_transfer: error: 'msg' is empty\n")); + ret = -1; goto i2c_transfer_finish; + +transfer_error_transmit_timeout: + PRINTD(("i2c_transfer: error: transmit timeout\n")); + ret = -2; goto i2c_transfer_finish; + +transfer_error_ack_missing: + PRINTD(("i2c_transfer: error: ACK missing\n")); + ret = -3; goto i2c_transfer_finish; + +transfer_error_receive_timeout: + PRINTD(("i2c_transfer: error: receive timeout\n")); + ret = -4; goto i2c_transfer_finish; + +transfer_error_illegal_param: + PRINTD(("i2c_transfer: error: illegal parameters\n")); + ret = -5; goto i2c_transfer_finish; + +transfer_error_bus_busy: + PRINTD(("i2c_transfer: error: bus is busy\n")); + ret = -6; goto i2c_transfer_finish; + +i2c_transfer_finish: + PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR)); + i2c_reset(); + return ret; + +} + +/* ------------------------------------------------------------------------ */ +/* API Functions */ +/* ------------------------------------------------------------------------ */ + +void i2c_init(int speed, int slaveaddr) +{ +#ifdef CONFIG_SYS_I2C_INIT_BOARD + /* call board specific i2c bus reset routine before accessing the */ + /* environment, which might be in a chip on that bus. For details */ + /* about this problem see doc/I2C_Edge_Conditions. */ + i2c_init_board(); +#endif +} + + +/** + * i2c_probe: - Test if a chip answers for a given i2c address + * + * @chip: address of the chip which is searched for + * @return: 0 if a chip was found, -1 otherwhise + */ + +int i2c_probe(uchar chip) +{ + struct i2c_msg msg; + + i2c_reset(); + + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = (chip << 1) + 1; + if (i2c_transfer(&msg)) return -1; + + msg.condition = I2C_COND_STOP; + msg.acknack = I2C_ACKNAK_SENDNAK; + msg.direction = I2C_READ; + msg.data = 0x00; + if (i2c_transfer(&msg)) return -1; + + return 0; +} + + +/** + * i2c_read: - Read multiple bytes from an i2c device + * + * The higher level routines take into account that this function is only + * called with len < page length of the device (see configuration file) + * + * @chip: address of the chip which is to be read + * @addr: i2c data address within the chip + * @alen: length of the i2c data address (1..2 bytes) + * @buffer: where to write the data + * @len: how much byte do we want to read + * @return: 0 in case of success + */ + +int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) +{ + struct i2c_msg msg; + u8 addr_bytes[3]; /* lowest...highest byte of data address */ + int ret; + + PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len)); + + i2c_reset(); + + /* dummy chip address write */ + PRINTD(("i2c_read: dummy chip address write\n")); + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = (chip << 1); + msg.data &= 0xFE; + if ((ret=i2c_transfer(&msg))) return -1; + + /* + * send memory address bytes; + * alen defines how much bytes we have to send. + */ + /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ + addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); + addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); + addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); + + while (--alen >= 0) { + + PRINTD(("i2c_read: send memory word address byte %1d\n",alen)); + msg.condition = I2C_COND_NORMAL; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = addr_bytes[alen]; + if ((ret=i2c_transfer(&msg))) return -1; + } + + + /* start read sequence */ + PRINTD(("i2c_read: start read sequence\n")); + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = (chip << 1); + msg.data |= 0x01; + if ((ret=i2c_transfer(&msg))) return -1; + + /* read bytes; send NACK at last byte */ + while (len--) { + + if (len==0) { + msg.condition = I2C_COND_STOP; + msg.acknack = I2C_ACKNAK_SENDNAK; + } else { + msg.condition = I2C_COND_NORMAL; + msg.acknack = I2C_ACKNAK_SENDACK; + } + + msg.direction = I2C_READ; + msg.data = 0x00; + if ((ret=i2c_transfer(&msg))) return -1; + + *buffer = msg.data; + PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer)); + buffer++; + + } + + i2c_reset(); + + return 0; +} + + +/** + * i2c_write: - Write multiple bytes to an i2c device + * + * The higher level routines take into account that this function is only + * called with len < page length of the device (see configuration file) + * + * @chip: address of the chip which is to be written + * @addr: i2c data address within the chip + * @alen: length of the i2c data address (1..2 bytes) + * @buffer: where to find the data to be written + * @len: how much byte do we want to read + * @return: 0 in case of success + */ + +int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) +{ + struct i2c_msg msg; + u8 addr_bytes[3]; /* lowest...highest byte of data address */ + + PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len)); + + i2c_reset(); + + /* chip address write */ + PRINTD(("i2c_write: chip address write\n")); + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = (chip << 1); + msg.data &= 0xFE; + if (i2c_transfer(&msg)) return -1; + + /* + * send memory address bytes; + * alen defines how much bytes we have to send. + */ + addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); + addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); + addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); + + while (--alen >= 0) { + + PRINTD(("i2c_write: send memory word address\n")); + msg.condition = I2C_COND_NORMAL; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = addr_bytes[alen]; + if (i2c_transfer(&msg)) return -1; + } + + /* write bytes; send NACK at last byte */ + while (len--) { + + PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer)); + + if (len==0) + msg.condition = I2C_COND_STOP; + else + msg.condition = I2C_COND_NORMAL; + + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = *(buffer++); + + if (i2c_transfer(&msg)) return -1; + + } + + i2c_reset(); + + return 0; + +} + +#endif /* CONFIG_HARD_I2C */ diff --git a/include/configs/innokom.h b/include/configs/innokom.h index d8fcbdb..57d633c 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -140,6 +140,7 @@ /* * I2C bus */ +#define CONFIG_PXA_I2C 1 #define CONFIG_HARD_I2C 1 #define CONFIG_SYS_I2C_SPEED 50000 #define CONFIG_SYS_I2C_SLAVE 0xfe diff --git a/include/configs/xm250.h b/include/configs/xm250.h index 497cb91..7a7c539 100644 --- a/include/configs/xm250.h +++ b/include/configs/xm250.h @@ -61,6 +61,7 @@ /* * I2C bus */ +#define CONFIG_PXA_I2C 1 #define CONFIG_HARD_I2C 1 #define CONFIG_SYS_I2C_SPEED 50000 #define CONFIG_SYS_I2C_SLAVE 0xfe -- 1.7.0.4

9 122

[U-Boot] [PATCH] tools/env: fix redundant env flag comparison
by Jon Povey 21 Apr '11

21 Apr '11

This fixes two bugs with comparison of redundant environment flags on read. flag0 and flag1 in fw_env_open() were declared signed instead of unsigned char breaking BOOLEAN mode "== 0xFF" tests and in INCREMENTAL mode the wrong environment would be chosen where the flag values are 127 and 128 (either way round). With both flags over 128, both signs flipped and the logic worked by happy accident. Also there was a logic bug in the INCREMENTAL test (after signedness was fixed) in the case flag0=0, flag1=255, env 1 would be incorrectly chosen. Fix both of these. Signed-off-by: Jon Povey <jon.povey(a)racelogic.co.uk> --- After my gripe yesterday, something more constructive: I confirmed these bugs with a little test program in C, can send that if anyone wants it. At a glance it looks like the main u-boot env handling does not have these bugs. tools/env/fw_env.c | 13 ++++++------- 1 files changed, 6 insertions(+), 7 deletions(-) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 8ff7052..315d7ce 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -1067,11 +1067,11 @@ static char *envmatch (char * s1, char * s2) int fw_env_open(void) { int crc0, crc0_ok; - char flag0; + unsigned char flag0; void *addr0; int crc1, crc1_ok; - char flag1; + unsigned char flag1; void *addr1; struct env_image_single *single; @@ -1182,14 +1182,13 @@ int fw_env_open(void) } break; case FLAG_INCREMENTAL: - if ((flag0 == 255 && flag1 == 0) || - flag1 > flag0) + if (flag0 == 255 && flag1 == 0) dev_current = 1; else if ((flag1 == 255 && flag0 == 0) || - flag0 > flag1) - dev_current = 0; - else /* flags are equal - almost impossible */ + flag0 >= flag1) dev_current = 0; + else /* flag1 > flag0 */ + dev_current = 1; break; default: fprintf (stderr, "Unknown flag scheme %u \n", -- 1.6.3.3

2 1

[U-Boot] [PATCH 0/5] Add target EDOSK2674
by Yoshinori Sato 21 Apr '11

21 Apr '11

Hi lists, This patches added new target EDOSK2674. Please comments. Thanks. Yoshinori Sato (5): Add h8300 architecture part1 - core Add h8300 architecture part2 - headers Add h8300 architecture part3 - misc standard SCI support Add target edosk2674 arch/h8300/config.mk | 35 +++++++ arch/h8300/cpu/h8300s/Makefile | 53 ++++++++++ arch/h8300/cpu/h8300s/config.mk | 26 +++++ arch/h8300/cpu/h8300s/cpu.c | 83 +++++++++++++++ arch/h8300/cpu/h8300s/interrupts.c | 38 +++++++ arch/h8300/cpu/h8300s/start.S | 87 ++++++++++++++++ arch/h8300/cpu/h8300s/watchdog.c | 36 +++++++ arch/h8300/include/asm/bitops.h | 186 ++++++++++++++++++++++++++++++++++ arch/h8300/include/asm/byteorder.h | 6 + arch/h8300/include/asm/config.h | 26 +++++ arch/h8300/include/asm/global_data.h | 55 ++++++++++ arch/h8300/include/asm/io.h | 178 ++++++++++++++++++++++++++++++++ arch/h8300/include/asm/posix_types.h | 123 ++++++++++++++++++++++ arch/h8300/include/asm/processor.h | 4 + arch/h8300/include/asm/ptrace.h | 64 ++++++++++++ arch/h8300/include/asm/string.h | 41 ++++++++ arch/h8300/include/asm/types.h | 62 +++++++++++ arch/h8300/include/asm/u-boot.h | 41 ++++++++ arch/h8300/include/asm/unaligned.h | 10 ++ arch/h8300/lib/Makefile | 43 ++++++++ arch/h8300/lib/board.c | 158 +++++++++++++++++++++++++++++ arch/h8300/lib/bootm.c | 70 +++++++++++++ arch/h8300/lib/time.c | 87 ++++++++++++++++ board/edosk2674/Makefile | 48 +++++++++ board/edosk2674/config.mk | 25 +++++ board/edosk2674/edosk2674.c | 63 ++++++++++++ board/edosk2674/lowlevel_init.S | 84 +++++++++++++++ board/edosk2674/u-boot.lds | 84 +++++++++++++++ boards.cfg | 1 + common/cmd_bdinfo.c | 20 ++++ common/cmd_bootm.c | 2 + drivers/net/lan91c96.h | 21 ++++ drivers/serial/serial_sh.c | 74 ++++++++++++-- drivers/serial/serial_sh.h | 93 ++++++----------- examples/standalone/Makefile | 3 +- examples/standalone/stubs.c | 20 ++++- include/configs/edosk2674.h | 104 +++++++++++++++++++ include/image.h | 5 + 38 files changed, 2086 insertions(+), 73 deletions(-) create mode 100644 arch/h8300/config.mk create mode 100644 arch/h8300/cpu/h8300s/Makefile create mode 100644 arch/h8300/cpu/h8300s/config.mk create mode 100644 arch/h8300/cpu/h8300s/cpu.c create mode 100644 arch/h8300/cpu/h8300s/interrupts.c create mode 100644 arch/h8300/cpu/h8300s/start.S create mode 100644 arch/h8300/cpu/h8300s/watchdog.c create mode 100644 arch/h8300/include/asm/bitops.h create mode 100644 arch/h8300/include/asm/byteorder.h create mode 100644 arch/h8300/include/asm/config.h create mode 100644 arch/h8300/include/asm/global_data.h create mode 100644 arch/h8300/include/asm/io.h create mode 100644 arch/h8300/include/asm/posix_types.h create mode 100644 arch/h8300/include/asm/processor.h create mode 100644 arch/h8300/include/asm/ptrace.h create mode 100644 arch/h8300/include/asm/string.h create mode 100644 arch/h8300/include/asm/types.h create mode 100644 arch/h8300/include/asm/u-boot.h create mode 100644 arch/h8300/include/asm/unaligned.h create mode 100644 arch/h8300/lib/Makefile create mode 100644 arch/h8300/lib/board.c create mode 100644 arch/h8300/lib/bootm.c create mode 100644 arch/h8300/lib/time.c create mode 100644 board/edosk2674/Makefile create mode 100644 board/edosk2674/config.mk create mode 100644 board/edosk2674/edosk2674.c create mode 100644 board/edosk2674/lowlevel_init.S create mode 100644 board/edosk2674/u-boot.lds create mode 100644 include/configs/edosk2674.h -- 1.7.2.3

2 1

[U-Boot] [PATCH] BeagleBoard: Added LED driver
by Jason Kridner 21 Apr '11

21 Apr '11

Added LED driver using status_led. USR0 is set to monitor the boot status. USR1 is set to be the green LED. Included adding configuration and command to the default configuration. Signed-off-by: Jason Kridner <jkridner(a)beagleboard.org> --- board/ti/beagle/Makefile | 4 +- board/ti/beagle/beagle.c | 7 +++ board/ti/beagle/led.c | 91 ++++++++++++++++++++++++++++++++++++++++ include/configs/omap3_beagle.h | 13 ++++++ 4 files changed, 114 insertions(+), 1 deletions(-) create mode 100644 board/ti/beagle/led.c diff --git a/board/ti/beagle/Makefile b/board/ti/beagle/Makefile index 3b4aaac..d9f445f 100644 --- a/board/ti/beagle/Makefile +++ b/board/ti/beagle/Makefile @@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS := beagle.o +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_STATUS_LED) += led.o +COBJS := $(sort $(COBJS-y)) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 93c452e..dd7b6b5 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -30,6 +30,9 @@ * MA 02111-1307 USA */ #include <common.h> +#ifdef CONFIG_STATUS_LED +#include <status_led.h> +#endif #include <twl4030.h> #include <asm/io.h> #include <asm/arch/mmc_host_def.h> @@ -78,6 +81,10 @@ int board_init(void) /* boot param addr */ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); +#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) + status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); +#endif + return 0; } diff --git a/board/ti/beagle/led.c b/board/ti/beagle/led.c new file mode 100644 index 0000000..df26552 --- /dev/null +++ b/board/ti/beagle/led.c @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2010 Texas Instruments, Inc. + * Jason Kridner <jkridner(a)beagleboard.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <status_led.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> + +static unsigned int saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF}; + +/* GPIO pins for the LEDs */ +#define BEAGLE_LED_USR0 149 +#define BEAGLE_LED_USR1 150 + +#ifdef STATUS_LED_GREEN +void green_LED_off (void) +{ + __led_set (STATUS_LED_GREEN, 0); +} + +void green_LED_on (void) +{ + __led_set (STATUS_LED_GREEN, 1); +} +#endif + +void __led_init (led_id_t mask, int state) +{ + __led_set (mask, state); +} + +void __led_toggle (led_id_t mask) +{ +#ifdef STATUS_LED_BIT + if (STATUS_LED_BIT & mask) { + if (STATUS_LED_ON == saved_state[0]) + __led_set(STATUS_LED_BIT, 0); + else + __led_set(STATUS_LED_BIT, 1); + } +#endif +#ifdef STATUS_LED_BIT1 + if (STATUS_LED_BIT1 & mask) { + if (STATUS_LED_ON == saved_state[1]) + __led_set(STATUS_LED_BIT1, 0); + else + __led_set(STATUS_LED_BIT1, 1); + } +#endif +} + +void __led_set (led_id_t mask, int state) +{ +#ifdef STATUS_LED_BIT + if (STATUS_LED_BIT & mask) { + if (!omap_request_gpio(BEAGLE_LED_USR0)) { + omap_set_gpio_direction(BEAGLE_LED_USR0, 0); + omap_set_gpio_dataout(BEAGLE_LED_USR0, state); + } + saved_state[0] = state; + } +#endif +#ifdef STATUS_LED_BIT1 + if (STATUS_LED_BIT1 & mask) { + if (!omap_request_gpio(BEAGLE_LED_USR1)) { + omap_set_gpio_direction(BEAGLE_LED_USR1, 0); + omap_set_gpio_dataout(BEAGLE_LED_USR1, state); + } + saved_state[1] = state; + } +#endif +} + diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 56363f7..6527cd9 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -108,6 +108,18 @@ #define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 +/* Status LED */ +#define CONFIG_STATUS_LED 1 +#define CONFIG_BOARD_SPECIFIC_LED 1 +#define STATUS_LED_BIT 0x01 +#define STATUS_LED_STATE STATUS_LED_ON +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT1 0x02 +#define STATUS_LED_STATE1 STATUS_LED_ON +#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BOOT STATUS_LED_BIT +#define STATUS_LED_GREEN STATUS_LED_BIT1 + /* DDR - I use Micron DDR */ #define CONFIG_OMAP3_MICRON_DDR 1 @@ -138,6 +150,7 @@ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_LED /* LED support */ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -- 1.5.6.4

4 3