April 2011 - U-Boot

[U-Boot] [PATCH] [U-BOOT] Zoom2: Ethernet: Enabling LAN9221 chip and CMD_NET.
by Aldo Brett Cedillo Martinez 06 Sep '12

06 Sep '12

Configures GPMC, adds macros to enable net commands, and adds proper initialization to board_eth_init function. I have a similar patch to enable ethernet in zoom3 after initial support patch. Signed-off-by: Aldo Brett Cedillo Martinez <aldo.cedillo(a)ti.com> --- board/logicpd/zoom2/zoom2.c | 21 +++++++++++++++++++++ include/configs/omap3_zoom2.h | 10 +++++++++- 2 files changed, 30 insertions(+), 1 deletions(-) diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c index e9f6625..54d3e9f 100644 --- a/board/logicpd/zoom2/zoom2.c +++ b/board/logicpd/zoom2/zoom2.c @@ -60,6 +60,16 @@ static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = { 0x1D0904C4, 0 }; +/* Ethernet GPMC configuration */ +static u32 gpmc_eth[GPMC_MAX_REG] = { + NET_GPMC_CONFIG1, + NET_GPMC_CONFIG2, + NET_GPMC_CONFIG3, + NET_GPMC_CONFIG4, + NET_GPMC_CONFIG5, + NET_GPMC_CONFIG6, 0 +}; + /* Used to track the revision of the board */ static zoom2_revision revision = ZOOM2_REVISION_UNKNOWN; @@ -130,6 +140,12 @@ int board_init (void) enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[3], SERIAL_TL16CP754C_BASE, GPMC_SIZE_16M); +#ifdef CONFIG_CMD_NET + gpmc_config = gpmc_eth; + enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[7], + CONFIG_SMC911X_BASE, GPMC_SIZE_16M); +#endif /* (CONFIG_CMD_NET) */ + /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; /* boot param addr */ @@ -186,6 +202,11 @@ int board_eth_init(bd_t *bis) #ifdef CONFIG_LAN91C96 rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE); #endif + +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; } #endif diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index eef95fe..c66d571 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -154,7 +154,7 @@ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMI /* iminfo */ #undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ #define CONFIG_SYS_NO_FLASH @@ -165,6 +165,14 @@ #define CONFIG_SYS_I2C_BUS_SELECT 1 #define CONFIG_DRIVER_OMAP34XX_I2C 1 +/* Ethernet */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 +#endif /* (CONFIG_CMD_NET) */ + /* * TWL4030 */ -- 1.6.3.3

3 3

[U-Boot] cfi: Problem with Intel Strata 28F320 flash
by Heiko Schocher 03 Aug '12

03 Aug '12

Hello, as I am actual trying to get the keymile boards in sync with actual mainline u-boot, I faced the following Problem with an Intel Strata Flash on the mgcoge (mpc8247 based board): I couldn;t unprotect/erase/write/protect some (not all!) Flash sectors. For Example, I could do this without errors on the sectors where u-boot sits (First three sectors), but not with the environment (next two sectors)! After some debugging, I found out, that, if I revert commit commit 54652991caedc39b2ec2e5b49e750669bfcd1e2e Author: Philippe De Muyter <phdm(a)macqel.be> Date: Tue Aug 17 18:40:25 2010 +0200 Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips. I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30 256-Mbit 65nm flash chips. After some time :( searching for bugs in our board or soft, we have discovered that those chips have a small but annoying bug, documented in "Numonyx Axcell P33/P30 256-Mbit Specification Update" [...] It works again fine, and without problems ... did somebody faced similiar issues with the cfi driver? Some Ideas? bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

5 7

[U-Boot] building tools/env
by Steve DeLaney 24 Jul '12

24 Jul '12

hi there, I'm attempting to build u-boot 1.1.1 tools/env and the build is failed. Any ideas on best way to enable it in the build. Here's what I did so far first, update tools/Makefile TOOLSUBDIRS = env then top level build make clobber mrproper make octeon_cn3010_evb_hs5_config make all the build in tools/env fails due to missing include files linux/mtd/mtd.h zlib.h add to tools/env/Makefile CPPFLAGS += ../../include and include CPPFLAGS here: fw_printenv : $(SOURCES) $(HEADERS) $(CROSS_COMPILE)gcc -Wall $(CPPFLAGS) -DUSE_HOSTCC $(SOURCES) -o fw_printenv but this leads to build error on definitions of uint32_t, phys_addr_t and erase_info_t Any ideas on preferred way to build tools/env? thanks in advance!

4 3

[U-Boot] [PATCH 2/2] P4080/PBL: add tool to support pbl image build.
by Shaohui Xie 04 Jun '12

04 Jun '12

The tool can build u-boot image which can be used by PBL, run "make P4080DS_RAMBOOT_PBL" can make all works done, the default output image is u-boot.pbl, for more details please refer to doc/README.pblimage. Signed-off-by: Shaohui Xie <b21989(a)freescale.com> --- Makefile | 5 + board/freescale/corenet_ds/config.mk | 26 +++ board/freescale/corenet_ds/pblimage.cfg | 59 ++++++ common/image.c | 1 + doc/README.pblimage | 83 ++++++++ include/image.h | 1 + tools/Makefile | 2 + tools/mkimage.c | 5 + tools/mkimage.h | 2 + tools/pblimage.c | 329 +++++++++++++++++++++++++++++++ tools/pblimage.h | 36 ++++ 11 files changed, 549 insertions(+), 0 deletions(-) create mode 100644 board/freescale/corenet_ds/config.mk create mode 100644 board/freescale/corenet_ds/pblimage.cfg create mode 100644 doc/README.pblimage create mode 100644 tools/pblimage.c create mode 100644 tools/pblimage.h diff --git a/Makefile b/Makefile index dc2e3d8..ca6078e 100644 --- a/Makefile +++ b/Makefile @@ -361,6 +361,10 @@ $(obj)u-boot.kwb: $(obj)u-boot.bin $(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@ +$(obj)u-boot.pbl: $(obj)u-boot.bin + $(obj)tools/mkimage -n $(PBL_CONFIG) -T pblimage \ + -d $< $@ + $(obj)u-boot.sha1: $(obj)u-boot.bin $(obj)tools/ubsha1 $(obj)u-boot.bin @@ -1156,6 +1160,7 @@ clobber: clean $(obj)cscope.* $(obj)*.*~ @rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL) @rm -f $(obj)u-boot.kwb + @rm -f $(obj)u-boot.pbl @rm -f $(obj)u-boot.imx @rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes} @rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c diff --git a/board/freescale/corenet_ds/config.mk b/board/freescale/corenet_ds/config.mk new file mode 100644 index 0000000..c94938f --- /dev/null +++ b/board/freescale/corenet_ds/config.mk @@ -0,0 +1,26 @@ +# +# Copyright 2011 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +ifeq ($(CONFIG_RAMBOOT_PBL), y) +PBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/pblimage.cfg +ALL += $(obj)u-boot.pbl +endif diff --git a/board/freescale/corenet_ds/pblimage.cfg b/board/freescale/corenet_ds/pblimage.cfg new file mode 100644 index 0000000..96c55ee --- /dev/null +++ b/board/freescale/corenet_ds/pblimage.cfg @@ -0,0 +1,59 @@ +# +# Copyright 2011 Freescale Semiconductor, Inc. +# Written-by: Shaohui Xie<b21989(a)freescale.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.pblimage for more details about how-to configure +# and create PBL boot image +# + +#PBL preamble and RCW header +aa55aa55 010e0100 +#64 bytes RCW data +4c580000 00000000 18185218 0000cccc +40464000 3c3c2000 58000000 61000000 +00000000 00000000 00000000 008b6000 +00000000 00000000 00000000 00000000 + +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +09010100 00000000 +09010104 fff0000b +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff00000 +09000d08 81000013 +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Initialize eSPI controller +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000 diff --git a/common/image.c b/common/image.c index f63a2ff..76e493d 100644 --- a/common/image.c +++ b/common/image.c @@ -141,6 +141,7 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_FLATDT, "flat_dt", "Flat Device Tree", }, { IH_TYPE_KWBIMAGE, "kwbimage", "Kirkwood Boot Image",}, { IH_TYPE_IMXIMAGE, "imximage", "Freescale i.MX Boot Image",}, + { IH_TYPE_PBLIMAGE, "pblimage", "Freescale PBL Boot Image",}, { -1, "", "", }, }; diff --git a/doc/README.pblimage b/doc/README.pblimage new file mode 100644 index 0000000..e7ebea0 --- /dev/null +++ b/doc/README.pblimage @@ -0,0 +1,83 @@ +------------------------------------------------------------------ +Freescale PBL(pre-boot loader) Boot Image generation using mkimage +------------------------------------------------------------------ + +This document describes the U-Boot feature as it +is implemented for the Freescale P4080. + +The P4080 SoC's can boot directly from eSPI FLASH. + +for more details refer section 5 Pre-boot loader specifications. + +Building PBL boot image and boot steps +-------------------------------------- + +1. To build the PBL boot image for P4080DS: + make P4080DS_RAMBOOT_PBL + The default image is u-boot.pbl. + +2. Command below provided a way to re-build the PBL boot image if the +configuration file needes to be modified while the u-boot.bin does not +need to be re-build. + +Command syntax: +-------------- +./tools/mkimage -n <board specific configuration file> \ + -T pblimage -d <input_raw_binary> <output_pblboot_file> + +for ex. +./tools/mkimage -n ./board/freescale/corenet_ds/pblimage.cfg \ + -T pblimage -d u-boot.bin u-boot.pbl + + +3. pblimage support available with mkimage utility will generate Freescale PBL +boot image that can be flashed on the board eSPI flash. After flashed the +image u-boot.pbl, Change SW1[2] = off, then power on, board will boot from +eSPI flash. + +Board specific configuration file specifications: +------------------------------------------------ +1. This file must present in the $(BOARDDIR) and the name should be + pblimage.cfg (since this is used in Makefile) +2. This file can have empty lines and lines starting with "#" as first + character to put comments + +Typical example of pblimage.cfg file: +----------------------------------- + +#PBL preamble and RCW header +aa55aa55 010e0100 +#64 bytes RCW data +4c580000 00000000 18185218 0000cccc +40464000 3c3c2000 58000000 61000000 +00000000 00000000 00000000 008b6000 +00000000 00000000 00000000 00000000 + +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +09010100 00000000 +09010104 fff0000b +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff00000 +09000d08 81000013 +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Initialize eSPI controller +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000 + +------------------------------------------------ +Author: Shaohui Xie<b21989(a)freescale.com> diff --git a/include/image.h b/include/image.h index 005e0d2..56b849e 100644 --- a/include/image.h +++ b/include/image.h @@ -157,6 +157,7 @@ #define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */ #define IH_TYPE_KWBIMAGE 9 /* Kirkwood Boot Image */ #define IH_TYPE_IMXIMAGE 10 /* Freescale IMXBoot Image */ +#define IH_TYPE_PBLIMAGE 11 /* Freescale PBLBoot Image */ /* * Compression Types diff --git a/tools/Makefile b/tools/Makefile index 623f908..c068bc0 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -83,6 +83,7 @@ OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o OBJ_FILES-$(CONFIG_INCA_IP) += inca-swap-bytes.o NOPED_OBJ_FILES-y += kwbimage.o +NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y += imximage.o NOPED_OBJ_FILES-y += mkimage.o OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o @@ -181,6 +182,7 @@ $(obj)mkimage$(SFX): $(obj)crc32.o \ $(obj)image.o \ $(obj)imximage.o \ $(obj)kwbimage.o \ + $(obj)pblimage.o \ $(obj)md5.o \ $(obj)mkimage.o \ $(obj)os_support.o \ diff --git a/tools/mkimage.c b/tools/mkimage.c index f5859d7..a3e793a 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -149,6 +149,8 @@ main (int argc, char **argv) int retval = 0; struct image_type_params *tparams = NULL; + /* Init Freescale PBL Boot image generation/list support */ + init_pbl_image_type(); /* Init Kirkwood Boot image generation/list support */ init_kwb_image_type (); /* Init Freescale imx Boot image generation/list support */ @@ -421,6 +423,9 @@ NXTARG: ; break; } } + } else if (params.type == IH_TYPE_PBLIMAGE) { + /* the copy_file need to be re-write for PBL. */ + pbl_load_uboot(ifd, &params); } else { copy_file (ifd, params.datafile, 0); } diff --git a/tools/mkimage.h b/tools/mkimage.h index 9033a7d..597dcaf 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -139,6 +139,8 @@ void mkimage_register (struct image_type_params *tparams); * * Supported image types init functions */ +void pbl_load_uboot(int, struct mkimage_params *); +void init_pbl_image_type(void); void init_kwb_image_type (void); void init_imx_image_type (void); void init_default_image_type (void); diff --git a/tools/pblimage.c b/tools/pblimage.c new file mode 100644 index 0000000..d0c29a6 --- /dev/null +++ b/tools/pblimage.c @@ -0,0 +1,329 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#define _GNU_SOURCE + +#include "mkimage.h" +#include <image.h> +#include "pblimage.h" + +/* + * PBL can load 64 bytes each time in MAX, so the u-boot need to be splited into + * pieces of 64 bytes, PBL needs a command for each piece, the command looks + * like 81xxxxxx, the "xxxxxx" is offset, it starts from F80000 in our case. + */ +static unsigned int uboot_label = 0x81F80000; +/* + * need to store all bytes in memory for calculating crc32, then write the + * bytes to image file for PBL boot. + */ +static unsigned char mem_buf[600000]; +static unsigned char *pmem_buf = mem_buf; +static int mem_byte_cnt; +static char *fname = "Unknown"; +static int lineno = -1; +static struct pbl_header pblimage_header; + +static union +{ + char c[4]; + unsigned char l; +} endian_test = { {'l', '?', '?', 'b'} }; + +#define ENDIANNESS ((char)endian_test.l) + +static void generate_pbl_cmd(void) +{ + unsigned int val = uboot_label; + uboot_label += 0x40; + int i; + + for (i = 3; i >= 0; i--) { + *pmem_buf++ = (val >> (i * 8)) & 0xff; + mem_byte_cnt++; + } +} + +static void pbl_fget(size_t size, FILE *stream) +{ + unsigned char c; + while (size) { + c = (unsigned char)fgetc(stream); + *pmem_buf++ = c; + mem_byte_cnt++; + size--; + } +} + +/* load splited u-boot with PBI command 81xxxxxx. */ +static void load_uboot(FILE *fp_uboot) +{ + while (uboot_label < 0x82000000) { + generate_pbl_cmd(); + pbl_fget(64, fp_uboot); + } +} + +static void check_get_hexval(char *token) +{ + uint32_t hexval; + int i; + + if (!sscanf(token, "%x", &hexval)) { + printf("Error:%s[%d] - Invalid hex data(%s)\n", fname, + lineno, token); + exit(EXIT_FAILURE); + } + for (i = 3; i >= 0; i--) { + *pmem_buf++ = (hexval >> (i * 8)) & 0xff; + mem_byte_cnt++; + } +} + +static void pbl_parser(char *name) +{ + FILE *fd = NULL; + char *line = NULL; + char *token, *saveptr1, *saveptr2; + size_t len = 0; + + fname = name; + fd = fopen(name, "r"); + if (fd == NULL) { + printf("Error:%s - Can't open\n", fname); + exit(EXIT_FAILURE); + } + + while ((getline(&line, &len, fd)) > 0) { + lineno++; + token = strtok_r(line, "\r\n", &saveptr1); + /* drop all lines with zero tokens (= empty lines) */ + if (token == NULL) + continue; + for (line = token;; line = NULL) { + token = strtok_r(line, " \t", &saveptr2); + if (token == NULL) + break; + /* Drop all text starting with '#' as comments */ + if (token[0] == '#') + break; + check_get_hexval(token); + } + } + if (line) + free(line); + fclose(fd); +} + +static uint32_t crc_table[256]; + +static void make_crc_table(void) +{ + uint32_t mask; + int i, j; + uint32_t poly; /* polynomial exclusive-or pattern */ + + /* + * the polynomial used by PBL is 1 + x1 + x2 + x4 + x5 + x7 + x8 + x10 + * + x11 + x12 + x16 + x22 + x23 + x26 + x32. + */ + poly = 0x04c11db7; + + for (i = 0; i < 256; i++) { + mask = i << 24; + for (j = 0; j < 8; j++) { + if (mask & 0x80000000) + mask = (mask << 1) ^ poly; + else + mask <<= 1; + } + crc_table[i] = mask; + } +} + +unsigned long pbl_crc32(unsigned long crc, const char *buf, unsigned int len) +{ + unsigned int crc32_val = 0xffffffff; + unsigned int xor = 0x0; + int i; + + make_crc_table(); + + for (i = 0; i < len; i++) + crc32_val = (crc32_val << 8) ^ + crc_table[(crc32_val >> 24) ^ (*buf++ & 0xff)]; + + crc32_val = crc32_val ^ xor; + if (crc32_val < 0) { + crc32_val += 0xffffffff; + crc32_val += 1; + } + return crc32_val; +} + +static unsigned int reverse_byte(unsigned int val) +{ + unsigned int temp; + unsigned char *p1; + int j; + + temp = val; + p1 = (unsigned char *)&temp; + for (j = 3; j >= 0; j--) + *p1++ = (val >> (j * 8)) & 0xff; + return temp; +} + +/* write end command and crc command to memory. */ +static void add_end_cmd(void) +{ + unsigned int pbl_end_cmd[4] = {0x09138000, 0x00000000, + 0x091380c0, 0x00000000}; + unsigned int crc32_pbl; + int i; + unsigned char *p = (unsigned char *)&pbl_end_cmd; + + if (ENDIANNESS == 'l') { + for (i = 0; i < 4; i++) + pbl_end_cmd[i] = reverse_byte(pbl_end_cmd[i]); + } + + for (i = 0; i < 16; i++) { + *pmem_buf++ = *p++; + mem_byte_cnt++; + } + + /* Add PBI CRC command. */ + *pmem_buf++ = 0x08; + *pmem_buf++ = 0x13; + *pmem_buf++ = 0x80; + *pmem_buf++ = 0x40; + mem_byte_cnt += 4; + + /* calculated CRC32 and write it to memory. */ + crc32_pbl = pbl_crc32(0, (const char *)mem_buf, mem_byte_cnt); + *pmem_buf++ = (crc32_pbl >> 24) & 0xff; + *pmem_buf++ = (crc32_pbl >> 16) & 0xff; + *pmem_buf++ = (crc32_pbl >> 8) & 0xff; + *pmem_buf++ = (crc32_pbl) & 0xff; + mem_byte_cnt += 4; + + if (((mem_byte_cnt) % 16) != 0) { + for (i = 0; i < 8; i++) { + *pmem_buf++ = 0x0; + mem_byte_cnt++; + } + } + if ((mem_byte_cnt % 16 != 0)) { + printf("Error: Bad size of image file\n"); + exit(EXIT_FAILURE); + } + +} + +void pbl_load_uboot(int ifd, struct mkimage_params *params) +{ + FILE *fp_uboot; + int size; + + /* parse the pblimage.cfg file. */ + pbl_parser(params->imagename); + + fp_uboot = fopen(params->datafile, "r"); + if (fp_uboot == NULL) { + printf("Error: %s open failed\n", params->datafile); + exit(EXIT_FAILURE); + } + + load_uboot(fp_uboot); + add_end_cmd(); + fclose(fp_uboot); + lseek(ifd, 0, SEEK_SET); + + size = mem_byte_cnt; + if (write(ifd, (const void *)&mem_buf, size) != size) { + fprintf(stderr, "Write error on %s: %s\n", + params->imagefile, strerror(errno)); + exit(EXIT_FAILURE); + } +} + +static int pblimage_check_image_types(uint8_t type) +{ + if (type == IH_TYPE_PBLIMAGE) + return EXIT_SUCCESS; + else + return EXIT_FAILURE; +} + +static int pblimage_verify_header(unsigned char *ptr, int image_size, + struct mkimage_params *params) +{ + + struct pbl_header *pbl_hdr = (struct pbl_header *) ptr; + + /* Only a few checks can be done: search for magic numbers */ + if (ENDIANNESS == 'l') { + if (pbl_hdr->preamble != reverse_byte(RCW_PREAMBLE)) + return -FDT_ERR_BADSTRUCTURE; + + if (pbl_hdr->rcwheader != reverse_byte(RCW_HEADER)) + return -FDT_ERR_BADSTRUCTURE; + } else { + if (pbl_hdr->preamble != RCW_PREAMBLE) + return -FDT_ERR_BADSTRUCTURE; + + if (pbl_hdr->rcwheader != RCW_HEADER) + return -FDT_ERR_BADSTRUCTURE; + } + + return 0; +} + +static void pblimage_print_header(const void *ptr) +{ + printf("Image Type: Freescale pbl Boot Image\n"); +} + +static void pblimage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + /*nothing need to do, pbl_load_uboot takes care of whole file. */ +} + +/* + * pblimage parameters + */ +static struct image_type_params pblimage_params = { + .name = "Freescale PBL Boot Image support", + .header_size = sizeof(struct pbl_header), + .hdr = (void *)&pblimage_header, + .check_image_type = pblimage_check_image_types, + .verify_header = pblimage_verify_header, + .print_header = pblimage_print_header, + .set_header = pblimage_set_header, +}; + +void init_pbl_image_type(void) +{ + mem_byte_cnt = 0; + mkimage_register(&pblimage_params); +} diff --git a/tools/pblimage.h b/tools/pblimage.h new file mode 100644 index 0000000..887d4c9 --- /dev/null +++ b/tools/pblimage.h @@ -0,0 +1,36 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _PBLIMAGE_H_ +#define _PBLIMAGE_H_ + +#define RCW_BYTES 64 +#define RCW_PREAMBLE 0xaa55aa55 +#define RCW_HEADER 0x010e0100 + +struct pbl_header { + uint32_t preamble; + uint32_t rcwheader; + uint8_t rcw_data[RCW_BYTES]; +}; + +#endif /* _PBLIMAGE_H_ */ -- 1.6.4

3 2

[U-Boot-Users] U boot modification...
by Kiran Jammula 23 May '12

23 May '12

Hi, I am using U boot for my project. I need to configure the console while booting by prompting the user from target board LCD and Keypad. So please let me know which file of the U-boot I have to modify to achieve this. Kiran _________________________________________________________________ Special offer for NRIs! http://creative.mediaturf.net/creatives/citibankrca/rca_msntagofline.htm Get a zero balance account for next 20 years. From Citibank

4 5

[U-Boot-Users] Ethernet loopback command
by Thomas Schäfer 17 Apr '12

17 Apr '12

Hi, The patch attached provides a command called 'ethloop' which allows to perform loopback testing on the current eth device. To achieve this, a new ethernet packet type (PROT_TEST, 0x0808, AFAIK this is not used otherwise) is introduced in net/net.c. The patch is against SF CVS from 20050307. The functions EthLoopStart, EthLoopSend and EthLoopHandler generate a simple ethernet frame with NetOurEther as destination address and packet type PROT_TEST. The looped back package is compared with the original one and a message is displayed. It is necessary to set the ethernet line into loopback mode either by programming the PHY or using a loopback plug. I've tested this on our PPC405 custom board, but it should also work on all other systems because packet generation is independent of the underlying ethernet hardware. Example usage: => mii w 0 0 7100 <-- sets PHY into loopback mode => ethloop Using ppc_405x_eth0 device Got ethernet loopback frame, len=64 loopback test successfully completed => mii w 0 0 8000 <-- PHY reset after test is completed Maybe this is also useful for others.. Best regards, Thomas Schäfer ____________________________________ Kontron Modular Computers GmbH Konrad-Zuse-Str. 9 66115 Saarbrücken Tel.: + 49 (0)681 / 95916 - 203 Fax: + 49 (0)681 / 95916 - 100 E-mail: thomas.schaefer(a)kontron.com

5 5

[U-Boot] [PATCH] MIPS: Add initial support for EMMA3SL/LP
by Serge Ziryukin 03 Apr '12

03 Apr '12

This patch adds initial support for EMMA3SL/LP board. Network and USB support will be added as follow up patches. Signed-off-by: Serge Ziryukin <ftrvxmtrx(a)gmail.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/emma3sllp/Makefile | 45 +++++++++ board/emma3sllp/config.mk | 28 ++++++ board/emma3sllp/emma3sllp.c | 39 ++++++++ board/emma3sllp/emma3sllp.h | 51 +++++++++++ board/emma3sllp/lowlevel_init.S | 190 +++++++++++++++++++++++++++++++++++++++ board/emma3sllp/u-boot.lds | 70 ++++++++++++++ doc/README.emma3sllp | 10 ++ include/configs/emma3sllp.h | 131 +++++++++++++++++++++++++++ 11 files changed, 572 insertions(+), 0 deletions(-) create mode 100644 board/emma3sllp/Makefile create mode 100644 board/emma3sllp/config.mk create mode 100644 board/emma3sllp/emma3sllp.c create mode 100644 board/emma3sllp/emma3sllp.h create mode 100644 board/emma3sllp/lowlevel_init.S create mode 100644 board/emma3sllp/u-boot.lds create mode 100644 doc/README.emma3sllp create mode 100644 include/configs/emma3sllp.h diff --git a/MAINTAINERS b/MAINTAINERS index 5cbc845..ec5927d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -841,6 +841,10 @@ Stefan Roese <sr(a)denx.de> vct_xxx MIPS32 4Kc +Serge Ziryukin <ftrvxmtrx(a)gmail.com> + + emma3sllp MIPS32 4KEc + ######################################################################### # Nios-32 Systems: # # # diff --git a/MAKEALL b/MAKEALL index bb09627..75c07ef 100755 --- a/MAKEALL +++ b/MAKEALL @@ -741,6 +741,7 @@ LIST_arm=" \ ######################################################################### LIST_mips4kc=" \ + emma3sllp \ incaip \ qemu_mips \ vct_platinum \ diff --git a/Makefile b/Makefile index 82cbbf4..0bbbbf1 100644 --- a/Makefile +++ b/Makefile @@ -3408,6 +3408,9 @@ vct_platinumavc_onenand_small_config: unconfig fi @$(MKCONFIG) -a vct mips mips vct micronas +emma3sllp_config: unconfig + @$(MKCONFIG) $(@:_config=) mips mips emma3sllp + ######################################################################### ## MIPS32 AU1X00 ######################################################################### diff --git a/board/emma3sllp/Makefile b/board/emma3sllp/Makefile new file mode 100644 index 0000000..aa42b44 --- /dev/null +++ b/board/emma3sllp/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o +SOBJS = lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/emma3sllp/config.mk b/board/emma3sllp/config.mk new file mode 100644 index 0000000..d4ff9b5 --- /dev/null +++ b/board/emma3sllp/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2010 +# Serge Ziryukin, ftrvxmtrx(a)gmail.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# EMMA3SL/LP +# + +TEXT_BASE = 0xbc000000 diff --git a/board/emma3sllp/emma3sllp.c b/board/emma3sllp/emma3sllp.c new file mode 100644 index 0000000..ff6e12a --- /dev/null +++ b/board/emma3sllp/emma3sllp.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <configs/emma3sllp.h> +#include <asm/io.h> +#include "emma3sllp.h" + +phys_size_t initdram(int board_type) +{ + return CONFIG_SYS_SDRAM_SIZE; +} + +int checkboard(void) +{ + puts("EMMA3SL/LP\n"); + + return 0; +} diff --git a/board/emma3sllp/emma3sllp.h b/board/emma3sllp/emma3sllp.h new file mode 100644 index 0000000..335f6fd --- /dev/null +++ b/board/emma3sllp/emma3sllp.h @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __EMMA3SLLP_H +#define __EMMA3SLLP_H + +/* host interface */ +#define BHIF_BASE_ADDRESS 0xb0000000 +#define BHIF_ALTERNATE0 0x28 + +/* rom interface */ +#define BROI_BASE_ADDRESS 0xb0000600 +#define BROI_ROM_MODE 0x00 +#define BROI_ROM_IF_MODE 0x08 + +/* memory interface */ +#define MIF_BASE_ADDRESS 0xb0000c00 +#define MIF_CONFIG1 0x04 +#define MIF_INIT 0x08 +#define MIF_REFCNT 0x0c +#define MIF_CONFIG2 0x10 +#define MIF_DLLSTBY 0xf0 +#define MIF_DLLCTRL 0xf4 +#define MIF_DLLOFSTW 0xf8 +#define MIF_DLLOFSTR 0xfc +#define MIF_RSTB 0xe0 +#define MIF_ODTSW 0xe4 +#define MIF_IOLHRSTB 0xe8 +#define MIF_IOLHCTRL 0xec + +#endif /* __EMMA3SLLP_H */ diff --git a/board/emma3sllp/lowlevel_init.S b/board/emma3sllp/lowlevel_init.S new file mode 100644 index 0000000..689e6dc --- /dev/null +++ b/board/emma3sllp/lowlevel_init.S @@ -0,0 +1,190 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/asm.h> +#include <asm/regdef.h> +#include "emma3sllp.h" + +.text +.set noreorder +.set mips32 + +.macro REGWR offset, val + li t1, \val + sw t1, \offset(t0) +.endm + +#define MEM_200US (200 * CPU_CLOCK_RATE / 1000000) + +.global lowlevel_init +lowlevel_init: + + /* =================================== */ + /* enable peripherals */ + /* =================================== */ + li t0, BHIF_BASE_ADDRESS + + /* 17: usb, 18: ethernet, 19: fuart0 */ + REGWR BHIF_ALTERNATE0 0x000e0000 + + /* =================================== */ + /* set flash options */ + /* =================================== */ + li t0, BROI_BASE_ADDRESS + + /* change max size flash rom to 64Mb + to make it start from 0xbc000000 */ + lw t1, BROI_ROM_MODE(t0) + li t2, 0x08 + sub t2, zero, t2 + and t1, t1, t2 + ori t1, t1, 0x04 + sw t1, BROI_ROM_MODE(t0) + + /* enable write (for 4 possible flash chips) */ + lw t1, BROI_ROM_IF_MODE(t0) + ori t1, t1, 0x0f + sw t1, BROI_ROM_IF_MODE(t0) + + /* =================================== */ + /* DDR2 initialization */ + /* =================================== */ + li t0, MIF_BASE_ADDRESS + + /* + set wiring delay + 91-467ps @ 327.68MHz + 110-440ps @ 333.33MHz + */ + REGWR MIF_DLLOFSTW 0x0000e1e1 + REGWR MIF_DLLOFSTR 0x00002424 + + /* 316-350MHz (FSL=6) */ + REGWR MIF_DLLCTRL 0x00000020 + + /* exit from stand-by mode */ + REGWR MIF_DLLSTBY 0x00000000 + + /* clear rst */ + REGWR MIF_IOLHRSTB 0x00000001 + + /* wait until locked */ + li t2, 0x1 +1: + lw t1, MIF_DLLCTRL(t0) + and t1, t2 + bne t1, t2, 1b + nop + + /* wait until fixed */ + li t2, 0x1 +1: + lw t1, MIF_IOLHCTRL(t0) + and t1, t2 + bne t1, t2, 1b + nop + + /* clear rst */ + REGWR MIF_RSTB 0x00000001 + + /* set on-die termination to 75ohm and enable clock */ + REGWR MIF_ODTSW 0x00000101 + + /* 200us */ + li t2, MEM_200US +1: + bne t2, zero, 1b + addi t2, -1 + + /* + column 10 bits (A0 - A9), row 13 bits (A0 - A12) + CAS latency 5, 16-bit bus, 4 banks + */ + REGWR MIF_CONFIG1 0x74ba1b65 + + /* small PCB delay, one CS, 64Mb */ + REGWR MIF_CONFIG2 0x0aa20049 + + /* CKE high */ + REGWR MIF_INIT 0x00000020 + + /* 400ns */ + .rept 16 + nop + .endr + + /* precharge all banks (BA0=0, BA1=0, A10=1) */ + REGWR MIF_INIT 0x10000004 + /* EMRS(2): (BA1=1, BA0=0, Ax=0) */ + REGWR MIF_INIT 0x00020002 + /* EMRS(3): (BA0=1, BA1=1, Ax=0) */ + REGWR MIF_INIT 0x00030002 + /* EMRS(1): enable DLL (BA0=1, BA1=0, Ax=0) */ + REGWR MIF_INIT 0x00010002 + + /* + MRS: reset DLL (A8=1), BL=4 (A1=1) + CL=5 (A4=1, A6=1), WR=5 (A11=1) + */ + REGWR MIF_INIT 0x25480002 + + /* 200us */ + li t2, MEM_200US +1: + bne t2, zero, 1b + addi t2, -1 + + /* precharge all banks (BA0=0, BA1=0, A10=1) */ + REGWR MIF_INIT 0x10000004 + /* refresh */ + REGWR MIF_INIT 0x00000001 + /* refresh */ + REGWR MIF_INIT 0x00000001 + + /* 100ns */ + .rept 4 + nop + .endr + + /* + MRS: clear DLL reset flag (A8=0) + leave other parms as in earlier issued MRS + */ + REGWR MIF_INIT 0x21480002 + + /* + EMRS(1): OCD calibration + driver strength weak (A1=1), Rtt=75ohm (A2=1, A6=0) + */ + REGWR MIF_INIT 0x00590002 + + /* + set refresh interval to (0x50 * 16 * SCLK) + register = (0x50 | REFRESH_ENABLE) + REFRESH_ENABLE = 0x100 + */ + REGWR MIF_REFCNT 0x00000150 + + jr ra + nop diff --git a/board/emma3sllp/u-boot.lds b/board/emma3sllp/u-boot.lds new file mode 100644 index 0000000..73979af --- /dev/null +++ b/board/emma3sllp/u-boot.lds @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk Engineering, <wd(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") +*/ +OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips") +OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = .; + _gp = ALIGN(16) + 0x7ff0; + + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + + .sdata : { *(.sdata) } + + .u_boot_cmd : { + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + uboot_end_data = .; + num_got_entries = (__got_end - __got_start ) >> 2; + + . = ALIGN(4); + .sbss (NOLOAD) : { *(.sbss) } + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } + uboot_end = .; +} diff --git a/doc/README.emma3sllp b/doc/README.emma3sllp new file mode 100644 index 0000000..dfefa9a --- /dev/null +++ b/doc/README.emma3sllp @@ -0,0 +1,10 @@ +EMMA3SL/LP + +generation: 0x02000011 (EMMA3SL/L) +product version: 0x018e +cpu: 4KEc, 288MHz +endianess: big +unified mem clock: 156MHz (SCLK = MCLK/2 = 312/2) +flash: S29GL064N90BFI04 (8Mb, 16bit, bottom boot) +memory: EDE5116AJBG-6E-E (64Mb, 16bit, 667Mbps) +ethernet: KSZ8041NL, RMII diff --git a/include/configs/emma3sllp.h b/include/configs/emma3sllp.h new file mode 100644 index 0000000..599104e --- /dev/null +++ b/include/configs/emma3sllp.h @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/addrspace.h> + +#define CONFIG_BOOT_RETRY_TIME -1 +#define CONFIG_MIPS32 1 + +#define CPU_CLOCK_RATE 288000000 + +#define CONFIG_BOOTDELAY 5 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_TIMESTAMP +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_BOOTARGS "" +#define CONFIG_EXTRA_ENV_SETTINGS "" +#define CONFIG_BOOTCOMMAND "" +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_SAVEENV + +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_USB +#undef CONFIG_CMD_FAT + +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_BSP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_UNZIP +#define CONFIG_CMD_PORTIO + +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 + +/* 256Kb */ +#define CONFIG_SYS_MALLOC_LEN (256 << 10) +/* 64Kb */ +#define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10) + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_SIZE (64 << 20) +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SYS_LOAD_ADDR 0x80400000 +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x80800000 + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +/* one flash bank */ +#define PHYS_FLASH_1 0xbc000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 135 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_FLASH_PROTECTION 1 + +/* erase/write timeouts in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) + +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +/* print 'E' for empty sector on flinfo */ +#define CONFIG_SYS_FLASH_EMPTY_INFO + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN 0x40000 + +/* env on flash */ +#define CONFIG_ENV_ADDR \ + (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE (64 << 10) +#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE + +/* cache */ +#define CONFIG_SYS_DCACHE_SIZE (8 << 10) /* 8kB */ +#define CONFIG_SYS_ICACHE_SIZE (8 << 10) /* 8kB */ +#define CONFIG_SYS_CACHELINE_SIZE 16 + +/* serial */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 4 +#define CONFIG_SYS_NS16550_CLK 18432000 +#define CONFIG_SYS_NS16550_COM1 0xb0101000 +#define CONFIG_SYS_NS16550_COM2 0xb0102000 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#endif /* __CONFIG_H */ -- 1.7.1

3 3

[U-Boot] [PATCH] Adds driver for Xilinx' xps_spi SPI controller.
by Graeme Smecher 02 Apr '12

02 Apr '12

This code differs in only trivial ways from the altera_spi driver. It plays nice with Thomas Chou's mmc_spi driver, as well as with SPI flash. Documentation for the SPI core is available here: http://www.xilinx.com/support/documentation/ip_documentation/xps_spi.pdf Signed-off-by: Graeme Smecher <graeme.smecher(a)mail.mcgill.ca> --- drivers/spi/Makefile | 1 + drivers/spi/xilinx_spi.c | 173 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 174 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/xilinx_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index dfcbb8b..34e0f31 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libspi.a COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o +COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c new file mode 100644 index 0000000..bda7c5b --- /dev/null +++ b/drivers/spi/xilinx_spi.c @@ -0,0 +1,173 @@ +/* + * Xilinx SPI driver + * + * based on bfin_spi.c, by way of altera_spi.c + * Copyright (c) 2005-2008 Analog Devices Inc. + * Copyright (c) 2010 Thomas Chou <thomas(a)wytron.com.tw> + * Copyright (c) 2010 Graeme Smecher <graeme.smecher(a)mail.mcgill.ca> + * + * Licensed under the GPL-2 or later. + */ +#include <common.h> +#include <asm/io.h> +#include <malloc.h> +#include <spi.h> + +#define XILINX_SPI_RR 0x6c +#define XILINX_SPI_TR 0x68 +#define XILINX_SPI_SR 0x64 +#define XILINX_SPI_CR 0x60 +#define XILINX_SPI_SSR 0x70 + +#define XILINX_SPI_SR_RX_EMPTY_MSK 0x01 + +#define XILINX_SPI_CR_DEFAULT (0x0006) +#define XILINX_SPI_CR_MSS_MSK (0x0080) + +#if XPAR_XSPI_NUM_INSTANCES > 4 +# warning "The xilinx_spi driver will ignore some of your SPI peripherals!" +#endif + +static ulong xilinx_spi_base_list[] = { +#ifdef XPAR_SPI_0_BASEADDR + XPAR_SPI_0_BASEADDR, +#endif +#ifdef XPAR_SPI_1_BASEADDR + XPAR_SPI_1_BASEADDR, +#endif +#ifdef XPAR_SPI_2_BASEADDR + XPAR_SPI_2_BASEADDR, +#endif +#ifdef XPAR_SPI_3_BASEADDR + XPAR_SPI_3_BASEADDR, +#endif +}; + +struct xilinx_spi_slave { + struct spi_slave slave; + ulong base; +}; +#define to_xilinx_spi_slave(s) container_of(s, struct xilinx_spi_slave, slave) + +__attribute__((weak)) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus < ARRAY_SIZE(xilinx_spi_base_list) && cs < 32; +} + +__attribute__((weak)) +void spi_cs_activate(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + writel(~(1 << slave->cs), xilspi->base + XILINX_SPI_SSR); + writel(XILINX_SPI_CR_DEFAULT | XILINX_SPI_CR_MSS_MSK, + xilspi->base + XILINX_SPI_CR); +} + +__attribute__((weak)) +void spi_cs_deactivate(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + + writel(XILINX_SPI_CR_DEFAULT, xilspi->base + XILINX_SPI_CR); + writel(~0, xilspi->base + XILINX_SPI_SSR); +} + +void spi_init(void) +{ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct xilinx_spi_slave *xilspi; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + xilspi = malloc(sizeof(*xilspi)); + if (!xilspi) + return NULL; + + xilspi->slave.bus = bus; + xilspi->slave.cs = cs; + xilspi->base = xilinx_spi_base_list[bus]; + debug("%s: bus:%i cs:%i base:%lx\n", __func__, + bus, cs, xilspi->base); + + return &xilspi->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + free(xilspi); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + writel(XILINX_SPI_CR_DEFAULT, xilspi->base + XILINX_SPI_CR); + writel(~0, xilspi->base + XILINX_SPI_SSR); + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + writel(~0, xilspi->base + XILINX_SPI_SSR); +} + +#ifndef CONFIG_XILINX_SPI_IDLE_VAL +# define CONFIG_XILINX_SPI_IDLE_VAL 0xff +#endif + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + /* assume spi core configured to do 8 bit transfers */ + uint bytes = bitlen / 8; + const uchar *txp = dout; + uchar *rxp = din; + + debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, + slave->bus, slave->cs, bitlen, bytes, flags); + if (bitlen == 0) + goto done; + + if (bitlen % 8) { + flags |= SPI_XFER_END; + goto done; + } + + /* empty read buffer */ + while (!(readl(xilspi->base + XILINX_SPI_SR) & + XILINX_SPI_SR_RX_EMPTY_MSK)) + readl(xilspi->base + XILINX_SPI_RR); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + while (bytes--) { + uchar d = txp ? *txp++ : CONFIG_XILINX_SPI_IDLE_VAL; + debug("%s: tx:%x ", __func__, d); + writel(d, xilspi->base + XILINX_SPI_TR); + while (readl(xilspi->base + XILINX_SPI_SR) & + XILINX_SPI_SR_RX_EMPTY_MSK) + ; + d = readl(xilspi->base + XILINX_SPI_RR); + if (rxp) + *rxp++ = d; + debug("rx:%x\n", d); + } + done: + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return 0; +} -- 1.6.3.3

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[U-Boot] [PATCH] Honor /memory/reg node in DTB files
by Deepak Saxena 31 Mar '12

31 Mar '12

commit 341764495180a712b9aaccfa0479b2ff7e44e35b Author: Deepak Saxena <deepak_saxena(a)mentor.com> Date: Mon Dec 6 15:52:07 2010 -0800 Honor /memory/reg node in DTB files This patch adds code to the bootm path to check if a valid /memory/reg node exists in the DTB file and if so, it does not override it with the values in bi_memstart and bi_memsize. This is particularly useful in multi-core environments where the memory may be partitioned across a large number of nodes. While the same can be accomplished on certain boards (p1022ds and p1_p2_rdb) by using the bootm_low and bootm_size environment variables, that solution is not universal and requires adding code ft_board_setup() for any new board that wants to support AMP operation. Also, given that the DTB is already used to partition board devices (see commit dc2e673 in the Linux kernel tree), it makes sense to allow memory to be partitioned the same way from a user configuration perspective. This patch allows for the user to override the DTB file parameters on the p1022ds and p1_p2_rdb boards by setting the bootm_low and bootm_size to something other than bi_memstart and bi_memsize. In the long-term, those env variables should be depecrated and removed and system implementors should provide the memory partitioning information in the DTB. Signed-off-by: Deepak Saxena <deepak_saxena(a)mentor.com> Signed-off-by: Hollis Blanchard <hollis_blanchard(a)mentor.com> --- See http://lists.denx.de/pipermail/u-boot/2010-December/083057.html for initial proposal on this. diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 4540364..6d384e3 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -377,6 +377,55 @@ static void ft_fixup_qe_snum(void *blob) } #endif +/* + * Check to see if an valid memory/reg property exists + * in the fdt. If so, we do not overwrite it with what's + * been scanned. + * + * Valid mean all the following: + * + * - Memory node has a device-type of "memory" + * - A reg property exists which: + * + has exactly as many cells as #address-cells + #size-cells + * + provides a range that is within [bi_memstart, bi_memstart + bi_memsize] + */ +static int ft_validate_memory(void *blob, bd_t *bd) +{ + int nodeoffset; + u32 *addrcell = (u32*)fdt_getprop(blob, 0, "#address-cells", NULL); + u32 *sizecell = (u32*)fdt_getprop(blob, 0, "#size-cells", NULL); + u64 reg_base, reg_size; + void *reg, *dtype; + int len; + + if ((nodeoffset = fdt_path_offset(blob, "/memory")) >= 0) + { + dtype = fdt_getprop(blob, nodeoffset, "device_type", &len); + if (!dtype || (strcmp(dtype, "memory") != 0)) + return 0; + + reg = fdt_getprop(blob, nodeoffset, "reg", &len); + if (reg && len == ((*addrcell + *sizecell) * 4)) { + if (*addrcell == 2) { + reg_base = ((u64*)reg)[0]; + reg_size = ((u64*)reg)[1]; + } else { + reg_base = ((u32*)reg)[0]; + reg_size = ((u32*)reg)[1]; + } + + if ((reg_size) && + (reg_base >= (u64)bd->bi_memstart) && + ((reg_size + reg_base) + <= ((u64)bd->bi_memstart + (u64)bd->bi_memsize))) + return 1; + } + } + + return 0; + +} + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -434,7 +483,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); #endif - fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); + if (!ft_validate_memory(blob, bd)) + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #ifdef CONFIG_MP ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize); diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 5cdee9f..7378d88 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -320,7 +320,8 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); - fdt_fixup_memory(blob, (u64)base, (u64)size); + if (base != (phys_addr_t)bd->bi_memstart && size != (phys_addr_t)bd->bi_memsize) + fdt_fixup_memory(blob, (u64)base, (u64)size); FT_FSL_PCI_SETUP; diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index fae31f2..5e4adc6 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -220,9 +220,10 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); - ft_pci_board_setup(blob); + if (base != (phys_addr_t)bd->bi_memstart && size != (phys_addr_t)bd->bi_memsize) + fdt_fixup_memory(blob, (u64)base, (u64)size); - fdt_fixup_memory(blob, (u64)base, (u64)size); + ft_pci_board_setup(blob); } #endif

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[U-Boot] u-boot usb-ethernet patch
by Mehmet Fatih Özay 27 Mar '12

27 Mar '12

Hello all We are using OMAP 3530 board and SMSC9512 usb-ethernet adapter. The main goal is to connect this adapter through USB OTG port and initialize at u-boot. In order to do it, we are using your u-boot patches for usb-ethernet SMSC95xx ( we patch your patch file to our u-boot-release (version u-boot 2009.11-svn12). What we succeed so far is introducing SMSC9512 to the system.As you can see from debugging below, we couldnot succeed to configure SMSC9512 and so we couldnot make ethernet work. By the way, USB OTG is connected to the OMAP through TPS6593. OMAP3 SBC3530 # usb start do usb (Re)start USB... USB: scanning bus for devices... New Device 0 usb_control_msg: devnum: 0x0, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x40 set address 1 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x19 get_conf_no 0 Result 25, wLength 25 if 0, ep 0 ##EP epmaxpacketin[1] = 1 set configuration 1 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 new device strings: Mfr=0, Product=0, SerialNumber=0 Manufacturer Product SerialNumber usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 0x9 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x2 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x3 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 New Device 1 usb_control_msg: devnum: 0x0, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x40 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 set address 2 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x2 index 0x0 length 0x0 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x27 get_conf_no 0 Result 39, wLength 39 if 0, ep 0 if 0, ep 1 if 0, ep 2 ##EP epmaxpacketin[1] = 64 ##EP epmaxpacketout[2] = 64 ##EP epmaxpacketin[3] = 16 set configuration 1 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 new device strings: Mfr=1, Product=2, SerialNumber=3 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF USB device number 2 default language ID 0x409 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 length 0xFF usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 length 0xFF usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x303 index 0x409 length 0xFF Manufacturer Modeo Product LAN9512 SerialNumber 00951101 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4 2 USB Device(s) found scanning bus for ethernet devices... i=0 smsc95xx probe vend, product:424 9512 i=1 smsc95xx probe vend, product:424 EC00 USB Ethernet device detected Endpoints In 1 Out 2 Int 3 smsc95xx get info i=2 1 Ethernet Device(s) found OMAP3 SBC3530 # ping 192.168.2.1 ** smsc95xx_halt() ** smsc95xx_init() usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0xA0, requesttype: 0x40, value 0x0 index 0x14 length 0x4 len:-1 sizeof(data):4 Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = -1 ** smsc95xx_halt() ping failed; host 192.168.2.1 is not alive -- Mehmet Fatih Özay Yaz?l?m Gelis,tirme / Software Development C Tech Bil. Tek. San ve Tic. A.S,. (C2Tech) TUBITAK TEKSEB C-210 Gebze, Kocaeli, Turkey Tel: +90 262 644 90 48 Fax: +90 262 644 90 47 http://www.ctech.com.tr

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