March 2011 - U-Boot

[U-Boot] ***(PICKUP YOUR $5000 USD VIA WESTERN UNION)***
by UNITED NATIONS 16 Mar '11

16 Mar '11

How are you? We happily announce to you the draw of the United Nations programs held on the 25th Feb, 2011 in Nigeria. Your e-mail address attached to ticket number: 564 75600545 188. You have been compensated with the sum of $500,000.00 USD and payment will be remitted to you via western union money transfer. USD$5,000 has already be send to you since last week but we were unable to give you the information on phone for the past days but due to bad network here, So we decided to send you the details via email today. Here is the western union information to pick up the USD5000.00. MTCN : 782 543 4236 SENDER'S NAME: MARYLIN JOHNSON TEXT QUESTION: IN GOD ANSWER:WE TRUST AMOUNT SENT: $5000.00 USD COUNTRY:NIGERIA Thanks Mrs. Linda Hall

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[U-Boot] NAND on Davinci boards
by Stefano Babic 16 Mar '11

16 Mar '11

Hi all, I have seen an incompatibility between the NAND driver in u-boot for the davinci boards and the linux driver (kernel 2.6.38, mainline). I think it is not related to the specific board I use. In any case, I am using the ea20 board (OMAP-L138 based, in u-boot mainline), and I have added NAND support setting for the driver: #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_USE_FLASH_BBT This is done in the linux driver, too. Both drivers are using ECC in Hardware, the number of bits for ECC is set to 4, the OOB is set first, and the oob layout is the same. The NAND driver under u-boot works flawless. The kernel is stored on NAND (the board boots from a SPI-Flash), and everything seems correct. The same thing under linux. In Linux I am able to set up a root filesystem with UBIfs, everything ok. Problems arises when u-boot tries to access to data written from Linux and viceversa. It seems to me that the management of ECC is different in u-boot and in kernel. If I write under Linux a kernel Image in a NAND partition, after a reset I am not able to read that partition from u-boot. Setting MTDDEBUG and a couple of printf, I see that nand_do_read_ops() report an error: if (mtd->ecc_stats.failed - stats.failed) return -EBADMSG; This is the output of my board: nboot aKernel Loading from nand0, offset 0x0 Bad block table found at page 262080, version 0x01 Bad block table found at page 262016, version 0x01 Returning error 4 0 nand_bbt: ECC error while reading bad block table nand_read_bbt: Bad block at 0x000002220000 nand_read_bbt: Bad block at 0x00000b120000 nand_read_bbt: Bad block at 0x00001f100000 nand_isbad_bbt(): bbt info for offs 0x00000000: (block 0) 0x00 Returning error 8 4 NAND read from offset 0 failed -74 ** Read error Checking the two drivers, it seems to me that they are doing different things. However, I do not know which one is correct. I would think that the driver in u-boot is old and must be synchronized with the Linux's driver, but after checking how u-boot gets the ecc's error from Hardware it seems to me it is correct. Has anyone seen the same issue or have proposal, which driver should be modified ? Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot] [U-BOOT]Error:No PHY IDs found VSC8641 RGMII
by Aneesh kumar VR 16 Mar '11

16 Mar '11

Hi , I have design over that using the VSC8641 PHY on RGMII interface of AR7161 , I am getting error "Error:No PHY IDs found" in U-boot for many times . could any one help me to find out the issue . -- Regards, Aneesh Kumar V R M +91-8086241258

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[U-Boot] [PATCH 1/4] S5P: timer: Use pwm functions
by Minkyu Kang 16 Mar '11

16 Mar '11

Use pwm functions for timer that is PWM timer 4. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- arch/arm/cpu/armv7/s5p-common/timer.c | 49 +++--------------------------- arch/arm/include/asm/arch-s5pc1xx/pwm.h | 8 +---- arch/arm/include/asm/arch-s5pc2xx/pwm.h | 8 +---- 3 files changed, 7 insertions(+), 58 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 651fd5d..cf61ee0 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -27,15 +27,7 @@ #include <asm/io.h> #include <asm/arch/pwm.h> #include <asm/arch/clk.h> - -#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ -#define MUX_DIV_2 1 /* 1/2 period */ -#define MUX_DIV_4 2 /* 1/4 period */ -#define MUX_DIV_8 3 /* 1/8 period */ -#define MUX_DIV_16 4 /* 1/16 period */ -#define MUX4_DIV_SHIFT 16 - -#define TCON_TIMER4_SHIFT 20 +#include <pwm.h> static unsigned long count_value; @@ -51,41 +43,10 @@ static inline struct s5p_timer *s5p_get_base_timer(void) int timer_init(void) { - struct s5p_timer *const timer = s5p_get_base_timer(); - u32 val; - - /* - * @ PWM Timer 4 - * Timer Freq(HZ) = - * PWM_CLK / { (prescaler_value + 1) * (divider_value) } - */ - - /* set prescaler : 16 */ - /* set divider : 2 */ - writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); - writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); - - /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * - (MUX_DIV_2 + 1)); - - /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; - - /* set count value */ - writel(count_value, &timer->tcntb4); - lastdec = count_value; - - val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | - TCON4_AUTO_RELOAD; - - /* auto reload & manual update */ - writel(val | TCON4_UPDATE, &timer->tcon); - - /* start PWM timer 4 */ - writel(val | TCON4_START, &timer->tcon); - - timestamp = 0; + /* PWM Timer 4 */ + pwm_init(4, MUX_DIV_2, 0); + pwm_config(4, 0, 0); + pwm_enable(4); return 0; } diff --git a/arch/arm/include/asm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h index de4dbce..d0cf3cb 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/pwm.h +++ b/arch/arm/include/asm/arch-s5pc1xx/pwm.h @@ -34,19 +34,13 @@ #define MUX_DIV_SHIFT(x) (x * 4) -/* Interval mode(Auto Reload) of PWM Timer 4 */ -#define TCON4_AUTO_RELOAD (1 << 22) -/* Update TCNTB4 */ -#define TCON4_UPDATE (1 << 21) -/* start bit of PWM Timer 4 */ -#define TCON4_START (1 << 20) - #define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) #define TCON_START(x) (1 << TCON_OFFSET(x)) #define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) #define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) #define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) +#define TCON4_AUTO_RELOAD (1 << 22) #ifndef __ASSEMBLY__ struct s5p_timer { diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-s5pc2xx/pwm.h index de4dbce..d0cf3cb 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/pwm.h +++ b/arch/arm/include/asm/arch-s5pc2xx/pwm.h @@ -34,19 +34,13 @@ #define MUX_DIV_SHIFT(x) (x * 4) -/* Interval mode(Auto Reload) of PWM Timer 4 */ -#define TCON4_AUTO_RELOAD (1 << 22) -/* Update TCNTB4 */ -#define TCON4_UPDATE (1 << 21) -/* start bit of PWM Timer 4 */ -#define TCON4_START (1 << 20) - #define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) #define TCON_START(x) (1 << TCON_OFFSET(x)) #define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) #define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) #define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) +#define TCON4_AUTO_RELOAD (1 << 22) #ifndef __ASSEMBLY__ struct s5p_timer { -- 1.7.1

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[U-Boot] [PATCH 1/2] powerpc: eSPI and eSPI controller support
by Shaohui Xie 16 Mar '11

16 Mar '11

From: Mingkai Hu <Mingkai.hu(a)freescale.com> This patch add espi support which is from MPC8536, and fixed some hunk failed error, and rebased on Mike's sf unify patches. Signed-off-by: Mingkai Hu <Mingkai.hu(a)freescale.com> Singed-off-by: Jerry Huang <Chang-Ming.Huang(a)freescale.com> Signed-off-by: Shaohui Xie <b21989(a)freescale.com> Cc: Mike Frysinger <vapier(a)gentoo.org> --- this patch is rebased on Mike's sf unify patches. drivers/mtd/spi/spi_flash.c | 45 ++++++++ drivers/spi/Makefile | 1 + drivers/spi/fsl_espi.c | 237 +++++++++++++++++++++++++++++++++++++++++++ include/spi.h | 26 +++++- 4 files changed, 308 insertions(+), 1 deletions(-) create mode 100644 drivers/spi/fsl_espi.c diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 5c261f1..f745def 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1,6 +1,8 @@ /* * SPI flash interface + * Add support for Freescale eSPI controller * + * Copyright 2009-2011 Freescale Semiconductor, Inc. * Copyright (C) 2008 Atmel Corporation * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik * @@ -30,6 +32,7 @@ static int spi_flash_read_write(struct spi_slave *spi, unsigned long flags = SPI_XFER_BEGIN; int ret; +#ifndef CONFIG_FSL_ESPI if (data_len == 0) flags |= SPI_XFER_END; @@ -43,6 +46,48 @@ static int spi_flash_read_write(struct spi_slave *spi, debug("SF: Failed to transfer %zu bytes of data: %d\n", data_len, ret); } +#else + struct espi_transfer transfer[1]; + unsigned char *buffer; + size_t buf_len; + + if (data_in == NULL) + buf_len = cmd_len; + else + buf_len = 2 * cmd_len; + + buffer = (unsigned char *)malloc(data_len + buf_len); + if (!buffer) { + debug("SF: Failed to malloc memory.\n"); + return 1; + } + + memcpy(buffer, cmd, cmd_len); + if (data_in == NULL) + memcpy(buffer + cmd_len, data_out, data_len); + + transfer[0].cmd_len = cmd_len; + transfer[0].data_len = data_len; + transfer[0].tx_buf = buffer; + if (data_in == NULL) + transfer[0].rx_buf = NULL; + else + transfer[0].rx_buf = buffer + cmd_len; + + transfer[0].flags = flags | SPI_XFER_END; + + spi->transfer = &transfer[0]; + ret = spi_xfer(spi, 0, NULL, NULL, 0); + if (ret) { + debug("SF: Failed to send command %02x: %d\n", cmd, ret); + return ret; + } + + if (data_in) + memcpy(data_in, transfer[0].rx_buf + cmd_len, data_len); + + free(buffer); +#endif return ret; } diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d582fbb..74f1293 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o COBJS-$(CONFIG_SH_SPI) += sh_spi.o +COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c new file mode 100644 index 0000000..f4ff884 --- /dev/null +++ b/drivers/spi/fsl_espi.c @@ -0,0 +1,237 @@ +/* + * eSPI controller driver. + * + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Author: Mingkai Hu (Mingkai.hu(a)freescale.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#include <malloc.h> +#include <spi.h> +#include <asm/immap_85xx.h> + +#define ESPI_MAX_CS_NUM 4 + +#define ESPI_EV_RNE (1 << 9) +#define ESPI_EV_TNF (1 << 8) + +#define ESPI_MODE_EN (1 << 31) /* Enable interface */ +#define ESPI_MODE_TXTHR(x) ((x) << 8) /* Tx FIFO threshold */ +#define ESPI_MODE_RXTHR(x) ((x) << 0) /* Rx FIFO threshold */ + +#define ESPI_COM_CS(x) ((x) << 30) +#define ESPI_COM_TRANLEN(x) ((x) << 0) + +#define ESPI_CSMODE_CI_INACTIVEHIGH (1 << 31) +#define ESPI_CSMODE_CP_BEGIN_EDGCLK (1 << 30) +#define ESPI_CSMODE_REV_MSB_FIRST (1 << 29) +#define ESPI_CSMODE_DIV16 (1 << 28) +#define ESPI_CSMODE_PM(x) ((x) << 24) +#define ESPI_CSMODE_POL_ASSERTED_LOW (1 << 20) +#define ESPI_CSMODE_LEN(x) ((x) << 16) +#define ESPI_CSMODE_CSBEF(x) ((x) << 12) +#define ESPI_CSMODE_CSAFT(x) ((x) << 8) +#define ESPI_CSMODE_CSCG(x) ((x) << 3) + +#define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \ + ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \ + ESPI_CSMODE_CSCG(1)) + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + volatile ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); + struct spi_slave *slave; + sys_info_t sysinfo; + unsigned long spibrg = 0; + unsigned char pm = 0; + int i; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->bus = bus; + slave->cs = cs; + + /* Enable eSPI interface */ + espi->mode = ESPI_MODE_RXTHR(3) | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN; + + espi->event = 0xffffffff; /* Clear all eSPI events */ + espi->mask = 0x00000000; /* Mask all eSPI interrupts */ + + /* Init CS mode interface */ + for (i = 0; i < ESPI_MAX_CS_NUM; i++) + espi->csmode[i] = ESPI_CSMODE_INIT_VAL; + + espi->csmode[cs] &= ~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16 + | ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK + | ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)); + + /* Set eSPI BRG clock source */ + get_sys_info(&sysinfo); + spibrg = sysinfo.freqSystemBus / 2; + if ((spibrg / max_hz) > 32) { + espi->csmode[cs] |= ESPI_CSMODE_DIV16; + pm = spibrg / (max_hz * 16 * 2); + if (pm > 16) { + pm = 16; + debug("Requested speed is too low: %d Hz" + " %d Hz is used.\n", max_hz, spibrg / (32 * 16)); + } + } else + pm = spibrg / (max_hz * 2); + if (pm) + pm--; + espi->csmode[cs] |= ESPI_CSMODE_PM(pm); + + /* Set eSPI mode */ + if (mode & SPI_CPHA) + espi->csmode[cs] |= ESPI_CSMODE_CP_BEGIN_EDGCLK; + if (mode & SPI_CPOL) + espi->csmode[cs] |= ESPI_CSMODE_CI_INACTIVEHIGH; + + /* Character bit order: msb first */ + espi->csmode[cs] |= ESPI_CSMODE_REV_MSB_FIRST; + + /* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */ + espi->csmode[cs] |= ESPI_CSMODE_LEN(7); + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +void spi_init(void) +{ + +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, + void *data_in, unsigned long spi_flags) +{ + volatile ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); + unsigned int tmpdout, tmpdin, event; + struct espi_transfer *t = slave->transfer; + unsigned int len = t->cmd_len + t->data_len; + const void *dout = t->tx_buf; + void *din = t->rx_buf; + unsigned long flags = t->flags; + int numBlks = len / 4 + (len % 4 ? 1 : 0); + unsigned char *ch; + int num_bytes = len % 4; + + debug("spi_xfer: slave %u:%u dout %08X(%08x) din %08X(%08x) len %u\n", + slave->bus, slave->cs, *(uint *) dout, + dout, *(uint *) din, din, len); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + /* Clear all eSPI events */ + espi->event = 0xffffffff; + + /* handle data in 32-bit chunks */ + while (numBlks--) { + + event = espi->event; + if (event & ESPI_EV_TNF) { + tmpdout = *(u32 *)dout; + + /* Set up the next iteration if sending > 4 bytes */ + if (len > 4) { + len -= 4; + dout += 4; + } + + espi->tx = tmpdout; + espi->event |= ESPI_EV_TNF; + debug("*** spi_xfer: ... %08x written\n", tmpdout); + } + + /* Wait for eSPI transmit to get out */ + udelay(80); + + event = espi->event; + if (event & ESPI_EV_RNE) { + tmpdin = espi->rx; + if (numBlks == 0 && num_bytes != 0) { + ch = (unsigned char *)&tmpdin; + while (num_bytes--) + *(unsigned char *)din++ = *ch++; + } else { + *(u32 *) din = tmpdin; + din += 4; + } + + espi->event |= ESPI_EV_RNE; + debug("*** spi_xfer: ... %08x readed\n", tmpdin); + } + } + + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return 0; +} + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs < ESPI_MAX_CS_NUM; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + volatile ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); + struct espi_transfer *t = slave->transfer; + unsigned int com = 0; + unsigned int len = t->cmd_len + t->data_len; + + com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF)); + com |= ESPI_COM_CS(slave->cs); + com |= ESPI_COM_TRANLEN(len - 1); + espi->com = com; + + return; +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + volatile ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); + + /* clear the RXCNT and TXCNT */ + espi->mode &= ~ESPI_MODE_EN; + espi->mode |= ESPI_MODE_EN; +} diff --git a/include/spi.h b/include/spi.h index 320e50e..423899f 100644 --- a/include/spi.h +++ b/include/spi.h @@ -2,6 +2,8 @@ * (C) Copyright 2001 * Gerald Van Baren, Custom IDEAS, vanbaren(a)cideas.com. * + * Copyright 2010-2011 Freescale Semiconductor, Inc + * * See file CREDITS for list of people who contributed to this * project. * @@ -27,7 +29,7 @@ /* Controller-specific definitions: */ /* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */ -#ifdef CONFIG_MPC8XXX_SPI +#if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI) # ifndef CONFIG_HARD_SPI # define CONFIG_HARD_SPI # endif @@ -50,16 +52,38 @@ #define SPI_XFER_END 0x02 /* Deassert CS after transfer */ /*----------------------------------------------------------------------- + * Representation of a eSPI transaction, which is always embeded in + * structure spi_slave. + * + * cmd_len: Length of the command. + * data_len: Length of the transmit/receive data. + * tx_buf: Buffer to store the transmit command and data. + * rx_buf: Buffer to store the receive data. + * flags: Flags to indicate the begin/end of the transfer. + */ +struct espi_transfer { + unsigned int cmd_len; + unsigned int data_len; + const void *tx_buf; + void *rx_buf; + + unsigned long flags; +}; + +/*----------------------------------------------------------------------- * Representation of a SPI slave, i.e. what we're communicating with. * * Drivers are expected to extend this with controller-specific data. * * bus: ID of the bus that the slave is attached to. * cs: ID of the chip select connected to the slave. + * transfer: Represent an eSPI transaction. */ struct spi_slave { unsigned int bus; unsigned int cs; + + struct espi_transfer *transfer; }; /*----------------------------------------------------------------------- -- 1.6.4

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[U-Boot] [PATCH] [v2] powerpc: 'monitor' environment variable contains full video configuration
by Timur Tabi 15 Mar '11

15 Mar '11

Update the "monitor" environment variable (for Freescale chips that have a DIU display controller) to designate the full video configuration, instead of just the output monitor. The old definition of the "monitor" environment variable only determines which video port to use for output. This variable is set to a number (0, 1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port. The resolution is hard-coded into board-specific code. The Linux command-line arguments need to be hard-coded to the proper video definition string. Instead, the "monitor" variable is now set to a string that indicates not only the part name, but also the resolution, color depth, and refresh rate. This string is then parsed for all needed information, and can be passed to the kernel via the 'diubootargs' environment variable. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- This patch depends on my previous patch, "[v4] powerpc: clean up DIU macro definitions for Freescale reference boards". README | 9 +- board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c | 73 +- board/freescale/p1022ds/diu.c | 29 +- doc/README.video | 29 + drivers/video/fsl_diu_fb.c | 1019 ++++++++++++------------- include/configs/MPC8610HPCD.h | 16 +- include/configs/P1022DS.h | 12 +- include/fsl_diu_fb.h | 91 +-- 8 files changed, 631 insertions(+), 647 deletions(-) rewrite drivers/video/fsl_diu_fb.c (63%) rewrite include/fsl_diu_fb.h (62%) diff --git a/README b/README index 9597fed..4fc35f4 100644 --- a/README +++ b/README @@ -1072,12 +1072,9 @@ The following options need to be configured: CONFIG_VIDEO_BMP_LOGO The DIU driver will look for the 'monitor' environment variable, - and if defined, enable the DIU as a console during boot. This - variable should be set to one of these values: - - '0' Output video to the DVI connector - '1' Output video to the LVDS connector - '2' Output video to the Dual-Link LVDS connector + and if defined, enable the DIU as a console during boot. See + the documentation file README.video for a description of this + variable. - Keyboard Support: CONFIG_KEYBOARD diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c index 81e53e7..6ffe457 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c @@ -1,6 +1,7 @@ /* - * Copyright 2007 Freescale Semiconductor, Inc. - * York Sun <yorksun(a)freescale.com> + * Copyright 2007-2011 Freescale Semiconductor, Inc. + * Authors: York Sun <yorksun(a)freescale.com> + * Timur Tabi <timur(a)freescale.com> * * FSL DIU Framebuffer driver * @@ -27,6 +28,10 @@ #include <command.h> #include <asm/io.h> #include <fsl_diu_fb.h> +#include "../common/pixis.h" + +#define PX_BRDCFG0_DLINK 0x10 +#define PX_BRDCFG0_DVISEL 0x08 void diu_set_pixel_clock(unsigned int pixclock) { @@ -49,50 +54,36 @@ void diu_set_pixel_clock(unsigned int pixclock) debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr); } -int platform_diu_init(unsigned int *xres, unsigned int *yres) +int platform_diu_init(unsigned int xres, unsigned int yres) { - char *monitor_port; - int gamma_fix; - unsigned int pixel_format; - unsigned char tmp_val; - unsigned char pixis_arch; - u8 *pixis_base = (u8 *)PIXIS_BASE; + const char *monitor_port; + const char *name; + int gamma_fix = 0; + u32 pixel_format = 0x88883316; + u8 temp; - tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); - pixis_arch = in_8(pixis_base + PIXIS_VER); + temp = in_8(&pixis->brdcfg0); monitor_port = getenv("monitor"); - if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */ - *xres = 1280; - *yres = 1024; - if (pixis_arch == 0x01) - pixel_format = 0x88882317; - else - pixel_format = 0x88883316; - gamma_fix = 0; - out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); - - } else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */ - *xres = 1024; - *yres = 768; - pixel_format = 0x88883316; - gamma_fix = 0; - out_8(pixis_base + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10); - - } else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */ - *xres = 1280; - *yres = 1024; - pixel_format = 0x88883316; + if (strncmp(monitor_port, "dlvds", 5) == 0) { + /* Dual link LVDS */ gamma_fix = 1; - out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xe7); - - } else { /* DVI */ - *xres = 1280; - *yres = 1024; - pixel_format = 0x88882317; - gamma_fix = 0; - out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); + temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL); + name = "Dual-Link LVDS"; + } else if (strncmp(monitor_port, "lvds", 4) == 0) { + /* Single link LVDS */ + temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK; + name = "Single-Link LVDS"; + } else { + /* DVI */ + if (in_8(&pixis->ver) == 1) /* Board version */ + pixel_format = 0x88882317; + temp |= PX_BRDCFG0_DVISEL; + name = "DVI"; } - return fsl_diu_init(*xres, pixel_format, gamma_fix); + printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres); + out_8(&pixis->brdcfg0, temp); + + return fsl_diu_init(xres, pixel_format, gamma_fix); } diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c index 8f5305c..544f254 100644 --- a/board/freescale/p1022ds/diu.c +++ b/board/freescale/p1022ds/diu.c @@ -1,5 +1,5 @@ /* - * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2010-2011 Freescale Semiconductor, Inc. * Authors: Timur Tabi <timur(a)freescale.com> * * FSL DIU Framebuffer driver @@ -12,6 +12,7 @@ #include <common.h> #include <command.h> +#include <linux/ctype.h> #include <asm/io.h> #include <stdio_dev.h> #include <video_fb.h> @@ -81,10 +82,11 @@ void diu_set_pixel_clock(unsigned int pixclock) out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); } -int platform_diu_init(unsigned int *xres, unsigned int *yres) +int platform_diu_init(unsigned int xres, unsigned int yres) { ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - char *monitor_port; + const char *monitor_port; + const char *name; u32 pixel_format; u8 temp; @@ -101,20 +103,23 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres) temp = in_8(&pixis->brdcfg1); monitor_port = getenv("monitor"); - if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */ - *xres = 1024; - *yres = 768; - /* Enable the DFP port, disable the DVI and the backlight */ - temp &= ~(PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT); - temp |= PX_BRDCFG1_DFPEN; + if (strncmp(monitor_port, "lvds", 4) == 0) { + /* Single link LVDS */ + temp &= ~PX_BRDCFG1_DVIEN; + /* + * LVDS also needs backlight enabled, otherwise the display + * will be blank. + */ + temp |= (PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT); + name = "Single-Link LVDS"; } else { /* DVI */ - *xres = 1280; - *yres = 1024; /* Enable the DVI port, disable the DFP and the backlight */ temp &= ~(PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT); temp |= PX_BRDCFG1_DVIEN; + name = "DVI"; } + printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres); out_8(&pixis->brdcfg1, temp); /* @@ -136,7 +141,7 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres) clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU); pmuxcr = in_be32(&gur->pmuxcr); - return fsl_diu_init(*xres, pixel_format, 0); + return fsl_diu_init(xres, pixel_format, 0); } #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS diff --git a/doc/README.video b/doc/README.video index 34e199c..c0d5170 100644 --- a/doc/README.video +++ b/doc/README.video @@ -28,3 +28,32 @@ The driver has been tested with the following configurations: - MPC823FADS with AD7176 on a PAL TV (YCbYCr) - arsenio(a)tin.it - GENIETV with AD7177 on a PAL TV (YCbYCr) - arsenio(a)tin.it + + +Freescale DIU video controller +=============================== + +This controller is found on some Freescale PowerPC SOCs, such as the MPC8610 +and the P1022. Currently, setting the 'stdout' environment variable to 'video' +will *not* work with this controller. Instead, the 'monitor' environment +variable can be used to enable and configure the driver. + + monitor=<port>,<xres>x<yres>-<depth>@<freq> + +Example: monitor=dvi,1280x1024-32@60 + + <port> The monitor port, usually either "lvds" or "dvi". This + is a board-specific value. + + <xres> The X resolution (in pixels) to use. + + <yres> The Y resolution (in pixels) to use. + + <depth> The color depth (in bits) to use. + + <freq> The frequency (in Hz) to use. + +The "diubootargs" environment variable is also set to the string +"console=tty0 video=fslfb:<xres>x<yres>-<depth>@<freq>,monitor=<port>". This +variable allows the string to be passed to the Linux kernel via the kernel +command line. diff --git a/drivers/video/fsl_diu_fb.c b/drivers/video/fsl_diu_fb.c dissimilarity index 63% index 35ed938..87556e7 100644 --- a/drivers/video/fsl_diu_fb.c +++ b/drivers/video/fsl_diu_fb.c @@ -1,513 +1,506 @@ -/* - * Copyright 2007, 2010 Freescale Semiconductor, Inc. - * York Sun <yorksun(a)freescale.com> - * - * FSL DIU Framebuffer driver - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <i2c.h> -#include <malloc.h> -#include <asm/io.h> - -#include <fsl_diu_fb.h> - -struct fb_videomode { - const char *name; /* optional */ - unsigned int refresh; /* optional */ - unsigned int xres; - unsigned int yres; - unsigned int pixclock; - unsigned int left_margin; - unsigned int right_margin; - unsigned int upper_margin; - unsigned int lower_margin; - unsigned int hsync_len; - unsigned int vsync_len; - unsigned int sync; - unsigned int vmode; - unsigned int flag; -}; - -#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */ -#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ -#define FB_VMODE_NONINTERLACED 0 /* non interlaced */ - -/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ -static struct fb_videomode fsl_diu_mode_800 = { - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 31250, - .left_margin = 86, - .right_margin = 42, - .upper_margin = 33, - .lower_margin = 10, - .hsync_len = 128, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * These parameters give default parameters - * for video output 1024x768, - * FIXME - change timing to proper amounts - * hsync 31.5kHz, vsync 60Hz - */ -static struct fb_videomode fsl_diu_mode_1024 = { - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 160, - .right_margin = 24, - .upper_margin = 29, - .lower_margin = 3, - .hsync_len = 136, - .vsync_len = 6, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode fsl_diu_mode_1280 = { - .name = "1280x1024-60", - .refresh = 60, - .xres = 1280, - .yres = 1024, - .pixclock = 9375, - .left_margin = 38, - .right_margin = 128, - .upper_margin = 2, - .lower_margin = 7, - .hsync_len = 216, - .vsync_len = 37, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * These are the fields of area descriptor(in DDR memory) for every plane - */ -struct diu_ad { - /* Word 0(32-bit) in DDR memory */ - unsigned int pix_fmt; /* hard coding pixel format */ - /* Word 1(32-bit) in DDR memory */ - unsigned int addr; - /* Word 2(32-bit) in DDR memory */ - unsigned int src_size_g_alpha; - /* Word 3(32-bit) in DDR memory */ - unsigned int aoi_size; - /* Word 4(32-bit) in DDR memory */ - unsigned int offset_xyi; - /* Word 5(32-bit) in DDR memory */ - unsigned int offset_xyd; - /* Word 6(32-bit) in DDR memory */ - unsigned int ckmax_r:8; - unsigned int ckmax_g:8; - unsigned int ckmax_b:8; - unsigned int res9:8; - /* Word 7(32-bit) in DDR memory */ - unsigned int ckmin_r:8; - unsigned int ckmin_g:8; - unsigned int ckmin_b:8; - unsigned int res10:8; - /* Word 8(32-bit) in DDR memory */ - unsigned int next_ad; - /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ - unsigned int res1; - unsigned int res2; - unsigned int res3; -}__attribute__ ((packed)); - -/* - * DIU register map - */ -struct diu { - unsigned int desc[3]; - unsigned int gamma; - unsigned int pallete; - unsigned int cursor; - unsigned int curs_pos; - unsigned int diu_mode; - unsigned int bgnd; - unsigned int bgnd_wb; - unsigned int disp_size; - unsigned int wb_size; - unsigned int wb_mem_addr; - unsigned int hsyn_para; - unsigned int vsyn_para; - unsigned int syn_pol; - unsigned int thresholds; - unsigned int int_status; - unsigned int int_mask; - unsigned int colorbar[8]; - unsigned int filling; - unsigned int plut; -} __attribute__ ((packed)); - -struct diu_hw { - struct diu *diu_reg; - volatile unsigned int mode; /* DIU operation mode */ -}; - -struct diu_addr { - unsigned char * paddr; /* Virtual address */ - unsigned int offset; -}; - -/* - * Modes of operation of DIU - */ -#define MFB_MODE0 0 /* DIU off */ -#define MFB_MODE1 1 /* All three planes output to display */ -#define MFB_MODE2 2 /* Plane 1 to display, - * planes 2+3 written back to memory */ -#define MFB_MODE3 3 /* All three planes written back to memory */ -#define MFB_MODE4 4 /* Color bar generation */ - -#define MAX_CURS 32 - -static struct fb_info fsl_fb_info; -static struct diu_addr gamma, cursor; -static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32))); -static struct diu_ad dummy_ad __attribute__ ((aligned(32))); -static unsigned char *dummy_fb; -static struct diu_hw dr = { - .mode = MFB_MODE1, -}; - -int fb_enabled = 0; -int fb_initialized = 0; -const int default_xres = 1280; -const int default_pixel_format = 0x88882317; - -static int map_video_memory(struct fb_info *info, unsigned long bytes_align); -static void enable_lcdc(void); -static void disable_lcdc(void); -static int fsl_diu_enable_panel(struct fb_info *info); -static int fsl_diu_disable_panel(struct fb_info *info); -static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align); -void diu_set_pixel_clock(unsigned int pixclock); - -int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix) -{ - struct fb_videomode *fsl_diu_mode_db; - struct diu_ad *ad = &fsl_diu_fb_ad; - struct diu *hw; - struct fb_info *info = &fsl_fb_info; - struct fb_var_screeninfo *var = &info->var; - unsigned char *gamma_table_base; - unsigned int i, j; - - debug("Enter fsl_diu_init\n"); - dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR); - hw = (struct diu *) dr.diu_reg; - - disable_lcdc(); - - switch (xres) { - case 800: - fsl_diu_mode_db = &fsl_diu_mode_800; - break; - case 1280: - fsl_diu_mode_db = &fsl_diu_mode_1280; - break; - default: - fsl_diu_mode_db = &fsl_diu_mode_1024; - } - - if (0 == fb_initialized) { - allocate_buf(&gamma, 768, 32); - debug("gamma is allocated @ 0x%x\n", - (unsigned int)gamma.paddr); - allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32); - debug("curosr is allocated @ 0x%x\n", - (unsigned int)cursor.paddr); - - /* create a dummy fb and dummy ad */ - dummy_fb = malloc(64); - if (NULL == dummy_fb) { - printf("Cannot allocate dummy fb\n"); - return -1; - } - dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb); - dummy_ad.pix_fmt = 0x88882317; - dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */ - dummy_ad.aoi_size = 0x02000400; - dummy_ad.offset_xyi = 0; - dummy_ad.offset_xyd = 0; - dummy_ad.next_ad = 0; - /* Memory allocation for framebuffer */ - if (map_video_memory(info, 32)) { - printf("Unable to allocate fb memory 1\n"); - return -1; - } - } - - memset(info->screen_base, 0, info->smem_len); - - out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad); - out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad); - out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad); - debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]); - debug("dummy desc[0] = 0x%x\n", hw->desc[0]); - - /* read mode info */ - var->xres = fsl_diu_mode_db->xres; - var->yres = fsl_diu_mode_db->yres; - var->bits_per_pixel = 32; - var->pixclock = fsl_diu_mode_db->pixclock; - var->left_margin = fsl_diu_mode_db->left_margin; - var->right_margin = fsl_diu_mode_db->right_margin; - var->upper_margin = fsl_diu_mode_db->upper_margin; - var->lower_margin = fsl_diu_mode_db->lower_margin; - var->hsync_len = fsl_diu_mode_db->hsync_len; - var->vsync_len = fsl_diu_mode_db->vsync_len; - var->sync = fsl_diu_mode_db->sync; - var->vmode = fsl_diu_mode_db->vmode; - info->line_length = var->xres * var->bits_per_pixel / 8; - - ad->pix_fmt = pixel_format; - ad->addr = cpu_to_le32((unsigned int)info->screen_base); - ad->src_size_g_alpha - = cpu_to_le32((var->yres << 12) | var->xres); - /* fix me. AOI should not be greater than display size */ - ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres); - ad->offset_xyi = 0; - ad->offset_xyd = 0; - - /* Disable chroma keying function */ - ad->ckmax_r = 0; - ad->ckmax_g = 0; - ad->ckmax_b = 0; - - ad->ckmin_r = 255; - ad->ckmin_g = 255; - ad->ckmin_b = 255; - - gamma_table_base = gamma.paddr; - debug("gamma_table_base is allocated @ 0x%x\n", - (unsigned int)gamma_table_base); - - /* Prep for DIU init - gamma table */ - - for (i = 0; i <= 2; i++) - for (j = 0; j <= 255; j++) - *gamma_table_base++ = j; - - if (gamma_fix == 1) { /* fix the gamma */ - debug("Fix gamma table\n"); - gamma_table_base = gamma.paddr; - for (i = 0; i < 256*3; i++) { - gamma_table_base[i] = (gamma_table_base[i] << 2) - | ((gamma_table_base[i] >> 6) & 0x03); - } - } - - debug("update-lcdc: HW - %p\n Disabling DIU\n", hw); - - /* Program DIU registers */ - - out_be32(&hw->gamma, (int)gamma.paddr); - out_be32(&hw->cursor, (int)cursor.paddr); - out_be32(&hw->bgnd, 0x007F7F7F); - out_be32(&hw->bgnd_wb, 0); /* BGND_WB */ - out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */ - out_be32(&hw->wb_size, 0); /* WB SIZE */ - out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */ - out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */ - var->hsync_len << 11 | /* PW_H */ - var->right_margin); /* FP_H */ - - out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */ - var->vsync_len << 11 | /* PW_V */ - var->lower_margin); /* FP_V */ - - out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */ - out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */ - out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */ - out_be32(&hw->int_mask, 0); /* INT MASK */ - out_be32(&hw->plut, 0x01F5F666); - /* Pixel Clock configuration */ - debug("DIU pixclock in ps - %d\n", var->pixclock); - diu_set_pixel_clock(var->pixclock); - - fb_initialized = 1; - - /* Enable the DIU */ - fsl_diu_enable_panel(info); - enable_lcdc(); - - return 0; -} - -char *fsl_fb_open(struct fb_info **info) -{ - *info = &fsl_fb_info; - return fsl_fb_info.screen_base; -} - -void fsl_diu_close(void) -{ - struct fb_info *info = &fsl_fb_info; - fsl_diu_disable_panel(info); -} - -static int fsl_diu_enable_panel(struct fb_info *info) -{ - struct diu *hw = dr.diu_reg; - struct diu_ad *ad = &fsl_diu_fb_ad; - - debug("Entered: enable_panel\n"); - if (in_be32(&hw->desc[0]) != (unsigned)ad) - out_be32(&hw->desc[0], (unsigned)ad); - debug("desc[0] = 0x%x\n", hw->desc[0]); - return 0; -} - -static int fsl_diu_disable_panel(struct fb_info *info) -{ - struct diu *hw = dr.diu_reg; - - debug("Entered: disable_panel\n"); - if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad) - out_be32(&hw->desc[0], (unsigned)&dummy_ad); - return 0; -} - -static int map_video_memory(struct fb_info *info, unsigned long bytes_align) -{ - unsigned long offset; - unsigned long mask; - - debug("Entered: map_video_memory\n"); - /* allocate maximum 1280*1024 with 32bpp */ - info->smem_len = 1280 * 4 *1024 + bytes_align; - debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len); - info->screen_base = malloc(info->smem_len); - if (info->screen_base == NULL) { - printf("Unable to allocate fb memory\n"); - return -1; - } - info->smem_start = (unsigned int) info->screen_base; - mask = bytes_align - 1; - offset = (unsigned long)info->screen_base & mask; - if (offset) { - info->screen_base += (bytes_align - offset); - info->smem_len = info->smem_len - (bytes_align - offset); - } else - info->smem_len = info->smem_len - bytes_align; - - info->screen_size = info->smem_len; - - debug("Allocated fb @ 0x%08lx, size=%d.\n", - info->smem_start, info->smem_len); - - return 0; -} - -static void enable_lcdc(void) -{ - struct diu *hw = dr.diu_reg; - - debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled); - if (!fb_enabled) { - out_be32(&hw->diu_mode, dr.mode); - fb_enabled++; - } - debug("diu_mode = %d\n", hw->diu_mode); -} - -static void disable_lcdc(void) -{ - struct diu *hw = dr.diu_reg; - - debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled); - if (fb_enabled) { - out_be32(&hw->diu_mode, 0); - fb_enabled = 0; - } -} - -/* - * Align to 64-bit(8-byte), 32-byte, etc. - */ -static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) -{ - u32 offset, ssize; - u32 mask; - - debug("Entered: allocate_buf\n"); - ssize = size + bytes_align; - buf->paddr = malloc(ssize); - if (!buf->paddr) - return -1; - - memset(buf->paddr, 0, ssize); - mask = bytes_align - 1; - offset = (u32)buf->paddr & mask; - if (offset) { - buf->offset = bytes_align - offset; - buf->paddr = (unsigned char *) ((u32)buf->paddr + offset); - } else - buf->offset = 0; - return 0; -} - -#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -#include <stdio_dev.h> -#include <video_fb.h> -/* - * The Graphic Device - */ -static GraphicDevice ctfb; - -void *video_hw_init(void) -{ - struct fb_info *info; - - if (platform_diu_init(&ctfb.winSizeX, &ctfb.winSizeY) < 0) - return NULL; - - /* fill in Graphic device struct */ - sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", - ctfb.winSizeX, ctfb.winSizeY, 32, 64, 60); - - ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info); - ctfb.plnSizeX = ctfb.winSizeX; - ctfb.plnSizeY = ctfb.winSizeY; - - ctfb.gdfBytesPP = 4; - ctfb.gdfIndex = GDF_32BIT_X888RGB; - - ctfb.isaBase = 0; - ctfb.pciBase = 0; - ctfb.memSize = info->screen_size; - - /* Cursor Start Address */ - ctfb.dprBase = 0; - ctfb.vprBase = 0; - ctfb.cprBase = 0; - - return &ctfb; -} -#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ +/* + * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc. + * Authors: York Sun <yorksun(a)freescale.com> + * Timur Tabi <timur(a)freescale.com> + * + * FSL DIU Framebuffer driver + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <asm/io.h> +#include <linux/ctype.h> + +#include <video_fb.h> +#include <fsl_diu_fb.h> + +struct fb_var_screeninfo { + unsigned int xres; /* visible resolution */ + unsigned int yres; + + unsigned int bits_per_pixel; /* guess what */ + + /* Timing: All values in pixclocks, except pixclock (of course) */ + unsigned int pixclock; /* pixel clock in ps (pico seconds) */ + unsigned int left_margin; /* time from sync to picture */ + unsigned int right_margin; /* time from picture to sync */ + unsigned int upper_margin; /* time from sync to picture */ + unsigned int lower_margin; + unsigned int hsync_len; /* length of horizontal sync */ + unsigned int vsync_len; /* length of vertical sync */ + unsigned int sync; /* see FB_SYNC_* */ + unsigned int vmode; /* see FB_VMODE_* */ + unsigned int rotate; /* angle we rotate counter clockwise */ +}; + +struct fb_info { + struct fb_var_screeninfo var; /* Current var */ + unsigned int smem_len; /* Length of frame buffer mem */ + unsigned int type; /* see FB_TYPE_* */ + unsigned int line_length; /* length of a line in bytes */ + + void *screen_base; + unsigned long screen_size; +}; + +struct fb_videomode { + const char *name; /* optional */ + unsigned int refresh; /* optional */ + unsigned int xres; + unsigned int yres; + unsigned int pixclock; + unsigned int left_margin; + unsigned int right_margin; + unsigned int upper_margin; + unsigned int lower_margin; + unsigned int hsync_len; + unsigned int vsync_len; + unsigned int sync; + unsigned int vmode; + unsigned int flag; +}; + +#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */ +#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ +#define FB_VMODE_NONINTERLACED 0 /* non interlaced */ + +/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ +static struct fb_videomode fsl_diu_mode_800 = { + .name = "800x600-60", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 31250, + .left_margin = 86, + .right_margin = 42, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 128, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +}; + +/* + * These parameters give default parameters + * for video output 1024x768, + * FIXME - change timing to proper amounts + * hsync 31.5kHz, vsync 60Hz + */ +static struct fb_videomode fsl_diu_mode_1024 = { + .name = "1024x768-60", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 160, + .right_margin = 24, + .upper_margin = 29, + .lower_margin = 3, + .hsync_len = 136, + .vsync_len = 6, + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED +}; + +static struct fb_videomode fsl_diu_mode_1280 = { + .name = "1280x1024-60", + .refresh = 60, + .xres = 1280, + .yres = 1024, + .pixclock = 9375, + .left_margin = 38, + .right_margin = 128, + .upper_margin = 2, + .lower_margin = 7, + .hsync_len = 216, + .vsync_len = 37, + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED +}; + +/* + * These are the fields of area descriptor(in DDR memory) for every plane + */ +struct diu_ad { + /* Word 0(32-bit) in DDR memory */ + __le32 pix_fmt; /* hard coding pixel format */ + /* Word 1(32-bit) in DDR memory */ + __le32 addr; + /* Word 2(32-bit) in DDR memory */ + __le32 src_size_g_alpha; + /* Word 3(32-bit) in DDR memory */ + __le32 aoi_size; + /* Word 4(32-bit) in DDR memory */ + __le32 offset_xyi; + /* Word 5(32-bit) in DDR memory */ + __le32 offset_xyd; + /* Word 6(32-bit) in DDR memory */ + __le32 ckmax_r:8; + __le32 ckmax_g:8; + __le32 ckmax_b:8; + __le32 res9:8; + /* Word 7(32-bit) in DDR memory */ + __le32 ckmin_r:8; + __le32 ckmin_g:8; + __le32 ckmin_b:8; + __le32 res10:8; + /* Word 8(32-bit) in DDR memory */ + __le32 next_ad; + /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ + __le32 res[3]; +}__attribute__ ((packed)); + +/* + * DIU register map + */ +struct diu { + __be32 desc[3]; + __be32 gamma; + __be32 pallete; + __be32 cursor; + __be32 curs_pos; + __be32 diu_mode; + __be32 bgnd; + __be32 bgnd_wb; + __be32 disp_size; + __be32 wb_size; + __be32 wb_mem_addr; + __be32 hsyn_para; + __be32 vsyn_para; + __be32 syn_pol; + __be32 thresholds; + __be32 int_status; + __be32 int_mask; + __be32 colorbar[8]; + __be32 filling; + __be32 plut; +} __attribute__ ((packed)); + +struct diu_addr { + void *vaddr; /* Virtual address */ + u32 paddr; /* 32-bit physical address */ + unsigned int offset; /* Alignment offset */ +}; + +static struct fb_info info; + +/* + * Align to 64-bit(8-byte), 32-byte, etc. + */ +static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) +{ + u32 offset, ssize; + u32 mask; + + ssize = size + bytes_align; + buf->vaddr = malloc(ssize); + if (!buf->vaddr) + return -1; + + memset(buf->vaddr, 0, ssize); + mask = bytes_align - 1; + offset = (u32)buf->vaddr & mask; + if (offset) { + buf->offset = bytes_align - offset; + buf->vaddr += offset; + } else + buf->offset = 0; + + buf->paddr = virt_to_phys(buf->vaddr); + return 0; +} + +/* + * Allocate a framebuffer and an Area Descriptor that points to it. Both + * are created in the same memory block. The Area Descriptor is updated to + * point to the framebuffer memory. Memory is aligned as needed. + */ +static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres, + unsigned int depth, void **fb) +{ + unsigned long size = xres * yres * depth; + struct diu_addr addr; + struct diu_ad *ad; + size_t ad_size = roundup(sizeof(struct diu_ad), 32); + + /* + * Allocate a memory block that holds the Area Descriptor and the + * frame buffer right behind it. To keep the code simple, everything + * is aligned on a 32-byte address. + */ + if (allocate_buf(&addr, ad_size + size, 32) < 0) + return NULL; + + ad = addr.vaddr; + ad->addr = cpu_to_le32(addr.paddr + ad_size); + ad->aoi_size = cpu_to_le32((yres << 16) | xres); + ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres); + ad->offset_xyi = 0; + ad->offset_xyd = 0; + + if (fb) + *fb = addr.vaddr + ad_size; + + return ad; +} + +int fsl_diu_init(int xres, u32 pixel_format, int gamma_fix) +{ + struct fb_videomode *fsl_diu_mode_db; + struct diu_ad *ad; + struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR; + u8 *gamma_table_base; + unsigned int i, j; + struct diu_ad *dummy_ad; + struct diu_addr gamma; + + switch (xres) { + case 800: + fsl_diu_mode_db = &fsl_diu_mode_800; + break; + case 1280: + fsl_diu_mode_db = &fsl_diu_mode_1280; + break; + default: + fsl_diu_mode_db = &fsl_diu_mode_1024; + } + + /* The AD struct for the dummy framebuffer and the FB itself */ + dummy_ad = allocate_fb(2, 4, 4, NULL); + if (!dummy_ad) { + printf("DIU: Out of memory\n"); + return -1; + } + dummy_ad->pix_fmt = 0x88883316; + + /* read mode info */ + info.var.xres = fsl_diu_mode_db->xres; + info.var.yres = fsl_diu_mode_db->yres; + info.var.bits_per_pixel = 32; + info.var.pixclock = fsl_diu_mode_db->pixclock; + info.var.left_margin = fsl_diu_mode_db->left_margin; + info.var.right_margin = fsl_diu_mode_db->right_margin; + info.var.upper_margin = fsl_diu_mode_db->upper_margin; + info.var.lower_margin = fsl_diu_mode_db->lower_margin; + info.var.hsync_len = fsl_diu_mode_db->hsync_len; + info.var.vsync_len = fsl_diu_mode_db->vsync_len; + info.var.sync = fsl_diu_mode_db->sync; + info.var.vmode = fsl_diu_mode_db->vmode; + info.line_length = info.var.xres * info.var.bits_per_pixel / 8; + + /* Memory allocation for framebuffer */ + info.smem_len = + info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); + ad = allocate_fb(info.var.xres, info.var.yres, + info.var.bits_per_pixel / 8, &info.screen_base); + if (!ad) { + printf("DIU: Out of memory\n"); + return -1; + } + + ad->pix_fmt = pixel_format; + + /* Disable chroma keying function */ + ad->ckmax_r = 0; + ad->ckmax_g = 0; + ad->ckmax_b = 0; + + ad->ckmin_r = 255; + ad->ckmin_g = 255; + ad->ckmin_b = 255; + + /* Initialize the gamma table */ + if (allocate_buf(&gamma, 256 * 3, 32) < 0) { + printf("DIU: Out of memory\n"); + return -1; + } + gamma_table_base = gamma.vaddr; + for (i = 0; i <= 2; i++) + for (j = 0; j < 256; j++) + *gamma_table_base++ = j; + + if (gamma_fix == 1) { /* fix the gamma */ + gamma_table_base = gamma.vaddr; + for (i = 0; i < 256 * 3; i++) { + gamma_table_base[i] = (gamma_table_base[i] << 2) + | ((gamma_table_base[i] >> 6) & 0x03); + } + } + + /* Program DIU registers */ + out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */ + + out_be32(&hw->gamma, gamma.paddr); + out_be32(&hw->bgnd, 0x007F7F7F); + out_be32(&hw->bgnd_wb, 0); + out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres); + out_be32(&hw->wb_size, 0); + out_be32(&hw->wb_mem_addr, 0); + out_be32(&hw->hsyn_para, info.var.left_margin << 22 | + info.var.hsync_len << 11 | + info.var.right_margin); + + out_be32(&hw->vsyn_para, info.var.upper_margin << 22 | + info.var.vsync_len << 11 | + info.var.lower_margin); + + out_be32(&hw->syn_pol, 0); + out_be32(&hw->thresholds, 0x00037800); + out_be32(&hw->int_status, 0); + out_be32(&hw->int_mask, 0); + out_be32(&hw->plut, 0x01F5F666); + /* Pixel Clock configuration */ + diu_set_pixel_clock(info.var.pixclock); + + /* Set the frame buffers */ + out_be32(&hw->desc[0], virt_to_phys(ad)); + out_be32(&hw->desc[1], virt_to_phys(dummy_ad)); + out_be32(&hw->desc[2], virt_to_phys(dummy_ad)); + + /* Enable the DIU, set display to all three planes */ + out_be32(&hw->diu_mode, 1); + + return 0; +} + +/* + * Parse the 'monitor' environment variable + * + * Example: "monitor=dvi,1280x1024-32@60". See doc/README.video for more + * information on how to set the variable. + * + * @port: pointer to a caller buffer that will hold the port name + * @length: size of the 'port' buffer, should be at least 8 + * @xres: returned value of X-resolution + * @yres: returned value of Y-resolution + * @depth: returned value of color depth + * @freq: returned value of monitor frequency + * + * Returns 1 if valid values were found, 0 otherwise + * + * On older U-Boot installations, the 'monitor' environment variable + * only contains the port, but this is no longer supported. + */ +static int diu_get_video_params(char *port, size_t length, unsigned int *xres, + unsigned int *yres, unsigned int *depth, + unsigned int *freq) +{ + char *p, *p2; + + p = getenv("monitor"); + if (!p) { + /* 'monitor' variable is not defined, so don't enable video */ + return 0; + } + + /* + * Get the port name. This is clunky because we want to skip over any + * non-alpha characters that happen to be in the beginning of the + * string, but we also need to copy only up to the comma after the + * port name, and then we need to make the string null-terminated. + */ + p2 = p; + while (*p2 && !isalpha(*p2)) + p2++; + p = p2; + while (*p2 && isalpha(*p2)) + p2++; + + if ((p2 - p) > (length - 1)) { + /* port name is too long */ + return 0; + } + strncpy(port, p, p2 - p); + port[p2 - p] = 0; + + /* Get the X-resolution*/ + p = p2; + while (*p && !isdigit(*p)) + p++; + *xres = simple_strtoul(p, &p, 10); + if (!*xres) + return 0; + + /* Get the Y-resolution */ + while (*p && !isdigit(*p)) + p++; + *yres = simple_strtoul(p, &p, 10); + if (!*yres) + return 0; + + /* Get the depth */ + while (*p && !isdigit(*p)) + p++; + *depth = simple_strtoul(p, &p, 10); + if (!*depth) + return 0; + + /* Get the frequency */ + while (*p && !isdigit(*p)) + p++; + *freq = simple_strtoul(p, &p, 10); + if (!*freq) + return 0; + + return 1; +} + +void *video_hw_init(void) +{ + static GraphicDevice ctfb; + char port[8], diubootargs[64]; + unsigned int depth = 0, freq = 0; + + if (!diu_get_video_params(port, sizeof(port), &ctfb.winSizeX, + &ctfb.winSizeY, &depth, &freq)) + return NULL; + + if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY) < 0) + return NULL; + + /* fill in Graphic device struct */ + sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", + ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq); + + ctfb.frameAdrs = (unsigned int)info.screen_base; + ctfb.plnSizeX = ctfb.winSizeX; + ctfb.plnSizeY = ctfb.winSizeY; + + ctfb.gdfBytesPP = 4; + ctfb.gdfIndex = GDF_32BIT_X888RGB; + + ctfb.isaBase = 0; + ctfb.pciBase = 0; + ctfb.memSize = info.screen_size; + + /* Cursor Start Address */ + ctfb.dprBase = 0; + ctfb.vprBase = 0; + ctfb.cprBase = 0; + + /* Set the 'diubootargs' environment variable */ + sprintf(diubootargs, "console=tty0 video=fslfb:%ux%u-%u@%u,monitor=%s", + ctfb.winSizeX, ctfb.winSizeY, depth, freq, port); + setenv("diubootargs", diubootargs); + + return &ctfb; +} diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index de01c31..60f2a16 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -1,5 +1,5 @@ /* - * Copyright 2007, 2010 Freescale Semiconductor, Inc. + * Copyright 2007-2011 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -23,6 +23,8 @@ /* video */ +#define CONFIG_FSL_DIU_FB + #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x2c000) #define CONFIG_VIDEO @@ -625,8 +627,6 @@ "diuregs=md e002c000 1d\0" \ "dium=mw e002c01c\0" \ "diuerr=md e002c014 1\0" \ - "othbootargs=diufb=15M video=fslfb:1280x1024-32@60,monitor=0 debug\0" \ - "monitor=0-DVI\0" \ "pmregs=md e00e1000 2b\0" \ "lawregs=md e0000c08 4b\0" \ "lbcregs=md e0005000 36\0" \ @@ -646,23 +646,21 @@ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \ - "bdev=sda3\0" \ - "othbootargs=diufb=15M video=fslfb:1280x1024-32@60,monitor=0\0"\ - "monitor=0-DVI\0" + "bdev=sda3\0" #endif #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw " \ "nfsroot=$serverip:$rootpath " \ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ + "console=$consoledev,$baudrate $diubootargs $othbootargs;" \ "tftp $loadaddr $bootfile;" \ "tftp $fdtaddr $fdtfile;" \ "bootm $loadaddr - $fdtaddr" #define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ + "console=$consoledev,$baudrate $diubootargs $othbootargs;" \ "tftp $ramdiskaddr $ramdiskfile;" \ "tftp $loadaddr $bootfile;" \ "tftp $fdtaddr $fdtfile;" \ @@ -670,7 +668,7 @@ #define CONFIG_BOOTCOMMAND \ "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ + "console=$consoledev,$baudrate $diubootargs $othbootargs;" \ "tftp $loadaddr $bootfile;" \ "tftp $fdtaddr $fdtfile;" \ "bootm $loadaddr - $fdtaddr" diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index ed2bada..29380a1 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -185,6 +185,8 @@ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* Video */ +#define CONFIG_FSL_DIU_FB + #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000) #define CONFIG_VIDEO @@ -445,13 +447,11 @@ "bdev=sda3\0" \ "diuregs=md e002c000 1d\0" \ "dium=mw e002c01c\0" \ - "diuerr=md e002c014 1\0" \ - "othbootargs=diufb=15M video=fslfb:1280x1024-32@60,monitor=0 tty0\0" \ - "monitor=0-DVI\0" + "diuerr=md e002c014 1\0" #define CONFIG_HDBOOT \ "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ + "console=$consoledev,$baudrate $diubootargs $othbootargs;" \ "tftp $loadaddr $bootfile;" \ "tftp $fdtaddr $fdtfile;" \ "bootm $loadaddr - $fdtaddr" @@ -460,14 +460,14 @@ "setenv bootargs root=/dev/nfs rw " \ "nfsroot=$serverip:$rootpath " \ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ + "console=$consoledev,$baudrate $diubootargs $othbootargs;" \ "tftp $loadaddr $bootfile;" \ "tftp $fdtaddr $fdtfile;" \ "bootm $loadaddr - $fdtaddr" #define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ + "console=$consoledev,$baudrate $diubootargs $othbootargs;" \ "tftp $ramdiskaddr $ramdiskfile;" \ "tftp $loadaddr $bootfile;" \ "tftp $fdtaddr $fdtfile;" \ diff --git a/include/fsl_diu_fb.h b/include/fsl_diu_fb.h dissimilarity index 62% index 87443e1..ee94cb3 100644 --- a/include/fsl_diu_fb.h +++ b/include/fsl_diu_fb.h @@ -1,60 +1,31 @@ -/* - * Copyright 2007 Freescale Semiconductor, Inc. - * York Sun <yorksun(a)freescale.com> - * - * FSL DIU Framebuffer driver - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -struct fb_var_screeninfo { - unsigned int xres; /* visible resolution */ - unsigned int yres; - - unsigned int bits_per_pixel; /* guess what */ - - /* Timing: All values in pixclocks, except pixclock (of course) */ - unsigned int pixclock; /* pixel clock in ps (pico seconds) */ - unsigned int left_margin; /* time from sync to picture */ - unsigned int right_margin; /* time from picture to sync */ - unsigned int upper_margin; /* time from sync to picture */ - unsigned int lower_margin; - unsigned int hsync_len; /* length of horizontal sync */ - unsigned int vsync_len; /* length of vertical sync */ - unsigned int sync; /* see FB_SYNC_* */ - unsigned int vmode; /* see FB_VMODE_* */ - unsigned int rotate; /* angle we rotate counter clockwise */ -}; - -struct fb_info { - struct fb_var_screeninfo var; /* Current var */ - unsigned long smem_start; /* Start of frame buffer mem */ - /* (physical address) */ - unsigned int smem_len; /* Length of frame buffer mem */ - unsigned int type; /* see FB_TYPE_* */ - unsigned int line_length; /* length of a line in bytes */ - - char *screen_base; - unsigned long screen_size; -}; - - -extern char *fsl_fb_open(struct fb_info **info); -int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix); -int platform_diu_init(unsigned int *xres, unsigned int *yres); +/* + * Copyright 2007, 2011 Freescale Semiconductor, Inc. + * Authors: York Sun <yorksun(a)freescale.com> + * Timur Tabi <timur(a)freescale.com> + * + * FSL DIU Framebuffer driver + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +int fsl_diu_init(int xres, u32 pixel_format, int gamma_fix); + +/* Prototypes for external board-specific functions */ +int platform_diu_init(unsigned int xres, unsigned int yres); +void diu_set_pixel_clock(unsigned int pixclock); -- 1.7.3.4

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[U-Boot] OMAP3 Regression after merging ARM relocation code for custom board
by Luca Ceresoli 15 Mar '11

15 Mar '11

Hi, I ported U-boot to a custom BeagleBoard-derivative board, which is running fine so far. Now I'm trying to upgrade from the current codebase (v2010.06) to a more recent one. My custom U-boot stopped booting after merging the ARM relocation code implemented in september 2010 by Heiko Schocher, even though I think I've changed my code where needed. More in detail, my code base works perfectly if merged with the upstream code (from git://git.denx.de/u-boot.git) until the commit before the ARM relocation series: 4fff329 nand_boot_fsl_nfc.c: make "nfc" a "static const" pointer It stops working when I merge these 3 commits (plus an arbitrarily large amount of the following ones): f1d2b31 ARM: add relocation support e48b7c0 ARM: implement relocation for ARM11 561142a ARM: implement relocation for ARM V7 (OMAP) plus this patch to my code (copied from the Beagle code changes in commit 561142a above): diff --git a/board/mycompany/myboard/config.mk b/board/mycompany/myboard/config.mk index 150b30c..a9c88d2 100644 --- a/board/mycompany/myboard/config.mk +++ b/board/mycompany/myboard/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +TEXT_BASE = 0x80008000 diff --git a/include/configs/omap3_myboard.h b/include/configs/omap3_myboard.h index c62febd..be0d9a9 100644 --- a/include/configs/omap3_myboard.h +++ b/include/configs/omap3_myboard.h @@ -333,4 +333,9 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif +/* additions for new relocation code, must added to all boards */ +#undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ The result is that U-boot does not print any single character on the serial console, and I'm lost since I can't use a JTAG emulator. As I am not expert in the low-level U-boot code, I don't know where to look at. Any suggestion would be appreciated. Here are a few more details that might be relevant. The board is a BeagleBoard derivative, with the same CPU (OMAP3530, Cortex-A8) and NAND flash chip. The RAM chip is the same model, but we have only one 128 MB chip instead of two. There's also a LAN chip (SMC911x family). I started my porting from the upstream repository at git://git.denx.de/u-boot.git and created a branch. Here I added a new board, initially equal to Beagle, then I removed some unwanted features (JFFS2, board detection), added some wanted ones (UBI/UBIFS, LAN driver, CONFIG_CMD_NET) and adapdet the default environment. I also changed CONFIG_SYS_MALLOC_LEN from 128kB to 1MB, as it was not enough for UBI to work. Thanks in advance, Luca

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[U-Boot] p4080ds starts OS with MSR[EE]=1 and DEC armed?
by Jimi Xenidis 15 Mar '11

15 Mar '11

I was surprised to find myself at the decrement interrupt when running my new stuff. That is against ePAPR, right? Does u-boot at least make sure that the DEC is set to some large value before it leaps at me? I don't mind forcing EE=0 but I'd like to make sure I make it that far into the code :) -JX

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[U-Boot] [STATUS] Delay of release
by Wolfgang Denk 15 Mar '11

15 Mar '11

Hi, as you all probably are alreasy aware of we are late with our release once again. I still have a huge backlog, and we haven't even reached -rc2 yet. Next target date for this release is March 29, 2011, i. e. two weeks from now. Sorry for the delay. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Mistakes are often the stepping stones to utter failure.

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[U-Boot] [PATCH] Updated code to print OMAP4 cpu info.
by Asad Akbar 15 Mar '11

15 Mar '11

--- arch/arm/cpu/armv7/omap4/sys_ info.c | 150 +++++++++++++++++++++++++++++++++-- 1 files changed, 144 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/omap4/sys_info.c b/arch/arm/cpu/armv7/omap4/sys_info.c index b9e5765..14145fb 100644 --- a/arch/arm/cpu/armv7/omap4/sys_info.c +++ b/arch/arm/cpu/armv7/omap4/sys_info.c @@ -3,8 +3,9 @@ * Texas Instruments, <www.ti.com> * * Author : - * Aneesh V <aneesh(a)ti.com> - * Steve Sakoman <steve(a)sakoman.com> + * Aneesh V <aneesh(a)ti.com> + * Steve Sakoman <steve(a)sakoman.com> + * Asad Akbar <asadakbar(a)gmail.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -25,12 +26,40 @@ #include <common.h> #include <asm/arch/sys_proto.h> +/** + * Registers addresses. + */ +#define DEVICE_IDENTIFICATION_BASE 0x4A002000 +#define DIE_ID_0 0x200 +#define ID_CODE 0x204 +#define DIE_ID_1 0x208 +#define DIE_ID_2 0x20C +#define DIE_ID_3 0x210 +#define PROD_ID_0 0x214 +#define PROD_ID_1 0x218 + +/** + * Device types + */ +#define DEVICE_TYPE_GP 0xF0 +#define DEVICE_TYPE_HS 0xF1 /* TODO: It has to be updated. */ +#define DEVICE_TYPE_EMU 0xF2 /* TODO: It has to be updated. */ +#define DEVICE_TYPE_TST 0xF3 /* TODO: It has to be updated. */ + /* * get_device_type(): tell if GP/HS/EMU/TST */ u32 get_device_type(void) { - return 0; + u32 val32; + + /* Reader PROD_ID_0 register. */ + val32 = __raw_readl (DEVICE_IDENTIFICATION_BASE + PROD_ID_0); + + /* Get only device type bits. */ + val32 &= 0xFF; + + return (val32); } /* @@ -38,7 +67,7 @@ u32 get_device_type(void) */ u32 get_board_rev(void) { - return 0x20; + return 0x20; } /* @@ -46,8 +75,117 @@ u32 get_board_rev(void) */ int print_cpuinfo(void) { + u32 val32; + u32 id[4] = { 0 }; + + /* Reader ID_CODE register. */ + val32 = __raw_readl (DEVICE_IDENTIFICATION_BASE + ID_CODE); + + /* Make sure that it is as per documentation. */ + if (val32 & 0x1) + { + /** + * Get silicon type. + */ + if (val32 == 0x0B85202F) + { + printf("Silicon Type: OMAP4430 ES1.0\n"); + } + else if (val32 == 0x1B85202F) + { + printf("Silicon Type: OMAP4430 ES2.0\n"); + } + else if (val32 == 0x3B95C02F) + { + printf("Silicon Type: OMAP4430 ES2.1\n"); + } + else + { + printf("Silicon Type: Unknown\n"); + } + + /** + * Get version. + */ + u8 version = (val32 >> 28) & 0xFF; + + switch(version) + { + case 0: + printf("Version: OMAP4430 ES1.0\n"); + break; + + case 1: + printf("Version: OMAP4430 ES2.0\n"); + break; + + case 3: + printf("Version: OMAP4430 ES2.1\n"); + break; + + default: + printf("Version: Unknown\n"); + break; + } + + /** + * Get Hawkeye + */ + u16 hawkeye = (val32 >> 12) & 0xFFFFF; + + if (hawkeye == 0xB852) + { + printf("Hawkeye: OMAP4430 ES1.0 and ES2.0\n"); + } + else if (hawkeye == 0xB95C) + { + printf("Hawkeye: OMAP4430 ES2.1\n"); + } + + /** + * Get TI IDM. + */ + printf("Manufacturer Identity (TI): 0x%X\n", (val32 >> 1)); + } + else + { + printf("%s\n", "omap_silicon_revision: TI_IDM bit is not found."); + } + + /* Get device type. */ + u8 device_type = get_device_type(); + + switch (device_type) + { + case DEVICE_TYPE_TST: + printf("Device Type: %s\n", "TST"); + break; + case DEVICE_TYPE_EMU: + printf("Device Type: %s\n", "EMU"); + break; + case DEVICE_TYPE_HS: + printf("Device Type: %s\n", "HS"); + break; + case DEVICE_TYPE_GP: + printf("Device Type: %s\n", "GP"); + break; + default: + printf("Device Type: %s\n", "???"); + } + + /* Get Die-id */ + id[0] = __raw_readl(DEVICE_IDENTIFICATION_BASE + DIE_ID_0); + id[1] = __raw_readl(DEVICE_IDENTIFICATION_BASE + DIE_ID_1); + id[2] = __raw_readl(DEVICE_IDENTIFICATION_BASE + DIE_ID_2); + id[3] = __raw_readl(DEVICE_IDENTIFICATION_BASE + DIE_ID_3); + + printf("Die-ID: %08X-%08X-%08X-%08X\n", id[3], id[2], id[1], id[0]); + + /* Get prod-id */ + id[0] = __raw_readl(DEVICE_IDENTIFICATION_BASE + PROD_ID_0); + id[1] = __raw_readl(DEVICE_IDENTIFICATION_BASE + PROD_ID_1); - puts("CPU : OMAP4430\n"); + printf("Prod-id: %08X-%08X\n", id[1], id[0]); - return 0; + return 0; } -- 1.7.4.1

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