March 2011 - U-Boot

[U-Boot] Update Your E-mail Account Now!!!
by Webmail Account Service Team Management 18 Mar '11

18 Mar '11

Dear Account Owner, This message is from webmail hosting messaging center to all our account owners. We are currently upgrading our data base and e-mail center for this year 2011. We are deleting all unused account to create more space for new one and to prevent spam mails. To prevent your account from closing you will have to update it below so that we will know that it's a present used account. Warning!!! E-mail owner that refuses to update his or her Email,within 48hrs of receiving this warning will lose his or her E-mail permanently. You are required to send us the below information via email below. CONFIRM YOUR E-MAIL IDENTITY BELOW: First Name:____________________________ Last Name:_____________________________ E-mail Username:________________________ E-mail Password:_______________________ Click on reply and send us the above details. Warning!!! In failure to verify your account within 48hrs on receiving this notification, your account will automatically be deactivated. Thank you for using webmail Account. Warning Code: QATO8B52AXV Kind Regards, Webmail Account Service Team Management. Thanks for your co-operation. Copyright @2011 WEBMAIL OFFICE All rights reserved.

1 0

[U-Boot] NAND Bad Blocks and OOB
by VirtualFight＠web.de 18 Mar '11

18 Mar '11

Hi all, I have some questions about the bad block management in the NAND-driver, I hope this is the right place to ask this: The things I believe to know, please correct me, if its wrong: If I have a new NAND-Flash, the manufacturer marked the bad block in the spare area/OOB (normaly good blocks are marked as 0xFF in the first 2 bytes?). The u-boot scans for these bad blocks and saves the information in the bbt. What happens, if a block gets worn out? Would this block only be markes as bad in the bbt, or would this information would be also stored in the spare area (the driver write another value, not 0xFF in the firts 2 bytes?). Is it possible to restore the bad block informations, if the whole nand-flash would be erased (for example by writing 0 in all block and after this by erasing the blocks and check the error status bit of the NAND-flash device)? If yes, is such a function implemented in u-boot? thanks in advance, marc ___________________________________________________________ Handy Internet-Flat ¿ gratis ¿ mit WEB.DE FreePhone Jetzt informieren: http://produkte.web.de/go/freephonesurfflat

2 1

[U-Boot] Q: nand usage
by Ran Shalit 18 Mar '11

18 Mar '11

Hello, When using the nand, with regards to its implementation in U-boot or linux, does a good strategy would be to map Nand to areas with *space* between the end of one area to the start on another ? It seems a good ideas becuase of the bad block issue and the skipping of bad blocks. I did not find information about the Nand usage. Best Regards, Ran

4 5

[U-Boot] [PATCH] Add A9 CPU complex support
by Tom Warren 18 Mar '11

18 Mar '11

This patch adds code to initialize the A9 dual CPU complex in the Tegra2 SoC. The code is run on the AVP first to set up the A9 and Coresight clocks, then the AVP is halted, the A9 CPU is brought out of reset, and the code executes again on the CPU, but down a slightly different path. Normal POST then proceeds using the A9 CPU. Tom Warren (1): arm: Tegra2: add support for A9 CPU init arch/arm/cpu/armv7/start.S | 6 + arch/arm/cpu/armv7/tegra2/Makefile | 2 +- arch/arm/cpu/armv7/tegra2/ap20.c | 490 ++++++++++++++++++++++++++++ arch/arm/cpu/armv7/tegra2/ap20.h | 105 ++++++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 27 ++ arch/arm/include/asm/arch-tegra2/pmc.h | 8 + arch/arm/include/asm/arch-tegra2/scu.h | 43 +++ arch/arm/include/asm/arch-tegra2/tegra2.h | 5 + board/nvidia/common/board.c | 10 + board/nvidia/common/board.h | 29 ++ include/configs/harmony.h | 1 + include/configs/seaboard.h | 1 + include/configs/tegra2-common.h | 2 + 13 files changed, 728 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/ap20.c create mode 100644 arch/arm/cpu/armv7/tegra2/ap20.h create mode 100644 arch/arm/include/asm/arch-tegra2/scu.h create mode 100644 board/nvidia/common/board.h -- 1.7.4.1

4 15

[U-Boot] CONFIDENTIEL..............
by Mr.Ibrahim Aboubakar 18 Mar '11

18 Mar '11

Officier de Crédit /Change et, Recouvrements des Fonds à la Bank of Arica(BOA), Ouagadougou,Burkina Faso. Bonjour, Je m'appelle Mr. Ibrahim Aboubakar employé à la Bank of Arica, Burkina Faso (BOA) en tant que officier du département de crédit et de rémittence internationale. Je viens très respectueusement solliciter votre collaboration pour une transaction; En effet, j'ai découvert la souscription d'un de nos clients décédés depuis 2003. Sans nouvelle des proche parents de ce dernier, notre Institution est sur le point de faire de cette souscription le patrimoine de la Banque, mais elle reste prête à effectuer le transfert à toute personne qui se présenterait comme étant bénéficiaire de ladite souscription et qui fournirait toutes les informations relatives à ce compte. Je vous contacte à présent afin que vous interveniez en tant qu'héritier de cette souscription. Je vous fournirai plus de détails sur l'opération dès que je recevrai votre accord par rapport à la proposition. Il s'agit de la somme de $8.300 000 dollars US, et j'accepte de vous donner les 45 % de cette somme, pour votre participation. Je reste optimiste à recevoir une suite favorable à ma proposition. Veuillez me laisser votre contact téléphonique, pour une étroite collaboration. Si vous étés intéresser, envoyez moi s’il vous plait ; Votre nom et prénoms Numéro de téléphone personnel Pays……………. Age……………… Profession………. Une photo de vous ou copie passeport Mr. Ibrahim Aboubakar

1 0

[U-Boot] HELLO
by esther benson 18 Mar '11

18 Mar '11

Hello my dear, Hope you are doing fine over there.My name is esther. I just want to let you know that l saw your email contact when i was browsing and searching for relationship,hope you don't mind. If you are interested in knowing more about me and for me to send you my picture,just feel free to contact me at my private mail address hope to hear from you soon, have a nice day and stay blessed. esther

1 0

[U-Boot] Cloud Server - Save your cost
by Boris 18 Mar '11

18 Mar '11

1 0

[U-Boot] Start der Kommunikation
by sp＠bmpc.co.th 18 Mar '11

18 Mar '11

Hallo liebe! Wenn Sie nicht schwer zu erhalten sind meinen Brief gelesen! Mein Name ist Rima! Der Zweck meines Briefes - unser Treffen! Ich bin sehr nett und sympathisch Mann! Ich bekomme aus dem Leben eine Menge Spa?. Ich vermisse nur einen einzigen Mann von nebenan! Ich will einen richtigen Mann zu finden! Ich uberlasse es Ihnen meine E-Mail: eartarm(a)yahoo.com Sie sind nicht schwer zu schreiben mir einen Brief! Ich beantworte sie! Sie erhalten die Fotos, die ich fur Sie tun! Ich warte auf Ihre Antwort warten! Neue Freundin Rima!

1 0

[U-Boot] [PATCH 1/8] arm926ej-s: Invalidate instruction cache in flush_cache
by Michael Spang 18 Mar '11

18 Mar '11

If U-Boot is loaded from RAM and the OS is loaded into an overlapping region, the instruction cache is not coherent when that OS is started. We must therefore invalidate the instruction cache in addition to cleaning the data cache. Signed-off-by: Michael Spang <mspang(a)csclub.uwaterloo.ca> --- arch/arm/lib/cache.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 30686fe..047786a 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -37,6 +37,8 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2) asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory"); /* disable write buffer as well (page 2-22) */ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); + /* invalidate icache for coherence with cleaned dcache */ + asm("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); #endif #ifdef CONFIG_OMAP34XX void v7_flush_cache_all(void); -- 1.7.2.3

4 18

[U-Boot] [PATCH 2/2] powerpc: make espi can read more than 0xFFFA bytes
by Shaohui Xie 18 Mar '11

18 Mar '11

espi flash read returns invalid data if the read length is more than 0xFFFA bytes, it supports maximum transaction of 2^16 bytes at a time, resister spcom[TRANLEN] is 16 bits. If the transaction length is greater than 0xFFFF, it need to be split into multiple transactions. Signed-off-by: Shaohui Xie <b21989(a)freescale.com> Cc: Mike Frysinger <vapier(a)gentoo.org> --- this patch is rebased on Mike's sf unify patches. drivers/mtd/spi/spi_flash.c | 30 ++++++++++++++++++++++++++++++ drivers/spi/fsl_espi.c | 6 ++++++ include/spi.h | 2 ++ 3 files changed, 38 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f745def..f50ca63 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -127,11 +127,41 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, { u8 cmd[5]; +#ifndef CONFIG_FSL_ESPI cmd[0] = CMD_READ_ARRAY_FAST; spi_flash_addr(offset, cmd); cmd[4] = 0x00; return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); +#else + int max_tran_len, num_chunks, tran_len, ret; + + max_tran_len = flash->spi->max_transfer_length; + num_chunks = len / max_tran_len + (len % max_tran_len ? 1 : 0); + + while (num_chunks--) { + tran_len = min(len , max_tran_len); + + cmd[0] = CMD_READ_ARRAY_FAST; + spi_flash_addr(offset, cmd); + cmd[4] = 0x00; + + debug("READ: 0x%x => cmd = + { 0x%02x 0x%02x%02x%02x%02x } tran_len = 0x%x\n", + offset, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], tran_len); + + ret = spi_flash_read_common( + flash, cmd, sizeof(cmd), data, tran_len); + if (ret < 0) + return ret; + + offset += max_tran_len; + data += max_tran_len; + len -= max_tran_len; + } + + return ret; +#endif } int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout, diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index f4ff884..66ae1a8 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -53,6 +53,8 @@ ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \ ESPI_CSMODE_CSCG(1)) +#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 + struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { @@ -72,6 +74,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, slave->bus = bus; slave->cs = cs; + slave->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; /* Enable eSPI interface */ espi->mode = ESPI_MODE_RXTHR(3) | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN; @@ -153,6 +156,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, unsigned char *ch; int num_bytes = len % 4; + if (t->data_len > ESPI_MAX_DATA_TRANSFER_LEN) + return -1; + debug("spi_xfer: slave %u:%u dout %08X(%08x) din %08X(%08x) len %u\n", slave->bus, slave->cs, *(uint *) dout, dout, *(uint *) din, din, len); diff --git a/include/spi.h b/include/spi.h index 423899f..b0e13d5 100644 --- a/include/spi.h +++ b/include/spi.h @@ -77,12 +77,14 @@ struct espi_transfer { * * bus: ID of the bus that the slave is attached to. * cs: ID of the chip select connected to the slave. + * max_txn_length: maximum data transfer length supported by the slave. * transfer: Represent an eSPI transaction. */ struct spi_slave { unsigned int bus; unsigned int cs; + unsigned int max_transfer_length; struct espi_transfer *transfer; }; -- 1.6.4

1 0