February 2011 - U-Boot

[U-Boot] [PATCH] Add support for ASIX's AX88783 ethernet chip
by Joe Xue 04 Feb '11

04 Feb '11

for more information about this chip, please check: http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=98;65;86&PLine=65 Signed-off-by: Joe Xue <lgxue(a)hotmail.com> --- README | 7 +++++++ drivers/net/Makefile | 1 + include/netdev.h | 1 + 3 files changed, 9 insertions(+), 0 deletions(-) diff --git a/README b/README index 755d17c..c9657d8 100644 --- a/README +++ b/README @@ -892,6 +892,13 @@ The following options need to be configured: automatically converts one 32 bit word to two 16 bit words you may also try CONFIG_SMC911X_32_BIT. + CONFIG_DRIVER_AX88783 + Support for ASIX's AX88783 chip + + CONFIG_AX88783_BASE + Define this to hold the physical address + of the device (I/O space) + - USB Support: At the moment only the UHCI host controller is supported (PIP405, MIP405, MPC5200); define diff --git a/drivers/net/Makefile b/drivers/net/Makefile index fd9d0b4..7cd6e2c 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -30,6 +30,7 @@ COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o +COBJS-$(CONFIG_DRIVER_AX88783) += ax88783.o COBJS-$(CONFIG_BCM570x) += bcm570x.o COBJS-$(CONFIG_BCM570x) += bcm570x_autoneg.o COBJS-$(CONFIG_BCM570x) += 5701rls.o diff --git a/drivers/net/ax88783.c b/drivers/net/ax88783.c new file mode 100644 index 0000000..4eae949 --- /dev/null +++ b/drivers/net/ax88783.c @@ -0,0 +1,297 @@ +/* + * + * (C) Copyright 2011 Joe Xue <lgxue(a)hotmail.com> + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + */ + +/* + * AX88783 has two ethernet ports, this driver uses port 0 in u-boot + */ + +#include <common.h> +#include <command.h> +#include <net.h> +#include <linux/mii.h> +#include <miiphy.h> +#include <config.h> +#include <asm/io.h> +#include "ax88783.h" + +static int ax88183_phy_initial(struct eth_device *dev) +{ + int i; + int reg_num; + unsigned int tmp; + struct ax88783_reg * reg = (struct ax88783_reg *)dev->iobase; + + /* reset chip */ + tmp = readl(&reg->cr); + writel((tmp & ~CR_CHIP_RESET), &reg->cr); + udelay(1000); + + writel((tmp | CR_CHIP_RESET), &reg->cr); + + /* phy init */ + tmp = readl(&reg->pcr); + tmp |= PCR_PHY0_RESET_CLEAR; + + writel(tmp, &reg->pcr); + udelay(100000); + + tmp = readl(&reg->pollcr); + tmp &= POLLCR_PORT0_PHYID_MASK; + tmp |= POLLCR_PORT0_PHYID(0x10); + writel(tmp, &reg->pollcr); + + /* write MII mode */ + tmp = readl(&reg->miicr) & 0xFF; + tmp &= (~MIICR_PORT0_MII_CLK_GEN); + tmp &= (~MIICR_PORT0_PHY_RMII); + writel(tmp, &reg->miicr); + + /* set LED mode */ + tmp = readl(&reg->ledcr); + tmp |= LEDCR_PORT_LED_ON(0) | LEDCR_LED0(PHY_LED_RX | PHY_LED_TX); + tmp |= LEDCR_PORT_LED_ON(1) | LEDCR_LED1(PHY_LED_LINK); + writel(tmp, &reg->ledcr); + + /* set auto polling */ + tmp = readl(&reg->pollcr); + tmp |= (POLLCR_PORT0_AUTO_POOLING); + writel(tmp, &reg->pollcr); + + /* set link speed */ + for (i = 0; i < 2; i++) { + reg_num = i*8+16; + tmp = MDCR_READ | MDCR_PHY_ID(0x10) | MDCR_PHY_REG(reg_num); + writel(tmp, &reg->mdcr); + tmp = readl(&reg->mdcr); + if (tmp & MDCR_VALID) { + puts("link speed init failed!"); + return 1; + } + + tmp = readl(&reg->mdcr) & MDCR_VALUE_MASK; + tmp = tmp | 0x1000 | MDCR_WRITE | \ + MDCR_PHY_ID(0x10) | MDCR_PHY_REG(reg_num); + writel(tmp, &reg->mdcr); + tmp = readl(&reg->mdcr); + if (tmp & MDCR_VALID) { + puts("link speed init failed!"); + return 1; + } + } + + /* media init */ + tmp = MDCR_READ | MDCR_PHY_ID(0x10) | MDCR_PHY_REG(MII_ADVERTISE); + writel(tmp, &reg->mdcr); + tmp = readl(&reg->mdcr); + if (tmp & MDCR_VALID) { + puts("media init failed!"); + return 1; + } + + tmp = readl(&reg->mdcr) & MDCR_VALUE_MASK; + tmp &= (~ADVERTISE_ALL); + tmp |= ADVERTISE_ALL | 0x400; + tmp = tmp | MDCR_WRITE | MDCR_PHY_ID(0x10); + + writel(tmp, &reg->mdcr); + tmp = readl(&reg->mdcr); + if (tmp & MDCR_VALID) { + puts("media init failed!"); + return 1; + } + + tmp = MDCR_WRITE | MDCR_PHY_ID(0x10) | \ + MDCR_PHY_REG(MII_BMCR)| \ + BMCR_ANRESTART | BMCR_ANENABLE; + + writel(tmp, &reg->mdcr); + tmp = readl(&reg->mdcr); + if (tmp & MDCR_VALID) { + puts("media init failed!"); + return 1; + } + + return 0; +} + +static int ax88783_init(struct eth_device *dev, bd_t * bd) +{ + unsigned int tmp; + struct ax88783_reg *reg = (struct ax88783_reg *)dev->iobase; + unsigned char mactmp[4]; + unsigned int * mac = (unsigned int *)mactmp; + + /* disable interrupt */ + writel(IMSR_MASK_ALL, &reg->imsr); + + /* set mac address*/ + mactmp[0] = dev->enetaddr[5]; + mactmp[1] = dev->enetaddr[4]; + mactmp[2] = dev->enetaddr[3]; + mactmp[3] = dev->enetaddr[2]; + writel(*mac, &reg->p0mac0); + + mactmp[0] = dev->enetaddr[1]; + mactmp[1] = dev->enetaddr[0]; + writel(*mac, &reg->p0mac1); + + /* write mac to forward entry */ + mactmp[0] = dev->enetaddr[3]; + mactmp[1] = dev->enetaddr[2]; + mactmp[2] = dev->enetaddr[1]; + mactmp[3] = dev->enetaddr[0]; + writel(*mac, &reg->ftdata); + + tmp = dev->enetaddr[4] | (dev->enetaddr[5]<<8) | \ + FTCMD_FT_PORT(0x2) | FTCMD_FT_STATIC | \ + FTCMD_WRITE_FT; + writel(tmp, &reg->ftcmd); + + /* packet order */ + writel(BORDER_LITTLE, &reg->border); + + /* local bus cpi */ + tmp = readl(&reg->l2psr); + tmp |= L2PSR_CPIO_ON; + writel(tmp, &reg->l2psr); + + tmp = readl(&reg->pcr); + writel(tmp & ~PCR_LOOP_BACK, &reg->pcr); + return 0; + +} + +static void ax88783_halt(struct eth_device *dev) +{ + unsigned int tmp; + struct ax88783_reg *reg = (struct ax88783_reg *)dev->iobase; + tmp = readl(&reg->pcr); + writel((tmp | PCR_LOOP_BACK), &reg->pcr); +} + +/* Get a data block via Ethernet */ +static int ax88783_recv(struct eth_device *dev) +{ + char *buf; + unsigned int i; + unsigned int tmp; + unsigned long length, reverse_length; + struct ax88783_reg * reg = (struct ax88783_reg *)dev->iobase; + + tmp = readl(&reg->imsr); + while (tmp & IMSR_INT_CPO_EMPTY) { + tmp = readl(&reg->imsr); + writel(tmp, &reg->imsr); + writel(CSCR_CPO_START, &reg->cscr); + + tmp = readl(&reg->dataport); + tmp = be32_to_cpu(tmp); + if (tmp == 0) + continue; + + length = tmp & 0xffff; + reverse_length = (~(tmp>>16))&0xffff; + if (length != reverse_length) { + /* reset CPO */ + tmp = readl(&reg->cr); + tmp &= ~CR_CPO_RESET; + writel(tmp, &reg->cr); + continue; + } + + length = length & 0x7ff; + /* align the length */ + length = ((length+3)/4)*4; + + buf = NetRxPackets[0]; + for (i = 0; i < length; i += 4) { + tmp = readl(&reg->dataport); + buf[i] = (unsigned char)(tmp & 0xff); + buf[i+1] = (unsigned char)((tmp >> 8) & 0xff); + buf[i+2] = (unsigned char)((tmp >> 16) & 0xff); + buf[i+3] = (unsigned char)((tmp >> 24) & 0xff); + } + + /* pass to up level */ + NetReceive(NetRxPackets[0], (unsigned short) length); + tmp = readl(&reg->imsr); + } + + return (int) length; +} + +/* Send a data block via Ethernet. */ + static int +ax88783_send(struct eth_device *dev, volatile void *packet, int length) +{ + unsigned int pkt_header, tmp, i; + unsigned char *buf = (unsigned char *)packet; + struct ax88783_reg * reg = (struct ax88783_reg *)dev->iobase; + tmp = length; + tmp = (~tmp << 16) | tmp; + pkt_header = cpu_to_be32(tmp); + writel(CSCR_CPI_START, &reg->cscr); + writel(pkt_header, &reg->dataport); + + for (i = 0; i < length; i += 4) { + tmp = (unsigned int)*(buf + i) | \ + (((unsigned int)*(buf + i + 1)) << 8) | \ + (((unsigned int)*(buf + i + 2)) << 16) | \ + (((unsigned int)*(buf + i + 3)) << 24); + writel(tmp, &reg->dataport); + } + + return 0; +} + +int ax88783_initialize(bd_t *bis) +{ + struct eth_device *dev; + int res; + dev = (struct eth_device *)malloc(sizeof *dev); + + if (NULL == dev) + return 0; + + memset(dev, 0, sizeof *dev); + + sprintf(dev->name, "AX88783"); + dev->iobase = CONFIG_AX88783_BASE; + dev->init = ax88783_init; + dev->halt = ax88783_halt; + dev->send = ax88783_send; + dev->recv = ax88783_recv; + + res = eth_getenv_enetaddr("ethaddr", dev->enetaddr); + if (!res) { + puts("Please set your MAC address!"); + free(dev); + return 0; + } + + res = ax88183_phy_initial(dev); + if (res != 0) { + free(dev); + return 0; + } + eth_register(dev); + + return 1; +} + diff --git a/drivers/net/ax88783.h b/drivers/net/ax88783.h new file mode 100644 index 0000000..09ac9ed --- /dev/null +++ b/drivers/net/ax88783.h @@ -0,0 +1,100 @@ +/* + * + * (C) Copyright 2011 Joe Xue <lgxue(a)hotmail.com> + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + */ + +#ifndef __AX88783_H__ +#define __AX88783_H__ + +struct ax88783_reg { + unsigned int cr; + unsigned int pcr; + unsigned int pad0[2]; + unsigned int l2psr; + unsigned int pad1[1]; + unsigned int ftdata; + unsigned int ftcmd; + unsigned int pad2[7]; + unsigned int mdcr; + unsigned int pad3[3]; + unsigned int dataport; + unsigned int pad4[32]; + unsigned int border; + unsigned int cscr; + unsigned int pad5[1]; + unsigned int ledcr; + unsigned int pad6[6]; + unsigned int imsr; + unsigned int pad7[17]; + unsigned int pollcr; + unsigned int pad8[43]; + unsigned int miicr; + unsigned int pad9[15]; + unsigned int p0mac0; + unsigned int p0mac1; + unsigned int pad10[1]; +}; + +#define CR_CPI_RESET (1 << 26) +#define CR_CPO_RESET (1 << 27) +#define CR_CHIP_RESET (1 << 31) + +#define PCR_PHY0_RESET_CLEAR (1) +#define PCR_LOOP_BACK (8) + +#define L2PSR_CPIO_ON (1 << 9) + +#define FTCMD_WRITE_FT (1 << 31) +#define FTCMD_FT_STATIC (1 << 20) +#define FTCMD_FT_PORT(x) (x << 16) + +#define MDCR_WRITE (1 << 31) +#define MDCR_READ (1 << 30) +#define MDCR_VALID (1 << 29) +#define MDCR_PHY_ID(x) (x << 24) +#define MDCR_PHY_REG(x) (x << 16) +#define MDCR_VALUE_MASK (0xFFFF) + +#define BORDER_BIG (0) +#define BORDER_LITTLE (1) + +#define CSCR_CPI_START (1 << 15) +#define CSCR_CPO_START (1 << 31) + +#define LEDCR_LED0(x) (x) +#define LEDCR_LED1(x) (x << 8) +#define LEDCR_LED2(x) (x << 16) +#define LEDCR_PORT_LED_ON(Port) (1 << (24 + Port)) +#define PHY_LED_SPEED (1 << 0) +#define PHY_LED_DUPLEX (1 << 1) +#define PHY_LED_LINK (1 << 2) +#define PHY_LED_RX (1 << 3) +#define PHY_LED_TX (1 << 4) +#define PHY_LED_COLLISION (1 << 5) + +#define IMSR_INT_CPO_EMPTY (1 << 3) +#define IMSR_MASK_ALL 0xFFFF0000 + +#define POLLCR_PORT0_PHYID_MASK (0xFFFFFFE0) +#define POLLCR_PORT0_PHYID(x) (x) +#define POLLCR_PORT0_AUTO_POOLING 0x11000000 + +#define MIICR_PORT0_MII_CLK_GEN (1 << 0) +#define MIICR_PORT0_PHY_RMII (1 << 4) + +#endif + diff --git a/include/netdev.h b/include/netdev.h index 1a542e8..fddc64d 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -44,6 +44,7 @@ int cpu_eth_init(bd_t *bis); int altera_tse_initialize(u8 dev_num, int mac_base, int sgdma_rx_base, int sgdma_tx_base); int ax88180_initialize(bd_t *bis); +int ax88783_initialize(bd_t *bis); int au1x00_enet_initialize(bd_t*); int at91emac_register(bd_t *bis, unsigned long iobase); int bfin_EMAC_initialize(bd_t *bis); -- 1.7.0.4

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[U-Boot] multiple serial in evaluation board
by Ran Shalit 04 Feb '11

04 Feb '11

Hello, I would like to configure multiple serial (UART's) in the OMAP l-138 evaluation board (da850evm). I thought that in the serial section of the da850evm.h I should only add CONFIG_SERIAL_MULTI, but then I got compilation problem: \common\serial.c " #error No default console ". It also seem that this file is only being compiled when using the CONFIG_SERIAL_MULTI flag. I can also add that I thought it is better to use that flag becuase I want to use the functions in \drivers\serial\serial.c such as serial_getc_dev instead of _serial_getc, but I see that inorder to use this function I need to define this flag (CONFIG_SERIAL_MULTI) Should this flag be used whenever using more then one UART ? I appreciate your help! Ran

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[U-Boot] [PATCH] Fix gunzip to work for any gziped uImage size
by Catalin Radu 04 Feb '11

04 Feb '11

Signed-off-by: Catalin Radu <Catalin(a)VirtualMetrix.com> --- lib/gunzip.c | 16 ++++++++++------ 1 files changed, 10 insertions(+), 6 deletions(-) diff --git a/lib/gunzip.c b/lib/gunzip.c index 482a476..2922608 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -106,12 +106,16 @@ int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, s.avail_in = *lenp - offset; s.next_out = dst; s.avail_out = dstlen; - r = inflate(&s, Z_FINISH); - if ((r != Z_STREAM_END) && (stoponerr==1)) { - printf ("Error: inflate() returned %d\n", r); - inflateEnd(&s); - return (-1); - } + do { + r = inflate(&s, Z_FINISH); + if ((r != Z_STREAM_END)&& (r != Z_BUF_ERROR)&& (stoponerr==1)) { + printf ("Error: inflate() returned %d\n", r); + inflateEnd(&s); + return (-1); + } + s.avail_in = *lenp - offset - (int)(s.next_out - (unsigned char*)dst); + s.avail_out = dstlen; + } while (r == Z_BUF_ERROR); *lenp = s.next_out - (unsigned char *) dst; inflateEnd(&s); -- 1.6.3.3

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[U-Boot] Uboot and memory test
by markus74＠bredband.net 04 Feb '11

04 Feb '11

Hi, This is a question related to memory testing from within Uboot: On a CPU (ppc476) there is 2 GB RAM which is tested in Uboot (the operating system uses this memory). On the same CPU there is an additional 256 MB memory chip which is used only by the IP-stack and not the operating system. The question is, should this 256 MB memory be tested from Uboot or should the IP-stack test this memory? What is the advantage/disadvantages? Brs, Markus

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[U-Boot] [Patch 2/2] update EB+CPU9K2 board
by esw＠bus-elektronik.de 04 Feb '11

04 Feb '11

* eb_cpux9k2: fix chip select initialization for frame buffer (increase speed) Signed-off-by: Jens Scharsig <esw(a)bus-elektronik.de> --- board/BuS/eb_cpux9k2/cpux9k2.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index fe62a0f..d6acbbc 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -264,11 +264,12 @@ int drv_video_init(void) display_height = 256; printf("%ld x %ld pixel matrix\n", display_width, display_height); - /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */ - csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) | - AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) | + /* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */ + csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) | + AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) | AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 | AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN; + writel(csr, &mc->smc.csr[2]); writel(1 << AT91_ID_PIOB, &pmc->pcer); -- 1.6.6.1

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[U-Boot] [Patch 1/2] update EB+CPU9K2 board
by esw＠bus-elektronik.de 04 Feb '11

04 Feb '11

* Fix: eb_cpux9k2 NFSBOOTCOMMAND Signed-off-by: Jens Scharsig <esw(a)bus-elektronik.de> --- include/configs/eb_cpux9k2.h | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 754fc8b..aabbc6b 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -338,10 +338,10 @@ #define CONFIG_BOOTCOMMAND "run nfsboot" #define CONFIG_NFSBOOTCOMMAND \ - "dhcp $(copy_addr) uImage_cpux9k2;" \ "run bootargsdefaults;" \ - "set bootargs $(bootargs) boot=nfs " \ - ";echo $(bootargs)" \ + "set bootargs $(bootargs) boot=nfs;" \ + "echo $(bootargs);" \ + "dhcp $(copy_addr) uImage_cpux9k2;" \ ";bootm" #define CONFIG_EXTRA_ENV_SETTINGS \ -- 1.6.6.1

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[U-Boot] [Patch 0/2] update EB+CPU9K2 board
by esw＠bus-elektronik.de 04 Feb '11

04 Feb '11

The following two small Patches will update the BuS EB+CPU9K2 board. * Fix: eb_cpux9k2 NFSBOOTCOMMAND * eb_cpux9k2: fix chip select initialization for frame buffer (increase speed) regards Jens Scharsig

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[U-Boot] [Patch] make eb_cpux9k2 board usable with 2011.03 -RC1
by esw＠bus-elektronik.de 04 Feb '11

04 Feb '11

* add CONFIG_AT91_FAMILY (fix error with soft_i2c.c) Signed-off-by: Jens Scharsig <esw(a)bus-elektronik.de> --- This patch is essentially to make the eb_cpux9k2 board working/compatible with 2011.03-RC1. include/configs/eb_cpux9k2.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 754fc8b..21595e2 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -28,7 +28,7 @@ #define _CONFIG_EB_CPUx9K2_H_ /*--------------------------------------------------------------------------*/ - +#define CONFIG_AT91FAMILY #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ #define CONFIG_EB_CPUX9K2 1 /* on an EP+CPUX9K2 Board */ -- 1.6.6.1

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[U-Boot] MPC8536 - U-Boot - Serial Port baudrate
by Fischer, Sven 04 Feb '11

04 Feb '11

Hi, I'm trying to get the NAND-Boot working. So far I was able to access the 4k-byte Bootloader and it is copying the whole U-Boot to L2-SRAM and it tries to start it from the new location. While loading the 4k-byte bootloader the serial interface is working fine. After loading from the new loaction the serial interface reports strange characters. Do you know where I have to set the baudrate? Regards, Sven

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[U-Boot] Health insurance (2/3/2011)
by Robert Moore 04 Feb '11

04 Feb '11

Hello, Our company is an authorized agent for a unique advertising opportunity, reaching over 36,000,000 consumers, 94% of which are US based. We're able to present our users with a preferred choice whenever they are looking for anything on the major search engines. I seek one source to send the users on our Network, from the major search engines, for health insurance in Thornton and surrounding markets. Please contact me at your earliest convenience. I am in the office daily from 9:00 AM to 5:00 PM Pacific time. Best regards, Robert Moore Placement Analyst, SPN Search Phone: (888) 418-4028, ext 2011

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