November 2011 - U-Boot

[U-Boot] [PATCH v4 0/6] Run-time configuration of U-Boot via a flat device tree (fdt)
by Simon Glass 12 Apr '12

12 Apr '12

At present in U-Boot configuration is mostly done using CONFIG options in the board file. This patch set makes it possible for a single U-Boot binary to support multiple boards, with the exact configuration of each board controlled by a flat device tree (fdt). This is the approach recently taken by the ARM Linux kernel and has been used by PowerPC for some time. In other words, manufacturers can potentially use a single U-Boot binary across an entire product line, with one fdt per model. The fdt is a convenient vehicle for implementing run-time configuration for three reasons. Firstly it is easy to use, being a simple text file. It is extensible since it consists of nodes and properties in a nice hierarchical format. Finally, there is already excellent infrastructure for the fdt: a compiler checks the text file and converts it to a compact binary format, and a library is already available in U-Boot (libfdt) for handling this format. To read about fdts, take a look at the specification here: https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf You also might find this section of the Linux kernel documentation useful: (access this in the Linux kernel source code) Documentation/devicetree/booting-without-of.txt To use this patch set you will need to get the device tree compiler here: git://jdl.com/software/dtc.git and add some defines to your board (only ARM is currently supported): #define CONFIG_OF_CONTROL (to enable run-time config control via fdt) #define CONFIG_OF_EMBED or CONFIG_OF_SEPARATE (either build the fdt blob into U-Boot, or create a separate u-boot.dtb and u-boot-dtb.bin) #define CONFIG_DEFAULT_DEVICE_TREE "<your name>" (to specify the name of the device tree file is board/<vendor>/dts/<your name>.dts) Typically a CPU device tree include file is provided which defines all the devices available on that CPU/SOC, with each set to 'status = "ok"'. Board device tree files should adjust only the devices they need to. If a device should be disabled, then it should be changed to 'status = 'disabled"' to indicate this. To facilitate this, a CPU/SOC device tree header is supported in arch/<arch>/dts. The name of this is defined by CONFIG_ARCH_DEVICE_TREE, typically defined in arch/<arch>/cpu/.../config.mk. You can use the following line within the board device tree file to include this header: /include/ ARCH_CPU_DTS For example, for Tegra2 we might have in arch/arm/cpu/armv7/tegra2/config.mk these lines: CONFIG_ARCH_DEVICE_TREE := tegra20 This means that ARCH_CPU_DTS will point to arch/arm/dts/tegra20.dtsi. This patch set does not include any drivers which actually use the fdt, but there is a basic fdt decode library (fdtdec) to simplify this process. I have provided an example i2c implementation previously: http://patchwork.ozlabs.org/patch/114425/ It is important to understand that the fdt only selects options available in the platform / drivers. It cannot add new drivers (yet). So you must still have the CONFIG option to enable the driver. For example, you need to define CONFIG_SYS_NS16550 to bring in the NS16550 driver, but can use the fdt to specific the UART clock, peripheral address, etc. In very broad terms, the CONFIG options in general control *what* driver files are pulled in, and the fdt controls *how* those files work. While only ARM is supported in this patch series, it should be easy enough to add support for other architectures. I experimented with using dtc's asm output to avoid all the arch/oformat ugliness in dts/Makefile as suggested by Stephen Warren <swarren(a)nvidia.com>. This simplified the Makefile commands greatly by removing the need to detect the output format and architecture. However Grant Likely <grant.likely(a)secretlab.ca> explained that this feature is not well tested and still has some big-endian-ims in it. Changes in v2: - Modify Makefile to create combined U-boot/fdt (u-boot-dtb.bin) - Add example proposed decode helper library Changes in v3: - Rename gd->blob to gd->fdt_blob - Move fdt files into board/<vendor>/dts - Provide access to ARCH_CPU_DTS which is the CPU's base device tree - Add fdtcontroladdr environment variable - Simplify decode library to remove provide only primitive functions - Remove i2c decode function - Rename fdt_decode to fdtdec, since it will be used a lot - Moved fdt_decode.c to /lib - Export almost all functions from fdtdec, to allow widespread use - Remove use of FDT_ERR_MISSING which is not strictly needed now Changes in v4: - Fix reference to gd->blob which should be gd->fdt_blob - Remove unused 'clean' targets in dts/Makefile (remmove *.tmp at top-level) - Move documentation into the first 'fdt' patch in the series - Add note about CONFIG_ARCH_DEVICE_TREE - Add assert on sprintf() string length - Rename addr_t to fdt_addr_t to make it more fdt-specific - Remove gpio.h header in fdtdec.c which is not needed yet Simon Glass (6): fdt: ARM: Add device tree control of U-Boot (CONFIG_OF_CONTROL) fdt: Add support for embedded device tree (CONFIG_OF_EMBED) fdt: Add support for a separate device tree (CONFIG_OF_SEPARATE) fdt: ARM: Implement and verify embedded and separate device tree fdt: ARM: Add fdtcontroladdr to set device tree address in environment fdt: add decode helper library .gitignore | 1 + Makefile | 13 +++ README | 34 +++++++ arch/arm/include/asm/global_data.h | 1 + arch/arm/lib/board.c | 52 +++++++++-- config.mk | 1 + doc/README.fdt-control | 184 ++++++++++++++++++++++++++++++++++++ dts/Makefile | 103 ++++++++++++++++++++ include/common.h | 1 + include/fdtdec.h | 122 ++++++++++++++++++++++++ lib/Makefile | 1 + lib/fdtdec.c | 131 +++++++++++++++++++++++++ 12 files changed, 637 insertions(+), 7 deletions(-) create mode 100644 doc/README.fdt-control create mode 100644 dts/Makefile create mode 100644 include/fdtdec.h create mode 100644 lib/fdtdec.c -- 1.7.3.1

5 16

[U-Boot] [PATCH] usb: increase delay after port reset
by Ilya Yanok 03 Apr '12

03 Apr '12

In our setup (OMAP3 EHCI host, keyboard, mouse mass storage and BT dongle devices connected via several hubs) keyboard fails to initialize during the bus scan (stalled endpoint while get_descriptor/64) and after that keyboard is unusable (even in Linux) until power off/on. Increasing the delay after port reset from 200ms to 260ms solves this problem. Signed-off-by: Ilya Yanok <yanok(a)emcraft.com> --- common/usb.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/usb.c b/common/usb.c index bed5116..5e282c6 100644 --- a/common/usb.c +++ b/common/usb.c @@ -1147,7 +1147,7 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port) return; } - wait_ms(200); + wait_ms(260); /* Allocate a new device struct for it */ usb = usb_alloc_new_device(); -- 1.7.6.4

4 6

[U-Boot] Improve default "make" targets (ALL-y)
by Loïc Minier 03 Apr '12

03 Apr '12

Hey For the Debian package, we currently maintain lists like: dbau1100 u-boot.img dockstar u-boot.kwb eNET u-boot.bin efikamx u-boot.imx omap4_panda MLO u-boot.bin [...] for two reasons: - because we need to call make u-boot.kwb explicitly to get it built - to list the files from the obj-dir that we actually want in the .deb it would be nicer for the packaging, but I guess also for u-boot maintainers, if these files were just generated by default when one calls "make". The subsequent patches will generate u-boot.imx and u-boot.kwb when it's obvious that these are desired. However, I didn't manage to find hints in the u-boot tree on when "u-boot.img" should be generated, and when u-boot.bin is enough; apparently one can mkimage -T firmware for any board config. Ideas welcome on how to detect these. Thanks, -- Loïc Minier

8 22

[U-Boot] [PATCH] MIPS: Add initial support for EMMA3SL/LP
by Serge Ziryukin 03 Apr '12

03 Apr '12

This patch adds initial support for EMMA3SL/LP board. Network and USB support will be added as follow up patches. Signed-off-by: Serge Ziryukin <ftrvxmtrx(a)gmail.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/emma3sllp/Makefile | 45 +++++++++ board/emma3sllp/config.mk | 28 ++++++ board/emma3sllp/emma3sllp.c | 39 ++++++++ board/emma3sllp/emma3sllp.h | 51 +++++++++++ board/emma3sllp/lowlevel_init.S | 190 +++++++++++++++++++++++++++++++++++++++ board/emma3sllp/u-boot.lds | 70 ++++++++++++++ doc/README.emma3sllp | 10 ++ include/configs/emma3sllp.h | 131 +++++++++++++++++++++++++++ 11 files changed, 572 insertions(+), 0 deletions(-) create mode 100644 board/emma3sllp/Makefile create mode 100644 board/emma3sllp/config.mk create mode 100644 board/emma3sllp/emma3sllp.c create mode 100644 board/emma3sllp/emma3sllp.h create mode 100644 board/emma3sllp/lowlevel_init.S create mode 100644 board/emma3sllp/u-boot.lds create mode 100644 doc/README.emma3sllp create mode 100644 include/configs/emma3sllp.h diff --git a/MAINTAINERS b/MAINTAINERS index 5cbc845..ec5927d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -841,6 +841,10 @@ Stefan Roese <sr(a)denx.de> vct_xxx MIPS32 4Kc +Serge Ziryukin <ftrvxmtrx(a)gmail.com> + + emma3sllp MIPS32 4KEc + ######################################################################### # Nios-32 Systems: # # # diff --git a/MAKEALL b/MAKEALL index bb09627..75c07ef 100755 --- a/MAKEALL +++ b/MAKEALL @@ -741,6 +741,7 @@ LIST_arm=" \ ######################################################################### LIST_mips4kc=" \ + emma3sllp \ incaip \ qemu_mips \ vct_platinum \ diff --git a/Makefile b/Makefile index 82cbbf4..0bbbbf1 100644 --- a/Makefile +++ b/Makefile @@ -3408,6 +3408,9 @@ vct_platinumavc_onenand_small_config: unconfig fi @$(MKCONFIG) -a vct mips mips vct micronas +emma3sllp_config: unconfig + @$(MKCONFIG) $(@:_config=) mips mips emma3sllp + ######################################################################### ## MIPS32 AU1X00 ######################################################################### diff --git a/board/emma3sllp/Makefile b/board/emma3sllp/Makefile new file mode 100644 index 0000000..aa42b44 --- /dev/null +++ b/board/emma3sllp/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o +SOBJS = lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/emma3sllp/config.mk b/board/emma3sllp/config.mk new file mode 100644 index 0000000..d4ff9b5 --- /dev/null +++ b/board/emma3sllp/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2010 +# Serge Ziryukin, ftrvxmtrx(a)gmail.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# EMMA3SL/LP +# + +TEXT_BASE = 0xbc000000 diff --git a/board/emma3sllp/emma3sllp.c b/board/emma3sllp/emma3sllp.c new file mode 100644 index 0000000..ff6e12a --- /dev/null +++ b/board/emma3sllp/emma3sllp.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <configs/emma3sllp.h> +#include <asm/io.h> +#include "emma3sllp.h" + +phys_size_t initdram(int board_type) +{ + return CONFIG_SYS_SDRAM_SIZE; +} + +int checkboard(void) +{ + puts("EMMA3SL/LP\n"); + + return 0; +} diff --git a/board/emma3sllp/emma3sllp.h b/board/emma3sllp/emma3sllp.h new file mode 100644 index 0000000..335f6fd --- /dev/null +++ b/board/emma3sllp/emma3sllp.h @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __EMMA3SLLP_H +#define __EMMA3SLLP_H + +/* host interface */ +#define BHIF_BASE_ADDRESS 0xb0000000 +#define BHIF_ALTERNATE0 0x28 + +/* rom interface */ +#define BROI_BASE_ADDRESS 0xb0000600 +#define BROI_ROM_MODE 0x00 +#define BROI_ROM_IF_MODE 0x08 + +/* memory interface */ +#define MIF_BASE_ADDRESS 0xb0000c00 +#define MIF_CONFIG1 0x04 +#define MIF_INIT 0x08 +#define MIF_REFCNT 0x0c +#define MIF_CONFIG2 0x10 +#define MIF_DLLSTBY 0xf0 +#define MIF_DLLCTRL 0xf4 +#define MIF_DLLOFSTW 0xf8 +#define MIF_DLLOFSTR 0xfc +#define MIF_RSTB 0xe0 +#define MIF_ODTSW 0xe4 +#define MIF_IOLHRSTB 0xe8 +#define MIF_IOLHCTRL 0xec + +#endif /* __EMMA3SLLP_H */ diff --git a/board/emma3sllp/lowlevel_init.S b/board/emma3sllp/lowlevel_init.S new file mode 100644 index 0000000..689e6dc --- /dev/null +++ b/board/emma3sllp/lowlevel_init.S @@ -0,0 +1,190 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/asm.h> +#include <asm/regdef.h> +#include "emma3sllp.h" + +.text +.set noreorder +.set mips32 + +.macro REGWR offset, val + li t1, \val + sw t1, \offset(t0) +.endm + +#define MEM_200US (200 * CPU_CLOCK_RATE / 1000000) + +.global lowlevel_init +lowlevel_init: + + /* =================================== */ + /* enable peripherals */ + /* =================================== */ + li t0, BHIF_BASE_ADDRESS + + /* 17: usb, 18: ethernet, 19: fuart0 */ + REGWR BHIF_ALTERNATE0 0x000e0000 + + /* =================================== */ + /* set flash options */ + /* =================================== */ + li t0, BROI_BASE_ADDRESS + + /* change max size flash rom to 64Mb + to make it start from 0xbc000000 */ + lw t1, BROI_ROM_MODE(t0) + li t2, 0x08 + sub t2, zero, t2 + and t1, t1, t2 + ori t1, t1, 0x04 + sw t1, BROI_ROM_MODE(t0) + + /* enable write (for 4 possible flash chips) */ + lw t1, BROI_ROM_IF_MODE(t0) + ori t1, t1, 0x0f + sw t1, BROI_ROM_IF_MODE(t0) + + /* =================================== */ + /* DDR2 initialization */ + /* =================================== */ + li t0, MIF_BASE_ADDRESS + + /* + set wiring delay + 91-467ps @ 327.68MHz + 110-440ps @ 333.33MHz + */ + REGWR MIF_DLLOFSTW 0x0000e1e1 + REGWR MIF_DLLOFSTR 0x00002424 + + /* 316-350MHz (FSL=6) */ + REGWR MIF_DLLCTRL 0x00000020 + + /* exit from stand-by mode */ + REGWR MIF_DLLSTBY 0x00000000 + + /* clear rst */ + REGWR MIF_IOLHRSTB 0x00000001 + + /* wait until locked */ + li t2, 0x1 +1: + lw t1, MIF_DLLCTRL(t0) + and t1, t2 + bne t1, t2, 1b + nop + + /* wait until fixed */ + li t2, 0x1 +1: + lw t1, MIF_IOLHCTRL(t0) + and t1, t2 + bne t1, t2, 1b + nop + + /* clear rst */ + REGWR MIF_RSTB 0x00000001 + + /* set on-die termination to 75ohm and enable clock */ + REGWR MIF_ODTSW 0x00000101 + + /* 200us */ + li t2, MEM_200US +1: + bne t2, zero, 1b + addi t2, -1 + + /* + column 10 bits (A0 - A9), row 13 bits (A0 - A12) + CAS latency 5, 16-bit bus, 4 banks + */ + REGWR MIF_CONFIG1 0x74ba1b65 + + /* small PCB delay, one CS, 64Mb */ + REGWR MIF_CONFIG2 0x0aa20049 + + /* CKE high */ + REGWR MIF_INIT 0x00000020 + + /* 400ns */ + .rept 16 + nop + .endr + + /* precharge all banks (BA0=0, BA1=0, A10=1) */ + REGWR MIF_INIT 0x10000004 + /* EMRS(2): (BA1=1, BA0=0, Ax=0) */ + REGWR MIF_INIT 0x00020002 + /* EMRS(3): (BA0=1, BA1=1, Ax=0) */ + REGWR MIF_INIT 0x00030002 + /* EMRS(1): enable DLL (BA0=1, BA1=0, Ax=0) */ + REGWR MIF_INIT 0x00010002 + + /* + MRS: reset DLL (A8=1), BL=4 (A1=1) + CL=5 (A4=1, A6=1), WR=5 (A11=1) + */ + REGWR MIF_INIT 0x25480002 + + /* 200us */ + li t2, MEM_200US +1: + bne t2, zero, 1b + addi t2, -1 + + /* precharge all banks (BA0=0, BA1=0, A10=1) */ + REGWR MIF_INIT 0x10000004 + /* refresh */ + REGWR MIF_INIT 0x00000001 + /* refresh */ + REGWR MIF_INIT 0x00000001 + + /* 100ns */ + .rept 4 + nop + .endr + + /* + MRS: clear DLL reset flag (A8=0) + leave other parms as in earlier issued MRS + */ + REGWR MIF_INIT 0x21480002 + + /* + EMRS(1): OCD calibration + driver strength weak (A1=1), Rtt=75ohm (A2=1, A6=0) + */ + REGWR MIF_INIT 0x00590002 + + /* + set refresh interval to (0x50 * 16 * SCLK) + register = (0x50 | REFRESH_ENABLE) + REFRESH_ENABLE = 0x100 + */ + REGWR MIF_REFCNT 0x00000150 + + jr ra + nop diff --git a/board/emma3sllp/u-boot.lds b/board/emma3sllp/u-boot.lds new file mode 100644 index 0000000..73979af --- /dev/null +++ b/board/emma3sllp/u-boot.lds @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk Engineering, <wd(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") +*/ +OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips") +OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = .; + _gp = ALIGN(16) + 0x7ff0; + + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + + .sdata : { *(.sdata) } + + .u_boot_cmd : { + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + uboot_end_data = .; + num_got_entries = (__got_end - __got_start ) >> 2; + + . = ALIGN(4); + .sbss (NOLOAD) : { *(.sbss) } + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } + uboot_end = .; +} diff --git a/doc/README.emma3sllp b/doc/README.emma3sllp new file mode 100644 index 0000000..dfefa9a --- /dev/null +++ b/doc/README.emma3sllp @@ -0,0 +1,10 @@ +EMMA3SL/LP + +generation: 0x02000011 (EMMA3SL/L) +product version: 0x018e +cpu: 4KEc, 288MHz +endianess: big +unified mem clock: 156MHz (SCLK = MCLK/2 = 312/2) +flash: S29GL064N90BFI04 (8Mb, 16bit, bottom boot) +memory: EDE5116AJBG-6E-E (64Mb, 16bit, 667Mbps) +ethernet: KSZ8041NL, RMII diff --git a/include/configs/emma3sllp.h b/include/configs/emma3sllp.h new file mode 100644 index 0000000..599104e --- /dev/null +++ b/include/configs/emma3sllp.h @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2010 + * Serge Ziryukin, ftrvxmtrx(a)gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/addrspace.h> + +#define CONFIG_BOOT_RETRY_TIME -1 +#define CONFIG_MIPS32 1 + +#define CPU_CLOCK_RATE 288000000 + +#define CONFIG_BOOTDELAY 5 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_TIMESTAMP +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_BOOTARGS "" +#define CONFIG_EXTRA_ENV_SETTINGS "" +#define CONFIG_BOOTCOMMAND "" +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_SAVEENV + +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_USB +#undef CONFIG_CMD_FAT + +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_BSP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_UNZIP +#define CONFIG_CMD_PORTIO + +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 + +/* 256Kb */ +#define CONFIG_SYS_MALLOC_LEN (256 << 10) +/* 64Kb */ +#define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10) + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_SIZE (64 << 20) +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SYS_LOAD_ADDR 0x80400000 +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x80800000 + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +/* one flash bank */ +#define PHYS_FLASH_1 0xbc000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 135 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_FLASH_PROTECTION 1 + +/* erase/write timeouts in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) + +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +/* print 'E' for empty sector on flinfo */ +#define CONFIG_SYS_FLASH_EMPTY_INFO + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN 0x40000 + +/* env on flash */ +#define CONFIG_ENV_ADDR \ + (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE (64 << 10) +#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE + +/* cache */ +#define CONFIG_SYS_DCACHE_SIZE (8 << 10) /* 8kB */ +#define CONFIG_SYS_ICACHE_SIZE (8 << 10) /* 8kB */ +#define CONFIG_SYS_CACHELINE_SIZE 16 + +/* serial */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 4 +#define CONFIG_SYS_NS16550_CLK 18432000 +#define CONFIG_SYS_NS16550_COM1 0xb0101000 +#define CONFIG_SYS_NS16550_COM2 0xb0102000 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#endif /* __CONFIG_H */ -- 1.7.1

3 3

[U-Boot] [PATCH] Adds driver for Xilinx' xps_spi SPI controller.
by Graeme Smecher 02 Apr '12

02 Apr '12

This code differs in only trivial ways from the altera_spi driver. It plays nice with Thomas Chou's mmc_spi driver, as well as with SPI flash. Documentation for the SPI core is available here: http://www.xilinx.com/support/documentation/ip_documentation/xps_spi.pdf Signed-off-by: Graeme Smecher <graeme.smecher(a)mail.mcgill.ca> --- drivers/spi/Makefile | 1 + drivers/spi/xilinx_spi.c | 173 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 174 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/xilinx_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index dfcbb8b..34e0f31 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libspi.a COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o +COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c new file mode 100644 index 0000000..bda7c5b --- /dev/null +++ b/drivers/spi/xilinx_spi.c @@ -0,0 +1,173 @@ +/* + * Xilinx SPI driver + * + * based on bfin_spi.c, by way of altera_spi.c + * Copyright (c) 2005-2008 Analog Devices Inc. + * Copyright (c) 2010 Thomas Chou <thomas(a)wytron.com.tw> + * Copyright (c) 2010 Graeme Smecher <graeme.smecher(a)mail.mcgill.ca> + * + * Licensed under the GPL-2 or later. + */ +#include <common.h> +#include <asm/io.h> +#include <malloc.h> +#include <spi.h> + +#define XILINX_SPI_RR 0x6c +#define XILINX_SPI_TR 0x68 +#define XILINX_SPI_SR 0x64 +#define XILINX_SPI_CR 0x60 +#define XILINX_SPI_SSR 0x70 + +#define XILINX_SPI_SR_RX_EMPTY_MSK 0x01 + +#define XILINX_SPI_CR_DEFAULT (0x0006) +#define XILINX_SPI_CR_MSS_MSK (0x0080) + +#if XPAR_XSPI_NUM_INSTANCES > 4 +# warning "The xilinx_spi driver will ignore some of your SPI peripherals!" +#endif + +static ulong xilinx_spi_base_list[] = { +#ifdef XPAR_SPI_0_BASEADDR + XPAR_SPI_0_BASEADDR, +#endif +#ifdef XPAR_SPI_1_BASEADDR + XPAR_SPI_1_BASEADDR, +#endif +#ifdef XPAR_SPI_2_BASEADDR + XPAR_SPI_2_BASEADDR, +#endif +#ifdef XPAR_SPI_3_BASEADDR + XPAR_SPI_3_BASEADDR, +#endif +}; + +struct xilinx_spi_slave { + struct spi_slave slave; + ulong base; +}; +#define to_xilinx_spi_slave(s) container_of(s, struct xilinx_spi_slave, slave) + +__attribute__((weak)) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus < ARRAY_SIZE(xilinx_spi_base_list) && cs < 32; +} + +__attribute__((weak)) +void spi_cs_activate(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + writel(~(1 << slave->cs), xilspi->base + XILINX_SPI_SSR); + writel(XILINX_SPI_CR_DEFAULT | XILINX_SPI_CR_MSS_MSK, + xilspi->base + XILINX_SPI_CR); +} + +__attribute__((weak)) +void spi_cs_deactivate(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + + writel(XILINX_SPI_CR_DEFAULT, xilspi->base + XILINX_SPI_CR); + writel(~0, xilspi->base + XILINX_SPI_SSR); +} + +void spi_init(void) +{ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct xilinx_spi_slave *xilspi; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + xilspi = malloc(sizeof(*xilspi)); + if (!xilspi) + return NULL; + + xilspi->slave.bus = bus; + xilspi->slave.cs = cs; + xilspi->base = xilinx_spi_base_list[bus]; + debug("%s: bus:%i cs:%i base:%lx\n", __func__, + bus, cs, xilspi->base); + + return &xilspi->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + free(xilspi); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + writel(XILINX_SPI_CR_DEFAULT, xilspi->base + XILINX_SPI_CR); + writel(~0, xilspi->base + XILINX_SPI_SSR); + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + writel(~0, xilspi->base + XILINX_SPI_SSR); +} + +#ifndef CONFIG_XILINX_SPI_IDLE_VAL +# define CONFIG_XILINX_SPI_IDLE_VAL 0xff +#endif + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave); + /* assume spi core configured to do 8 bit transfers */ + uint bytes = bitlen / 8; + const uchar *txp = dout; + uchar *rxp = din; + + debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, + slave->bus, slave->cs, bitlen, bytes, flags); + if (bitlen == 0) + goto done; + + if (bitlen % 8) { + flags |= SPI_XFER_END; + goto done; + } + + /* empty read buffer */ + while (!(readl(xilspi->base + XILINX_SPI_SR) & + XILINX_SPI_SR_RX_EMPTY_MSK)) + readl(xilspi->base + XILINX_SPI_RR); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + while (bytes--) { + uchar d = txp ? *txp++ : CONFIG_XILINX_SPI_IDLE_VAL; + debug("%s: tx:%x ", __func__, d); + writel(d, xilspi->base + XILINX_SPI_TR); + while (readl(xilspi->base + XILINX_SPI_SR) & + XILINX_SPI_SR_RX_EMPTY_MSK) + ; + d = readl(xilspi->base + XILINX_SPI_RR); + if (rxp) + *rxp++ = d; + debug("rx:%x\n", d); + } + done: + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return 0; +} -- 1.6.3.3

6 11

[U-Boot] [PATCH 00/11] MIPS: fixes and updates
by Daniel Schwierzeck 02 Apr '12

02 Apr '12

This series contains bugfixes and coding style cleanups. Furthermore it contains some extensions for MIPS24k and MIPS34k cores as preparation for merging the support for various Lantiq SoCs. Daniel Schwierzeck (11): MIPS: board.c: make checkpatch.pl clean MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined MIPS: board.c: fix init of flash data in bd_info MIPS: add register definition for EBase register MIPS: add sleep handler for slave CPUs in multi-processor systems MIPS: make cache operation mode configurable in dcache_enable() MIPS: extend cache initialization for MIPS24K and MIPS34K cores MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores MIPS: add header file for generic GPIO API MIPS: add init hook for CPU specific initialization MIPS: MAKEALL: fix lists for MIPSel and MIPS boards MAKEALL | 11 +--- arch/mips/cpu/mips32/cache.S | 24 ++++++- arch/mips/cpu/mips32/start.S | 37 ++++++++++- arch/mips/include/asm/gpio.h | 13 ++++ arch/mips/include/asm/mipsregs.h | 20 ++++++ arch/mips/lib/board.c | 139 +++++++++++++++++++++----------------- 6 files changed, 171 insertions(+), 73 deletions(-) create mode 100644 arch/mips/include/asm/gpio.h -- 1.7.7.2

9 49

[U-Boot] [PATCH] Honor /memory/reg node in DTB files
by Deepak Saxena 31 Mar '12

31 Mar '12

commit 341764495180a712b9aaccfa0479b2ff7e44e35b Author: Deepak Saxena <deepak_saxena(a)mentor.com> Date: Mon Dec 6 15:52:07 2010 -0800 Honor /memory/reg node in DTB files This patch adds code to the bootm path to check if a valid /memory/reg node exists in the DTB file and if so, it does not override it with the values in bi_memstart and bi_memsize. This is particularly useful in multi-core environments where the memory may be partitioned across a large number of nodes. While the same can be accomplished on certain boards (p1022ds and p1_p2_rdb) by using the bootm_low and bootm_size environment variables, that solution is not universal and requires adding code ft_board_setup() for any new board that wants to support AMP operation. Also, given that the DTB is already used to partition board devices (see commit dc2e673 in the Linux kernel tree), it makes sense to allow memory to be partitioned the same way from a user configuration perspective. This patch allows for the user to override the DTB file parameters on the p1022ds and p1_p2_rdb boards by setting the bootm_low and bootm_size to something other than bi_memstart and bi_memsize. In the long-term, those env variables should be depecrated and removed and system implementors should provide the memory partitioning information in the DTB. Signed-off-by: Deepak Saxena <deepak_saxena(a)mentor.com> Signed-off-by: Hollis Blanchard <hollis_blanchard(a)mentor.com> --- See http://lists.denx.de/pipermail/u-boot/2010-December/083057.html for initial proposal on this. diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 4540364..6d384e3 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -377,6 +377,55 @@ static void ft_fixup_qe_snum(void *blob) } #endif +/* + * Check to see if an valid memory/reg property exists + * in the fdt. If so, we do not overwrite it with what's + * been scanned. + * + * Valid mean all the following: + * + * - Memory node has a device-type of "memory" + * - A reg property exists which: + * + has exactly as many cells as #address-cells + #size-cells + * + provides a range that is within [bi_memstart, bi_memstart + bi_memsize] + */ +static int ft_validate_memory(void *blob, bd_t *bd) +{ + int nodeoffset; + u32 *addrcell = (u32*)fdt_getprop(blob, 0, "#address-cells", NULL); + u32 *sizecell = (u32*)fdt_getprop(blob, 0, "#size-cells", NULL); + u64 reg_base, reg_size; + void *reg, *dtype; + int len; + + if ((nodeoffset = fdt_path_offset(blob, "/memory")) >= 0) + { + dtype = fdt_getprop(blob, nodeoffset, "device_type", &len); + if (!dtype || (strcmp(dtype, "memory") != 0)) + return 0; + + reg = fdt_getprop(blob, nodeoffset, "reg", &len); + if (reg && len == ((*addrcell + *sizecell) * 4)) { + if (*addrcell == 2) { + reg_base = ((u64*)reg)[0]; + reg_size = ((u64*)reg)[1]; + } else { + reg_base = ((u32*)reg)[0]; + reg_size = ((u32*)reg)[1]; + } + + if ((reg_size) && + (reg_base >= (u64)bd->bi_memstart) && + ((reg_size + reg_base) + <= ((u64)bd->bi_memstart + (u64)bd->bi_memsize))) + return 1; + } + } + + return 0; + +} + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -434,7 +483,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); #endif - fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); + if (!ft_validate_memory(blob, bd)) + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #ifdef CONFIG_MP ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize); diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 5cdee9f..7378d88 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -320,7 +320,8 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); - fdt_fixup_memory(blob, (u64)base, (u64)size); + if (base != (phys_addr_t)bd->bi_memstart && size != (phys_addr_t)bd->bi_memsize) + fdt_fixup_memory(blob, (u64)base, (u64)size); FT_FSL_PCI_SETUP; diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index fae31f2..5e4adc6 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -220,9 +220,10 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); - ft_pci_board_setup(blob); + if (base != (phys_addr_t)bd->bi_memstart && size != (phys_addr_t)bd->bi_memsize) + fdt_fixup_memory(blob, (u64)base, (u64)size); - fdt_fixup_memory(blob, (u64)base, (u64)size); + ft_pci_board_setup(blob); } #endif

7 24

[U-Boot] [PATCH 0/3] Fix conflicting definitions of flush_dcache
by Stefan Kristiansson 30 Mar '12

30 Mar '12

nios2 and a couple of network drivers have been using a non defined API to flush the data cache (flush_dcache(ulong, ulong)), this is problematic since it conflicts with other architectures definitions of flush_dcache. This series cleans that up by letting the two network drivers use the defined flush_dcache_range(ulong, ulong) API. It also adds this function to the nios2 architecture to avoid breakage. Stefan Kristiansson (3): net/ethoc: use flush_dcache_range instead of flush_dcache net/altera_tse: use flush_dcache_range instead of flush_dcache nios2: add flush_dcache_range function arch/nios2/lib/cache.S | 10 ++++++++++ drivers/net/altera_tse.c | 9 ++++++--- drivers/net/ethoc.c | 6 +++--- 3 files changed, 19 insertions(+), 6 deletions(-) -- 1.7.5.4

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[U-Boot] u-boot usb-ethernet patch
by Mehmet Fatih Özay 27 Mar '12

27 Mar '12

Hello all We are using OMAP 3530 board and SMSC9512 usb-ethernet adapter. The main goal is to connect this adapter through USB OTG port and initialize at u-boot. In order to do it, we are using your u-boot patches for usb-ethernet SMSC95xx ( we patch your patch file to our u-boot-release (version u-boot 2009.11-svn12). What we succeed so far is introducing SMSC9512 to the system.As you can see from debugging below, we couldnot succeed to configure SMSC9512 and so we couldnot make ethernet work. By the way, USB OTG is connected to the OMAP through TPS6593. OMAP3 SBC3530 # usb start do usb (Re)start USB... USB: scanning bus for devices... New Device 0 usb_control_msg: devnum: 0x0, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x40 set address 1 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x19 get_conf_no 0 Result 25, wLength 25 if 0, ep 0 ##EP epmaxpacketin[1] = 1 set configuration 1 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 new device strings: Mfr=0, Product=0, SerialNumber=0 Manufacturer Product SerialNumber usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 0x9 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x2 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x3 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 New Device 1 usb_control_msg: devnum: 0x0, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x40 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 set address 2 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x2 index 0x0 length 0x0 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x27 get_conf_no 0 Result 39, wLength 39 if 0, ep 0 if 0, ep 1 if 0, ep 2 ##EP epmaxpacketin[1] = 64 ##EP epmaxpacketout[2] = 64 ##EP epmaxpacketin[3] = 16 set configuration 1 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 new device strings: Mfr=1, Product=2, SerialNumber=3 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF USB device number 2 default language ID 0x409 usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 length 0xFF usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 length 0xFF usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x303 index 0x409 length 0xFF Manufacturer Modeo Product LAN9512 SerialNumber 00951101 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4 usb_control_msg: devnum: 0x1, configno: 0x0, irq_act_len 0x0 maxchild 0x3 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4 2 USB Device(s) found scanning bus for ethernet devices... i=0 smsc95xx probe vend, product:424 9512 i=1 smsc95xx probe vend, product:424 EC00 USB Ethernet device detected Endpoints In 1 Out 2 Int 3 smsc95xx get info i=2 1 Ethernet Device(s) found OMAP3 SBC3530 # ping 192.168.2.1 ** smsc95xx_halt() ** smsc95xx_init() usb_control_msg: devnum: 0x2, configno: 0x0, irq_act_len 0x0 maxchild 0x0 usb_control_msg: request: 0xA0, requesttype: 0x40, value 0x0 index 0x14 length 0x4 len:-1 sizeof(data):4 Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = -1 ** smsc95xx_halt() ping failed; host 192.168.2.1 is not alive -- Mehmet Fatih Özay Yaz?l?m Gelis,tirme / Software Development C Tech Bil. Tek. San ve Tic. A.S,. (C2Tech) TUBITAK TEKSEB C-210 Gebze, Kocaeli, Turkey Tel: +90 262 644 90 48 Fax: +90 262 644 90 47 http://www.ctech.com.tr

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[U-Boot] [BUG] cfi_flash can't work correctly on latest uboot
by Bob Liu 21 Mar '12

21 Mar '12

Hi, folks I think this patch make cfi_flash can't work correctly. http://git.denx.de/?p=u-boot.git;a=commitdiff;h=df4e813b72bf07d9026b00455f5… --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1426,6 +1426,11 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) #endif }; + /* + * Flash needs to be in status register read mode for + * flash_full_status_check() to work correctly + */ + flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS); -------------------------------------- without this line, flash can't be recognized. So it's correct here. U-Boot 2011.09-svn2735 (ADI-2012R1-pre) (Nov 02 2011 - 15:05:23) CPU: ADSP bf526-0.0 (Detected Rev: 0.2) (parallel flash boot) Board: ADI BF526 EZ-Board board Support: http://blackfin.uclinux.org/ Clock: VCO: 400 MHz, Core: 400 MHz, System: 80 MHz RAM: 64 MiB Flash: Flash protect timeout at address 20004000 data 1520ff01 Flash protect error at address 20004000 Vpp Low Error. 4 MiB Flash protect timeout at address 20000000 data 1520ff01 Flash protect error at address 20000000 Flash protect timeout at address 20002000 data 1520ff01 Flash protect error at address 20002000 Block locked. Vpp Low Error. Flash protect timeout at address 20004000 data 1520ff01 Flash protect error at address 20004000 Vpp Low Error. Flash protect timeout at address 20006000 data 1520ff01 Flash protect error at address 20006000 Flash protect timeout at address 20008000 data 1520ff01 Flash protect error at address 20008000 Block locked. Vpp Low Error. Flash protect timeout at address 2000a000 data 1520ff01 Flash protect error at address 2000a000 Block locked. Vpp Low Error. Flash protect timeout at address 2000c000 data 1520ff01 Flash protect error at address 2000c000 Vpp Low Error. Flash protect timeout at address 2000e000 data 1520ff01 Flash protect error at address 2000e000 Block Erase Error. -------------------------------------- if ((retcode = flash_full_status_check (info, sector, info->erase_blk_tout, prot ? "protect" : "unprotect")) == 0) { @@ -1975,6 +1980,13 @@ ulong flash_get_size (phys_addr_t base, int banknum) case CFI_CMDSET_INTEL_PROG_REGIONS: case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: + /* + * Set flash to read-id mode. Otherwise + * reading protected status is not + * guaranteed. + */ + flash_write_cmd(info, sect_cnt, 0, + FLASH_CMD_READ_ID); ---------------------------------------------------------------------------- But with this two lines. flash ops are not correct. I used old uboot version to read out data from flash. Then tftpboot and run with latest uboot version, you can see that the read out data from flash is different. And without set flash to read-id mode here, it works fine. U-Boot 2010.06 (ADI-2010R1-RC2) (Oct 20 2010 - 04:37:34) CPU: ADSP bf526-0.0 (Detected Rev: 0.2) (parallel flash boot) Board: ADI BF526 EZ-Board board Support: http://blackfin.uclinux.org/ Clock: VCO: 400 MHz, Core: 400 MHz, System: 80 MHz RAM: 64 MiB Flash: 4 MiB In: serial Out: serial Err: serial KGDB: [on serial] ready Net: bfin_mac Hit any key to stop autoboot: 0 bfin> bfin> md 0x20100000 20100000: 56190527 0b223987 d60baf4e 2e871c00 '..V.9".N....... 20100010: 00100000 c42c1c00 a86adb94 01021005 ......,...j..... 20100020: 32356662 2e302d36 2e332d30 2d382e30 bf526-0.0-3.0.8- 20100030: 2d494441 31313032 702d3152 732d6572 ADI-2011R1-pre-s 20100040: 00088b1f 00000000 fdc40302 4514780b .............x.E 20100050: 570e38d6 3d33264f 24f48743 0649d303 .8.WO&3=C..$..I. 20100060: 93080932 834e9970 0931141a 648443a0 2...p.N...1..C.d 20100070: e0804212 12048762 56501a34 086bb2f1 .B..b...4.PV..k. 20100080: 66e0888a d9782808 d165049d 75049945 ...f.(x...e.E..u 20100090: 31415041 ba02cba2 aebbb2ae 8093d34b APA1........K... 201000a0: 682f1a8a 9cffceb8 105ceeea 7f7df77d ../h......\.}.}. 201000b0: 3c7cf3df 3aea984f 9d554ea7 4e753aaa ..|<O..:.NU..:uN 201000c0: b1a94e5d b13ae91e cc436dbe 749b42c2 ]N....:..mC..B.t 201000d0: fa449283 2aa2ec29 a82e0846 b7089ae5 ..D.)..*F....... 201000e0: cc1f9dc4 a9920651 113e5122 b1122213 ....Q..."Q>..".. 201000f0: 308f15a9 b6496a6a 12562598 49a8c8af ...0jjI..%V....I bfin> tftpboot 0x1000 u-boot.bin Using bfin_mac device TFTP from server 10.100.4.174; our IP address is 10.100.4.50 Filename 'u-boot.bin'. Load address: 0x1000 Loading: ############### done Bytes transferred = 213828 (34344 hex) bfin> go 0x1000 ## Starting application at 0x00001000 ... U-Boot 2011.09-svn2735 (ADI-2012R1-pre) (Nov 02 2011 - 15:15:05) CPU: ADSP bf526-0.0 (Detected Rev: 0.2) (parallel flash boot) Board: ADI BF526 EZ-Board board Support: http://blackfin.uclinux.org/ Clock: VCO: 400 MHz, Core: 400 MHz, System: 80 MHz RAM: 64 MiB Flash: 4 MiB In: serial Out: serial Err: serial KGDB: [on serial] ready Net: bfin_mac Hit any key to stop autoboot: 0 bfin> md 0x20100000 20100000: 88150020 ffff0001 bfcfffff ffffffff ............... 20100010: ffffffff ffffffff ffffffff ffffffff ................ 20100020: 00520051 00030059 00390000 00000000 Q.R.Y.....9..... 20100030: 00000000 00170000 00850020 00040095 ........ ....... 20100040: 000a0000 00030000 00020000 00160000 ................ 20100050: 00000001 00000000 00070002 00200000 .............. . 20100060: 003e0000 00000000 ffff0001 ffffffff ..>............. 20100070: 0050ffff 00490052 00330031 000300e6 ..P.R.I.1.3..... 20100080: 00000000 00030001 00180000 00010090 ................ 20100090: 00000080 00040003 00040003 00020001 ................ 201000a0: 00070003 00010002 00110000 00000000 ................ 201000b0: 00070002 00200000 00640000 00010000 ...... ...d..... 201000c0: 00060003 00000000 00640001 00010000 ..........d..... 201000d0: 00070003 00110000 00000000 00070001 ................ 201000e0: 00000000 00640001 00010000 ffff0003 ......d......... 201000f0: ffffffff ffffffff ffffffff ffffffff ................ bfin> flinfo Bank # 1: CFI conformant flash (16 x 16) Size: 4 MB in 71 Sectors Intel Standard command set, Manufacturer ID: 0x20, Device ID: 0x8815 Erase timeout: 4096 ms, write timeout: 1 ms Sector Start Addresses: 20000000 RO 20002000 RO 20004000 RO 20006000 RO 20008000 RO 2000A000 RO 2000C000 RO 2000E000 RO 20010000 RO 20020000 RO 20030000 RO 20040000 RO 20050000 RO 20060000 RO 20070000 RO 20080000 RO 20090000 RO 200A0000 RO 200B0000 RO 200C0000 RO 200D0000 RO 200E0000 RO 200F0000 RO 20100000 RO 20110000 RO 20120000 RO 20130000 RO 20140000 RO 20150000 RO 20160000 RO 20170000 RO 20180000 RO 20190000 RO 201A0000 RO 201B0000 RO 201C0000 RO 201D0000 RO 201E0000 RO 201F0000 RO 20200000 RO 20210000 RO 20220000 RO 20230000 RO 20240000 RO 20250000 RO 20260000 RO 20270000 RO 20280000 RO 20290000 RO 202A0000 RO 202B0000 RO 202C0000 RO 202D0000 RO 202E0000 RO 202F0000 RO 20300000 RO 20310000 RO 20320000 RO 20330000 RO 20340000 RO 20350000 RO 20360000 RO 20370000 RO 20380000 RO 20390000 RO 203A0000 RO 203B0000 RO 203C0000 RO 203D0000 RO 203E0000 RO 203F0000 RO bfin> ---------------------------------------------------------------------------- info->protect[sect_cnt] = flash_isset (info, sect_cnt, FLASH_OFFSET_PROTECT, -- Regards, --Bob

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