January 2011 - U-Boot

[U-Boot] [PATCH v2] Net: Add Intel E1000 82574L PCIe card support
by Roy Zang 11 Apr '11

11 Apr '11

Add Intel E1000 82574L PCIe card support. Test on MPC8544DS and MPC8572 board. Add the missing contact information for future support. Signed-off-by: Roy Zang <tie-fei.zang(a)freescale.com> Acked-by: Kumar Gala <galak(a)kernel.crashing.org> --- minor style clean up vs. v1 version. drivers/net/e1000.c | 33 +++++++++++++++++++++++++-------- drivers/net/e1000.h | 6 ++++++ include/pci_ids.h | 1 + 3 files changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 5f390bd..98145bc 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -40,6 +40,8 @@ tested on both gig copper and gig fiber boards * Copyright (C) Linux Networx. * Massive upgrade to work with the new intel gigabit NICs. * <ebiederman at lnxi dot com> + * + * Copyright 2011 Freescale Semiconductor, Inc. */ #include "e1000.h" @@ -100,6 +102,7 @@ static struct pci_device_id supported[] = { {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573E}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573E_IAMT}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573L}, + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82574L}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82546GB_QUAD_COPPER_KSP3}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_DPT}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT}, @@ -331,7 +334,7 @@ static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) if (hw->mac_type == e1000_ich8lan) return FALSE; - if (hw->mac_type == e1000_82573) { + if (hw->mac_type == e1000_82573 || hw->mac_type == e1000_82574) { eecd = E1000_READ_REG(hw, EECD); /* Isolate bits 15 & 16 */ @@ -364,7 +367,7 @@ e1000_acquire_eeprom(struct e1000_hw *hw) return -E1000_ERR_SWFW_SYNC; eecd = E1000_READ_REG(hw, EECD); - if (hw->mac_type != e1000_82573) { + if (hw->mac_type != e1000_82573 || hw->mac_type != e1000_82574) { /* Request EEPROM Access */ if (hw->mac_type > e1000_82544) { eecd |= E1000_EECD_REQ; @@ -498,6 +501,7 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw) eeprom->use_eewr = FALSE; break; case e1000_82573: + case e1000_82574: eeprom->type = e1000_eeprom_spi; eeprom->opcode_bits = 8; eeprom->delay_usec = 1; @@ -1317,6 +1321,9 @@ e1000_set_mac_type(struct e1000_hw *hw) case E1000_DEV_ID_82573L: hw->mac_type = e1000_82573; break; + case E1000_DEV_ID_82574L: + hw->mac_type = e1000_82574; + break; case E1000_DEV_ID_80003ES2LAN_COPPER_SPT: case E1000_DEV_ID_80003ES2LAN_SERDES_SPT: case E1000_DEV_ID_80003ES2LAN_COPPER_DPT: @@ -1487,6 +1494,7 @@ e1000_initialize_hardware_bits(struct e1000_hw *hw) E1000_WRITE_REG(hw, TARC1, reg_tarc1); break; case e1000_82573: + case e1000_82574: reg_ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); reg_ctrl_ext &= ~(1 << 23); reg_ctrl_ext |= (1 << 22); @@ -1728,12 +1736,11 @@ e1000_init_hw(struct eth_device *nic) | E1000_TXDCTL_FULL_TX_DESC_WB; E1000_WRITE_REG(hw, TXDCTL1, ctrl); break; - } - - if (hw->mac_type == e1000_82573) { - uint32_t gcr = E1000_READ_REG(hw, GCR); - gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; - E1000_WRITE_REG(hw, GCR, gcr); + case e1000_82573: + case e1000_82574: + reg_data = E1000_READ_REG(hw, GCR); + reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; + E1000_WRITE_REG(hw, GCR, reg_data); } #if 0 @@ -1812,6 +1819,7 @@ e1000_setup_link(struct eth_device *nic) switch (hw->mac_type) { case e1000_ich8lan: case e1000_82573: + case e1000_82574: hw->fc = e1000_fc_full; break; default: @@ -4560,6 +4568,9 @@ static int e1000_set_phy_type (struct e1000_hw *hw) hw->phy_type = e1000_phy_gg82563; break; } + case BME1000_E_PHY_ID: + hw->phy_type = e1000_phy_bm; + break; /* Fall Through */ default: /* Should never have loaded on this device */ @@ -4646,6 +4657,10 @@ e1000_detect_gig_phy(struct e1000_hw *hw) if (hw->phy_id == M88E1111_I_PHY_ID) match = TRUE; break; + case e1000_82574: + if (hw->phy_id == BME1000_E_PHY_ID) + match = TRUE; + break; case e1000_80003es2lan: if (hw->phy_id == GG82563_E_PHY_ID) match = TRUE; @@ -4710,6 +4725,7 @@ e1000_set_media_type(struct e1000_hw *hw) break; case e1000_ich8lan: case e1000_82573: + case e1000_82574: /* The STATUS_TBIMODE bit is reserved or reused * for the this device. */ @@ -5125,6 +5141,7 @@ void e1000_get_bus_type(struct e1000_hw *hw) case e1000_82571: case e1000_82572: case e1000_82573: + case e1000_82574: case e1000_80003es2lan: hw->bus_type = e1000_bus_type_pci_express; break; diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index eb0804b..720d8c6 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -2,6 +2,7 @@ Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. + Copyright 2011 Freescale Semiconductor, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free @@ -81,6 +82,7 @@ typedef enum { e1000_82571, e1000_82572, e1000_82573, + e1000_82574, e1000_80003es2lan, e1000_ich8lan, e1000_num_macs @@ -200,6 +202,7 @@ typedef enum { e1000_phy_gg82563, e1000_phy_igp_3, e1000_phy_ife, + e1000_phy_bm, e1000_phy_undefined = 0xFF } e1000_phy_type; @@ -286,6 +289,7 @@ struct e1000_phy_stats { #define E1000_DEV_ID_82573E 0x108B #define E1000_DEV_ID_82573E_IAMT 0x108C #define E1000_DEV_ID_82573L 0x109A +#define E1000_DEV_ID_82574L 0x10D3 #define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5 #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096 #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098 @@ -2417,6 +2421,8 @@ struct e1000_hw { #define L1LXT971A_PHY_ID 0x001378E0 #define GG82563_E_PHY_ID 0x01410CA0 +#define BME1000_E_PHY_ID 0x01410CB0 + /* Miscellaneous PHY bit definitions. */ #define PHY_PREAMBLE 0xFFFFFFFF #define PHY_SOF 0x01 diff --git a/include/pci_ids.h b/include/pci_ids.h index cb8398d..02a6c6e 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -1853,6 +1853,7 @@ #define PCI_DEVICE_ID_INTEL_82573E 0x108B #define PCI_DEVICE_ID_INTEL_82573E_IAMT 0x108C #define PCI_DEVICE_ID_INTEL_82573L 0x109A +#define PCI_DEVICE_ID_INTEL_82574L 0x10D3 #define PCI_DEVICE_ID_INTEL_82546GB_QUAD_COPPER_KSP3 0x10B5 #define PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_DPT 0x1096 #define PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT 0x1098 -- 1.7.3.5

3 2

[U-Boot] [PATCH] PowerPC: Add support for -msingle-pic-base
by Joakim Tjernlund 11 Apr '11

11 Apr '11

-msingle-pic-base is a new gcc option for ppc and it reduces the size of my u-boot with 6-8 KB. While at it, add -fno-jump-tables too to save a few more bytes. -msingle-pic-base will be in gcc 4.6, however backported patches are available at http://bugs.gentoo.org/show_bug.cgi?id=347281 Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- arch/powerpc/config.mk | 2 ++ arch/powerpc/cpu/74xx_7xx/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc512x/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc5xx/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc5xxx/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc8220/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc824x/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc8260/start.S | 6 +++++- arch/powerpc/cpu/mpc83xx/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc85xx/start.S | 10 ++++++++++ arch/powerpc/cpu/mpc86xx/start.S | 11 ++++++++++- arch/powerpc/cpu/mpc8xx/start.S | 11 ++++++++++- arch/powerpc/cpu/ppc4xx/start.S | 22 ++++++++++++++++++++-- 13 files changed, 127 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index b04e968..b5087d6 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -26,6 +26,8 @@ CROSS_COMPILE ?= ppc_8xx- STANDALONE_LOAD_ADDR = 0x40000 PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections +PLATFORM_RELFLAGS += $(call cc-option,-msingle-pic-base,) +PLATFORM_RELFLAGS += $(call cc-option,-fno-jump-tables,) PLATFORM_CPPFLAGS += -DCONFIG_PPC -D__powerpc__ PLATFORM_LDFLAGS += -n --gc-sections diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S index 985e1ce..bd10d18 100644 --- a/arch/powerpc/cpu/74xx_7xx/start.S +++ b/arch/powerpc/cpu/74xx_7xx/start.S @@ -274,7 +274,11 @@ in_flash: stwu r0, -4(r1) /* stack backtraces terminate cleanly */ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* run low-level CPU init code (from Flash) */ bl cpu_init_f sync @@ -588,6 +592,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index 10557cf..fe8941e 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -255,7 +255,11 @@ in_flash: /*------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ lis r3, CONFIG_SYS_IMMR@h /* run low-level CPU init code (in Flash) */ @@ -486,6 +490,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S index 3dbd23d..7dcb076 100644 --- a/arch/powerpc/cpu/mpc5xx/start.S +++ b/arch/powerpc/cpu/mpc5xx/start.S @@ -174,7 +174,11 @@ in_flash: /*----------------------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ @@ -363,6 +367,11 @@ relocate_code: mr r10, r5 /* Save copy of monitor destination Address in SRAM */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 38c0bd7..8250580 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -160,7 +160,11 @@ lowboot_reentry: /*--------------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ @@ -549,6 +553,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S index ca42678..7e940d3 100644 --- a/arch/powerpc/cpu/mpc8220/start.S +++ b/arch/powerpc/cpu/mpc8220/start.S @@ -129,7 +129,11 @@ _start: /*--------------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ @@ -522,6 +526,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S index 0dd1300..cab0eef 100644 --- a/arch/powerpc/cpu/mpc824x/start.S +++ b/arch/powerpc/cpu/mpc824x/start.S @@ -183,7 +183,11 @@ in_flash: /*----------------------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ @@ -452,6 +456,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ #ifdef CONFIG_SYS_RAMBOOT lis r4, CONFIG_SYS_SDRAM_BASE@h /* Source Address */ diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index 255a15e..b924798 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -236,7 +236,11 @@ in_flash: /*--------------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 460ac9a..0c8e884 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -285,7 +285,11 @@ in_flash: /*------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ lis r3, CONFIG_SYS_IMMR@h /* run low-level CPU init code (in Flash)*/ @@ -822,6 +826,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 945c1b8..d4ef4ea 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -421,6 +421,11 @@ _start_cont: stw r0,+12(r1) /* Save return addr (underflow vect) */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif bl cpu_init_early_f /* switch back to AS = 0 */ @@ -921,6 +926,11 @@ relocate_code: mr r10,r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3,r5 /* Destination Address */ lis r4,CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4,r4,CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S index 4c29de6..198275c 100644 --- a/arch/powerpc/cpu/mpc86xx/start.S +++ b/arch/powerpc/cpu/mpc86xx/start.S @@ -255,7 +255,11 @@ addr_trans_enabled: stwu r0, -4(r1) /* stack backtraces terminate cleanly */ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* run low-level CPU init code (from Flash) */ bl cpu_init_f sync @@ -620,6 +624,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 6a16c26..206d287 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -188,7 +188,11 @@ in_flash: /*----------------------------------------------------------------------*/ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ @@ -473,6 +477,11 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 0e75794..03d07a4 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -260,6 +260,11 @@ bl reconfig_tlb0 #endif GET_GOT +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f /* NOTREACHED - board_init_f() does not return */ @@ -797,7 +802,11 @@ _start: ori r0,r0, RESET_VECTOR@l stwu r1,-8(r1) /* Save back chain and move SP */ stw r0,+12(r1) /* Save return addr (underflow vect) */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif #ifdef CONFIG_NAND_SPL bl nand_boot_common /* will not return */ #else @@ -912,7 +921,11 @@ _start: stwu r0, -4(r1) /* stack backtraces terminate cleanly */ GET_GOT /* initialize GOT access */ - +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif bl board_init_f /* run first part of init code (from Flash) */ /* NOTREACHED - board_init_f() does not return */ @@ -1177,6 +1190,11 @@ _start: stw r0, +12(r1) /* Save return addr (underflow vect) */ #endif /* CONFIG_SYS_INIT_DCACHE_CS */ +#if defined(__pic__) && __pic__ == 1 + /* Needed for upcoming -msingle-pic-base */ + bl _GLOBAL_OFFSET_TABLE_@local-4 + mflr r30 +#endif #ifdef CONFIG_NAND_SPL bl nand_boot_common /* will not return */ #else -- 1.7.2.2

2 1

[U-Boot] [PATCH] Blackfin: cmd_gpio: allow port pins over 15
by Andreas Pretzsch 11 Apr '11

11 Apr '11

The pin portion of the specified GPIO was limited to 0..15. While this is correct for Blackfins with different bank names (e.g. BF537 with PF, PG, PH with 16 pins each), it's not sufficient for Blackfins with linear naming like the BF561 (PF0..PF47). Therefore check only for a valid GPIO number. Attn.: Passing a # too high for the port will wrap over to the next port(s), e.g. PA16 => PB0. Not a problem for correct scripts, though. Signed-off-by: Andreas Pretzsch <apr(a)cn-eng.de> --- arch/blackfin/cpu/cmd_gpio.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/arch/blackfin/cpu/cmd_gpio.c b/arch/blackfin/cpu/cmd_gpio.c index e96413b..9fd5a19 100644 --- a/arch/blackfin/cpu/cmd_gpio.c +++ b/arch/blackfin/cpu/cmd_gpio.c @@ -83,7 +83,11 @@ int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* grab the <#> portion */ ulong pin = simple_strtoul(str_pin + 1, NULL, 10); - if (pin > 15) + /* Attn.: passing a # too high for the port will wrap over to + * the next port(s), e.g. PA16 => PB0. + * Check relaxed due to linear ports (e.g. PF0..PF47 @ BF561). + */ + if (!gpio_is_valid(pin)) goto show_usage; /* grab the pin before we tweak it */ -- 1.7.2.3

2 2

[U-Boot] [PATCH 0/2] ea20: build fixes
by Ben Gardiner 11 Apr '11

11 Apr '11

There are two separate issues causing failure of ea20 builds. I discovered them while trying to build a da850evm load with RMII support. The second patch affects all boards that could use CONFIG_DRIVER_TI_EMAC_USE_RMII of which ea20 is the only one set default in u-boot. The first patch fixes the second problem I ran into trying to build ea20 after developping the RMII patch. Ben Gardiner (2): ea20: fix libea20.o not found ea20: fix undefined PHY_* errors board/davinci/ea20/Makefile | 2 +- drivers/net/davinci_emac.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-)

4 7

[U-Boot] [U-BOOT] [PATCH] bootm: replace blob_start with image_start
by Lei Wen 11 Apr '11

11 Apr '11

For uImage always has a 64 bytes header, we couldn't expect to do the xip from the header but should xip from the image start. The latter logic in that section is also move the image from image_start to the load address, so sync this logic to the xip operation. Signed-off-by: Lei Wen <leiwen(a)marvell.com> --- common/cmd_bootm.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 18019d6..81fc4be 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -344,7 +344,7 @@ static int bootm_load_os(image_info_t os, ulong *load_end, int boot_progress) switch (comp) { case IH_COMP_NONE: - if (load == blob_start) { + if (load == image_start) { printf (" XIP %s ... ", type_name); } else { printf (" Loading %s ... ", type_name); -- 1.7.0.4

5 8

[U-Boot] [WIP/PATCH 0/4] unify SPI flash drivers
by Mike Frysinger 11 Apr '11

11 Apr '11

The amount of duplication across SPI flash driver has always annoyed me, and we've seen bugs that affect multiple drivers fixed in only some, and I figure if the Linux kernel driver can unify these things, then there is really no reason we can't too. So this here are a few incremental patches to get us closer to a unified driver. I think the diffstat speaks for itself, and there are even more pieces here which could possibly be merged. But I got bored for now. I've only lightly tested them so far with one SPI flash driver, so for now they're not for merging. Once I can get more testing on our side, I'll send out a pull request. For you adventurous/bored types, you can grab these from my sf branch: git://git.denx.de/u-boot-blackfin.git Any feedback as to success/failure would be great. Mike Frysinger (4): sf: unify read/write helpers sf: unify status polling for ready bit sf: unify erase functions sf: unify read functions drivers/mtd/spi/atmel.c | 49 +--------- drivers/mtd/spi/eon.c | 121 ++----------------------- drivers/mtd/spi/macronix.c | 126 ++------------------------ drivers/mtd/spi/spansion.c | 120 +----------------------- drivers/mtd/spi/spi_flash.c | 170 +++++++++++++++++++++++++--------- drivers/mtd/spi/spi_flash_internal.h | 23 +++++ drivers/mtd/spi/sst.c | 116 +---------------------- drivers/mtd/spi/stmicro.c | 125 +------------------------ drivers/mtd/spi/winbond.c | 148 +---------------------------- 9 files changed, 190 insertions(+), 808 deletions(-) -- 1.7.4.rc1

4 10

[U-Boot] [PATCH] pm9g45_v1.3: make ethernet works
by Asen Dimov 11 Apr '11

11 Apr '11

Signed-off-by: Asen Dimov <dimov(a)ronetix.at> --- board/ronetix/pm9g45/pm9g45.c | 15 +++++++++++++++ include/configs/pm9g45.h | 5 +++++ 2 files changed, 20 insertions(+), 0 deletions(-) diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index 79b7c9d..0e1d6b2 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -96,6 +96,8 @@ static void pm9g45_nand_hw_init(void) static void pm9g45_macb_hw_init(void) { at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE; + unsigned long erstl; /* * PD2 enables the 50MHz oscillator for Ethernet PHY @@ -120,6 +122,19 @@ static void pm9g45_macb_hw_init(void) at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0); at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0); + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; + + /* Need to reset PHY -> 500ms reset */ + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) | + AT91_RSTC_MR_URSTEN, &rstc->mr); + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); + + /* Wait for end hardware reset */ + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)); + + /* Restore NRST value */ + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); + /* Re-enable pull-up */ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index ec51ccf..4d8089f 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -125,6 +125,11 @@ #define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1 +#define CONFIG_MACB_SEARCH_PHY +#define CONFIG_CMD_MII +#define CONFIG_OVERWRITE_ETHADDR_ONCE +/* MAC is Organizationally Unique Identifier + 3 octects user numbers */ +#define CONFIG_ETHADDR "02:00:00:fe:ed:00" /* USB */ #define CONFIG_USB_ATMEL -- 1.5.5.6

3 2

[U-Boot] [PATCH 1/2] at91: fixed at91sam9263 system file
by Daniel Gorsulowski 11 Apr '11

11 Apr '11

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski(a)esd.eu> --- arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c | 55 +++++++-------------- 1 files changed, 18 insertions(+), 37 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c index deda3e5..15e880a 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c @@ -3,7 +3,7 @@ * Stelian Pop <stelian.pop(a)leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * - * (C) Copyright 2009 + * (C) Copyright 2009-2011 * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> * esd electronic system design gmbh <www.esd.eu> * @@ -27,78 +27,59 @@ */ #include <common.h> +#include <asm/io.h> #include <asm/arch/hardware.h> -#include <asm/arch/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pio.h> void at91_serial0_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */ - writel(1 << AT91SAM9263_ID_US0, &pmc->pcer); + writel(1 << ATMEL_ID_USART0, &pmc->pcer); } void at91_serial1_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTD, 1, 0); /* RXD1 */ - writel(1 << AT91SAM9263_ID_US1, &pmc->pcer); + writel(1 << ATMEL_ID_USART1, &pmc->pcer); } void at91_serial2_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTD, 3, 0); /* RXD2 */ - writel(1 << AT91SAM9263_ID_US2, &pmc->pcer); + writel(1 << ATMEL_ID_USART2, &pmc->pcer); } -void at91_serial3_hw_init(void) +void at91_seriald_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */ - writel(1 << AT91_ID_SYS, &pmc->pcer); + writel(1 << ATMEL_ID_SYS, &pmc->pcer); } -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif -} - -#ifdef CONFIG_HAS_DATAFLASH +#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_b_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ at91_set_b_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ at91_set_b_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9263_ID_SPI0, &pmc->pcer); + writel(1 << ATMEL_ID_SPI0, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_b_periph(AT91_PIO_PORTA, 5, 1); @@ -128,14 +109,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) void at91_spi1_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9263_ID_SPI1, &pmc->pcer); + writel(1 << ATMEL_ID_SPI1, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTB, 15, 1); @@ -203,12 +184,12 @@ void at91_uhp_hw_init(void) #ifdef CONFIG_AT91_CAN void at91_can_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */ at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */ /* Enable clock */ - writel(1 << AT91SAM9263_ID_CAN, &pmc->pcer); + writel(1 << ATMEL_ID_CAN, &pmc->pcer); } #endif -- 1.5.3

2 1

Re: [U-Boot] U-Boot support for board(s) meesc, otc570
by Reinhard Meyer 11 Apr '11

11 Apr '11

Dear Daniel Gorsulowski, > Hello Albert, > > Albert ARIBAUD wrote: >> Le 18/01/2011 10:27, Daniel Gorsulowski a écrit : >>> Hello again! >> >> Hi Daniel, >> >>> One month ago, I asked you for help (see message below), but got no >>> answer. >> >> Sorry about that. Last quarter of 2010 was rather busy for me. >> >>> Do you see any chance, to fix the at91 tree? >>> >>> There is no way to fix my boards, as long as all at91 builds have >>> fundamental problems. >>> >>> I found a patch series from Alexander Stein, but it seems, this series >>> does not go mainline: >>> http://lists.denx.de/pipermail/u-boot/2010-November/080885.html >>> Should I ask Alexander for resend his pathes? >>> >>> Regards >>> Daniel >> >> Reinhard (Cc:) has lots of fixes in his u-boot-atmel tree; you should try >> its master branch. I'm leaving below your (unanswered, apologies again) >> questions for Reinhard to answer. >> >> Regards, >> Albert. > > Thanks for your response! > I tried Reinhards master branch, but build throws same errors as shown > below. It seems, among other things the atmel usart driver needs an > update to new SoC access. Alexander Steins patch series seems to add this > support. > > I'll wait for a fix until I send patches for my boards. 1. Please send always the mailing list, too! 2. Use the rework101229 branch (minus the last 5 patches). There is lot of cleanup done in the header files and the ATMEL drivers. The at91sam9260(9xe)ek board builds fine and works. Use that as a template or reference what to do. You should *only* need to adapt board/*/files and your configs/<board>.h files. And of course updated entries in boards.cfg. Once the rework is done for *almost* *ALL* AT91 SoCs it will be put for review into mainline, probably for the 06.2011 U-Boot. Best Regards, Reinhard

3 12

[U-Boot] [Patch ARM/AT91] remove __attribute__ ((packed)) in at91 headers
by Jens Scharsig 11 Apr '11

11 Apr '11

* remove __attribute__ ((packed)) to prevent byte access to soc registers in some gcc version Signed-off-by: Jens Scharsig <js_at_ng(a)scharsoft.de> --- see <http://lists.denx.de/pipermail/u-boot/2010-December/084076.html> arch/arm/include/asm/arch-at91/at91_mc.h | 10 +++++----- arch/arm/include/asm/arch-at91/at91_st.h | 2 +- arch/arm/include/asm/arch-at91/at91_tc.h | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91_mc.h b/arch/arm/include/asm/arch-at91/at91_mc.h index acfbd10..09453a9 100644 --- a/arch/arm/include/asm/arch-at91/at91_mc.h +++ b/arch/arm/include/asm/arch-at91/at91_mc.h @@ -36,7 +36,7 @@ typedef struct at91_ebi { u32 csa; /* 0x00 Chip Select Assignment Register */ u32 cfgr; /* 0x04 Configuration Register */ u32 reserved[2]; -} __attribute__ ((packed)) at91_ebi_t; +} at91_ebi_t; #define AT91_EBI_CSA_CS0A 0x0001 #define AT91_EBI_CSA_CS1A 0x0002 @@ -55,11 +55,11 @@ typedef struct at91_sdramc { u32 imr; /* 0x1C SDRAMC Interrupt Mask Register */ u32 icr; /* 0x20 SDRAMC Interrupt Status Register */ u32 reserved[3]; -} __attribute__ ((packed)) at91_sdramc_t; +} at91_sdramc_t; typedef struct at91_smc { u32 csr[8]; /* 0x00 SDRAMC Mode Register */ -} __attribute__ ((packed)) at91_smc_t; +} at91_smc_t; #define AT91_SMC_CSR_RWHOLD(x) ((x & 0x7) << 28) #define AT91_SMC_CSR_RWSETUP(x) ((x & 0x7) << 24) @@ -78,7 +78,7 @@ typedef struct at91_smc { typedef struct at91_bfc { u32 mr; /* 0x00 SDRAMC Mode Register */ -} __attribute__ ((packed)) at91_bfc_t; +} at91_bfc_t; typedef struct at91_mc { u32 rcr; /* 0x00 MC Remap Control Register */ @@ -91,7 +91,7 @@ typedef struct at91_mc { at91_sdramc_t sdramc; /* 0x90 - 0xBC SDRAMC User Interface */ at91_bfc_t bfc; /* 0xC0 BFC User Interface */ u32 reserved2[15]; -} __attribute__ ((packed)) at91_mc_t; +} at91_mc_t; #endif #endif diff --git a/arch/arm/include/asm/arch-at91/at91_st.h b/arch/arm/include/asm/arch-at91/at91_st.h index 53f9320..98b0a76 100644 --- a/arch/arm/include/asm/arch-at91/at91_st.h +++ b/arch/arm/include/asm/arch-at91/at91_st.h @@ -35,7 +35,7 @@ typedef struct at91_st { u32 imr; u32 rtar; u32 crtr; -} __attribute__ ((packed)) at91_st_t ; +} at91_st_t ; #define AT91_ST_CR_WDRST 1 diff --git a/arch/arm/include/asm/arch-at91/at91_tc.h b/arch/arm/include/asm/arch-at91/at91_tc.h index 1e180ad..1eae4e9 100644 --- a/arch/arm/include/asm/arch-at91/at91_tc.h +++ b/arch/arm/include/asm/arch-at91/at91_tc.h @@ -36,7 +36,7 @@ typedef struct at91_tcc { u32 idr; /* 0x28 Interrupt Disable Register */ u32 imr; /* 0x2C Interrupt Mask Register */ u32 reserved3[4]; -} __attribute__ ((packed)) at91_tcc_t; +} at91_tcc_t; #define AT91_TC_CCR_CLKEN 0x00000001 #define AT91_TC_CCR_CLKDIS 0x00000002 @@ -57,7 +57,7 @@ typedef struct at91_tc { at91_tcc_t tc[3]; /* 0x00 TC Channel 0-2 */ u32 bcr; /* 0xC0 TC Block Control Register */ u32 bmr; /* 0xC4 TC Block Mode Register */ -} __attribute__ ((packed)) at91_tc_t; +} at91_tc_t; #define AT91_TC_BMR_TC0XC0S_TCLK0 0x00000000 #define AT91_TC_BMR_TC0XC0S_NONE 0x00000001 -- 1.7.1

2 1