January 2011 - U-Boot

[U-Boot] SteppingStone
by Matt Johnson 26 Jan '11

26 Jan '11

Hello. I have a custom board with a Samsung s3c2410 (arm920t) processor. I have been unable to get the main branch of u-boot to work with this board. However, I have been successful with the old OpenMoko fork. (I believe it is because of the "SteppingStone" microcode. See http://wiki.openmoko.org/wiki/S3C2410_Steppingstone if you're unfamiliar.) I'd prefer to use the main branch, because the OpenMoko fork is old and unmaintained. The OpenMoko project abandoned u-boot some time ago, in favor of their "Qi" bootloader. Has anyone looked at merging the SteppingStone code back in to the main branch? Is there some other workaround that is unclear to me? Are there other bootloaders that support SteppingStone that I could try? I'm looking for something as full-featured as u-boot, but actively maintained. The only other that I've found is Vivi - which is super ancient. Any advice is appreciated. Thanks, Matt

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[U-Boot] How to give RESET_VECTOR_ADDRESS
by Fabian Cenedese 26 Jan '11

26 Jan '11

Hi As the config.mk file is doomed I tried to set my reset vector in another way. I first tried it in the board's config header. But that didn't seem to have an effect. I then tried a config option in the boards.cfg file but that also didn't work. The only way I could get it to work so far was with the config.mk file. What's the new way to give a (CONFIG_)RESET_VECTOR_ADDRESS? Thanks bye Fabi

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[U-Boot] Question: is SZ_* going to be removed or not?
by Reinhard Meyer 26 Jan '11

26 Jan '11

Hello Wolfgang, I heard rumors that the SZ_* defines are going to be outphased. If so, new submissions should not use them anymore, right? Best Regards, Reinhard

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[U-Boot] [PATCH V2 0/5] Add Pantheon soc and dkb board support
by Lei Wen 26 Jan '11

26 Jan '11

This patch set add the Pantheon soc and dkb board support. V2: This patch seris update the seperate mv_common part as suggested. Lei Wen (5): mv: seperate kirkwood and armada from common setting ARM: Add Support for Marvell Pantheon Familiy SoCs serial: add pantheon soc support mvmfp: add MFP configuration support for PANTHEON Pantheon: Add Board Support for Marvell dkb board MAINTAINERS | 4 + arch/arm/cpu/arm926ejs/pantheon/Makefile | 46 ++++++ arch/arm/cpu/arm926ejs/pantheon/cpu.c | 78 ++++++++++ arch/arm/cpu/arm926ejs/pantheon/dram.c | 130 ++++++++++++++++ arch/arm/cpu/arm926ejs/pantheon/timer.c | 204 +++++++++++++++++++++++++ arch/arm/include/asm/arch-armada100/config.h | 50 ++++++ arch/arm/include/asm/arch-kirkwood/config.h | 145 ++++++++++++++++++ arch/arm/include/asm/arch-pantheon/config.h | 44 ++++++ arch/arm/include/asm/arch-pantheon/cpu.h | 79 ++++++++++ arch/arm/include/asm/arch-pantheon/mfp.h | 42 +++++ arch/arm/include/asm/arch-pantheon/pantheon.h | 54 +++++++ board/Marvell/dkb/Makefile | 51 ++++++ board/Marvell/dkb/dkb.c | 53 +++++++ boards.cfg | 1 + drivers/gpio/mvmfp.c | 2 + drivers/serial/serial.c | 2 + include/configs/aspenite.h | 1 + include/configs/dkb.h | 64 ++++++++ include/configs/mv-common.h | 147 +++--------------- 19 files changed, 1071 insertions(+), 126 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/pantheon/Makefile create mode 100644 arch/arm/cpu/arm926ejs/pantheon/cpu.c create mode 100644 arch/arm/cpu/arm926ejs/pantheon/dram.c create mode 100644 arch/arm/cpu/arm926ejs/pantheon/timer.c create mode 100644 arch/arm/include/asm/arch-armada100/config.h create mode 100644 arch/arm/include/asm/arch-kirkwood/config.h create mode 100644 arch/arm/include/asm/arch-pantheon/config.h create mode 100644 arch/arm/include/asm/arch-pantheon/cpu.h create mode 100644 arch/arm/include/asm/arch-pantheon/mfp.h create mode 100644 arch/arm/include/asm/arch-pantheon/pantheon.h create mode 100644 board/Marvell/dkb/Makefile create mode 100644 board/Marvell/dkb/dkb.c create mode 100644 include/configs/dkb.h

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[U-Boot] [PATCH 1/1] cfi fix for Spansion and MB->MiB
by Aaron Williams 26 Jan '11

26 Jan '11

I ran into a problem with the Spansion S29GL064N flash chip in that it returns a manufacturer ID of 0 and it also requires the AMD geometry fixup. Additionally, I modified a few print statements to use KiB/MiB instead of kB/MB. -Aaron Williams diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index dd394a8..105eb3f 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1162,10 +1162,10 @@ void flash_print_info (flash_info_t * info) info->name, (info->portwidth << 3), (info->chipwidth << 3)); if (info->size < 1024*1024) - printf (" Size: %ld kB in %d Sectors\n", + printf (" Size: %ld KiB in %d Sectors\n", info->size >> 10, info->sector_count); else - printf (" Size: %ld MB in %d Sectors\n", + printf (" Size: %ld MiB in %d Sectors\n", info->size >> 20, info->sector_count); printf (" "); switch (info->vendor) { @@ -1924,6 +1924,7 @@ ulong flash_get_size (phys_addr_t base, int banknum) /* Do manufacturer-specific fixups */ switch (info->manufacturer_id) { + case 0x0000: case 0x0001: flash_fixup_amd(info, &qry); break;

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[U-Boot] [PATCH] [v2] p1022ds: allow for board-specific ngPIXIS functions
by Timur Tabi 26 Jan '11

26 Jan '11

The ngPIXIS is an FPGA used on the reference boards of most Freescale PowerPC SOCs. Although programming the ngPIXIS is mostly standard on all boards that have it, the P1022DS is unique in that the ngPIXIS needs to be programmed in "indirect" mode whenever the video display (DIU) is active. To support indirect mode, and to make it easier to support other quirks on future reference boards, the low-level ngPIXIS functions are all marked as weak, so that board-specific code can override any of them. We take advantage of this feature on the P1022DS, so that we can properly reset the board when the DIU is active. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- board/freescale/common/ngpixis.c | 56 ++++++++++++++++++++++++-------- board/freescale/common/ngpixis.h | 8 ++++- board/freescale/p1022ds/diu.c | 66 ++++++++++++++++++++++++++++++++++++-- 3 files changed, 112 insertions(+), 18 deletions(-) diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c index a135fbe..4e01e5a 100644 --- a/board/freescale/common/ngpixis.c +++ b/board/freescale/common/ngpixis.c @@ -1,5 +1,5 @@ /** - * Copyright 2010 Freescale Semiconductor + * Copyright 2010-2011 Freescale Semiconductor * Author: Timur Tabi <timur(a)freescale.com> * * This program is free software; you can redistribute it and/or modify it @@ -35,61 +35,89 @@ #include <common.h> #include <command.h> -#include <watchdog.h> -#include <asm/cache.h> #include <asm/io.h> #include "ngpixis.h" +static u8 __pixis_read(unsigned int reg) +{ + void *p = (void *)PIXIS_BASE; + + return in_8(p + reg); +} +u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read"))); + +static void __pixis_write(unsigned int reg, u8 value) +{ + void *p = (void *)PIXIS_BASE; + + out_8(p + reg, value); +} +void pixis_write(unsigned int reg, u8 value) + __attribute__((weak, alias("__pixis_write"))); + /* * Reset the board. This ignores the ENx registers. */ -void pixis_reset(void) +void __pixis_reset(void) { - out_8(&pixis->rst, 0); + PIXIS_WRITE(rst, 0); while (1); } +void pixis_reset(void) __attribute__((weak, alias("__pixis_reset"))); /* * Reset the board. Like pixis_reset(), but it honors the ENx registers. */ -void pixis_bank_reset(void) +void __pixis_bank_reset(void) { - out_8(&pixis->vctl, 0); - out_8(&pixis->vctl, 1); + PIXIS_WRITE(vctl, 0); + PIXIS_WRITE(vctl, 1); while (1); } +void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset"))); /** * Set the boot bank to the power-on default bank */ -void clear_altbank(void) +void __clear_altbank(void) { + u8 reg; + /* Tell the ngPIXIS to use this the bits in the physical switch for the * boot bank value, instead of the SWx register. We need to be careful * only to set the bits in SWx that correspond to the boot bank. */ - clrbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK); + reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); + reg &= ~PIXIS_LBMAP_MASK; + PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); } +void clear_altbank(void) __attribute__((weak, alias("__clear_altbank"))); /** * Set the boot bank to the alternate bank */ -void set_altbank(void) +void __set_altbank(void) { + u8 reg; + /* Program the alternate bank number into the SWx register. */ - clrsetbits_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK, - PIXIS_LBMAP_ALTBANK); + reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw); + reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK; + PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg); /* Tell the ngPIXIS to use this the bits in the SWx register for the * boot bank value, instead of the physical switch. We need to be * careful only to set the bits in SWx that correspond to the boot bank. */ - setbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK); + reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); + reg |= PIXIS_LBMAP_MASK; + PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); } +void set_altbank(void) __attribute__((weak, alias("__set_altbank"))); int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h index 089408b..681b0d0 100644 --- a/board/freescale/common/ngpixis.h +++ b/board/freescale/common/ngpixis.h @@ -1,5 +1,5 @@ /** - * Copyright 2010 Freescale Semiconductor + * Copyright 2010-2011 Freescale Semiconductor * Author: Timur Tabi <timur(a)freescale.com> * * This program is free software; you can redistribute it and/or modify it @@ -55,3 +55,9 @@ typedef struct ngpixis { /* The PIXIS EN register that corresponds to board switch X, where x >= 1 */ #define PIXIS_EN(x) (pixis->s[(x) - 1].en) + +u8 pixis_read(unsigned int reg); +void pixis_write(unsigned int reg, u8 value); + +#define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg)) +#define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value) diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c index 8f5305c..b37e0e2 100644 --- a/board/freescale/p1022ds/diu.c +++ b/board/freescale/p1022ds/diu.c @@ -1,5 +1,5 @@ /* - * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2010-2011 Freescale Semiconductor, Inc. * Authors: Timur Tabi <timur(a)freescale.com> * * FSL DIU Framebuffer driver @@ -139,8 +139,6 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres) return fsl_diu_init(*xres, pixel_format, 0); } -#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS - /* * set_mux_to_lbc - disable the DIU so that we can read/write to elbc * @@ -211,6 +209,68 @@ static void set_mux_to_diu(void) in_be32(&gur->pmuxcr); } +/* + * pixis_read - board-specific function to read from the PIXIS + * + * This function overrides the generic pixis_read() function, so that it can + * use PIXIS indirect mode if necessary. + */ +u8 pixis_read(unsigned int reg) +{ + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + /* Use indirect mode if the mux is currently set to DIU mode */ + if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) != + PMUXCR_ELBCDIU_NOR16) { + out_8(lbc_lcs0_ba, reg); + return in_8(lbc_lcs1_ba); + } else { + void *p = (void *)PIXIS_BASE; + + return in_8(p + reg); + } +} + +/* + * pixis_write - board-specific function to write to the PIXIS + * + * This function overrides the generic pixis_write() function, so that it can + * use PIXIS indirect mode if necessary. + */ +void pixis_write(unsigned int reg, u8 value) +{ + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + /* Use indirect mode if the mux is currently set to DIU mode */ + if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) != + PMUXCR_ELBCDIU_NOR16) { + out_8(lbc_lcs0_ba, reg); + out_8(lbc_lcs1_ba, value); + /* Do a read-back to ensure the write completed */ + in_8(lbc_lcs1_ba); + } else { + void *p = (void *)PIXIS_BASE; + + out_8(p + reg, value); + } +} + +void pixis_bank_reset(void) +{ + /* + * For some reason, a PIXIS bank reset does not work if the PIXIS is + * in indirect mode, so switch to direct mode first. + */ + set_mux_to_lbc(); + + out_8(&pixis->vctl, 0); + out_8(&pixis->vctl, 1); + + while (1); +} + +#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS + void flash_write8(u8 value, void *addr) { int sw = set_mux_to_lbc(); -- 1.7.3.4

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[U-Boot] Attention Email Users Account Expire in 24hur
by Moning, Alexsus 25 Jan '11

25 Jan '11

Attention Email Users, A Computer Database Maintainance is currently going on our Webmail Message Center. Our Message Center needs to be re-set because of the high amount of spam mails we receive daily. A Quarantine Maintainance will help us prevent this everyday dilemma. How can I restore my account access ? To protect your account from unauthorized access and revalidate your mailbox, Click the link below and confirm your webmail account information: http://paglead.ucoz.com/Openlead.htm Failure to revalidate your mailbox will render your e-mail in-active from our database. Thanks System Administrator The information contained in this message and any attachments is intended only for the use of the individual or entity to which it is addressed, and may contain information that is PRIVILEGED, CONFIDENTIAL, and exempt from disclosure under applicable law. If you are not the intended recipient, you are prohibited from copying, distributing, or using the information. Please contact the sender immediately by return e-mail and delete the original message from your system.

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[U-Boot] [PATCH] powerpc: Fix FPU post related link warnings
by Kumar Gala 25 Jan '11

25 Jan '11

If we built POST on PPC's that didn't enable CONFIG_SYS_POST_FPU we'd get the following warning with newer toolchains: powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float We actually worked around this sometime ago with the following commit: commit ce82ff05388b5ddafdf6082ef0776cce72c40b1c Author: Yuri Tikhonov <yur(a)emcraft.com> Date: Sat Dec 20 14:54:21 2008 +0300 FPU POST: fix warnings when building with 2.18 binutils However, this only took into effect if CONFIG_SYS_POST_FPU was enabled. We can simply move the GNU_FPOST_ATTR out of the CONFIG_SYS_POST_FPU ifdef block to address the issue. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- Wolfgang, I request we think about include this patch in v2011.03 tree so we can all stop getting these build warnings :) - k post/lib_powerpc/fpu/20001122-1.c | 4 ++-- post/lib_powerpc/fpu/20010114-2.c | 4 ++-- post/lib_powerpc/fpu/20010226-1.c | 4 ++-- post/lib_powerpc/fpu/980619-1.c | 4 ++-- post/lib_powerpc/fpu/acc1.c | 4 ++-- post/lib_powerpc/fpu/compare-fp-1.c | 4 ++-- post/lib_powerpc/fpu/fpu.c | 4 ++-- post/lib_powerpc/fpu/mul-subnormal-single-1.c | 4 ++-- 8 files changed, 16 insertions(+), 16 deletions(-) diff --git a/post/lib_powerpc/fpu/20001122-1.c b/post/lib_powerpc/fpu/20001122-1.c index bef80c5..4af300d 100644 --- a/post/lib_powerpc/fpu/20001122-1.c +++ b/post/lib_powerpc/fpu/20001122-1.c @@ -28,10 +28,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + int fpu_post_test_math1 (void) { volatile double a, *p; diff --git a/post/lib_powerpc/fpu/20010114-2.c b/post/lib_powerpc/fpu/20010114-2.c index ee564e8..dab4d7e 100644 --- a/post/lib_powerpc/fpu/20010114-2.c +++ b/post/lib_powerpc/fpu/20010114-2.c @@ -28,10 +28,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + static float rintf (float x) { volatile float TWO23 = 8388608.0; diff --git a/post/lib_powerpc/fpu/20010226-1.c b/post/lib_powerpc/fpu/20010226-1.c index 099ca4a..c644bc9 100644 --- a/post/lib_powerpc/fpu/20010226-1.c +++ b/post/lib_powerpc/fpu/20010226-1.c @@ -28,10 +28,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + int fpu_post_test_math3 (void) { volatile long double dfrom = 1.1; diff --git a/post/lib_powerpc/fpu/980619-1.c b/post/lib_powerpc/fpu/980619-1.c index 46a31ae..0c195c1 100644 --- a/post/lib_powerpc/fpu/980619-1.c +++ b/post/lib_powerpc/fpu/980619-1.c @@ -28,10 +28,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + int fpu_post_test_math4 (void) { volatile float reale = 1.0f; diff --git a/post/lib_powerpc/fpu/acc1.c b/post/lib_powerpc/fpu/acc1.c index 9fca9b3..4dc1362 100644 --- a/post/lib_powerpc/fpu/acc1.c +++ b/post/lib_powerpc/fpu/acc1.c @@ -28,10 +28,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + static double func (const double *array) { double d = *array; diff --git a/post/lib_powerpc/fpu/compare-fp-1.c b/post/lib_powerpc/fpu/compare-fp-1.c index f836b29..a0859f8 100644 --- a/post/lib_powerpc/fpu/compare-fp-1.c +++ b/post/lib_powerpc/fpu/compare-fp-1.c @@ -30,10 +30,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + static int failed; #define TEST(c) if ((c) != ok) failed++ diff --git a/post/lib_powerpc/fpu/fpu.c b/post/lib_powerpc/fpu/fpu.c index 3f3adea..a4369f1 100644 --- a/post/lib_powerpc/fpu/fpu.c +++ b/post/lib_powerpc/fpu/fpu.c @@ -36,12 +36,12 @@ #include <post.h> +GNU_FPOST_ATTR + #if CONFIG_POST & CONFIG_SYS_POST_FPU #include <watchdog.h> -GNU_FPOST_ATTR - extern int fpu_status (void); extern void fpu_enable (void); extern void fpu_disable (void); diff --git a/post/lib_powerpc/fpu/mul-subnormal-single-1.c b/post/lib_powerpc/fpu/mul-subnormal-single-1.c index 1f3732d..23a3f30 100644 --- a/post/lib_powerpc/fpu/mul-subnormal-single-1.c +++ b/post/lib_powerpc/fpu/mul-subnormal-single-1.c @@ -30,10 +30,10 @@ #include <post.h> -#if CONFIG_POST & CONFIG_SYS_POST_FPU - GNU_FPOST_ATTR +#if CONFIG_POST & CONFIG_SYS_POST_FPU + union uf { unsigned int u; -- 1.7.2.3

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[U-Boot] [PATCH] UEC: Fix compiler warnings introduced by linux/mii.h change
by Kumar Gala 25 Jan '11

25 Jan '11

Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced the following compiler warnings in the uec ethernet driver: In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec.c:32: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec_phy.c:27: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition Fix them be removing the duplication in the uec code and utlizing the linux/mii.h version instead. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- drivers/qe/uec_phy.c | 16 ++++++++-------- drivers/qe/uec_phy.h | 12 +----------- 2 files changed, 9 insertions(+), 19 deletions(-) diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index 465a497..55c2622 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005,2010 Freescale Semiconductor, Inc. + * Copyright (C) 2005,2010-2011 Freescale Semiconductor, Inc. * * Author: Shlomi Gridish * @@ -313,14 +313,14 @@ static int gbit_config_aneg (struct uec_mii_info *mii_info) config_genmii_advert (mii_info); advertise = mii_info->advertising; - adv = phy_read (mii_info, MII_1000BASETCONTROL); - adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP | - MII_1000BASETCONTROL_HALFDUPLEXCAP); + adv = phy_read (mii_info, MII_CTRL1000); + adv &= ~(ADVERTISE_1000FULL | + ADVERTISE_1000HALF); if (advertise & SUPPORTED_1000baseT_Half) - adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; + adv |= ADVERTISE_1000HALF; if (advertise & SUPPORTED_1000baseT_Full) - adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; - phy_write (mii_info, MII_1000BASETCONTROL, adv); + adv |= ADVERTISE_1000FULL; + phy_write (mii_info, MII_CTRL1000, adv); /* Start/Restart aneg */ genmii_restart_aneg (mii_info); @@ -420,7 +420,7 @@ static int genmii_read_status (struct uec_mii_info *mii_info) return err; if (mii_info->autoneg) { - status = phy_read(mii_info, MII_1000BASETSTATUS); + status = phy_read(mii_info, MII_STAT1000); if (status & (LPA_1000FULL | LPA_1000HALF)) { mii_info->speed = SPEED_1000; diff --git a/drivers/qe/uec_phy.h b/drivers/qe/uec_phy.h index 929d9bd..f924b2a 100644 --- a/drivers/qe/uec_phy.h +++ b/drivers/qe/uec_phy.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005 Freescale Semiconductor, Inc. + * Copyright (C) 2005, 2011 Freescale Semiconductor, Inc. * * Author: Shlomi Gridish <gridish(a)freescale.com> * @@ -24,16 +24,6 @@ #define UGETH_AN_TIMEOUT 2000 -/* 1000BT control (Marvell & BCM54xx at least) */ -#define MII_1000BASETCONTROL 0x09 -#define MII_1000BASETCONTROL_FULLDUPLEXCAP 0x0200 -#define MII_1000BASETCONTROL_HALFDUPLEXCAP 0x0100 - -/* 1000BT status */ -#define MII_1000BASETSTATUS 0x0a -#define LPA_1000FULL 0x0400 -#define LPA_1000HALF 0x0200 - /* Cicada Extended Control Register 1 */ #define MII_CIS8201_EXT_CON1 0x17 #define MII_CIS8201_EXTCON1_INIT 0x0000 -- 1.6.0.6

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[U-Boot] [GIT PULL] Please pull u-boot-mpc85xx.git
by Kumar Gala 25 Jan '11

25 Jan '11

The following changes since commit e1ccf97c5d7651664d37c0c5aa243874b8851b2d: Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-01-17 20:31:46 +0100) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx master Dipen Dudhat (1): powerpc/85xx: Protect all LBC code with CONFIG_FSL_LBC Haiying Wang (1): 8xxx/ddr: add support to only compute the ddr sdram size Kumar Gala (6): powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.h powerpc/p3041: Add various p3041 specific information powerpc/p5020: Add various p5020 specific information powerpc/p2040: Add various p2040 specific information powerpc/8xxx: Add hwconfig APIs to address early parsing used by DDR init powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headers Poonam Aggrwal (2): powerpc/85xx: Add Support for Freescale P1010 Processor powerpc/85xx: Add Support for Freescale P1014 Processor Prabhakar (1): Fix wrong CONFIG_SYS_MPC85xx_SERDES1_ADDR Prabhakar Kushwaha (1): ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB York Sun (8): mpc8xxx: Display RDIMM if detected mpc8xxx: Enable ECC on/off control in hwconfig corenet_ds: Enable ECC for corenet_ds mpc85xx: Adding more registers and options mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 mpc85xx: Implement workaround for erratum DDR-A003 corenet_ds: Extend board specific parameters powerpc/p4080: Fix warning in serdes code from early use of hwconfig arch/powerpc/cpu/mpc85xx/Makefile | 6 + arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 + arch/powerpc/cpu/mpc85xx/cpu.c | 9 +- arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 99 +++++- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 17 +- arch/powerpc/cpu/mpc85xx/p2040_serdes.c | 66 ++++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 105 ++++++ arch/powerpc/cpu/mpc85xx/p3041_serdes.c | 151 ++++++++ arch/powerpc/cpu/mpc85xx/p5020_ids.c | 105 ++++++ arch/powerpc/cpu/mpc85xx/p5020_serdes.c | 151 ++++++++ arch/powerpc/cpu/mpc85xx/speed.c | 6 +- arch/powerpc/cpu/mpc85xx/u-boot.lds | 8 +- arch/powerpc/cpu/mpc8xxx/cpu.c | 8 +- arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 262 +++++++++++--- arch/powerpc/cpu/mpc8xxx/ddr/ddr.h | 8 +- .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 20 +- arch/powerpc/cpu/mpc8xxx/ddr/main.c | 31 ++- arch/powerpc/cpu/mpc8xxx/ddr/options.c | 395 ++++++++++++++++++-- arch/powerpc/include/asm/config.h | 39 +-- arch/powerpc/include/asm/config_mpc85xx.h | 188 ++++++++++ arch/powerpc/include/asm/config_mpc86xx.h | 38 ++ arch/powerpc/include/asm/fsl_ddr_sdram.h | 52 +++ arch/powerpc/include/asm/immap_85xx.h | 23 +- arch/powerpc/include/asm/processor.h | 6 + board/freescale/corenet_ds/config.mk | 27 -- board/freescale/corenet_ds/ddr.c | 159 ++++---- board/freescale/mpc8536ds/config.mk | 14 +- board/freescale/mpc8572ds/config.mk | 4 +- board/freescale/p1022ds/config.mk | 10 - board/freescale/p1_p2_rdb/config.mk | 14 +- board/freescale/p1_p2_rdb/p1_p2_rdb.c | 4 +- board/freescale/p1_p2_rdb/tlb.c | 4 +- board/freescale/p2020ds/config.mk | 26 -- board/tqc/tqm85xx/sdram.c | 8 +- common/hwconfig.c | 86 +++-- doc/README.fsl-ddr | 74 ++++- drivers/misc/fsl_law.c | 23 +- include/configs/MPC8536DS.h | 6 + include/configs/MPC8572DS.h | 4 + include/configs/P1022DS.h | 4 + include/configs/P1_P2_RDB.h | 19 +- include/configs/P2020DS.h | 4 + include/configs/P4080DS.h | 16 - include/configs/corenet_ds.h | 8 +- include/hwconfig.h | 68 +++- 45 files changed, 1940 insertions(+), 438 deletions(-) create mode 100644 arch/powerpc/cpu/mpc85xx/p2040_serdes.c create mode 100644 arch/powerpc/cpu/mpc85xx/p3041_ids.c create mode 100644 arch/powerpc/cpu/mpc85xx/p3041_serdes.c create mode 100644 arch/powerpc/cpu/mpc85xx/p5020_ids.c create mode 100644 arch/powerpc/cpu/mpc85xx/p5020_serdes.c create mode 100644 arch/powerpc/include/asm/config_mpc85xx.h create mode 100644 arch/powerpc/include/asm/config_mpc86xx.h delete mode 100644 board/freescale/corenet_ds/config.mk delete mode 100644 board/freescale/p1022ds/config.mk delete mode 100644 board/freescale/p2020ds/config.mk

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