August 2010 - U-Boot

[U-Boot] Please Pull u-boot-ti/master
by s-paulraj＠ti.com 10 Aug '10

10 Aug '10

The following changes since commit 9efac4a1eb99d9c5539aa6992025eeacab7980c6: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-samsung are available in the git repository at: git://git.denx.de/u-boot-ti.git master Steve Sakoman (8): ARMV7: Add pad mux support for OMAP4 ARMV7: Fix udelay for OMAP4 ARMV7: Modify i2c driver for more reliable operation on OMAP4 ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4 ARMV7: Enable musb driver and usbtty on OMAP4430 SDP ARMV7: Enable musb driver and usbtty on OMAP4 Panda ARMV7: Update default environment for OMAP4 boards arch/arm/cpu/armv7/omap-common/timer.c | 9 - arch/arm/cpu/armv7/omap4/board.c | 11 + arch/arm/include/asm/arch-omap3/cpu.h | 3 + arch/arm/include/asm/arch-omap3/i2c.h | 4 +- arch/arm/include/asm/arch-omap4/cpu.h | 3 + arch/arm/include/asm/arch-omap4/mux_omap4.h | 344 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-omap4/omap4.h | 2 + arch/arm/include/asm/arch-omap4/sys_proto.h | 1 + board/ti/panda/panda.c | 26 ++ board/ti/panda/panda.h | 265 +++++++++++++++++++++ board/ti/sdp4430/sdp.c | 26 ++ board/ti/sdp4430/sdp.h | 265 +++++++++++++++++++++ drivers/i2c/omap24xx_i2c.c | 31 ++- drivers/i2c/omap24xx_i2c.h | 4 + drivers/power/Makefile | 1 + drivers/power/twl6030.c | 78 ++++++ drivers/usb/musb/omap3.c | 16 ++ drivers/usb/musb/omap3.h | 3 +- include/configs/omap4_panda.h | 26 ++- include/configs/omap4_sdp4430.h | 26 ++- include/twl6030.h | 91 +++++++ 21 files changed, 1210 insertions(+), 25 deletions(-) create mode 100644 arch/arm/include/asm/arch-omap4/mux_omap4.h create mode 100644 board/ti/panda/panda.h create mode 100644 board/ti/sdp4430/sdp.h create mode 100644 drivers/power/twl6030.c create mode 100644 include/twl6030.h

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[U-Boot] Marketing Jurídico | Newsletter Inrise Consultoria | Edição 17 | Ano 03
by Inrise Consultoria 10 Aug '10

10 Aug '10

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Re: [U-Boot] [PATCH 2/2] MPC8308ERDB: minimal support for devboard from Freescale
by Kim Phillips 10 Aug '10

10 Aug '10

On Thu, 24 Jun 2010 19:00:54 -0500 Kim Phillips <kim.phillips(a)freescale.com> wrote: > On Thu, 24 Jun 2010 23:36:49 +0400 > Ilya Yanok <yanok(a)emcraft.com> wrote: > > > Hi Kim, > > > > On 24.06.2010 22:00, Kim Phillips wrote: > > >> I've enabled icache and now the board sometimes resets twice after > > >> U-Boot 'reset' command: > > >> > > > > > >> (It doesn't always stop at "DRAM:" line but that position is most frequent) > > >> Maybe you have some ideas on this subject? > > >> > > > hmm, if it's only on soft-resets, can you try adding > > > HID0_ENABLE_INSTRUCTION_CACHE to CONFIG_SYS_HID0_INIT in addition to > > > _FINAL? Some cache state is preserved over a soft-reset... > > > > > > > Thanks for your advice but this doesn't help... turning icache on early causes a different pattern of bus accesses when fetching code, and this might trigger bus accesses that interfere with code that sets bus configuration registers, such as the acr. Can you test this patch please?: diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile index 15e2c18..613625d 100644 --- a/arch/powerpc/cpu/mpc83xx/Makefile +++ b/arch/powerpc/cpu/mpc83xx/Makefile @@ -36,6 +36,7 @@ COBJS-y += speed.o COBJS-y += interrupts.o COBJS-y += spd_sdram.o COBJS-y += ecc.o +COBJS-y += acr.o COBJS-$(CONFIG_QE) += qe_io.o COBJS-$(CONFIG_FSL_SERDES) += serdes.o COBJS-$(CONFIG_PCI) += pci.o diff --git a/arch/powerpc/cpu/mpc83xx/acr.c b/arch/powerpc/cpu/mpc83xx/acr.c new file mode 100644 index 0000000..20315fc --- /dev/null +++ b/arch/powerpc/cpu/mpc83xx/acr.c @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2010 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> + +void single_cline_write(volatile void *addr, __be32 val) +{ + out_be32(addr, val); +} diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index 83cba93..237fa48 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -30,6 +30,8 @@ DECLARE_GLOBAL_DATA_PTR; +extern void single_cline_write(volatile void *addr, __be32 val); + #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; extern void qe_config_iopin(u8 port, u8 pin, int dir, @@ -63,6 +65,7 @@ static void config_qe_ioports(void) */ void cpu_init_f (volatile immap_t * im) { + __be32 val; __be32 acr_mask = #ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */ ACR_PIPE_DEP | @@ -213,7 +216,8 @@ void cpu_init_f (volatile immap_t * im) memset ((void *) gd, 0, sizeof (gd_t)); /* system performance tweaking */ - clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val); + val = __raw_readl(&im->arbiter.acr); + single_cline_write(&im->arbiter.acr, acr_val & (val & ~acr_mask)); clrsetbits_be32(&im->sysconf.spcr, spcr_mask, spcr_val); diff --git a/arch/powerpc/cpu/mpc83xx/u-boot.lds b/arch/powerpc/cpu/mpc83xx/u-boot.lds index 0b74a13..f01c462 100644 --- a/arch/powerpc/cpu/mpc83xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc83xx/u-boot.lds @@ -51,6 +51,8 @@ SECTIONS .text : { arch/powerpc/cpu/mpc83xx/start.o (.text) + . = ALIGN(32); + arch/powerpc/cpu/mpc83xx/acr.o (.text) *(.text) *(.got1) . = ALIGN(16); Thanks, Kim

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[U-Boot] [PATCH CFI flash]: Workaround for Numonyx Axcell P33/P30 256-Mbit 65nm bug
by Philippe De Muyter 10 Aug '10

10 Aug '10

Hello Wolfgang & list, I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30 256-Mbit 65nm flash chips. After some time :( searching for bugs in our board or soft, we have discovered that those chips have a small but annoying bug, documented in "Numonyx Axcell P33/P30 256-Mbit Specification Update" It states : When customer uses [...] block unlock, the block lock status might be altered inadvertently. Lock status might be set to either 01h or 03h unexpectedly (00h as expected data), which leads to program/erase failure on certain blocks. A working workaround is given, which I have applied and tested with success. Signed-off-by: Philippe De Muyter <phdm(a)macqel.be> --- drivers/mtd/cfi_flash.c | 27 ++++++++++++++++++++------- 1 files changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 3267c5d..0931137 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1347,16 +1347,29 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) switch (info->vendor) { case CFI_CMDSET_INTEL_PROG_REGIONS: case CFI_CMDSET_INTEL_STANDARD: - case CFI_CMDSET_INTEL_EXTENDED: - flash_write_cmd (info, sector, 0, - FLASH_CMD_CLEAR_STATUS); - flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); + case CFI_CMDSET_INTEL_EXTENDED: { + unsigned short cmd; + if (prot) - flash_write_cmd (info, sector, 0, - FLASH_CMD_PROTECT_SET); + cmd = FLASH_CMD_PROTECT_SET; else + cmd = FLASH_CMD_PROTECT_CLEAR; + /* see errata + "Numonyx Axcell P33/P30 Specification Update" :) */ + flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID); + if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT, + prot)) { + /* cmd must come before 20us after FLASH_CMD_PROTECT */ + /* Disable interrupts which might cause a timeout here */ + int flag = disable_interrupts (); flash_write_cmd (info, sector, 0, - FLASH_CMD_PROTECT_CLEAR); + FLASH_CMD_PROTECT); + flash_write_cmd (info, sector, 0, cmd); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts (); + } + } break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD: -- 1.6.3.3 -- Philippe De Muyter phdm at macqel dot be Tel +32 27029044 Macq Electronique SA rue de l'Aeronef 2 B-1140 Bruxelles Fax +32 27029077

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[U-Boot] AT91/AVR32: at91_emac.c VS macb.c in drivers/net
by Reinhard Meyer 10 Aug '10

10 Aug '10

Hallo, macb.c is known to work for AT91 and AVR32. Why was at91_emac.c introduced into mainstream? By name it suggests it is designed to work with AT91 (only)? I don't think it is desireable to have to drivers doing the same task. Unless someone has a good point why we need at91_emac.c I propose to remove it from mainstream. Best Regards, Reinhard

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Re: [U-Boot] [PATCH v2a] AT91: add SD/MMC support
by Reinhard Meyer 10 Aug '10

10 Aug '10

Xu, Hong wrote: > Hi Reinhard, > > In Linux, I used `fdisk' to cerate 2 primiary partitions on SD card, each is about 1G bytes. > I used `mkfs.ext2 /dev/sdc1' and 'mkfs.ext2 /dev/sd2' to format the 2 partitions and then copy some files on them. > > I used SanDisk 2GB SD Card. > > > But in U-Boot, > > ----8<---- > U-Boot> mmc init > mmc: requested clock 150000 is too low; changed to 194000 > Manufacturer ID: 03 > OEM/Application ID: 5344 > Product name: SD02G > Product Revision: 8.0 > Product Serial Number: 27337763 > Manufacturing Date: 09/12 > SD Card detected (RCA 43690) > raw CSD data: 00260032 5f5a83ae fefbcfff 928040df > Read block length: 1024 > (Supports partial reads) > Card capacity: 1884 Mbytes > mmc: Using 131072 cycles data timeout (DTOR=0x62) > mmc: blocksize reduced to 512, number of blocks: 3862528 > mmc1 is available > U-Boot> ext2ls mmc 0 > bad MBR sector signature 0x0000 > ** Bad partition - mmc 0:1 ** > U-Boot> ext2ls mmc 1 > bad MBR sector signature 0x0000 > ** Bad partition - mmc 1:1 ** The number before the ":" is irrelevant (with this driver), after the ":" is the partition number. So anything:1 would be like /dev/sda1. I can't test right now (not in the office) but it seems that a proper mbr is required. You killed that when zeroing the card. Not sure right now how you get that back under LinuX (win: fdisk /mbr) And please replies to the list as well. Reinhard

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[U-Boot] [PATCH] Create a new driver for Atmel at91/avr MCI adapters that uses the u-boot mmc framework.
by Rob Emanuele 10 Aug '10

10 Aug '10

To use it on your platform add defines like these: #define CONFIG_MMC 1 #define CONFIG_GENERIC_MMC 1 #define CONFIG_GENERIC_ATMEL_MCI 1 /*change this for your cpu */ #define MMCI_BASE 0xFFF80000 Then create an init routine in your platform code: /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { /* This calls your code to clock the interface * and set the pins up, etc. */ mmc_hw_init(); /* This calls the atmel_mmc_init in gen_atmel_mci.c */ return atmel_mmc_init(bd); } Signed-off-by: Rob Emanuele <rob(a)emanuele.us> --- drivers/mmc/Makefile | 1 + drivers/mmc/gen_atmel_mci.c | 330 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 331 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/gen_atmel_mci.c diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 6fa04b8..1785253 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libmmc.a COBJS-$(CONFIG_GENERIC_MMC) += mmc.o +COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c new file mode 100644 index 0000000..9e3430a --- /dev/null +++ b/drivers/mmc/gen_atmel_mci.c @@ -0,0 +1,330 @@ +/* + * Copyright 2010, Rob Emanuele <rob(a)emanuele.us> + * + * Original Driver: + * Copyright (C) 2004-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <command.h> +#include <hwconfig.h> +#include <mmc.h> +#include <part.h> +#include <malloc.h> +#include <mmc.h> +#include <asm/io.h> +#include <asm/errno.h> +#include <asm/byteorder.h> +#include <asm/arch/clk.h> +#include <asm/arch/memory-map.h> +#include "atmel_mci.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_SYS_MMC_CLK_OD +#define CONFIG_SYS_MMC_CLK_OD 150000 +#endif +#define MMC_DEFAULT_BLKLEN 512 + +void dump_cmd(uint cmdr, uint arg, uint status, const char* msg) +{ + printf("gen_atmel_mci: CMDR 0x%08x (%2u) ARGR 0x%08x (SR: 0x%08x) %s\n", + cmdr, cmdr&0x3F, arg, status, msg); +} + +/* Setup for MCI Clock and Block Size */ +static void mci_set_mode(unsigned long hz, unsigned long blklen) +{ + unsigned long bus_hz; + unsigned long clkdiv; + + if (hz > 0) { + bus_hz = get_mck_clk_rate(); + clkdiv = (bus_hz / hz) / 2 - 1; + } else { + clkdiv = ~0UL; + } + + printf("mmc: setting clock %lu Hz, block size %lu\n", + hz, blklen); + + if (clkdiv & ~255UL) { + clkdiv = 255; + printf("mmc: clock %lu too low; setting CLKDIV to 255\n", + hz); + } + + blklen &= 0xfffc; + /* On some platforms RDPROOF and WRPROOF are ignored */ + mmci_writel(MR, (MMCI_BF(CLKDIV, clkdiv) + | MMCI_BF(BLKLEN, blklen) + | MMCI_BIT(RDPROOF) + | MMCI_BIT(WRPROOF))); +} + +/* Return the CMDR with flags for a given command and data packet */ +static uint atmel_encode_cmd(struct mmc_cmd *cmd, struct mmc_data *data, uint* error_flags) +{ + uint cmdr = 0; + /* Default Flags for Errors */ + *error_flags |= (MMCI_BIT(DTOE) | MMCI_BIT(RDIRE) | MMCI_BIT(RENDE) | MMCI_BIT(RINDE) | MMCI_BIT(RTOE)); + + /* Default Flags for the Command */ + cmdr |= MMCI_BIT(MAXLAT); + + if (data) { + cmdr |= MMCI_BF(TRCMD,1); + + if (data->blocks > 1) { + cmdr |= MMCI_BF(TRTYP,1); + } + + if (data->flags & MMC_DATA_READ) + cmdr |= MMCI_BIT(TRDIR); + } + + if (cmd->resp_type & MMC_RSP_CRC) + *error_flags |= MMCI_BIT(RCRCE); + + if (cmd->resp_type & MMC_RSP_136) + cmdr |= MMCI_BF(RSPTYP,2); + else if (cmd->resp_type & MMC_RSP_BUSY) + cmdr |= MMCI_BF(RSPTYP,3); + else if (cmd->resp_type & MMC_RSP_PRESENT) + cmdr |= MMCI_BF(RSPTYP,1); + + return cmdr | MMCI_BF(CMDNB,cmd->cmdidx); +} + +static uint atmel_data_read(uint* data, uint error_flags) +{ + uint status; + do { + status = mmci_readl(SR); + if (status & (error_flags | MMCI_BIT(OVRE))) + goto io_fail; + } while (!(status & MMCI_BIT(RXRDY))); + + if (status & MMCI_BIT(RXRDY)) { + *data = mmci_readl(RDR); + status = 0; + } +io_fail: + return status; +} + +static uint atmel_data_write(uint* data, uint error_flags) +{ + uint status; + do { + status = mmci_readl(SR); + if (status & (error_flags | MMCI_BIT(UNRE))) + goto io_fail; + } while (!(status & MMCI_BIT(TXRDY))); + + if (status & MMCI_BIT(TXRDY)) { + mmci_writel(TDR,*data); + status = 0; + } +io_fail: + return status; +} + +/* + * Sends a command out on the bus and deals with the block data. + * Takes the mmc pointer, a command pointer, and an optional data pointer. + */ +static int +atmel_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +{ + uint cmdr; + uint error_flags = 0; + uint status; + + /* Figure out the transfer arguments */ + cmdr = atmel_encode_cmd(cmd, data, &error_flags); + + /* Send the command */ + mmci_writel(ARGR,cmd->cmdarg); + mmci_writel(CMDR, cmdr); + +#if GEN_ATMEL_MCI_DEBUG + dump_cmd(cmdr, cmd->cmdarg, 0, "COMMAND Dbg Msg"); +#endif + + /* Wait for the command to complete */ + while (!((status = mmci_readl(SR)) & MMCI_BIT(CMDRDY))); + + if (status & error_flags) { + dump_cmd(cmdr, cmd->cmdarg, status, "COMMAND Failed"); + return COMM_ERR; + } + + /* Copy the response to the response buffer */ + if (cmd->resp_type & MMC_RSP_136) { + cmd->response[0] = mmci_readl(RSPR); + cmd->response[1] = mmci_readl(RSPR1); + cmd->response[2] = mmci_readl(RSPR2); + cmd->response[3] = mmci_readl(RSPR3); + } else + cmd->response[0] = mmci_readl(RSPR); + + /* transfer all of the blocks */ + if (data) { + uint word_count, block_count; + uint* ioptr; + uint sys_blocksize, dummy, i; + uint (*atmel_data_op)(uint* data, uint error_flags); + + if (data->flags & MMC_DATA_READ) { + atmel_data_op = atmel_data_read; + sys_blocksize = mmc->read_bl_len; + ioptr = (uint*)data->dest; + } else { + atmel_data_op = atmel_data_write; + sys_blocksize = mmc->write_bl_len; + ioptr = (uint*)data->src; + } + + status = 0; + for(block_count = 0; block_count < data->blocks && !status; block_count++) { + word_count = 0; + do { + status = atmel_data_op(ioptr,error_flags); + word_count++; + ioptr++; + } while(!status && word_count < (data->blocksize / 4)); +#if GEN_ATMEL_MCI_DEBUG + if (data->flags & MMC_DATA_READ) + { + char *mem_args[3]; + char mem_addr_str[16]; + char mem_len_str[16]; + printf("Command caused a block read for %u bytes (read %u bytes)\n", data->blocksize, word_count*4); + mem_args[0] = "md.l"; + sprintf(mem_addr_str,"0x%08x",(uint)(data->dest)); + mem_args[1] = mem_addr_str; + sprintf(mem_len_str,"0x%x",word_count); + mem_args[2] = mem_len_str; + printf("Dumping with: %s %s %s\n", mem_args[0], mem_args[1], mem_args[2]); + do_mem_md(NULL, 0, 3, mem_args); + } +#endif +#if GEN_ATMEL_MCI_DEBUG + if (!status && word_count < (sys_blocksize / 4)) + printf("sponging....\n"); +#endif + /* sponge the rest of a full block */ + while (!status && word_count < (sys_blocksize / 4)) { + status = atmel_data_op(&dummy,error_flags); + word_count++; + } + if (status) { + dump_cmd(cmdr, cmd->cmdarg, status, "XFER Failed"); + return COMM_ERR; + } + } + + /* Wait for Transfer End */ + i = 0; + do { + status = mmci_readl(SR); + + if (status & error_flags) { + dump_cmd(cmdr, cmd->cmdarg, status, "XFER DTIP Wait Failed"); + return COMM_ERR; + } + i++; + } while ((status & MMCI_BIT(DTIP)) && i < 10000); + if (status & MMCI_BIT(DTIP)) { + dump_cmd(cmdr, cmd->cmdarg, status, "XFER DTIP never unset, ignoring"); + } + } + + return 0; +} + +static void atmel_set_ios(struct mmc *mmc) +{ + /* Set the clock speed */ + mci_set_mode(mmc->clock, MMC_DEFAULT_BLKLEN); + + /* set the bus width and select slot A for this interface + * there is no capability for multiple slots on the same interface yet + */ + /* Bitfield SCDBUS needs to be expanded to 2 bits for 8-bit buses + */ + if (mmc->bus_width == 4) + mmci_writel(SDCR, MMCI_BF(SCDBUS,0x1)|MMCI_BF(SCDSEL,0x0)); + else + mmci_writel(SDCR, MMCI_BF(SCDBUS,0x0)|MMCI_BF(SCDSEL,0x0)); +} + +static int atmel_init(struct mmc *mmc) +{ + /* Initialize controller */ + mmci_writel(CR, MMCI_BIT(SWRST)); /* soft reset */ + mmci_writel(CR, MMCI_BIT(PWSDIS)); /* disable power save */ + mmci_writel(CR, MMCI_BIT(MCIEN)); /* enable mci */ + + /* Initial Time-outs */ + mmci_writel(DTOR, 0x5f); + /* Disable Interrupts */ + mmci_writel(IDR, ~0UL); + + /* Set defualt clocks and blocklen */ + mci_set_mode(CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN); + + return 0; +} + +static int atmel_initialize(bd_t *bis) +{ + struct mmc *mmc; + + mmc = malloc(sizeof(struct mmc)); + + sprintf(mmc->name, "Atmel MCI"); + /* We set this but atmel_mci.h makes use of MMCI_BASE directly */ + mmc->priv = (void *)MMCI_BASE; + mmc->send_cmd = atmel_send_cmd; + mmc->set_ios = atmel_set_ios; + mmc->init = atmel_init; + + /* need to be able to pass these in on a baord by board basis */ + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + mmc->host_caps = MMC_MODE_4BIT; + + /* High Speed Support? */ + + mmc->f_min = get_mck_clk_rate() / (2*(0xFF+1)); + mmc->f_max = get_mck_clk_rate() / (2); + + mmc_register(mmc); + + return 0; +} + +int atmel_mmc_init(bd_t *bis) +{ + return atmel_initialize(bis); +} -- 1.6.3.3

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[U-Boot] [PATCHv2] net: Fix faulty definition of uec_initialize()
by Joakim Tjernlund 10 Aug '10

10 Aug '10

The correct definition is in drivers/qe/uec.h so just remove this one. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- include/netdev.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/netdev.h b/include/netdev.h index 882642a..65833e2 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -83,7 +83,6 @@ int skge_initialize(bd_t *bis); int smc911x_initialize(u8 dev_num, int base_addr); int smc91111_initialize(u8 dev_num, int base_addr); int tsi108_eth_initialize(bd_t *bis); -int uec_initialize(int index); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); int sh_eth_initialize(bd_t *bis); -- 1.7.1

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[U-Boot] can uboot boot from spi flash?
by Shawn Jin 10 Aug '10

10 Aug '10

Hi, SPI flash seems supported in u-boot after searching it in the mailing list. But can u-boot boot from spi flash? Thanks, -Shawn.

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[U-Boot] u-boot patch base version
by Joe Hershberger 10 Aug '10

10 Aug '10

Hello, I'm looking to submit some patches that I'm currently running on u-boot-2009.11. I'd like to know before I go through the trouble of creating the separate patches if it is a problem for the patches to be based on that version. Should I first port the changes to a newer version or not? Thanks, -Joe

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