July 2010 - U-Boot

[U-Boot] Watchdog support for ppc4xx
by Mark Maestas 07 Jul '10

07 Jul '10

Hi, I have a question about watchdog support for PPC_4xx. When I define CONFIG_WATCHDOG in canyonlands.h, I get an error when building cpu_init.c. The error code reads: {standard input}: Assembler messages: {standard input}:133: Error: unsupported relocation against tcr {standard input}:141: Error: unsupported relocation against tcr {standard input}:146: Error: unsupported relocation against tsr {standard input}:154: Error: unsupported relocation against tsr make[1]: *** [cpu_init.o] Error 1 Shouldn't this work? Also I would like to determine in u-boot if a reset was caused by the watchdog timer using the TSR WRS field. If it was reset by the watchdog we will boot into a failsafe partition to protect against system update errors. Has anyone done something like this? Thanks Mark Maestas AP Labs

5 8

[U-Boot] [PATCH 0/4] AM35X: Add musb support
by Ajay Kumar Gupta 07 Jul '10

07 Jul '10

Remy, These patches add support for musb in AM35x. Regards, Ajay Ajay Kumar Gupta (4): AM35x: Adding SCM general register definitions musb: MSC host support for AM35x musb: am35x: Workaround for fifo read issue AM3517EVM: musb: add usb config arch/arm/include/asm/arch-omap3/cpu.h | 20 +++++ drivers/usb/musb/Makefile | 1 + drivers/usb/musb/am35x.c | 150 +++++++++++++++++++++++++++++++++ drivers/usb/musb/am35x.h | 94 ++++++++++++++++++++ drivers/usb/musb/musb_core.c | 6 ++ drivers/usb/musb/musb_udc.c | 2 + include/configs/am3517_evm.h | 38 ++++++++ include/usb.h | 2 +- 8 files changed, 312 insertions(+), 1 deletions(-) create mode 100644 drivers/usb/musb/am35x.c create mode 100644 drivers/usb/musb/am35x.h

3 9

[U-Boot] [PATCH v2]ppc4xx/Canyonlands added USB board callbacks
by Rupjyoti Sarmah 07 Jul '10

07 Jul '10

Functions added to support board callbacks for USB init. This isolates USB manipulations such that it is only touched if USB is used by U-Boot. Signed-off-by: Dave Mitchell <dmitchell(a)appliedmicro.com> Signed-off-by: Rupjyoti Sarmah <rsarmah(a)appliedmicro.com> --- This patch incorporates the changes advised. The description of the Macros changed in the header file. board/amcc/canyonlands/canyonlands.c | 64 +++++++++++++++++++++++++++++----- include/configs/canyonlands.h | 13 +++++++ 2 files changed, 68 insertions(+), 9 deletions(-) diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index 23874d2..c3c1348 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -34,7 +34,17 @@ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH ch DECLARE_GLOBAL_DATA_PTR; -#define CONFIG_SYS_BCSR3_PCIE 0x10 + struct ep460c_bcsr { + u8 board_id; + u8 cpld_rev; + u8 led_user; + u8 board_status; + u8 reset_ctrl; + u8 flash_ctrl; + u8 eth_ctrl; + u8 usb_ctrl; + u8 irq_ctrl; +}; #define BOARD_CANYONLANDS_PCIE 1 #define BOARD_CANYONLANDS_SATA 2 @@ -112,6 +122,9 @@ int board_early_init_f(void) { #if !defined(CONFIG_ARCHES) u32 sdr0_cust0; + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; + #endif /* @@ -172,14 +185,10 @@ int board_early_init_f(void) #if !defined(CONFIG_ARCHES) /* Enable ethernet and take out of reset */ - out_8((void *)CONFIG_SYS_BCSR_BASE + 6, 0); + out_8(&bcsr_data->eth_ctrl, 0) ; /* Remove NOR-FLASH, NAND-FLASH & EEPROM hardware write protection */ - out_8((void *)CONFIG_SYS_BCSR_BASE + 5, 0); - - /* Enable USB host & USB-OTG */ - out_8((void *)CONFIG_SYS_BCSR_BASE + 7, 0); - + out_8(&bcsr_data->flash_ctrl, 0) ; mtsdr(SDR0_SRST1, 0); /* Pull AHB out of reset default=1 */ /* Setup PLB4-AHB bridge based on the system address map */ @@ -201,6 +210,41 @@ int board_early_init_f(void) return 0; } +#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT) +int usb_board_init(void) +{ + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; + u8 val; + + /* Enable USB host & USB-OTG */ + val = in_8(&bcsr_data->usb_ctrl); + val &= ~(BCSR_USBCTRL_OTG_RST | BCSR_USBCTRL_HOST_RST); + out_8(&bcsr_data->usb_ctrl, val); + + return 0; +} + +int usb_board_stop(void) +{ + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; + u8 val; + + /* Disable USB host & USB-OTG */ + val = in_8(&bcsr_data->usb_ctrl); + val |= (BCSR_USBCTRL_OTG_RST | BCSR_USBCTRL_HOST_RST); + out_8(&bcsr_data->usb_ctrl, val); + + return 0; +} + +int usb_board_init_fail(void) +{ + return usb_board_stop(); +} +#endif /* CONFIG_USB_OHCI_NEW && CONFIG_SYS_USB_OHCI_BOARD_INIT */ + #if !defined(CONFIG_ARCHES) static void canyonlands_sata_init(int board_type) { @@ -244,11 +288,13 @@ int get_cpu_num(void) #if !defined(CONFIG_ARCHES) int checkboard(void) { + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; char *s = getenv("serial#"); if (pvr_460ex()) { printf("Board: Canyonlands - AMCC PPC460EX Evaluation Board"); - if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 3)) & CONFIG_SYS_BCSR3_PCIE) + if (in_8(&bcsr_data->board_status) & CONFIG_SYS_BCSR3_PCIE) gd->board_type = BOARD_CANYONLANDS_PCIE; else gd->board_type = BOARD_CANYONLANDS_SATA; @@ -268,7 +314,7 @@ int checkboard(void) break; } - printf(", Rev. %X", in_8((void *)(CONFIG_SYS_BCSR_BASE + 0))); + printf(", Rev. %X", in_8(&bcsr_data->cpld_rev)); if (s != NULL) { puts(", serial# "); diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index ac9b3c5..0eee522 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -77,6 +77,18 @@ #define CONFIG_SYS_PCIE0_XCFGBASE 0xc3000000 #define CONFIG_SYS_PCIE1_XCFGBASE 0xc3001000 +/* + * BCSR bits as defined in the Canyonlands board user manual. + */ +#define BCSR_CPLDREV 0x00 +#define BCSR_BRDSTS 0x03 +#define BCSR_FLASHCTRL 0x05 +#define BCSR_ETHCTRL 0x06 +#define BCSR_USBCTRL 0x07 +#define BCSR_USBCTRL_OTG_RST 0x32 +#define BCSR_USBCTRL_HOST_RST 0x01 +#define CONFIG_SYS_BCSR3_PCIE 0x10 + #define CONFIG_SYS_PCIE0_UTLBASE 0xc08010000ULL /* 36bit physical addr */ /* base address of inbound PCIe window */ @@ -417,6 +429,7 @@ #define CONFIG_SYS_USB_OHCI_REGS_BASE (CONFIG_SYS_AHB_BASE | 0xd0000) #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ppc440" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#define CONFIG_SYS_USB_OHCI_BOARD_INIT #endif /* -- 1.5.6.3

4 3

[U-Boot] [PATCH v1]ppc4xx/Canyonlands added USB board callbacks
by Rupjyoti Sarmah 07 Jul '10

07 Jul '10

Functions added to support board callbacks for USB init. This isolates USB manipulations such that it is only touched if USB is used by U-Boot. Signed-off-by: Dave Mitchell <dmitchell(a)appliedmicro.com> Signed-off-by: Rupjyoti Sarmah <rsarmah(a)appliedmicro.com> --- This patch incorporates the changes advised. board/amcc/canyonlands/canyonlands.c | 64 +++++++++++++++++++++++++++++----- include/configs/canyonlands.h | 13 +++++++ 2 files changed, 68 insertions(+), 9 deletions(-) diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index 23874d2..ce3ddc2 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -34,7 +34,17 @@ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH ch DECLARE_GLOBAL_DATA_PTR; -#define CONFIG_SYS_BCSR3_PCIE 0x10 + struct ep460c_bcsr { + u8 board_id; + u8 cpld_rev; + u8 led_user; + u8 board_status; + u8 reset_ctrl; + u8 flash_ctrl; + u8 eth_ctrl; + u8 usb_ctrl; + u8 irq_ctrl; +}; #define BOARD_CANYONLANDS_PCIE 1 #define BOARD_CANYONLANDS_SATA 2 @@ -112,6 +122,9 @@ int board_early_init_f(void) { #if !defined(CONFIG_ARCHES) u32 sdr0_cust0; + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; + #endif /* @@ -172,14 +185,10 @@ int board_early_init_f(void) #if !defined(CONFIG_ARCHES) /* Enable ethernet and take out of reset */ - out_8((void *)CONFIG_SYS_BCSR_BASE + 6, 0); + out_8(&bcsr_data->eth_ctrl, 0) ; /* Remove NOR-FLASH, NAND-FLASH & EEPROM hardware write protection */ - out_8((void *)CONFIG_SYS_BCSR_BASE + 5, 0); - - /* Enable USB host & USB-OTG */ - out_8((void *)CONFIG_SYS_BCSR_BASE + 7, 0); - + out_8(&bcsr_data->flash_ctrl, 0) ; mtsdr(SDR0_SRST1, 0); /* Pull AHB out of reset default=1 */ /* Setup PLB4-AHB bridge based on the system address map */ @@ -201,6 +210,41 @@ int board_early_init_f(void) return 0; } +#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT) +int usb_board_init(void) +{ + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; + u8 val; + + /* Enable USB host & USB-OTG */ + val = in_8(&bcsr_data->usb_ctrl); + val &= ~(BCSR_USBCTRL_OTG_RST | BCSR_USBCTRL_HOST_RST); + out_8(&bcsr_data->usb_ctrl, val); + + return 0; +} + +int usb_board_stop(void) +{ + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; + u8 val; + + /* Disable USB host & USB-OTG */ + val = in_8(&bcsr_data->usb_ctrl); + val |= (BCSR_USBCTRL_OTG_RST | BCSR_USBCTRL_HOST_RST); + out_8(&bcsr_data->usb_ctrl, val); + + return 0; +} + +int usb_board_init_fail(void) +{ + return usb_board_stop(); +} +#endif /* CONFIG_USB_OHCI_NEW && CONFIG_SYS_USB_OHCI_BOARD_INIT */ + #if !defined(CONFIG_ARCHES) static void canyonlands_sata_init(int board_type) { @@ -244,11 +288,13 @@ int get_cpu_num(void) #if !defined(CONFIG_ARCHES) int checkboard(void) { + struct ep460c_bcsr *bcsr_data = + (struct ep460c_bcsr *)CONFIG_SYS_BCSR_BASE; char *s = getenv("serial#"); if (pvr_460ex()) { printf("Board: Canyonlands - AMCC PPC460EX Evaluation Board"); - if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 3)) & CONFIG_SYS_BCSR3_PCIE) + if (bcsr_data->board_status & CONFIG_SYS_BCSR3_PCIE) gd->board_type = BOARD_CANYONLANDS_PCIE; else gd->board_type = BOARD_CANYONLANDS_SATA; @@ -268,7 +314,7 @@ int checkboard(void) break; } - printf(", Rev. %X", in_8((void *)(CONFIG_SYS_BCSR_BASE + 0))); + printf(", Rev. %X", bcsr_data->cpld_rev); if (s != NULL) { puts(", serial# "); diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index ac9b3c5..e0ac3a2 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -77,6 +77,18 @@ #define CONFIG_SYS_PCIE0_XCFGBASE 0xc3000000 #define CONFIG_SYS_PCIE1_XCFGBASE 0xc3001000 +/* + * BCSR bits as defined in the ep460c board user manual + */ +#define BCSR_CPLDREV 0x00 +#define BCSR_BRDSTS 0x03 +#define BCSR_FLASHCTRL 0x05 +#define BCSR_ETHCTRL 0x06 +#define BCSR_USBCTRL 0x07 +#define BCSR_USBCTRL_OTG_RST 0x32 +#define BCSR_USBCTRL_HOST_RST 0x01 +#define CONFIG_SYS_BCSR3_PCIE 0x10 + #define CONFIG_SYS_PCIE0_UTLBASE 0xc08010000ULL /* 36bit physical addr */ /* base address of inbound PCIe window */ @@ -417,6 +429,7 @@ #define CONFIG_SYS_USB_OHCI_REGS_BASE (CONFIG_SYS_AHB_BASE | 0xd0000) #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ppc440" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#define CONFIG_SYS_USB_OHCI_BOARD_INIT #endif /* -- 1.5.6.3

3 2

[U-Boot] Greetings
by Mrs juliana Amber 07 Jul '10

07 Jul '10

I have been waiting for you to contact me for your Conformable Bank-draft of $750.000.00 United States Dollars,but I did not hear from you. Then I went and deposited the Draft with FedEx COURIER SERVICE,The only money you will send to the FedEX COURIER SERVICE to deliver your Draft direct to your postal Address in your country is ($150.00 US) Dollars only being Security Keeping Fee of the Courier Company so far.1) FULL NAMES: 2) CONTACT ADDRESS 3) PHONE NUMBER/FAX 4) COUNTRY

1 0

[U-Boot] [PATCH 1/5] Voipac PXA270 LCD Support
by Marek Vasut 06 Jul '10

06 Jul '10

Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> --- arch/arm/cpu/pxa/pxafb.c | 33 +++++++++++++++++++++++++++++++++ 1 files changed, 33 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/pxa/pxafb.c b/arch/arm/cpu/pxa/pxafb.c index d56c5f0..0bd52d4 100644 --- a/arch/arm/cpu/pxa/pxafb.c +++ b/arch/arm/cpu/pxa/pxafb.c @@ -112,6 +112,39 @@ vidinfo_t panel_info = { vl_efw: 0, }; #endif /* CONFIG_SHARP_LM8V31 */ +/*----------------------------------------------------------------------*/ +#ifdef CONFIG_VOIPAC_LCD + +# define LCD_BPP LCD_COLOR8 +# define LCD_INVERT_COLORS + +/* you have to set lccr0 and lccr3 (including pcd) */ +# define REG_LCCR0 0x043008f8 +# define REG_LCCR3 0x0340FF08 + +vidinfo_t panel_info = { + vl_col: 640, + vl_row: 480, + vl_width: 157, + vl_height: 118, + vl_clkp: CONFIG_SYS_HIGH, + vl_oep: CONFIG_SYS_HIGH, + vl_hsp: CONFIG_SYS_HIGH, + vl_vsp: CONFIG_SYS_HIGH, + vl_dp: CONFIG_SYS_HIGH, + vl_bpix: LCD_BPP, + vl_lbw: 0, + vl_splt: 1, + vl_clor: 1, + vl_tft: 1, + vl_hpw: 32, + vl_blw: 144, + vl_elw: 32, + vl_vpw: 2, + vl_bfw: 13, + vl_efw: 30, +}; +#endif /* CONFIG_VOIPAC_LCD */ /*----------------------------------------------------------------------*/ #ifdef CONFIG_HITACHI_SX14 -- 1.7.1

2 6

[U-Boot] Problem compiling u-boot for microblaze, libpost.a not found
by Carlos Salvador Pérez Salgado 06 Jul '10

06 Jul '10

first petalinux: ...petalinux-v0.40-rc4$ source ./settings.sh PetaLinux environment set to '/media/disk/uClinux/petalinux-v0.40-rc4' next uboot: ...u-boot-microblaze$ alias ubmake="make ARCH=microblaze CROSS_COMPILE=microblaze-uclinux- -j4" ...u-boot-microblaze$ ubmake O="../uboot_test/" distclean rm -rf /media/disk/uClinux/uboot_test/* ...u-boot-microblaze$ ubmake O="../uboot_test/" microblaze-generic_config Configuring for microblaze-generic board... ...u-boot-microblaze$ ubmake O="../uboot_test/" all make[1]: Entering directory `/media/disk/uClinux/u-boot-microblaze/post' (echo create /media/disk/uClinux/uboot_test/post/libpost.a; for lib in ; \ do echo addlib $lib; done; echo save) \ | microblaze-uclinux-ar -M *microblaze-uclinux-ar: Can't open output archive tmp-/media/disk/uClinux/uboot_test/post/libpost.a* make[1]: *** [/media/disk/uClinux/uboot_test/post/libpost.a] Error 9 make[1]: Leaving directory `/media/disk/uClinux/u-boot-microblaze/post' make: *** [/media/disk/uClinux/uboot_test/post/libpost.a] Error 2 make: *** Waiting for unfinished jobs.... I want to know how could I fix this. Thank you!

2 1

[U-Boot] [PATCH] PXA: New MMC driver
by Marek Vasut 06 Jul '10

06 Jul '10

The new driver is a complete rewrite. It uses the MMC framework and should support both pxa2xx and pxa3xx. This driver needs testing though. Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> --- drivers/mmc/Makefile | 1 + drivers/mmc/pxa_mmc_gen.c | 352 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 353 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/pxa_mmc_gen.c diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 6fa04b8..01338a4 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o +COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c new file mode 100644 index 0000000..1b0a460 --- /dev/null +++ b/drivers/mmc/pxa_mmc_gen.c @@ -0,0 +1,352 @@ +/* + * Copyright (C) 2010 Marek Vasut <marek.vasut(a)gmail.com> + * + * Loosely based on the old code and Linux's PXA MMC driver + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <malloc.h> + +#include <mmc.h> +#include <asm/errno.h> +#include <asm/arch/hardware.h> + +#include "pxa_mmc.h" + +#define PXA_MMC_TIMEOUT 100 + +static int pxa_mmc_stop_clock(void) +{ + int timeout = PXA_MMC_TIMEOUT; + + /* If the clock aren't running, exit */ + if (!(MMC_STAT & MMC_STAT_CLK_EN)) + return 0; + + /* Tell the controller to turn off the clock */ + MMC_STRPCL = MMC_STRPCL_STOP_CLK; + + /* Wait until the clock are off */ + while ((MMC_STAT & MMC_STAT_CLK_EN) && --timeout) + udelay(10); + + /* The clock refused to stop, scream and die a painful death */ + if (!timeout) + return -ETIMEDOUT; + + /* The clock stopped correctly */ + return 0; +} + +static int pxa_mmc_start_cmd(struct mmc_cmd *cmd, unsigned long cmdat) +{ + int timeout = PXA_MMC_TIMEOUT; + + /* The card can send a "busy" response */ + if (cmd->flags & MMC_RSP_BUSY) + cmdat |= MMC_CMDAT_BUSY; + + /* Inform the controller about response type */ + switch (cmd->resp_type) { + case MMC_RSP_R1: + case MMC_RSP_R1b: + cmdat |= MMC_CMDAT_R1; + break; + case MMC_RSP_R2: + cmdat |= MMC_CMDAT_R2; + break; + case MMC_RSP_R3: + cmdat |= MMC_CMDAT_R3; + break; + default: + break; + } + + /* Load command and it's arguments into the controller */ + MMC_CMD = cmd->cmdidx; + MMC_ARGH = cmd->cmdarg >> 16; + MMC_ARGL = cmd->cmdarg & 0xffff; + MMC_CMDAT = cmdat; + + /* Start the controller clock and wait until they are started */ + MMC_STRPCL = MMC_STRPCL_START_CLK; + while (!(MMC_STAT & MMC_STAT_CLK_EN) && --timeout) + udelay(10); + + /* The clock didn't start, we have a problem */ + if (!timeout) + return -ETIMEDOUT; + + /* Correct and happy end */ + return 0; +} + +static int pxa_mmc_cmd_done(struct mmc_cmd *cmd) +{ + unsigned long a, b, c; + int i; + int stat; + + /* Read the controller status */ + stat = MMC_STAT; + + /* + * Linux says: + * Did I mention this is Sick. We always need to + * discard the upper 8 bits of the first 16-bit word. + */ + a = MMC_RES & 0xffff; + for (i = 0; i < 4; i++) { + b = MMC_RES & 0xffff; + c = MMC_RES & 0xffff; + cmd->response[i] = (a << 24) | (b << 8) | (c >> 8); + a = c; + } + + /* The command response didn't arrive */ + if (stat & MMC_STAT_TIME_OUT_RESPONSE) + return -ETIMEDOUT; + else if (stat & MMC_STAT_RES_CRC_ERROR && cmd->flags & MMC_RSP_CRC) { +#if defined(CONFIG_PXA27X) + if (cmd->flags & MMC_RSP_136 && cmd->response[0] & 0x80000000) + printf("Ignoring CRC, this may be dangerous!\n"); + else +#endif + return -EILSEQ; + } + + /* The command response was successfully read */ + return 0; +} + +static int pxa_mmc_do_read_xfer(struct mmc_data *data) +{ + unsigned long len; + int i; + int timeout = PXA_MMC_TIMEOUT; + + len = data->blocks * data->blocksize; + + while (len) { + /* The controller has data ready */ + if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) { +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) + i = min(len, 32); +#else + i = 1; +#endif + while (i--) { + *data->dest++ = *((volatile uchar *)&MMC_RXFIFO); + len--; + } + } + + if (MMC_STAT & MMC_STAT_ERRORS) + return -EIO; + } + + /* Wait for the transmission-done interrupt */ + while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE) && --timeout) + udelay(10); + + if (!timeout) + return -ETIMEDOUT; + + return 0; +} + +static int pxa_mmc_do_write_xfer(struct mmc_data *data) +{ + unsigned long len; + int i, bytes; + int timeout = PXA_MMC_TIMEOUT; + + len = data->blocks * data->blocksize; + + while (len) { + /* The controller is ready to receive data */ + if (MMC_I_REG & MMC_I_REG_TXFIFO_WR_REQ) { + bytes = min(32, len); + + for (i = 0; i < bytes; i++) + MMC_TXFIFO = *data->src++; + + if (bytes < 32) + MMC_PRTBUF = MMC_PRTBUF_BUF_PART_FULL; + + len -= bytes; + } + + if (MMC_STAT & MMC_STAT_ERRORS) + return -EIO; + } + + /* Wait for the transmission-done interrupt */ + while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE) && --timeout) + udelay(10); + + if (!timeout) + return -ETIMEDOUT; + + /* Wait until the data are really written to the card */ + timeout = PXA_MMC_TIMEOUT; + while (!(MMC_I_REG & MMC_I_REG_PRG_DONE) && --timeout) + udelay(10); + + if (!timeout) + return -ETIMEDOUT; + + return 0; +} + +static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + unsigned long cmdat = 0; + int timeout = PXA_MMC_TIMEOUT; + int ret; + + /* Stop the controller */ + ret = pxa_mmc_stop_clock(); + if (ret) + return ret; + + /* If we're doing data transfer, configure the controller accordingly */ + if (data) { + MMC_NOB = data->blocks; + MMC_BLKLEN = data->blocksize; + /* This delay can be optimized, but stick with max value */ + MMC_RDTO = 0xffff; + cmdat |= MMC_CMDAT_DATA_EN; + if (data->flags & MMC_DATA_WRITE) + cmdat |= MMC_CMDAT_WRITE; + } + + /* Run in 4bit mode if the card can do it */ + if (mmc->bus_width == 4) + cmdat |= MMC_CMDAT_SD_4DAT; + + /* Execute the command */ + ret = pxa_mmc_start_cmd(cmd, cmdat); + if (ret) + return ret; + + /* Wait until the command completes */ + while (!(MMC_I_REG & MMC_I_REG_END_CMD_RES) && --timeout) + udelay(10); + + /* If the command doesn't complete, die */ + if (!timeout) + return -ETIMEDOUT; + + /* Read back the result */ + ret = pxa_mmc_cmd_done(cmd); + if (ret) + return ret; + + /* In case there was a data transfer scheduled, do it */ + if (data) { + if (data->flags & MMC_DATA_WRITE) + pxa_mmc_do_write_xfer(data); + else + pxa_mmc_do_read_xfer(data); + } + + return 0; +} + +static void pxa_mmc_set_ios(struct mmc *mmc) +{ + unsigned long tmp; + unsigned long pxa_mmc_clock; + + /* Set clock to the card */ + if (mmc->clock) { + /* PXA3xx can do 26MHz with special settings */ + if (mmc->clock == 26000000) + MMC_CLKRT = 0x7; + else { + pxa_mmc_clock = 0; + tmp = mmc->f_max / mmc->clock; + tmp += tmp % 2; + while (tmp > 1) { + pxa_mmc_clock++; + tmp >>= 1; + } + MMC_CLKRT = pxa_mmc_clock; + } + } else + pxa_mmc_stop_clock(); +} + +static int pxa_mmc_setup(struct mmc *mmc) +{ + + /* Enable MMC unit clock */ +#ifdef CONFIG_CPU_MONAHANS /* pxa3xx */ + CKENA |= CKENA_12_MMC0 | CKENA_13_MMC1; +#else /* pxa2xx */ + CKEN |= CKEN12_MMC; +#endif + /* Make sure the clock are stopped */ + pxa_mmc_stop_clock(); + /* Turn off SPI mode */ + MMC_SPI = MMC_SPI_DISABLE; + /* Set up maximum timeout to wait for command response */ + MMC_RESTO = MMC_RES_TO_MAX; + /* Mask all interrupts */ + MMC_I_MASK = MMC_I_MASK_ALL; + return 0; +} + +int pxa_mmc_init(bd_t *bis) +{ + struct mmc *mmc = NULL; + + mmc = malloc(sizeof(struct mmc)); + + if (!mmc) + return -ENOMEM; + sprintf(mmc->name, "PXA MMC"); + mmc->send_cmd = pxa_mmc_request; + mmc->set_ios = pxa_mmc_set_ios; + mmc->init = pxa_mmc_setup; + mmc->host_caps = MMC_MODE_4BIT; + + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; +#if defined(CONFIG_CPU_MONAHANS) + mmc->f_max = 26000000; + mmc->f_min = 304000; + mmc->host_caps |= MMC_MODE_HS; +#elif defined(CONFIG_PXA27X) + mmc->f_max = 19500000; + mmc->f_min = 304000; +#else + mmc->f_max = 20000000; + mmc->f_min = 3125000; +#endif + mmc_register(mmc); + + return 0; +} + +int cpu_mmc_init(bd_t *bis) +{ + return pxa_mmc_init(bis); +} -- 1.7.1

1 0

[U-Boot] boards.cfg: add missing entries for am3517_evm and s5p_goni
by Steve Sakoman 06 Jul '10

06 Jul '10

both machines seemed to have been dropped in the recent Makefile change Signed-off-by: Steve Sakoman <steve(a)sakoman.com> --- Note: this patch assumes the previous application of: [PATCH v4 1/6] ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7 diff --git a/boards.cfg b/boards.cfg index 988ad5d..46d966c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -254,6 +254,7 @@ imx27lite arm arm926ejs imx27lite logicpd mx27 magnesium arm arm926ejs imx27lite logicpd mx27 omap5912osk arm arm926ejs - ti omap edminiv2 arm arm926ejs - LaCie orion5x +am3517_evm arm armv7 am3517evm logicpd omap3 omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3 omap3_zoom1 arm armv7 zoom1 logicpd omap3 @@ -264,6 +265,7 @@ omap3_sdp3430 arm armv7 sdp3430 ti omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 devkit8000 arm armv7 devkit8000 timll omap3 +s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx ixdpg425 arm ixp lpd7a400 arm lh7a40x lpd7a40x

4 4

[U-Boot] mmc: add function prototype for mmc_set_dev in mmc.h
by Steve Sakoman 06 Jul '10

06 Jul '10

this eliminates compiler warnings when cmd_mmc.c is built with CONFIG_SYS_MMC_SET_DEV the mmc_set_dev implementation in omap3_mmc.c is also tweaked to match the new prototype in parameter naming and type Signed-off-by: Steve Sakoman <steve(a)sakoman.com> --- diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index 4eda216..9506cca 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -55,9 +55,9 @@ mmc_card_data cur_card_data; static block_dev_desc_t mmc_blk_dev; static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; -unsigned char mmc_set_dev(int dev) +int mmc_set_dev(int dev_num) { - switch (dev) { + switch (dev_num) { case 1: mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; break; diff --git a/include/mmc.h b/include/mmc.h index 8973bc7..fcb237e 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -271,6 +271,7 @@ int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); struct mmc *find_mmc_device(int dev_num); +int mmc_set_dev(int dev_num); void print_mmc_devices(char separator); int board_mmc_getcd(u8 *cd, struct mmc *mmc);

2 1