June 2010 - U-Boot

[U-Boot] [PATCH v3 0/2] Support for TI's DA850/OMAP-L138 platform
by Sudhakar Rajashekhara 01 Jun '10

01 Jun '10

This patch series adds support for TI's DA850/OMAP-L138 platform. I have reworked on this series based on the comments by Wolfgang Denk at [1] and Ben Gardiner at [2]. This series is dependant on the following patch which I have submitted earlier to u-boot list: [PATCH v2] da830: Move common code out of da830evm.c file [1] http://lists.denx.de/pipermail/u-boot/2010-May/071236.html [2] http://lists.denx.de/pipermail/u-boot/2010-May/071948.html Sudhakar Rajashekhara (2): TI: DaVinci: Prepare for da850 support TI: DaVinci: Add board specific code for da850 EVM MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 5 +- arch/arm/include/asm/arch-davinci/hardware.h | 1 + board/davinci/{da830evm => da8xxevm}/Makefile | 5 +- board/davinci/{da830evm => da8xxevm}/config.mk | 0 board/davinci/{da830evm => da8xxevm}/da830evm.c | 0 board/davinci/da8xxevm/da850evm.c | 110 ++++++++++++++++++ include/configs/da850evm.h | 140 +++++++++++++++++++++++ 9 files changed, 263 insertions(+), 3 deletions(-) rename board/davinci/{da830evm => da8xxevm}/Makefile (91%) rename board/davinci/{da830evm => da8xxevm}/config.mk (100%) rename board/davinci/{da830evm => da8xxevm}/da830evm.c (100%) create mode 100644 board/davinci/da8xxevm/da850evm.c create mode 100644 include/configs/da850evm.h

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[U-Boot] Does U-Boot support BCM5880 board ?
by Fernand LONE SANG 01 Jun '10

01 Jun '10

Hi, Do you know if the BCM5880 chip is supported by u-boot ? If yes, where is located the code associated to this board ? According to the output of this (http://www.codesourcery.com/archives/arm-gnu/msg01069.html) compilation error, u-boot had some code for the bcm5880. I downloaded the lastest sources from git and did a grep and find through all files but i did not find any code related to the chip. I am looking for some low level code to probe and pilot that chip. Do you have any hints for me? Regards, Fernand

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[U-Boot] Please Pull u-boot-ti/master
by s-paulraj＠ti.com 01 Jun '10

01 Jun '10

The following changes since commit 9bb3b3d4406c1e388a99f6fb189147d6a06cc2cf: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://git.denx.de/u-boot-ti.git master Sudhakar Rajashekhara (3): da830: Move common code out of da830evm.c file TI: DaVinci: Prepare for da850 support TI: DaVinci: Add board specific code for da850 MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 5 +- arch/arm/include/asm/arch-davinci/hardware.h | 1 + board/davinci/common/misc.c | 30 +++++ board/davinci/common/misc.h | 7 + board/davinci/{da830evm => da8xxevm}/Makefile | 5 +- board/davinci/{da830evm => da8xxevm}/config.mk | 0 board/davinci/{da830evm => da8xxevm}/da830evm.c | 28 ++--- board/davinci/da8xxevm/da850evm.c | 110 ++++++++++++++++++ include/configs/da850evm.h | 140 +++++++++++++++++++++++ 11 files changed, 311 insertions(+), 20 deletions(-) rename board/davinci/{da830evm => da8xxevm}/Makefile (91%) rename board/davinci/{da830evm => da8xxevm}/config.mk (100%) rename board/davinci/{da830evm => da8xxevm}/da830evm.c (90%) create mode 100644 board/davinci/da8xxevm/da850evm.c create mode 100644 include/configs/da850evm.h

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Re: [U-Boot] Resigning as the AVR32 custodian (was Re: AVR32 / ATNGW100 FLASH adressing issues)
by Haavard Skinnemoen 01 Jun '10

01 Jun '10

[resending because the mailing list was accidentally dropped from Cc] Reinhard Meyer <reinhard.meyer(a)emk-elektronik.de> wrote: > I would be willing to help solve the issue/dispute. Thanks. > Correct me if I am wrong: > > 1. The issue seems to be the requirement/wish by Wolfgang Denk that > virtual and physical addresses of flash should be 1:1 mapped? Correct. > 2. CFI Driver for parallel flash uses virtual adresses why? Any address accessed by the CPU is by definition virtual. > To be > compatible with serial flash? Or to generally avoid caching problems - > assuming every hardware can disable cache using the mmu? Various architectures provide different ways of managing the cache. Some (e.g. AVR32) do it via the MMU, others provide other mechanisms. This is why I added a generic function for mapping a physical address to a virtual address given a set of desired cache properties, and changed the CFI driver to use it. This worked very well, until the CFI driver was changed to do address calculations on virtual addresses instead of physical addresses. The proposed solution by Wolfgang is to toss that interface and instead introduce a "cache control" interface which is basically identical except that it doesn't return a virtual address. Since AVR32 uses the MMU to control caching properties, such an interface would be utterly useless. > 3. The default translation on AP700x is a0000000->00000000, non cached. The default translations are as follows: - 00000000 -> 00000000, cached - 80000000 -> 00000000, cached - a0000000 -> 00000000, uncached - e0000000 -> e0000000, uncached > 4. With some effort that could be changed to 00000000->00000000? The > effort would be to setup page tables in RAM? With some effort, anything is possible. However, adding full-blown paging support to a boot loader seems just wrong. For a generic solution, it's not enough to just load the necessary pages into the TLB; you'll have to implement a TLB miss exception handler to support the case where the TLB isn't large enough to hold all the mappings at once. > 5. The current u-Boot works fine with the default translation, provided > the environment sector is used with its virtual address AND commands > involving the flash (protect, erase, cp) are done using the virtual > addresses. Yes, but ironically enough, this used to work in terms of physical addresses. The problems with exposing virtual addresses through the user interface is that they might change in the future. > 6. That can be achieved by defining the ENV_ADDR accordingly OR by > changing the load/saveenv functionality to have the address translated first Yes, but the translation used to be localized in the CFI driver. Introducing physical-to-virtual mappings into all parts of the system _except_ the CFI driver seems like a huge step backwards. > 7. What issues do exist with the jffs2 file system in that context? I don't know. Haavard

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[U-Boot] [Fwd: Re: Resigning as the AVR32 custodian (was Re: AVR32 / ATNGW100 FLASH adressing issues)]
by Reinhard Meyer 01 Jun '10

01 Jun '10

Haavard Skinnemoen schrieb: > Wolfgang Denk <wd(a)denx.de> wrote: > >>> I think that the issue should be fixed by making sure FLASH is detected >>> at 0x00000000 and NOT at 0xa0000000, correct? >>> >> This has been discussed in one of the longer and more heated >> discussions on that list; see thread starting here: >> http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/66904 >> > > Right...and since we never reached an agreement, and I still have no > idea about how to bring the most popular AVR32 board into working > shape, it seems kind of pointless for me to continue as the AVR32 > custodian. In fact, I should probably have resigned a long time ago, > but this kind of failure is not easy to admit. > > Please remove me from the list. I'm sorry it didn't work out. > Hi, I would be willing to help solve the issue/dispute. Correct me if I am wrong: 1. The issue seems to be the requirement/wish by Wolfgang Denk that virtual and physical addresses of flash should be 1:1 mapped? 2. CFI Driver for parallel flash uses virtual adresses why? To be compatible with serial flash? Or to generally avoid caching problems - assuming every hardware can disable cache using the mmu? 3. The default translation on AP700x is a0000000->00000000, non cached. 4. With some effort that could be changed to 00000000->00000000? The effort would be to setup page tables in RAM? 5. The current u-Boot works fine with the default translation, provided the environment sector is used with its virtual address AND commands involving the flash (protect, erase, cp) are done using the virtual addresses. 6. That can be achieved by defining the ENV_ADDR accordingly OR by changing the load/saveenv functionality to have the address translated first 7. What issues do exist with the jffs2 file system in that context? With Best Regards Reinhard Meyer

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[U-Boot] [x86] use gc sections to reduce image size
by Graeme Russ 01 Jun '10

01 Jun '10

I have run a quick test on x86 with a saving of 5.8kB with no apparent problems. NOTE: If I add -fdata-sections as per the NIOS patches, U-Boot fails to run. I'm in the middle of a major re-write of the x86 startup code and will include this as a formal patch when that work is complete. Regards, Graeme diff --git a/arch/i386/config.mk b/arch/i386/config.mk index 4b990e0..0e80a1a 100644 --- a/arch/i386/config.mk +++ b/arch/i386/config.mk @@ -26,3 +26,6 @@ CROSS_COMPILE ?= i386-linux- STANDALONE_LOAD_ADDR = 0x40000 PLATFORM_CPPFLAGS += -DCONFIG_I386 -D__I386__ + +LDFLAGS += --cref --gc-sections +PLATFORM_RELFLAGS += -ffunction-sections diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds index d78d75f..7b211a8 100644 --- a/board/eNET/u-boot.lds +++ b/board/eNET/u-boot.lds @@ -77,13 +77,13 @@ SECTIONS _i386boot_bss_size = SIZEOF(.bss); /* 16bit realmode trampoline code */ - .realmode 0x7c0 : AT ( LOADADDR(.rel.dyn) + SIZEOF(.rel.dyn) ) { *(.realmode) } + .realmode 0x7c0 : AT ( LOADADDR(.rel.dyn) + SIZEOF(.rel.dyn) ) { KEEP(*(.realmode)) } _i386boot_realmode = LOADADDR(.realmode); _i386boot_realmode_size = SIZEOF(.realmode); /* 16bit BIOS emulation code (just enough to boot Linux) */ - .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { *(.bios) } + .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { KEEP(*(.bios)) } _i386boot_bios = LOADADDR(.bios); _i386boot_bios_size = SIZEOF(.bios); @@ -98,12 +98,12 @@ SECTIONS * The fff0 offset of resetvec is important, however. */ . = 0xfffffe00; - .start32 : AT (TEXT_BASE + 0x3fe00) { *(.start32); } + .start32 : AT (TEXT_BASE + 0x3fe00) { KEEP(*(.start32)); } . = 0xf800; - .start16 : AT (TEXT_BASE + 0x3f800) { *(.start16); } + .start16 : AT (TEXT_BASE + 0x3f800) { KEEP(*(.start16)); } . = 0xfff0; - .resetvec : AT (TEXT_BASE + 0x3fff0) { *(.resetvec); } + .resetvec : AT (TEXT_BASE + 0x3fff0) { KEEP(*(.resetvec)); } _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) ); }

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[U-Boot] USB support for OMAP 35 EVM (Mistral Revision G)
by Yedidia Amit 01 Jun '10

01 Jun '10

Hi All, Does anyone know if there is USB support for TI OMAP35 I Want to use it for burning the kernel and the filesystem (I don't have ethernet capabilities), and via serial it will take long time... Best Regrads, Amit Yedidia The information in this e-mail transmission contains proprietary and business sensitive information. Unauthorized interception of this e-mail may constitute a violation of law. If you are not the intended recipient, you are hereby notified that any review, dissemination, distribution or duplication of this communication is strictly prohibited. You are also asked to contact the sender by reply email and immediately destroy all copies of the original message.

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[U-Boot] [PATCH] Improve DaVinci SPI speed
by Delio Brignoli 01 Jun '10

01 Jun '10

Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and take advantage of the TX buffer in the SPI module. Signed-off-by: Delio Brignoli <dbrignoli(a)audioscience.com> --- drivers/spi/davinci_spi.c | 67 +++++++++++++++++++++++--------------------- 1 files changed, 35 insertions(+), 32 deletions(-) diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 60ba007..b4a74de 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -131,6 +131,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, { struct davinci_spi_slave *ds = to_davinci_spi(slave); unsigned int len, data1_reg_val = readl(&ds->regs->dat1); + unsigned int i_cnt = 0, o_cnt = 0, buf_reg_val; int ret, i; const u8 *txp = dout; /* dout can be NULL for read operation */ u8 *rxp = din; /* din can be NULL for write operation */ @@ -159,41 +160,43 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, readl(&ds->regs->buf); /* keep writing and reading 1 byte until done */ - for (i = 0; i < len; i++) { - /* wait till TXFULL is asserted */ - while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK); - - /* write the data */ - data1_reg_val &= ~0xFFFF; - if (txp) { - data1_reg_val |= *txp; - txp++; + while((i_cnt < len) || (o_cnt < len)) { + /* read RX buffer and flags */ + buf_reg_val = readl(&ds->regs->buf); + + /* if data is available */ + if ((i_cnt < len) && (buf_reg_val & SPIBUF_RXEMPTY_MASK) == 0) { + /* if there is no read buffer simply ignore the read character */ + if(rxp) { + *rxp = buf_reg_val & 0xFF; + rxp++; + } + /* increment read words count */ + i_cnt++; } - /* - * Write to DAT1 is required to keep the serial transfer going. - * We just terminate when we reach the end. - */ - if ((i == (len - 1)) && (flags & SPI_XFER_END)) { - /* clear CS hold */ - writel(data1_reg_val & - ~(1 << SPIDAT1_CSHOLD_SHIFT), &ds->regs->dat1); - } else { - /* enable CS hold */ - data1_reg_val |= ((1 << SPIDAT1_CSHOLD_SHIFT) | + /* if the tx buffer is empty and there is still data to transmit */ + if ((o_cnt < len) && ((buf_reg_val & SPIBUF_TXFULL_MASK) == 0)) { + /* write the data */ + data1_reg_val &= ~0xFFFF; + if(txp) { + data1_reg_val |= *txp; + txp++; + } + /* write to DAT1 is required to keep the serial transfer going */ + /* we just terminate when we reach the end */ + if((o_cnt == (len -1)) && (flags & SPI_XFER_END)) { + /* clear CS hold */ + writel(data1_reg_val & + ~(1 << SPIDAT1_CSHOLD_SHIFT), &ds->regs->dat1); + } else { + /* enable CS hold and write TX register */ + data1_reg_val |= ((1 << SPIDAT1_CSHOLD_SHIFT) | (slave->cs << SPIDAT1_CSNR_SHIFT)); - writel(data1_reg_val, &ds->regs->dat1); - } - - /* read the data - wait for data availability */ - while (readl(&ds->regs->buf) & SPIBUF_RXEMPTY_MASK); - - if (rxp) { - *rxp = readl(&ds->regs->buf) & 0xFF; - rxp++; - } else { - /* simply drop the read character */ - readl(&ds->regs->buf); + writel(data1_reg_val, &ds->regs->dat1); + } + /* increment written words count */ + o_cnt++; } } return 0; -- 1.6.3.3

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[U-Boot] AVR32 / ATNGW100 FLASH adressing issues
by Reinhard Meyer 01 Jun '10

01 Jun '10

Hello, currently the actual u-Boot (U-Boot 2010.03-00351-g40792d6-dirty) for AVR32/ATNGW100 defines FLASH to be at 0x00000000 (which is the true physical address): #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x800000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 135 and TEXT_BASE = 0x00000000 however the "flinfo" command show FLASH to be at 0xa0000000 (which is translated to 0x00000000 by default) any commands using FLASH (protect, copy, ...) must therefore use addresses at 0xa0000000 otherwise it will be denied not being in the FLASH address range. To make "saveenv" work, the definition had to be changed to: /*#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)*/ #define CONFIG_ENV_ADDR (0xA07F0000) So far I could be happy, BUT 1. this seems like a bad hack 2. u-Boot is not aware of its sectors in the FLASH I would like to fix this in a better way, but would like suggestions of where to attack the issue. I think that the issue should be fixed by making sure FLASH is detected at 0x00000000 and NOT at 0xa0000000, correct?

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[U-Boot] [PATCH v3] da830: Move common code out of da830evm.c file
by Sudhakar Rajashekhara 01 Jun '10

01 Jun '10

TI's DA850/OMAP-L138 platform is similar to DA830/OMAP-L137 in many aspects. So instead of repeating the same code in multiple files, move the common code to a different file and call those functions from the respective da830/da850 files. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj(a)ti.com> Acked-by: Nick Thompson <nick.thompson(a)ge.com> Acked-by: Ben Gardiner <bengardiner(a)nanometrics.ca> --- Since v2: Fixed following compiler warning in da830evm.c file. ... da830evm.c:124: warning: missing braces around initializer da830evm.c:124: warning: (near initialization for 'lpsc[0]') ... board/davinci/common/misc.c | 30 ++++++++++++++++++++++++++++++ board/davinci/common/misc.h | 7 +++++++ board/davinci/da830evm/da830evm.c | 28 +++++++++++----------------- 3 files changed, 48 insertions(+), 17 deletions(-) diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index 25ca326..412ab50 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -41,6 +41,22 @@ int dram_init(void) return(0); } +void irq_init(void) +{ + /* + * Mask all IRQs by clearing the global enable and setting + * the enable clear for all the 90 interrupts. + */ + + writel(0, &davinci_aintc_regs->ger); + + writel(0, &davinci_aintc_regs->hier); + + writel(0xffffffff, &davinci_aintc_regs->ecr1); + writel(0xffffffff, &davinci_aintc_regs->ecr2); + writel(0xffffffff, &davinci_aintc_regs->ecr3); +} + #ifdef CONFIG_DRIVER_TI_EMAC /* Read ethernet MAC address from EEPROM for DVEVM compatible boards. @@ -186,3 +202,17 @@ int davinci_configure_pin_mux_items(const struct pinmux_resource *item, return 0; } + +/* + * Enable PSC for various peripherals. + */ +int davinci_configure_lpsc_items(const struct lpsc_resource *item, + const int n_items) +{ + int i; + + for (i = 0; i < n_items; i++) + lpsc_on(item[i].lpsc_no); + + return 0; +} diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h index 329c369..ee35f01 100644 --- a/board/davinci/common/misc.h +++ b/board/davinci/common/misc.h @@ -45,10 +45,17 @@ struct pinmux_resource { .n_pins = ARRAY_SIZE(item) \ } +struct lpsc_resource { + const int lpsc_no; +}; + +void irq_init(void); int dvevm_read_mac_address(uint8_t *buf); void dv_configure_mac_address(uint8_t *rom_enetaddr); int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins); int davinci_configure_pin_mux_items(const struct pinmux_resource *item, int n_items); +int davinci_configure_lpsc_items(const struct lpsc_resource *item, + int n_items); #endif /* __MISC_H */ diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c index 6385443..ed89473 100644 --- a/board/davinci/da830evm/da830evm.c +++ b/board/davinci/da830evm/da830evm.c @@ -120,21 +120,18 @@ static const struct pinmux_resource pinmuxes[] = { #endif }; +static const struct lpsc_resource lpsc[] = { + { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ + { DAVINCI_LPSC_SPI0 }, /* Serial Flash */ + { DAVINCI_LPSC_EMAC }, /* image download */ + { DAVINCI_LPSC_UART2 }, /* console */ + { DAVINCI_LPSC_GPIO }, +}; + int board_init(void) { #ifndef CONFIG_USE_IRQ - /* - * Mask all IRQs by clearing the global enable and setting - * the enable clear for all the 90 interrupts. - */ - - writel(0, &davinci_aintc_regs->ger); - - writel(0, &davinci_aintc_regs->hier); - - writel(0xffffffff, &davinci_aintc_regs->ecr1); - writel(0xffffffff, &davinci_aintc_regs->ecr2); - writel(0xffffffff, &davinci_aintc_regs->ecr3); + irq_init(); #endif #ifdef CONFIG_NAND_DAVINCI @@ -165,11 +162,8 @@ int board_init(void) * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ - lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ - lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */ - lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ - lpsc_on(DAVINCI_LPSC_UART2); /* console */ - lpsc_on(DAVINCI_LPSC_GPIO); + if (davinci_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) + return 1; /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & -- 1.5.6

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