June 2010 - U-Boot

[U-Boot] [PATCH V5] PPC LBC/TLB cleanups; reginfo command for 85xx
by Becky Bruce 17 Jun '10

17 Jun '10

This somewhat random patch series got its start when I was asked to create a reginfo command for 85xx by one of the internal teams here at FSL to dump the BR/ORs, LAWs, and the TLBCAM entries. As I started doing that, I began to notice that there was a lot of duplicated and inconsistent code for manipulating the TLBs and LBC registers, which, in some cases, would have caused me to have to write extra code to make reginfo useful on multiple platforms. So I decided to clean this up. The bulk of these patches are just merges of duplicated code and renames of things to get to a consistent naming scheme. These really need to be picked up by a single maintainer, as there's a definite dependency chain here; I'll let Kumar and Wolfgang decide who wants it. Note: Changes from the last rev - added missing 83xx platform as pointed out by Kim P, removed unnecessary volatile as pointed out by Timur, and reworded a misleading comment per Scott W. I've also rebased this onto -next. Errr.... forgot to number the patches on V4, duh. Diffstat below. Cheers, Becky MAKEALL | 2 + Makefile | 1 + arch/powerpc/cpu/mpc83xx/cpu.c | 66 ------------ arch/powerpc/cpu/mpc83xx/cpu_init.c | 53 ++-------- arch/powerpc/cpu/mpc83xx/nand_init.c | 4 +- arch/powerpc/cpu/mpc83xx/speed.c | 2 +- arch/powerpc/cpu/mpc85xx/cpu.c | 78 +++----------- arch/powerpc/cpu/mpc85xx/cpu_init.c | 58 +---------- arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 6 +- arch/powerpc/cpu/mpc85xx/speed.c | 5 +- arch/powerpc/cpu/mpc85xx/tlb.c | 70 ++++++++----- arch/powerpc/cpu/mpc86xx/cpu.c | 15 +--- arch/powerpc/cpu/mpc86xx/cpu_init.c | 55 +---------- arch/powerpc/cpu/mpc86xx/speed.c | 5 +- arch/powerpc/cpu/mpc8xxx/Makefile | 3 + arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 135 ++++++++++++++++++++++++ arch/powerpc/include/asm/config.h | 6 + arch/powerpc/include/asm/fsl_law.h | 1 + arch/powerpc/include/asm/fsl_lbc.h | 112 ++++++++++++-------- arch/powerpc/include/asm/immap_83xx.h | 13 ++- arch/powerpc/include/asm/immap_85xx.h | 46 +-------- arch/powerpc/include/asm/immap_86xx.h | 49 +-------- arch/powerpc/include/asm/mmu.h | 2 + board/atum8548/atum8548.c | 2 +- board/esd/vme8349/vme8349.c | 2 +- board/freescale/mpc8313erdb/sdram.c | 2 +- board/freescale/mpc8349emds/mpc8349emds.c | 2 +- board/freescale/mpc8349itx/mpc8349itx.c | 7 +- board/freescale/mpc8360emds/mpc8360emds.c | 6 +- board/freescale/mpc8360erdk/nand.c | 6 +- board/freescale/mpc8540ads/mpc8540ads.c | 8 +- board/freescale/mpc8541cds/mpc8541cds.c | 13 +-- board/freescale/mpc8544ds/mpc8544ds.c | 2 +- board/freescale/mpc8548cds/mpc8548cds.c | 13 +-- board/freescale/mpc8555cds/mpc8555cds.c | 12 +-- board/freescale/mpc8560ads/mpc8560ads.c | 8 +- board/freescale/mpc8568mds/mpc8568mds.c | 11 +-- board/freescale/mpc8569mds/mpc8569mds.c | 2 +- board/mpc8540eval/mpc8540eval.c | 6 +- board/pm854/pm854.c | 2 +- board/pm856/pm856.c | 2 +- board/sbc8349/sbc8349.c | 2 +- board/sbc8548/sbc8548.c | 20 +--- board/sbc8560/sbc8560.c | 6 +- board/sheldon/simpc8313/sdram.c | 2 +- board/sheldon/simpc8313/simpc8313.c | 2 +- board/socrates/socrates.c | 31 +++--- board/tqc/tqm834x/tqm834x.c | 8 +- board/tqc/tqm85xx/nand.c | 12 +- board/tqc/tqm85xx/tqm85xx.c | 35 +++--- board/xes/xpedite5170/xpedite5170.c | 10 +- board/xes/xpedite5200/xpedite5200.c | 11 +- board/xes/xpedite5370/xpedite5370.c | 9 +- common/cmd_reginfo.c | 5 + drivers/misc/fsl_law.c | 131 ++++++++++-------------- drivers/mtd/nand/fsl_elbc_nand.c | 18 ++-- drivers/usb/host/ohci-hcd.c | 11 -- drivers/usb/host/ohci.h | 13 +++ include/configs/MPC8313ERDB.h | 1 + include/configs/MPC8315ERDB.h | 1 + include/configs/MPC837XEMDS.h | 1 + include/configs/MPC837XERDB.h | 1 + include/configs/MPC8536DS.h | 1 + include/configs/MPC8540EVAL.h | 1 + include/configs/MPC8541CDS.h | 1 + include/configs/MPC8544DS.h | 1 + include/configs/MPC8548CDS.h | 1 + include/configs/MPC8555CDS.h | 1 + include/configs/MPC8560ADS.h | 1 + include/configs/MPC8568MDS.h | 1 + include/configs/MPC8569MDS.h | 1 + include/configs/MPC8572DS.h | 1 + include/configs/P1_P2_RDB.h | 1 + include/configs/P2020DS.h | 1 + include/configs/PM854.h | 1 + include/configs/PM856.h | 1 + include/configs/SBC8540.h | 1 + include/configs/SIMPC8313.h | 1 + include/configs/TQM85xx.h | 1 + include/configs/XPEDITE5200.h | 1 + include/configs/XPEDITE5370.h | 2 + include/configs/sbc8548.h | 1 + include/configs/sbc8560.h | 1 + include/configs/socrates.h | 1 + include/configs/stxgp3.h | 1 + include/configs/stxssa.h | 1 + include/mpc85xx.h | 2 - nand_spl/board/freescale/mpc8536ds/nand_boot.c | 5 +- nand_spl/nand_boot_fsl_elbc.c | 4 +- 89 files changed, 528 insertions(+), 731 deletions(-)

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[U-Boot] SSP and SA1111 misbehaving
by Kristoffer Ericson 16 Jun '10

16 Jun '10

Greetings, Im having great difficulty deciding where the error exists, if its inside kernel or bootloader. What Im seeing is problems initializing hardware when using Flashrom + U-boot + 2.6.32: SA1111 fails to set trigger mode 3 SSP seems fine but doesnt work when trying to use it, it just times out. Ive configured u-boot to essentially only configure memory and standard booting policy (d-cache off, no irqs). Grateful for any feedback/advice on this. Best wishes Kristoffer

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[U-Boot] Linking some code to internal SRAM instead of SDRAM
by Alexander Stein 16 Jun '10

16 Jun '10

Hello, I have an at91 based board which starts from NOR flash. I have an ugly workaround in lowlevel_init.S that switching from slowclock to PLLA is done from the internal SRAM instead directly from NOR which is not possible as the NOR flash timing are also affected. So i copied some data around using existing an new labels. A new approach would be to link lowlevel_init directly at 0x00200000 (which is AT91SAM9260_SRAM0_BASE) but the code is located next to the "normal" .text segment. I've prepared a change to cpu/arm926ejs/u-boot.lds (I know it's still 2010.3 but that shouldn't matter now) which links lowlevel_init to 0x00200000. I added the symbols __lowlevel_init_start and __lowlevel_init_end to be used to copy the function from it's LMA to it's VMA address. I'm rather unsure if this will work as I thought, Of course more has to be done, like * Make SRAM address configureable * Only link to this if CONFIG_SKIP_LOWLEVEL_INIT is not defined * Maybe create a region for that * ... Any opinions, hints, more elegant methods? diff --git a/cpu/arm926ejs/u-boot.lds b/cpu/arm926ejs/u-boot.lds index ee5eeb5..c368822 100644 --- a/cpu/arm926ejs/u-boot.lds +++ b/cpu/arm926ejs/u-boot.lds @@ -32,9 +32,16 @@ SECTIONS .text : { cpu/arm926ejs/start.o (.text) + *(EXCLUDE_FILE(*lowlevel_init.o) .text) + } + __lowlevel_init_start = .; + .lowlevel_init 0x00200000 : AT ( ADDR (.text) + SIZEOF (.text) ) + { *(.text) } + __lowlevel_init_end = .; + . = ADDR (.text) + SIZEOF (.text) + SIZEOF(.lowlevel_init); . = ALIGN(4); .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } Best regards Alexander

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[U-Boot] [PATCH 1/2] sh: Fix path of irqflags.h
by Nobuhiro Iwamatsu 16 Jun '10

16 Jun '10

This changes path of irqflags.h from linux/ to asm/. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- arch/sh/include/asm/system.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index a62c422..90a53a0 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h @@ -8,7 +8,7 @@ * from linux kernel code. */ -#include <linux/irqflags.h> +#include <asm/irqflags.h> #include <asm/types.h> /* -- 1.7.1

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[U-Boot] DDR3 initialization fails after cold boot
by prakash bedge 16 Jun '10

16 Jun '10

Hi, I am trying to initialize the DDR3 present on my board, using the u-boot with DMA engine on my board. My board is mounted on linux machine. DDR3 initialization completes successfully after warm boot (given init 6 command on linux). But the same u-boot code fails after cold boot (given init 0 command on linux and then power on). Also I am seeing that in u-boot timing might be not correct. udelay(14000000) function should generate 14 sec delay but it generates delay of only 5 seconds. I doubt that timing might be issue but I believe that in u-boot udelay function is correct. What should be cause behind this cold boot issue for DDr3 initialization? Need some inputs. Please respond. Thanks & Regards, Prakash

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[U-Boot] [PATCH] nios2: add fdt support
by Thomas Chou 16 Jun '10

16 Jun '10

This patch adds fdt support to boot linux, followed Michal's work on microblaze. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/lib/bootm.c | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+), 0 deletions(-) diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c index 5d25edf..defa1fc 100644 --- a/arch/nios2/lib/bootm.c +++ b/arch/nios2/lib/bootm.c @@ -34,6 +34,18 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) char *commandline = getenv("bootargs"); ulong initrd_start = images->rd_start; ulong initrd_end = images->rd_end; + char *of_flat_tree = NULL; +#if defined(CONFIG_OF_LIBFDT) + ulong of_size = 0; + + /* find flattened device tree */ + if (boot_get_fdt(flag, argc, argv, images, &of_flat_tree, &of_size)) + return 1; +#endif + if (!of_flat_tree) + of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16); + if (of_flat_tree) + initrd_end = (ulong)of_flat_tree; if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) return 1; @@ -45,6 +57,15 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) debug("bootargs=%s @ 0x%lx\n", commandline, (ulong)&commandline); debug("initrd=0x%lx-0x%lx\n", (ulong)initrd_start, (ulong)initrd_end); + /* kernel parameters passing + * r4 : NIOS magic + * r5 : initrd start + * r6 : initrd end or fdt + * r7 : kernel command line + * fdt is passed to kernel via r6, the same as initrd_end. fdt will be + * verified with fdt magic. when both initrd and fdt are used at the + * same time, fdt must follow immediately after initrd. + */ kernel(NIOS_MAGIC, initrd_start, initrd_end, commandline); /* does not return */ -- 1.7.1.86.g0e460

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[U-Boot] [PATCH] nios2: use gc sections to reduce image size
by Thomas Chou 16 Jun '10

16 Jun '10

Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size. Configuring for nios2-generic board... Before, text data bss dec hex filename 123979 3724 22892 150595 24c43 /tmp/u-boot/u-boot After, text data bss dec hex filename 115983 3800 22732 142515 22cb3 /tmp/u-boot/u-boot Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/config.mk | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk index 793cc43..aba96b3 100644 --- a/arch/nios2/config.mk +++ b/arch/nios2/config.mk @@ -31,2 +31,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds + +LDFLAGS += --gc-sections +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -- 1.7.1.86.g0e460

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[U-Boot] [PATCH 2/2] sh: Fix overflow problem in get_ticks
by Nobuhiro Iwamatsu 16 Jun '10

16 Jun '10

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/sh/lib/time.c | 20 ++++++++++++++++++-- 1 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index 9a8f89a..bc1656f 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -2,7 +2,7 @@ * (C) Copyright 2009 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> * - * (C) Copyright 2007-2008 + * (C) Copyright 2007-2010 * Nobobuhiro Iwamatsu <iwamatsu(a)nigauri.org> * * (C) Copyright 2003 @@ -36,6 +36,8 @@ #define TMU_MAX_COUNTER (~0UL) static ulong timer_freq; +static unsigned long last_tcnt; +static unsigned long long overflow_ticks; static inline unsigned long long tick_to_time(unsigned long long tick) { @@ -97,12 +99,26 @@ int timer_init (void) tmu_timer_stop(0); tmu_timer_start(0); + last_tcnt = 0; + overflow_ticks = 0; + return 0; } unsigned long long get_ticks (void) { - return 0 - readl(TCNT0); + unsigned long tcnt = 0 - readl(TCNT0); + unsigned long ticks; + + if (last_tcnt > tcnt) { /* overflow */ + overflow_ticks++; + ticks = (0xffffffff - last_tcnt) + tcnt; + } else { + ticks = tcnt; + } + last_tcnt = tcnt; + + return (overflow_ticks << 32) | tcnt; } void __udelay (unsigned long usec) -- 1.7.1

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[U-Boot] [PATCH 1/2] sh: Fix build on the target
by Nobuhiro Iwamatsu 16 Jun '10

16 Jun '10

SH fails building on the target. This supports this. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- Makefile | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/Makefile b/Makefile index 9b14733..b507dc2 100644 --- a/Makefile +++ b/Makefile @@ -40,7 +40,8 @@ HOSTARCH := $(shell uname -m | \ -e s/sa110/arm/ \ -e s/ppc64/powerpc/ \ -e s/ppc/powerpc/ \ - -e s/macppc/powerpc/) + -e s/macppc/powerpc/\ + -e s/sh.*/sh/) HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \ sed -e 's/$cygwin$.*/cygwin/') -- 1.7.1

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[U-Boot] [PATCH] USB OHCI support for at91sam9g45 SoC
by Sergey Matyukevich 15 Jun '10

15 Jun '10

Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards. Note that according to errata from Atmel, OHCI is not operational on the first revision of at91sam9g45 chip. So this patch enables OHCI support for later revisions. Signed-off-by: Sergey Matyukevich <geomatsi(a)gmail.com> --- arch/arm/include/asm/arch-at91/at91_pmc.h | 14 ++++++++++++-- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 13 +++++++++++++ drivers/usb/host/ohci-at91.c | 13 +++++++++++++ 3 files changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h index 5b1a85d..2f9ad96 100644 --- a/arch/arm/include/asm/arch-at91/at91_pmc.h +++ b/arch/arm/include/asm/arch-at91/at91_pmc.h @@ -35,13 +35,15 @@ typedef struct at91_pmc { u32 pcer; /* 0x10 Peripheral Clock Enable Register */ u32 pcdr; /* 0x14 Peripheral Clock Disable Register */ u32 pcsr; /* 0x18 Peripheral Clock Status Register */ - u32 reserved1; + u32 uckr; /* 0x1C UTMI Clock Register */ u32 mor; /* 0x20 Main Oscilator Register */ u32 mcfr; /* 0x24 Main Clock Frequency Register */ u32 pllar; /* 0x28 PLL A Register */ u32 pllbr; /* 0x2C PLL B Register */ u32 mckr; /* 0x30 Master Clock Register */ - u32 reserved2[3]; + u32 reserved1; + u32 usb; /* 0x38 USB Clock Register */ + u32 reserved2; u32 pck[4]; /* 0x40 Programmable Clock Register 0 - 3 */ u32 reserved3[4]; u32 ier; /* 0x60 Interrupt Enable Register */ @@ -199,6 +201,14 @@ typedef struct at91_pmc { #define AT91_PMC_PDIV_2 (1 << 12) #ifdef CONFIG_AT91_LEGACY +#define AT91_PMC_USB (AT91_PMC + 0x38) /* USB Clock Register */ +#endif +#define AT91_PMC_USBS_USB_PLLA (0x0) /* USB Clock Input is PLLA */ +#define AT91_PMC_USBS_USB_UPLL (0x1) /* USB Clock Input is UPLL */ +#define AT91_PMC_USBDIV_8 (0x7 << 8) /* USB Clock divided by 8 */ +#define AT91_PMC_USBDIV_10 (0x9 << 8) /* USB Clock divided by 10 */ + +#ifdef CONFIG_AT91_LEGACY #define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ #define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index edfb627..8fa0449 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -87,6 +87,16 @@ static void at91sam9m10g45ek_nand_hw_init(void) } #endif +#ifdef CONFIG_CMD_USB +static void at91sam9m10g45ek_usb_hw_init(void) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE); + + at91_set_gpio_output(AT91_PIN_PD1, 0); + at91_set_gpio_output(AT91_PIN_PD3, 0); +} +#endif + #ifdef CONFIG_MACB static void at91sam9m10g45ek_macb_hw_init(void) { @@ -251,6 +261,9 @@ int board_init(void) #ifdef CONFIG_CMD_NAND at91sam9m10g45ek_nand_hw_init(); #endif +#ifdef CONFIG_CMD_USB + at91sam9m10g45ek_usb_hw_init(); +#endif #ifdef CONFIG_HAS_DATAFLASH at91_spi0_hw_init(1 << 0); #endif diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index b2e03bc..f791df7 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -41,6 +41,14 @@ int usb_cpu_init(void) writel(get_pllb_init(), &pmc->pllbr); while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) ; +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) + /* Enable UPLL */ + writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr); + while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU) + ; + + /* Select PLLA as input clock of OHCI */ + writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb); #endif /* Enable USB host clock. */ @@ -72,6 +80,11 @@ int usb_cpu_stop(void) writel(0, &pmc->pllbr); while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) ; +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) + /* Disable UPLL */ + writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr); + while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) + ; #endif return 0; -- 1.6.2.5

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