June 2010 - U-Boot

[U-Boot] [PATCH 0/6] Update kirkwood egiga to allow dynamic phy addrs
by Tor Krill 24 Jun '10

24 Jun '10

Today the kirkwood egiga driver assumes that phy addresses are consecutive from a base address. Our new board design using this cpu unfortunately has a non contiguous addressing of its phys and thus doesn't work with the current implementation. This patchset updates the implementation to use an array of phy addresses as configuration. Tor Krill (6): Allow PHY addresses on kirkwood egiga to be non continuous. Convert Suen3 board to use array of phy addrs Convert Sheevaplug board to use array of phy addrs Convert OpenRD board to use array of phy addrs Convert Guruplug board to use array of phy addrs Convert rd6281a board to use array of phy addrs board/keymile/km_arm/km_arm.c | 3 ++- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- include/configs/guruplug.h | 2 +- include/configs/km_arm.h | 2 +- include/configs/openrd_base.h | 2 +- include/configs/rd6281a.h | 2 +- include/configs/sheevaplug.h | 2 +- 8 files changed, 13 insertions(+), 11 deletions(-)

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[U-Boot] Compiling U-Boot for OMAP 3530 Thunder with network support
by cactus.fossil＠googlemail.com 24 Jun '10

24 Jun '10

How do I compile U-Boot for the OMAP 3530 Thunder board with network support? The latest official U-Boot tarball seems to lack the omap3_thunder_config option, which is included in the TechNexion release. But even using the latter release, how do I configure network (NFS, TFTP) support for the SMSC 9500 USB/Ethernet controller? Thank you for any help. Alex

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[U-Boot] Uboot error stops after sometime in at91rm9200dk board
by Rajeesh.R 24 Jun '10

24 Jun '10

Hi, I am using at91rm9200 dk board . I have downloaded Uboot version 1.3.4 . and configured for at91rm9200dk board by using command make at91rm9200dk_config make then I tried to download it stops after some time with error waiting for ACK,97,138,...Error! whether Rom boot is required for at91rm9200dk board... pls help me... Regards Rajeesh

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[U-Boot] freebsd 8 installer on MPC8349E-mITX
by Zied Fakhfakh 24 Jun '10

24 Jun '10

Hi am trying to boot, freebsd 8 instalelr on the MPC8349E-mITX. I loaded the ubldr: MPC8349E-mITX> tftpboot $loadaddr freebsd8/boot/ubldr Speed: 100, full duplex Using TSEC0 device TFTP from server 192.168.0.194; our IP address is 192.168.0.248 Filename 'freebsd8/boot/ubldr'. Load address: 0x800000 Loading: ############# done Bytes transferred = 177964 (2b72c hex) and than trying to boot: MPC8349E-mITX> bootelf $loadaddr ## Starting application at 0x00010080 ... Bad trap at PC: 2ee08, SR: 3032, vector=300 NIP: 0002EE08 XER: 20000000 LR: 0002A2DC REGS: 0ff52b18 TRAP: 0300 DAR: 10000000 MSR: 00003032 EE: 0 PR: 0 FP: 1 ME: 1 IR/DR: 11 GPR00: 00000000 0FF52C08 0FF52F50 10000000 00035EF8 00000008 00000000 00000000 GPR08: 00000000 00000055 00000021 00003032 48044042 0D1A0082 00000000 00000000 GPR16: 0FFB5A14 0FFBC2C0 00000000 00000000 00000000 00000000 00000000 00000000 GPR24: 00000000 0FF52C24 0FF52C10 00035EF8 0FF52C60 101FFFF8 00032A8C 10000000 Call backtrace: 0FF55338 00017C78 0FF84100 0FF841BC 0FF94CBC 0FF943D0 0FF9461C 0FF94BFC 0FF943D0 0FF94540 0FF97074 0FF79A24 0FF78600 Exception in kernel pc 2ee08 signal 0 Resetting the board. U-Boot 2010.03 (Jun 22 2010 - 15:17:07) MPC83XX .. . . . . . . . . . any idea ? -- Zied FAKHFAKH Dot TN - CTO @: fzied(a)dottn.com t: +216 71 82 89 58 f: +216 71 82 89 58 w: http://www.dottn.com a: Centre Molka, Esc E, Bur 17 - Manar 2 - 2092 - Tunis - Tunisia

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[U-Boot] [PATCH 2/2] NAND: add Toshiba TC58NVG0 identifier
by Florian Fainelli 23 Jun '10

23 Jun '10

The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1 identifier. Add these to the list of known devices IDs. Signed-off-by: Florian Fainelli <f.fainelli(a)gmail.com> --- diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 077c305..25b22ec 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -83,6 +83,7 @@ struct nand_flash_dev nand_flash_ids[] = { /* 1 Gigabit */ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS}, {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS}, + {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS}, {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16}, {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},

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[U-Boot] [PATCH 1/2] Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK definitions
by Wolfgang Denk 23 Jun '10

23 Jun '10

CONFIG_SYS_BUS_HZ has not really been used anywhere except to be redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the funtionality. Change all this to use CONFIG_SYS_BUS_CLK consistently. Signed-off-by: Wolfgang Denk <wd(a)denx.de> Cc: Frank Gottschling <fgottschling(a)eltec.de> Cc: Reinhard Arlt <reinhard.arlt(a)esd-electronics.com> Cc: Eran Man <eran(a)nbase.co.il> Cc: Stefan Roese <sr(a)denx.de> Cc: Nye Liu <nyet(a)zumanetworks.com> Cc: Roy Zang <tie-fei.zang(a)freescale.com> --- arch/powerpc/cpu/74xx_7xx/cpu.c | 14 ++++++-------- board/Marvell/db64360/sdram_init.c | 12 ++++++------ board/Marvell/db64460/sdram_init.c | 12 ++++++------ board/evb64260/mpsc.c | 2 +- include/configs/BAB7xx.h | 5 ++--- include/configs/CPCI750.h | 3 +-- include/configs/DB64360.h | 3 +-- include/configs/DB64460.h | 3 +-- include/configs/ELPPC.h | 5 ++--- include/configs/EVB64260.h | 3 +-- include/configs/P3G4.h | 3 +-- include/configs/PCIPPC2.h | 3 +-- include/configs/PCIPPC6.h | 3 +-- include/configs/ZUMA.h | 4 +--- include/configs/mpc7448hpc2.h | 2 +- include/configs/p3mx.h | 6 ++---- include/configs/ppmc7xx.h | 4 +--- 17 files changed, 35 insertions(+), 52 deletions(-) diff --git a/arch/powerpc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c index 3c17277..9248702 100644 --- a/arch/powerpc/cpu/74xx_7xx/cpu.c +++ b/arch/powerpc/cpu/74xx_7xx/cpu.c @@ -277,19 +277,17 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * For the 7400 the TB clock runs at 1/4 the cpu bus speed. */ -#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK) +#if defined(CONFIG_AMIGAONEG3SE) || !defined(CONFIG_SYS_BUS_CLK) +#define CONFIG_SYS_BUS_CLK gd->bus_clk +#endif + unsigned long get_tbclk(void) { - return (gd->bus_clk / 4); + return CONFIG_SYS_BUS_CLK / 4; } -#else /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/ -unsigned long get_tbclk (void) -{ - return CONFIG_SYS_BUS_HZ / 4; -} -#endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/ /* ------------------------------------------------------------------------- */ + #if defined(CONFIG_WATCHDOG) #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx) void diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c index d0817d7..d52d3f0 100644 --- a/board/Marvell/db64360/sdram_init.c +++ b/board/Marvell/db64360/sdram_init.c @@ -1290,37 +1290,37 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info) case 0x0: case 0x80: /* refresh period is 15.625 usec */ sdram_config_reg = - (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ) + (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x1: case 0x81: /* refresh period is 3.9 usec */ sdram_config_reg = - (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x2: case 0x82: /* refresh period is 7.8 usec */ sdram_config_reg = - (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x3: case 0x83: /* refresh period is 31.3 usec */ sdram_config_reg = - (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x4: case 0x84: /* refresh period is 62.5 usec */ sdram_config_reg = - (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x5: case 0x85: /* refresh period is 125 usec */ sdram_config_reg = - (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; default: /* refresh period undefined */ diff --git a/board/Marvell/db64460/sdram_init.c b/board/Marvell/db64460/sdram_init.c index 6d6b126..e328d8f 100644 --- a/board/Marvell/db64460/sdram_init.c +++ b/board/Marvell/db64460/sdram_init.c @@ -1289,37 +1289,37 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info) case 0x0: case 0x80: /* refresh period is 15.625 usec */ sdram_config_reg = - (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ) + (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x1: case 0x81: /* refresh period is 3.9 usec */ sdram_config_reg = - (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x2: case 0x82: /* refresh period is 7.8 usec */ sdram_config_reg = - (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x3: case 0x83: /* refresh period is 31.3 usec */ sdram_config_reg = - (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x4: case 0x84: /* refresh period is 62.5 usec */ sdram_config_reg = - (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; case 0x5: case 0x85: /* refresh period is 125 usec */ sdram_config_reg = - (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) / + (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) / (float) 1000000.0); break; default: /* refresh period undefined */ diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c index 8c4a4c8..bee04fd 100644 --- a/board/evb64260/mpsc.c +++ b/board/evb64260/mpsc.c @@ -390,7 +390,7 @@ galbrg_set_baudrate(int channel, int rate) #if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4) /* from tclk */ - clock = (CONFIG_SYS_BUS_HZ/(16*rate)) - 1; + clock = (CONFIG_SYS_BUS_CLK/(16*rate)) - 1; #else clock = (3686400/(16*rate)) - 1; #endif diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index 40a1c40..4d83786 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -436,9 +436,8 @@ extern unsigned char scsi_sym53c8xx_ccf; extern unsigned long bab7xx_get_bus_freq (void); extern unsigned long bab7xx_get_gclk_freq (void); #endif -#define CONFIG_SYS_BUS_HZ bab7xx_get_bus_freq() -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ -#define CONFIG_SYS_CPU_CLK bab7xx_get_gclk_freq() +#define CONFIG_SYS_BUS_CLK bab7xx_get_bus_freq() +#define CONFIG_SYS_CPU_CLK bab7xx_get_gclk_freq() /* * For booting Linux, the board info and command line data diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index 1c8c68b..f2d51f7 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -234,8 +234,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index 160871b..910933a 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -318,8 +318,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 400MHZ -> 5.0 ns, for 133MHZ -> 7.50 ns */ diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h index 06fd157..765eaaf 100644 --- a/include/configs/DB64460.h +++ b/include/configs/DB64460.h @@ -256,8 +256,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 200MHZ -> 5.0 ns, 166MHZ -> 6.0, 133MHZ -> 7.50 ns */ diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index d2aa8b9..84d27b6 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -314,9 +314,8 @@ /* * Speed settings are board specific */ -#define CONFIG_SYS_BUS_HZ 100000000 -#define CONFIG_SYS_CPU_CLK 400000000 -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 100000000 +#define CONFIG_SYS_CPU_CLK 400000000 /* * For booting Linux, the board info and command line data diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h index bf41c13..0903536 100644 --- a/include/configs/EVB64260.h +++ b/include/configs/EVB64260.h @@ -141,8 +141,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 100000000 /* 100 MHz */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 100000000 /* 100 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h index 971338a..890170d 100644 --- a/include/configs/P3G4.h +++ b/include/configs/P3G4.h @@ -168,8 +168,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index 99a8c4a..c30ac78 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -194,9 +194,8 @@ * For the detail description refer to the PCIPPC2 user's manual. */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */ +#define CONFIG_SYS_BUS_CLK 100000000 /* bus speed - 100 mhz */ #define CONFIG_SYS_CPU_CLK 300000000 -#define CONFIG_SYS_BUS_CLK 100000000 /* * For booting Linux, the board info and command line data diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index 66e6d24..bc67480 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -196,9 +196,8 @@ * For the detail description refer to the PCIPPC2 user's manual. */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */ +#define CONFIG_SYS_BUS_CLK 100000000 /* bus speed - 100 mhz */ #define CONFIG_SYS_CPU_CLK 300000000 -#define CONFIG_SYS_BUS_CLK 100000000 /* * For booting Linux, the board info and command line data diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h index b73aaa8..fcc47a9 100644 --- a/include/configs/ZUMA.h +++ b/include/configs/ZUMA.h @@ -164,9 +164,7 @@ #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */ - -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index be12186..497ea42 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -46,7 +46,7 @@ #define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II" #define CONFIG_SYS_OCN_CLK 133000000 /* 133 MHz */ -#define CONFIG_SYS_CONFIG_BUS_CLK 133000000 +#define CONFIG_SYS_BUS_CLK 133000000 #define CONFIG_SYS_CLK_SPREAD /* Enable Spread-Spectrum Clock generation */ diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h index 0749037..17ec08f 100644 --- a/include/configs/p3mx.h +++ b/include/configs/p3mx.h @@ -44,14 +44,12 @@ #define CONFIG_750FX /* 750GL/GX/FX */ #define CONFIG_HIGH_BATS /* High BATs supported */ #define CONFIG_SYS_BOARD_NAME "P3M750" -#define CONFIG_SYS_BUS_HZ 100000000 -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 100000000 #define CONFIG_SYS_TCLK 100000000 #elif defined (CONFIG_P3M7448) #define CONFIG_74xx #define CONFIG_SYS_BOARD_NAME "P3M7448" -#define CONFIG_SYS_BUS_HZ 133333333 -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133333333 #define CONFIG_SYS_TCLK 133333333 #endif #define CONFIG_SYS_GT_DUAL_CPU /* also for JTAG even with one cpu */ diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index 0fd8635..04779c4 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -355,12 +355,10 @@ /* * Clocks config * - * CONFIG_SYS_BUS_HZ - Bus clock frequency in Hz - * CONFIG_SYS_BUS_CLK - As above (?) + * CONFIG_SYS_BUS_CLK - Bus clock frequency in Hz * CONFIG_SYS_HZ - Decrementer freq in Hz */ -#define CONFIG_SYS_BUS_HZ CONFIG_BUS_CLK #define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK #define CONFIG_SYS_HZ 1000 -- 1.7.0.1

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[U-Boot] Your E-mail ID Has Been Awarded £950,000,00 GBP In Our Mercedes Benz Promo.Send Your:‏‏
by clyde-hedges＠att.net 23 Jun '10

23 Jun '10

Name:...Address:... Phone No:..Country

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[U-Boot] jffs2 in u-boot
by Moran, Jack 23 Jun '10

23 Jun '10

Hello, I am new to u-boot/linux and have some rookie questions. I need to support a JFFS2 file system in u-boot. My plan is to boot from uboot using mtd device and update any new images (field software upgrade) from the linux side. How can I add support for jffs2 in u-boot. Currently my u-boot bootloader does not support jffs2. What do I need to do to add this support? Thanks Jack John M Moran General Dynamics C4S 77 "A" St. Needham, MA, 02494 Phone: 781-455-4071 Email: jack.moran(a)gdc4s.com This message and/or attachments may include information subject to GDC4S O.M. 1.8.6 and GD Corporate Policy 07-105 and are intended to be accessed only by authorized recipients. Use, storage and transmission are governed by General Dynamics and its policies. Contractual restrictions apply to third parties. Recipients should refer to the policies or contract to determine proper handling. Unauthorized review, use, disclosure or distribution is prohibited. If you are not an intended recipient, please contact the sender and destroy all copies of the original message.

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[U-Boot] u-boot not giving output in Kermit on startup (OMAP3430 sdp)
by Shrikumar Sharma 23 Jun '10

23 Jun '10

Hi I flashed in the u-boot to the H6 omap3430 board, but i get a blank screen on reset; moreover, when I use kermit via Serial port COM1, Im able to connect but I do not get the u-boot shell. (I am a newbie...) Could someone tell me what I am doing wrong or missing here? Thanks in advance for helping me and Best regards Shrikumar Sharma

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[U-Boot] [PATCH 0/6] Update kirkwood egiga to allow dynamic phy addrs
by Tor Krill 23 Jun '10

23 Jun '10

Today the kirkwood egiga driver assumes that phy addresses are consecutive from a base address. Our new board design using this cpu unfortunately has a non contiguous addressing of its phys and thus doesn't work with the current implementation. This patchset updates the implementation to use an array of phy addresses as configuration. Tor Krill (6): Allow PHY addresses on kirkwood egiga to be non continuous. Convert Suen3 board to use array of phy addrs Convert Sheevaplug board to use array of phy addrs Convert OpenRD board to use array of phy addrs Convert Guruplug board to use array of phy addrs Convert rd6281a board to use array of phy addrs board/keymile/km_arm/km_arm.c | 3 ++- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- include/configs/guruplug.h | 2 +- include/configs/km_arm.h | 2 +- include/configs/openrd_base.h | 2 +- include/configs/rd6281a.h | 2 +- include/configs/sheevaplug.h | 2 +- 8 files changed, 13 insertions(+), 11 deletions(-)

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